BCM2835 Audio & PWM clocks

G.J. van Loo, 6 February 2013

1 PCM & PWM Clocks

The Audio clocks run from the peripherals clock sources and use clock generators with noise-shaping MASH dividers. MASH noise-shaping is incorporated to push the fractional divider  jitter out of the audio band if required. The MASH can be programmed for 1, 2 or 3-stage filtering. It is beyond the scope of this specification to describe the operation of a MASH filter or to determine under what conditions the available levels of filtering are beneficial. Fractional divider jitter is reduced by increasing the input frequency to the clock generators therefore the fastest clock available should be supplied to the audio clock generators when jitter is a concern.

1.1 Operating Frequency

The maximum operating frequency of the PWM & PCM clocks is 25MHz at 1.2V. When using the fractional divider and MASH filter, the frequency is spread around the requested frequency and the user must ensure that the module is not exposed to frequencies higher than 25MHz. Also, the MASH filter imposes a low limit on the range of DIVI.

MASH min DIVI min output freq average output freq max output freq 0 (int divide) 1 source / ( DIVI ) source / ( DIVI ) source / ( DIVI ) 1 2 source / ( DIVI ) source / ( DIVI + DIVF / 1024 ) source / ( DIVI + 1 ) 2 3 source / ( DIVI - 1 ) source / ( DIVI + DIVF / 1024 ) source / ( DIVI + 2 ) 3 5 source / ( DIVI - 3 ) source / ( DIVI + DIVF / 1024 ) source / ( DIVI + 4 )

Table 1-1 Effect of MASH Filter on Frequency

The following example illustrates the spreading of output clock frequency resulting from the use of the MASH filter. Note that the spread is greater for lower divisors.

PLL freq (MHz) target freq (MHz) MASH divisor DIVI DIVF min freq (MHz) ave freq (MHz) max freq (MHz) error 650 18.32 0 35.480 35 492 18.57 18.57 18.57 ok 650 18.32 1 35.480 35 492 18.06 18.32 18.57 ok 650 18.32 2 35.480 35 492 17.57 18.32 19.12 ok 650 18.32 3 35.480 35 492 16.67 18.32 20.31 ok 400 18.32 0 21.834 21 854 19.05 19.05 19.05 ok 400 18.32 1 21.834 21 854 18.18 18.32 19.05 ok 400 18.32 2 21.834 21 854 17.39 18.32 20.00 ok 400 18.32 3 21.834 21 854 16.00 18.32 22.22 ok 200 18.32 0 10.917 10 939 20.00 20.00 20.00 ok 200 18.32 1 10.917 10 939 18.18 18.32 20.00 ok 200 18.32 2 10.917 10 939 16.67 18.32 22.22 ok 200 18.32 3 10.917 10 939 14.29 18.32 28.57 error

Table 1-2 Example of Frequency Spread when using MASH Filtering

 

Provided the operating guidelines are followed the clock generators will produce an even duty cycle, glitchless output.

1.2 Register Definitions Clock Manager Audio Clocks Control (PCMCTL & PWMCTL)

Address

 

0x 7e10 1098 CM_PCMCTL 0x 7e10 10a0 CM_PWMCTL

Bit Number Field Name Description Read/ Write Reset

31-24 PASSWD

Clock Manager password “5a”

 W 0 23-11 - Unused R 0 10-9 MASH MASH control 0 = integer division 1 = 1-stage MASH (equivalent to non-MASH dividers) 2 = 2-stage MASH 3 = 3-stage MASH To avoid lock-ups and glitches do not change this control while BUSY=1 and do not change this control at the same time as asserting ENAB. R/W 0 8 FLIP Invert the clock generator output This is intended for use in test/debug only. Switching this control will generate an edge on the clock generator output. To avoid output glitches do not switch this control while BUSY=1. R/W 0 7 BUSY Clock generator is running Indicates the clock generator is running. To avoid glitches and lock-ups, clock sources and setups must not be changed while this flag is set. R 0 6 - Unused R 0 5 KILL Kill the clock generator 0 = no action 1 = stop and reset the clock generator This is intended for test/debug only. Using this control may cause a glitch on the clock generator output. R/W 0 4 ENAB Enable the clock generator This requests the clock to start or stop without glitches. The output clock will not stop immediately because the cycle must be allowed to complete to avoid glitches. The BUSY flag will go low when the final cycle is completed. R/W 0 3-0 SRC Clock source 0 = GND 1 = oscillator 2 = testdebug0 3 = testdebug1 4 = PLLA per 5 = PLLC per 6 = PLLD per 7 = HDMI auxiliary 8-15 = GND To avoid lock-ups and glitches do not change this control while BUSY=1 and do not change this control at the same time as asserting ENAB. R/W 0