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The information in this work has been obtained from sources believed to be reliable. The author does not guarantee the accuracy or completeness of any information presented herein, and shall not be responsible for any errors, omissions or damages as a result of the use of this information.

April 2012

© 2006 by Fabian Kung Wai Lee

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Main References

• • • • • • • • [1]* D.M. Pozar, “Microwave engineering”, 2nd Edition, 1998 John-Wiley & Sons. [2] J. Millman, C. C. Halkias, “Integrated electronics”, 1972, McGraw-Hill. [3] R. Ludwig, P. Bretchko, “RF circuit design - theory and applications”, 2000 Prentice-Hall. [4] B. Razavi, “RF microelectronics”, 1998 Prentice-Hall, TK6560. [5] J. R. Smith,”Modern communication circuits”,1998 McGraw-Hill. [6] P. H. Young, “Electronics communication techniques”, 5th edition, 2004 Prentice-Hall. [7] Gilmore R., Besser L.,”Practical RF circuit design for modern wireless systems”, Vol. 1 & 2, 2003, Artech House. [8] Ogata K., “Modern control engineering”, 4th edition, 2005, Prentice-Hall.

April 2012

© 2006 by Fabian Kung Wai Lee

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1

Agenda

• • • • • • • • Positive feedback oscillator concepts. Negative resistance oscillator concepts (typically employed for RF oscillator). Equivalence between positive feedback and negative resistance oscillator theory. Oscillator start-up requirement and transient. Oscillator design - Making an amplifier circuit unstable. Constant |Γ1| circle. Fixed frequency oscillator design. Voltage-controlled oscillator design.

April 2012

© 2006 by Fabian Kung Wai Lee

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1.0 Oscillation Concepts

April 2012

© 2006 by Fabian Kung Wai Lee

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Introduction

• • • • Oscillators are a class of circuits with 1 terminal or port, which produce a periodic electrical output upon power up. Most of us would have encountered oscillator circuits while studying for our basic electronics classes. Oscillators can be classified into two types: (A) Relaxation and (B) Harmonic oscillators. Relaxation oscillators (also called astable multivibrator), is a class of circuits with two unstable states. The circuit switches back-and-forth between these states. The output is generally square waves. Harmonic oscillators are capable of producing near sinusoidal output, and is based on positive feedback approach. Here we will focus on Harmonic Oscillators for RF systems. Harmonic oscillators are used as this class of circuits are capable of producing stable sinusoidal waveform with low phase noise.

April 2012 © 2006 by Fabian Kung Wai Lee 5

• •

2.0 Overview of Feedback Oscillators

April 2012

© 2006 by Fabian Kung Wai Lee

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**Classical Positive Feedback Perspective on Oscillator (1)
**

• • Consider the classical feedback system with non-inverting amplifier, Assuming the feedback network and amplifier do not load each other, we can write the closed-loop transfer function as:

Non-inverting amplifier

Si(s)

+ +

E(s) A(s)

High impedance

So(s)

So (s ) (2.1a) (s ) = 1− AA (s )F (s ) Si

Positive Feedback

Feedback network

High impedance

T (s ) = A(s )F (s ) (2.1b)

Loop gain (the gain of the system around the feedback loop)

F(s)

• •

(s ) Writing (2.1a) as: S o (s ) = 1− AA ( s ) F ( s ) S i (s ) We see that we could get non-zero output at So, with Si = 0, provided 1-A(s)F(s) = 0. Thus the system oscillates!

April 2012 © 2006 by Fabian Kung Wai Lee 7

**Classical Positive Feedback Perspective on Oscillator (1)
**

• The condition for sustained oscillation, and for oscillation to startup from positive feedback perspective can be summarized as:

For sustained oscillation For oscillation to startup

1 − A(s )F (s ) = 0

Barkhausen Criterion

(2.2a) (2.2b)

A(s )F (s ) > 1

arg( A(s )F (s )) = 0

•

•

Take note that the oscillator is a non-linear circuit, initially upon power up, the condition of (2.2b) will prevail. As the magnitudes of voltages and currents in the circuit increase, the amplifier in the oscillator begins to saturate, reducing the gain, until the loop gain A(s)F(s) becomes one. A steady-state condition is reached when A(s)F(s) = 1.

Note that this is a very simplistic view of oscillators. In reality oscillators are non-linear systems. The steady-state oscillatory condition corresponds to what is called a Limit Cycle. See texts on non-linear dynamical systems.

April 2012 © 2006 by Fabian Kung Wai Lee 8

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thus the feedback network is usually made of reactive components. or a hybrid of these.2a). in the form of a transformer. X2 and X3 need to meet the following condition: + - E(s) -A(s) So(s) X 3 = −( X 1 + X 2 ) (2. April 2012 © 2006 by Fabian Kung Wai Lee 9 Classical Positive Feedback Perspective on Oscillator (3) • • In general the feedback network F(s) can be implemented as a Pi or T network. the Barkhausen criterion (2. A simple analysis in [2] and [3] shows that to fulfill (2. X2 X1 April 2012 © 2006 by Fabian Kung Wai Lee 10 5 . then X1 and X2 should be capacitors. Usually the amplifier A is wideband.2a) should only be fulfilled at one frequency. Consider the Pi network with all reactive elements. and it is the function of the feedback network F(s) to ‘select’ the oscillation frequency.Classical Positive Feedback Perspective on Oscillator (2) • Positive feedback system can also be achieved with inverting amplifier: Inverting amplifier + - Si(s) E(s) -A(s) Inversion F(s) So(s) So (s ) (s ) = 1− AA (s )F (s ) Si • • To prevent multiple simultaneous oscillation.3) X3 If X3 represents inductor. the reactance X1. such as inductors and capacitors.

01 uF A(ω )F (ω ) 1 0 0.0 1.2 0.0 time.0 VB.0 pF + - F(s) April 2012 © 2006 by Fabian Kung Wai Lee 12 6 .6 0.01 uF -1.5 1.3 V R RB1 R=10 kOhm C CD1 C=0.0 -1.4 0.0 0. V VL.1 uF 0.2 uH C=22.5 VB C Cc1 C=0.Classical Feedback Oscillators • + - The following are examples of oscillators.01 uF pb_mot_2N3904_19921211 Q1 R RB2 R=10 kOhm R RE R=220 Ohm C CE C=0. + + - Colpitt oscillator + Armstrong oscillator - Hartley oscillator Clapp oscillator April 2012 © 2006 by Fabian Kung Wai Lee 11 Example of Tuned Feedback Oscillator (1) A 48 MHz Transistor Common -Emitter Colpitt Oscillator R RC R=330 Ohm 2.6 1. V VL R RL R=220 Ohm V_DC SRC1 Vdc=3.2 1.5 0.8 1.0 1.0 pF R= C C2 C=22.8 2.4 1. usec t E(s) -A(s) So(s) Si(s) L C L1 C1 L=2. based on the original circuit using vacuum tubes.5 VC C Cc2 C=0.0 -0.

1 uF pb_mot_2N3904_19921211 Q1 R RB2 R=10 kOhm R RE R=220 Ohm C CE C=0.8 1.0 uH R= C C3 C=4.2 0.3 V R RB1 R=10 kOhm C CD1 C=0.1 uF C C1 C=22. usec Si(s) + + E(s) A(s) So(s) April 2012 F(s) © 2006 by Fabian Kung Wai Lee 13 Example of Tuned Feedback Oscillator (3) V_DC SRC1 Vdc=3.0 0.1 uF pb_m ot_2N3904_19921211 Q1 VE R RE R=100 Ohm VL C C1 C=100.6 0. mV VL.1 uF VE.8 2.6 1.3 V R RB1 R=10 kOhm C CD1 C=0.4 1.0 pF April 2012 © 2006 by Fabian Kung Wai Lee 14 7 .2 1.1 uF A 16 MHz Transistor Common-Emitter Crystal Oscillator R RC R=330 Ohm VC C Cc2 C=0.0 pF VB C Cc1 C=0.7 pF R R1 R=1000 Ohm R RC R=470 Ohm 0 -200 -400 -600 0.0 1.1 uF R RB2 R=4.7 kOhm C C2 C=100.0 VC C Cc2 C=0.Example of Tuned Feedback Oscillator (2) A 27 MHz Transistor Common-Base Colpitt Oscilator 600 400 200 V_DC SRC1 Vdc=3.0 pF sx_stk_CX-1HG-SM_A_19930601 XTL1 Fres=16 MHz C C2 C=22.4 0. mV L L1 L=1.1 uF VL R RL R=220 Ohm VB C Cc1 C=0.0 pF time.

Generally it is difficult to physically implement a feedback oscillator once the operating frequency is higher than 500MHz. and it’s output impedance is not zero. Determining the loop gain of the feedback oscillator is cumbersome at high frequency. • • • April 2012 © 2006 by Fabian Kung Wai Lee 15 3. the assumption that the amplifier and feedback network do not load each other is not valid.0 Negative Resistance Oscillators April 2012 © 2006 by Fabian Kung Wai Lee 16 8 .Limitation of Feedback Oscillator • At high frequency. owing to the coupling between components and conductive structures on the printed circuit board (PCB) or substrate. Moreover there could be multiple feedback paths due to parasitic inductance and capacitance. Thus the actual loop gain is not A(s)F(s) and equation (2. It can be difficult to distinguish between the amplifier and the feedback paths.2) breakdowns. In general the amplifier’s input impedance decreases with frequency.

Once oscillation starts. enforcing either one will cause oscillation to occur (It can be shown later that when |Γ1 Γs | > 1 at the input port. so that no simultaneous oscillations occur at other frequencies. Here instead of choosing load or source impedance in the stable regions of the Smith Chart. having a reflection coefficient magnitude for Γ1 or Γ2 greater than one implies the corresponding port resistance R1 or R2 is negative. we could ensure that |Γ1 | > 1. As seen in Chapter 7. The resulting amplifier circuit will be called the Destabilized Amplifier. So it does not matter whether we enforce |Γ1 Γs | > 1 or |Γ2 ΓL | > 1. |Γ2 ΓL | > 1 at the output port and vice versa). The key to fixed frequency oscillator design is ensuring that the criteria |Γ1 Γs | > 1 only happens at one frequency (or a range of intended frequencies). We can view an oscillator as an amplifier that produces an output when there is no input. April 2012 © 2006 by Fabian Kung Wai Lee 17 • • Introduction (2) • For instance by choosing the load impedance ZL at the unstable region. hence the name for this type of oscillator. • • April 2012 © 2006 by Fabian Kung Wai Lee 18 9 . Thus it is an unstable amplifier that becomes an oscillator! For example let’s consider a conditionally stable amplifier.Introduction (1) • • • • • An alternative approach is needed to get a circuit to oscillate reliably. We then choose the source impedance properly so that |Γ1 Γs | > 1 and oscillation will start up (refer back to Chapter 7 on stability theory). we purposely choose the load or source impedance in the unstable impedance regions. This will result in either |Γ1 | > 1 or |Γ2 | > 1. an oscillating voltage will appear at both the input and output ports of a 2-port network.

Therefore oscillation will occur when |Γ sΓ1 | > 1.... bs ⇒ a1 = 1 − Γ1Γs b1 = bs Γ1 + bs Γ12Γs + bs Γ13Γs 2 + .Wave Propagation Stability Perspective (1) • From our discussion of stability from wave propagation in Chapter 7… Zs or Γs Source b1 Port 1 Port 2 2-port Network a1 = bs + bs Γ1Γs + bs Γ12Γs 2 + . ⇒ b1 = bs Γ1 1 − Γ1Γs Γ1 1 − Γ1Γs Z1 or Γ1 bs a1 bsΓ1 bsΓs Γ1 bsΓs Γ12 b ⇒ 1= bs bsΓs 2Γ12 bsΓs 2Γ13 Compare with equation (2. These sinusoidal waves correspond to the voltage and current at the Port 1. If the waves are unbounded it means the corresponding sinusoidal voltage and current at the Port 1 will grow larger as time progresses. Similar argument can be applied to port 2 since the signals at Port 1 and 2 are related to each other in a two-port network. and we see that the condition for oscillation at Port 2 is |ΓLΓ2 | > 1. indicating oscillation start-up condition. • • • April 2012 © 2006 by Fabian Kung Wai Lee 20 10 .1a) bsΓs 3Γ13 bsΓs 3Γ14 April 2012 © 2006 by Fabian Kung Wai Lee So A(s ) ( s) = Si 1− A(s )F (s ) Similar mathematical form 19 Recap .Wave Propagation Stability Perspective (2) • We see that the infinite series that constitute the steady-state incident (a1) and reflected (b1) waves at Port 1 will only converge provided |Γ sΓ1| < 1..Recap .

let us ignore the transmission line and examine the condition for oscillation phenomena in terms of terminal impedance.Oscillation from Negative Resistance Perspective (1) • • • • Generally it is more useful to work with impedance (or admittance) when designing actual circuit. Very short Tline Zs Zo Z1 Destabilized Amp.1) 22 11 . To avoid this ambiguity. In this case the impedance Zo is ambiguous (since there is no transmission line). Zs jXs Source Rs Network V R1 Port 1 Z1 Amplifier with load ZL jX1 Vamp Z2 ZL Port 2 • Using circuit theory the voltage at Port 1 can be written as: V= April 2012 R1 + jX 1 Z1 ⋅ Vs = Vs R1 + Rs + j ( X 1 + X s ) Z s + Z1 © 2006 by Fabian Kung Wai Lee (3. with the source network and input of the amplifier being modeled by impedance or series networks. Furthermore for practical purpose the transmission lines connecting ZL and Zs to the destabilized amplifier are considered very short (length → 0). and Load April 2012 Z ≅ Z s Z ≅ Z1 © 2006 by Fabian Kung Wai Lee 21 Oscillation from Negative Resistance Perspective (2) • We consider Port 1 as shown.

p2 given by: 2 p1.3b) • The transfer function V(s)/Vs(s) is thus a 2nd order system with two poles p1. This is true if R1 is negative. 2 = −δωn ± ωn δ − 1 (3.Oscillation from Negative Resistance Perspective (3) • Furthermore we assume the source network Zs is a series RC network and the equivalent circuit looking into the amplifier Port 1 is a series RL network. Zs Z1 Cs Rs V Vs R1 L1 Vamp Z2 ZL • Using Laplace Transform.1) is written as: R1 + sL1 (3.2b) where s = σ + jω April 2012 © 2006 by Fabian Kung Wai Lee 23 Oscillation from Negative Resistance Perspective (4) • The expression for V(s) can be written in the “standard” form according to Control Theory [8]: 2 V sC (R + sL1 )ω n 1 + sL1 ) (s ) = 1 ⋅ 2 s(RR = 2s 1 (3.2a) V (s ) = ⋅Vs (s ) 1 R1 + Rs + sL1 + sC s (3. adding local positive feedback). R1 can be made negative by modifying the amplifier circuit (e. April 2012 © 2006 by Fabian Kung Wai Lee 24 12 .4) • • Observe that if (R1 + Rs) < 0 the damping factor δ is negative. (3.3a) +R 2 1 Vs L1 s + s ( L ) + L C s + 2ωnδs + ω n 1 s 1 1 s where δ= R1 + Rs 2 L1 Cs = Damping Factor ωn = 1 L1C s = Natural Frequency (3. producing the sum R1 + Rs < 0. and |R1| > Rs.g.

2 δ =0 = ± jωn • The steady-state oscillation frequency ωo corresponds to ωn. or equivalently the poles become • • p1. Any small perturbation will result in a oscillating signal with frequency ωn δ 2 − 1 that grows exponentially. The effect of decreasing β of the transistor is a reduction in the magnitude of R1 (remember R1 is negative). A small disturbance Im v(t) Rs + R1 |ω o < 0 0 × Complex pole pair or impulse ‘starts’ the exponentially growing sinusoid Re t Time Domain × • Complex Plane Usually a transient or noise signal from the environment will contain a small component at the oscillation frequency. since Rs+ R1 → 0. this limits the β of the transistor and finally limits the amplitude of the oscillating signal. the poles as in (3. April 2012 © 2006 by Fabian Kung Wai Lee 25 Oscillation from Negative Resistance Perspective (6) • When the signal amplitude builds up. nonlinear effects such as transistor saturation and cut-off will occur. From Control Theory such a system is unstable. 1 ωn 2 = L11 C s ⇒ ωn L1 = ωnC s ⇒ X 1 = X s ⇒ X1 + X s ω = 0 o April 2012 © 2006 by Fabian Kung Wai Lee 26 13 . Steady-state sinusoidal oscillation is achieved when δ =0.4) will be complex and exist at the right-hand side of the complex plane. This forms the ‘seed’ in which the oscillation builts up. Thus the damping factor δ will approach 0.Oscillation from Negative Resistance Perspective (5) • • Assuming |δ|<1 (under-damped).

3b).8 0. Oscillators are autonomous non-linear dynamical systems. Since the voltages at Port 1 and Port 2 are related. 1.2 0.5b) Rs + R1 |ωo = 0 X s + X 1 |ω o = 0 Steady-state (3. and the steady-state condition is a form of Limit Cycles. then oscillation will also occur at Port 2. we use RC and RL networks for the source and amplifier input respectively.Oscillation from Negative Resistance Perspective (7) • • • From (3. 4 -0. From this brief discussion. 2 -0. 8 0 10 20 30 40 50 60 70 80 90 10 0 110 120 R1+Rs 0 Oscillation start-up Steady-state Zs Z1 Zs t Destabilized Amplifier ZL We need to note that this is a very simplistic view of oscillators.5a) (3.2 1. 6 -0. X1 and Xs respectively.0 0.6b) April 2012 © 2006 by Fabian Kung Wai Lee 27 Illustration of Oscillation Start-Up and Steady-State • The oscillation start-up process and steady-state are illustrated.6 0.4 1. if oscillation occur at Port 1. in other words. April 2012 © 2006 by Fabian Kung Wai Lee 28 14 .6a) (3.0 -0.4 0. however we can distill the more general requirements for oscillation to start-up and achieve steadystate operation for series representation in terms of resistance and reactance: Rs + R1 |ωo < 0 X s + X 1 |ω o = 0 Start-up (3. we observe that the steady-state oscillation frequency is determined by L1 and Cs.

as it is clear that equations (3.5b) • A similar expression for Z2 and ZL can also be obtained. • • April 2012 © 2006 by Fabian Kung Wai Lee 30 15 .6a) (3.5a) (3. but we shall not be concerned with these here. we conclude that the requirement for oscillation are.6b) represent the resonance condition between the source network and the amplifier input. The design of the resonator is extremely important.Summary of Oscillation Requirements Using Series Network • By expressing Zs and Z1 in terms of resistance and reactance.6b) Rs + R1 |ωo < 0 X s + X 1 |ω o = 0 Start-up (3. April 2012 © 2006 by Fabian Kung Wai Lee 29 The Resonator • The source network Zs is usually called the Resonator. Zs jXs Source Rs Network V R1 Port 1 Z1 jX1 Vamp Z2 ZL Port 2 Rs + R1 |ωo = 0 X s + X 1 |ω o = 0 Steady-state (3. We shall see later that an important parameter of the oscillator. the Phase Noise is dependent on the quality of the resonator.5b) and (3.

For series circuit the current is near sinusoidal. Concept of impedance is not valid and our discussion is only an approximation at best. and we should try the parallel representation.Summary of Oscillation Requirements Using Parallel Network • If we model the source network and input to the amplifier as parallel networks.5) and (3. We can assume series representation. and worked out the corresponding resonator impedance.8a) (3. Another clue to whether series or parallel representation is more accurate is to observe the current and voltage in the resonator. then it probably means that the series representation is incorrect.7b) Gs + G1 |ωo < 0 (3. Port 1 Gs jBs V Z2 G1 jB1 Vamp ZL • The start-up and steady-state conditions are: Gs + G1 |ωo = 0 Bs + B1 |ωo = 0 Steady-state April 2012 (3. the following dual of equations (3.8b) 31 Bs + B1 |ωo = 0 Start-up © 2006 by Fabian Kung Wai Lee Series or Parallel Representation? (1) • The question is which to use? Series or parallel network representation? This is not an easy question to answer as the destabilized amplifier is operating in nonlinear region as oscillator.7a) (3. If after computer simulation we discover that the actual oscillating frequency is far from our prediction (if there’s any oscillation at all!). where as for parallel circuit it is the voltage that is sinusoidal.6) are obtained. April 2012 © 2006 by Fabian Kung Wai Lee 32 • • • 16 .

by computing the large-signal S11 of Port 1 (with respect to Zo) using CAD software. such as frequency stability issue (see [1] and [7]). but plot S11 instead of 1/S11. By comparing the locus of 1/S11 as input signal magnitude is gradually increased with the coordinate of constant X or constant B circles on the Smith Chart.0 Fixed Frequency Negative Resistance Oscillator Design April 2012 © 2006 by Fabian Kung Wai Lee 34 17 . This will be illustrated in the examples in next section. Do note that there are other reasons that can cause the actual oscillation frequency to deviate a lot from prediction. We will adopt this approach. 1/S11 is then plotted on a Smith Chart as a function of input signal magnitude at the operating frequency. • • April 2012 © 2006 by Fabian Kung Wai Lee 33 4.Series or Parallel Representation? (2) • • • Reference [7] illustrates another effective alternative. we can decide whether series or parallel form approximates Port 1 best.

Design a transistor/FET amplifier circuit. Step 2 . X1 + Xs=0 at ωo. select Γs in the unstable region so that R2 or G2 is negative at ωo . make R1 < 0 by selecting ΓL in the unstable region. • • • April 2012 © 2006 by Fabian Kung Wai Lee 36 18 . Step 6 .Find Z1 = R1 + jX1 (Assuming series form). for instance.Make the circuit unstable by adding positive feedback at radio frequency. Step 4 – With the aid of Smith Chart and Load Stability Circle. Decide whether series or parallel form to use.Determine the frequency of oscillation ωo and extract Sparameters at that frequency. Step 8 .g.Built the circuit or run a computer simulation to verify that the circuit can indeed starts oscillating when power is connected. Step 9 . Step 5 (Optional) – Perform a large-signal analysis (e. Harmonic Balance analysis) and plot large-signal S11 versus input magnitude on Smith Chart. • • • • April 2012 © 2006 by Fabian Kung Wai Lee 35 Procedures of Designing Fixed Frequency Oscillator (2) • Step 7 – Find Rs and Xs so that R1 + Rs<0. Step 3 . We can use the rule of thumb Rs=(1/3)|R1| to control the harmonics content at steady-state. Note: Alternatively we may begin Step 4 using Source Stability Circle. adding series inductor at the base for commonbase configuration.Procedures of Designing Fixed Frequency Oscillator (1) • • Step 1 .Design the impedance transformation network for Zs and ZL.

April 2012 © 2006 by Fabian Kung Wai Lee 37 Making an Amplifier Unstable (2) This is a practical model of an inductor Base bypass capacitor V_DC SRC1 Vdc=4. Two favorite transistor amplifier configurations used for oscillator design are the Common-Base configuration with Base feedback and Common-Emitter configuration with Emitter degeneration.0 nF Term Term1 Num=1 Z=50 Ohm An inductor is added in series with the bypass capacitor on the base terminal of the BJT.0 MHz Step=2. Positive feedback here April 2012 R Re R=100 Ohm © 2006 by Fabian Kung Wai Lee 38 19 .51) StabFact Common Base Configuration R Rb1 R=10 kOhm L LC L=330.0 nF L LB L=22 nH R= R RLB R=0.17 pF pb_phl_BFR92A_19921214 Q1 R Rb2 L R=4.0 nH R= Vin C Cc1 C=10.7 kOhm LE L=330.0 nH R= StabFact StabFact1 K=stab_fact(S) LStabCircle L_StabCircle L_StabCircle1 LSC=l_stab_circle(S.0 nF Term Term2 Num=2 Z=50 Ohm C CLB C=0.0 MHz SStabCircle S_StabCircle S_StabCircle1 SSC=s_stab_circle(S.0 MHz Stop=410.Making an Amplifier Unstable (1) • • An amplifier can be made unstable by providing some kind of local positive feedback.51) Vout C Cc2 C=10. This is a form of positive series feedback.77 Ohm C Cb C=10.5 V At 410MHz DC DC DC1 S-PARAMETERS S_Param SP1 Start=410.

162 / 166.9.0 nF pb_phl_BFR92A_19921214 Q1 C Ce1 C=15.6.2) 1.0 nH R= StabFact StabFact1 K=stab_fact(S) LStabCircle L_StabCircle L_StabCircle1 LSC=l_stab_circle(S.0 MHz Stop=410.51) V_DC SRC1 Vdc=4.535 freq 410.154 / -3.0 MHz SStabCircle S_StabCircle S_StabCircle1 SSC=s_stab_circle(S.Making an Amplifier Unstable (3) s22 and s11 have magnitude > 1 S(1..118 / 165.723 S(2.068 / -12.987 S(1.2) 0.0 nF Term Term1 Num=1 Z=50 Ohm C Cc2 C=1.1) 1.0MHz freq 410.7 kOhm Feedback R Re R=100 Ohm C Ce2 C=10. S(2.0MHz K -0.0 MHz Step=2.1) 2.51) Vout C Cc1 C=1.5 V StabFact R Rb1 R=10 kOhm L LC L=330....0 pF Term Term2 Num=2 Z=50 Ohm R Rb2 R=4. ΓL Plane Unstable Regions Γs Plane April 2012 © 2006 by Fabian Kung Wai Lee 39 Making an Amplifier Unstable (4) DC DC DC1 S-PARAMETERS S_Param SP1 Start=410.0 pF Common Emitter Configuration Positive feedback here 40 April 2012 © 2006 by Fabian Kung Wai Lee 20 .

this will result in large harmonic distortion of the output waveform. While Rs that is too small (smaller than (1/3)|R1|) causes too much nonlinearity in the circuit. V2 Clipping.427 ΓL Plane Γs Plane Unstable Regions April 2012 © 2006 by Fabian Kung Wai Lee 41 Precautions • • • The requirement Rs= (1/3)|R1| is a rule of thumb to provide the excess gain to start up oscillation.157 / -21. Rs that is too large (near |R1| ) runs the risk of oscillator fails to start up due to component characteristic deviation.1) 3. which list further requirements. a sign of too much nonlinearity t V2 Rs too small For more discussion about the Rs = (1/3)|R1| rule.149 / 176.0MHz freq 410.067 / -47.516 S(1.0MHz K -0.636 S(2. April 2012 © 2006 by Fabian Kung Wai Lee t Rs too large 42 21 .251 / 62.Making an Amplifier Unstable (5) S22 and S11 have magnitude > 1 freq 410.2) 0. see [6].803 S(2.1) 6. and on the sufficient condition for oscillation.2) 1.641 S(1.

Constant |Γ1| Circle (1) • • • In choosing a suitable ΓL to make |ΓL | > 1. It turns out that if we fix |Γ1 |.1b) April 2012 © 2006 by Fabian Kung Wai Lee 43 Aid for Oscillator Design . Usually we would choose ΓL that would result in |Γ1 | = 1. ΓL and Γs .5 or larger.1a) Radius = ρ S12 S 21 D − ρ 2 S 22 2 2 (4. we would like to know the range of ΓL that would result in a specific |Γ1 |. Tcenter = − ρ 2 S 22* + D*S11 D − ρ S 22 2 2 2 (4. • April 2012 © 2006 by Fabian Kung Wai Lee 44 22 . Similarly Constant |Γ2 | Circle can also be plotted for the source reflection coefficient.Constant |Γ1| Circle (2) • The Constant |Γ1 | Circle is extremely useful in helping us to choose a suitable load reflection coefficient. The radius and center of this circle can be derived from: S −Γ D Γ1 = 11 L 1 − S 22ΓL • Assuming ρ = |Γ1 |: By fixing |Γ1 | and changing ΓL . the range of load reflection coefficient that result in this value falls on a circle in the Smith chart for ΓL . The expressions for center and radius is similar to the case for Constant |Γ1 | Circle except we interchange s11 and s22.Aid for Oscillator Design . See Ref [1] and [2] for details of derivation.

Output Term Term 2 Num=2 Z=50 Ohm LSt abCircle L_St abCircle L_St abCircle1 load_s tabcir=l_s tab_c irc le(S. The transistor will be biased in Common-Base configuration.DC biasing circuit design and S-parameter extraction.7 kOhm SStabCircle pb_phl_BF R 92A_19921214 Q1 L LE L=220.Input © 2006 by Fabian Kung Wai Lee 46 23 . • • April 2012 © 2006 by Fabian Kung Wai Lee 45 Example 4..1 Cont.51) LB is chosen carefully so that the unstable regions in both ΓL and Γs planes are large April 2012 enough. It is assumed that a 50Ω load will be connected to the output of the oscillator.. 51) C Cc2 C =1.0 MHz Step=2. 0 nF Term Term 1 Num=1 Z=50 O hm Port 1 Amplifier Port 2 R Re R =100 Ohm Port 1 . 0 MH z StabFact StabFact 1 K=st ab_f act (S ) V_DC SR C1 Vdc =4. • Step 1 and 2 .0 nH R= S_StabCircle S_StabCircle1 source_s tabc ir=s_st ab_c irc le(S . but the author would like to stress that virtually any RF CAD package is suitable for this exercise. 0 nH R= C Cb C =1. the design of a fixed frequency oscillator operating at 410MHz will be demonstrated using BFR92A transistor in SOT23 package.1 – CB Fixed Frequency Oscillator Design • In this example.5 V R Rb1 R=10 kO hm L LC L=330. 0 nF L LB L=12.0 nH R= Port 2 . DC DC D C1 S-PAR AME T ER S S t ab F ac t S_Param SP1 Start=410. 0 MH z Stop=410.Example 4. The schematic of the basic amplifier circuit is as shown in the following slide. The design is performed using Agilent’s ADS software. C Cc1 C =1.0 nF R Rb2 R=4.

.Choosing suitable ΓL that cause |Γ1 | > 1 at 410MHz.118 / 165.154 / -3... LSC |Γ1 |=1.5<0 ZL = 150+j0 ΓL Plane April 2012 © 2006 by Fabian Kung Wai Lee |Γ1 |=2. • Step 3 and 4 ..1) 1.5 |Γ1 |=2..2) 0. We plot a few constant |Γ1 | circles on the ΓL plane to assist us in choosing a suitable load reflection coefficient.987 S(1.535 Unstable Regions Load impedance here will result in |Γ1| > 1 April 2012 Source impedance here will result in |Γ2| > 1 47 © 2006 by Fabian Kung Wai Lee Example 4.0MHz freq 410..9.723 S(2. freq 410.068 / -12..1 Cont..1 Cont.5 Note: More difficult to implement load impedance near edges of Smith Chart 48 24 .Example 4.2) 1.0 ΓL = 0. This point is chosen because it is on real line and easily matched.6.162 / 166.0MHz K -0. S(2. S(1.1) 2.

Also the direction of S11 is moving from negative R to positive R as input power level is increased.0 Large-signal S-parameter Analysis control in ADS software..0 nH R= C CB C=1.0 nF We are measuring large-signal S11 looking towards here P_1Tone PORT1 Num=1 Z=50 Ohm P=polar(dbmtow(Poutv).7 kOhm R RL R=150 Ohm pb_phl_BFR92A_19921214 Q1 L LE L=220.0 nH R= LSSP HB1 Freq[1]=410.1 Cont.0) Freq=410 MHz R RE R=100 Ohm April 2012 © 2006 by Fabian Kung Wai Lee 49 Example 4.1) Boundary of Normal Smith Chart Locus of S11 versus P_1tone power at 410MHz (from -20 to -5 dBm) April 2012 Region where R1 or G1 is positive Poutv (-20.0 MHz Order[1]=5 LSSP_FreqAtPort[1]= SweepVar="Poutv" Start=-20 Stop=-5 Step=0. it is clear the locus is more parallel to the constant X circle. C Cc2 C=1.2 VAR VAR1 Poutv=-10. We conclude the Series form is more appropriate. We perform large-signal analysis and observe the S11 at the input of the destabilized amplifier.Example 4.000) © 2006 by Fabian Kung Wai Lee 50 25 . • Step 5 – To check whether the input of the destabilized amplifier is closer to series or parallel form..0 nF L LB L=12. Compare Region where R or G is negative 1 1 Direction of S11 as magnitude of P_1tone source is increased S(1. LSSP Var Eqn V_DC SRC1 Vdc=4. • Compare the locus of S11 and the constant X and constant B circles on the Smith Chart.0 nH R= C Cc1 C=1...5 V R RB1 R=10 kOhm L LC L=330.1 Cont.0 nF R RB2 R=4.000 to -5.

• The system block diagram: Port 1 Zs = 3.1 Cont.422 + j 0.. For ZL = 150 or ΓL = 0..42-j7.851 April 2012 © 2006 by Fabian Kung Wai Lee 51 Example 4.Finding the suitable source impedance to fulfill R1 + Rs<0. • • Step 6 – Using the series form.Example 4. So the resonator would also be a series network.5<0: S − DΓL Γ1 = 11 = −1.257 + j 7. we find the small-signal input impedance Z1 at 410MHz. X1 + Xs=0: 1 Rs = R1 ≅ 3.851 1 − Γ1 R1 X1 • Step 7 ..851 Port 2 Common-Base (CB) Amplifier with feedback ZL = 150 April 2012 © 2006 by Fabian Kung Wai Lee 52 26 .42 3 X s = − X1 ≅ −7..1 Cont.479 1 − S 22 ΓL Z1 = Z o 1 + Γ1 = −10.

.44 pF 7..42-j7.. .27nH 3.44pF ZL=150 27.452 = 2.Verification Thru Simulation Vpp BFR92A Vpp = 0.49pF 50 1 ωC 1 C= = 49. Zs= 3.025mW 50 54 27 .851 49.1 Cont.42 CB Amplifier @ 410MHz 3.851 = April 2012 © 2006 by Fabian Kung Wai Lee Impedance transformation network 53 Example 4.Example 4.45V Power dissipated in the load: PL = = 0.5 April 2012 © 2006 by Fabian Kung Wai Lee 1V 2 RL 2 0.851ω 7.. • Step 5 .Realization of the source and load impedance at 410MHz.9V V = 0.1 Cont.

4 0.2 0.8 0 10 Startup transient ns April 2012 © 2006 by Fabian Kung Wai Lee 56 28 . .1 Cont.4 1.2 Vout -0.1 Cont. 484 MHz April 2012 © 2006 by Fabian Kung Wai Lee 55 Example 4.4 Output port 20 30 40 50 60 70 80 90 100 110 120 -0.6 V 0.0 -0.0 Vbb 0..2 1.. – The Prototype Voltage at the base terminal and 50 Ohms load resistor of the fixed frequency oscillator: 1.Example 4.8 0..6 -0.. Although we may have to tune the capacitor Cs to obtain oscillation at 410 MHz.Verification Thru Simulation • Performing Fourier Analysis on the steady state wave form: The waveform is very clean with little harmonic distortion.

0 pF R RL R=150 Ohm S(1.000 freq.2 Var Eqn VAR VAR1 Poutv=-10.000 to 15. S11 DC_Block DC_Block1 P_1Tone PORT1 Num=1 Z=50 Ohm P=polar(dbmtow (Poutv). MHz C C1 C=2.2 – 450 MHz CE Fixed Frequency Oscillator Design • Small-signal AC or S-parameter analysis.1)) real(Y(1.0 nH R= Since the locus of S11 is close in shape to constant X circles. 0 S-PARAMETERS V_DC SRC1 Vdc=3.0 MHz Stop=800.7 pF There are simplified expressions to find C1 and C2. MHz © 2006 by Fabian Kung Wai Lee 57 Example 4.0 V_DC SRC1 Vdc=3.2 pF pb_phl_BFR92A_19921214 Q1 Compare C C2 C=4.020 0.0 nH R= Selection of load resistor as in Example 4.Example 4. imag(Z(1.2 Cont… • The large-signal analysis to check for suitable representation. to show that R1 or G1 is negative at the intended oscillation frequency of 450 MHz.015 100 200 300 400 500 600 700 800 0.1)) L LC L=220. 0.7 pF R RE R=220 Ohm Boundary of Normal Smith Chart Poutv (-5.0 MHz 0 -100 -500 real(Z(1.005 0.0 pF DC_Block DC_Block1 Term Term1 Num=1 Z=50 Ohm R RL R=150 Ohm -600 100 200 300 400 500 600 700 800 -2000 freq.1)) -200 -300 -400 -1500 -500 -1000 C Cc2 C=330.1) C C1 C=2.1. R Here we just trial and RE R=220 Ohm error to get some reasonable values.000 0.0 MHz Step=10.015 imag(Y(1.0 V R RB R=47 kOhm L LC L=220.0 MHz Order[1]=7 LSSP_FreqAtPort[1]= Sw eepVar="Poutv" Start=-5 Stop=15 Step=0. LSSP LSSP HB1 Freq[1]=450.0 V R RB R=47 kOhm S_Param SP1 Start=100.2 pF pb_phl_BFR92A_19921214 Q1 C C2 C=4.005 Destabilized amplifier April 2012 -0.0) Freq=450 MHz C Cc2 C=330.010 0. and it indicates R1 goes from negative value to positive values as input power is increased.010 -0.000) April 2012 © 2006 by Fabian Kung Wai Lee Direction of S11 as magnitude of P_1tone source is increased 58 from -5 to +15 dBm 29 . we use series form to represent the input network looking towards the Base of the amplifier. see reference [5].1)) -0.

2 Cont… • Using a series RL for the resonator.733 time.5 -1.0 0.5 1.5 4.1V.0 nF L1 L=39. nsec m1 C C2 C=4.0V) t 1.0 nsec L MaxTimeStep=1.0 pF pb_phl_BFR92A_19921214 Q1 R RL R=50 Ohm Direction of S11 as magnitude of P_1tone source is increased from -7 to +12 dBm S(1.2 0.0 pF L LC L=2 nH R=0.0 V R RB R=47 kOhm Tran Tran1 StopTime=100.0) R Freq=fo MHz RB2 R=1000 Ohm C Cc1 C=1.0 59 freq.0 4. Var VAR Eqn LSSP VAR5 Poutv=1.000 to 12.0MHz mag(VfL)=0. 2ns.5 0 20 vL(t) VB C Cc1 L C=1.0 0.1) C Cdec1 C=100. 4ns.2 V_DC VCC Vdc=3. VtPWL SRC2 V_Tran=pw l(time.0 3.0 -0.4 |VL(f)| 0.5 3.000) S11 versus Input power 60 April 2012 © 2006 by Fabian Kung Wai Lee 30 .0 LSSP fo=2300 HB1 Freq[1]=fo MHz Order[1]=8 LSSP_FreqAtPort[1]=fo MHz SweepVar="Poutv" Start=-7 Stop=12 Step=0.0 2.0 nH R= VC C Cc2 C=330.8 m1 freq= 450.2 Compare R C RE C2 R=100 Ohm C=0.0.6 pF {t} C Cc2 C=1.Example 4.0 pF VL R RL R=150 Ohm 0.7 pF {t} Poutv (-7.0 1.3 V R RB1 R=1000 Ohm S11 P_1Tone PORT1 Num=1 Z=50 Ohm P=polar(dbmtow(Poutv).3 – Parallel Representation • An example where the network looking into the Base of the destabilized amplifier is more appropriate as parallel RC network. 0ns.5 VL. GHz Example 4.0V.5 5.2 pF pb_phl_BFR92A_19921214 Q1 Eqn VfL=fs(VL) 0.6 Large coupling capacitor April 2012 © 2006 by Fabian Kung Wai Lee mag(VfL) 0.0 -1.0 TRANSIENT V_DC SRC1 Vdc=3. and performing time-domain simulation to verify that the circuit will oscillate.2 pF C C1 C=0.0 nH R=10 40 60 80 100 C C1 C=2.0 nsec LC L=220.7 pF R RE R=220 Ohm 0. V 0.5 2.

The discussion is beyond the scope of this chapter for now.9). The stability of oscillation can be expressed in terms of the partial derivative of the sum Zin + Zs or Yin + Ys of the input port (or output port). (3. (3. allowing the oscillator to return to it’s initial state. Operate the oscillator on lower power.g. Neutralize. voltage and frequency will be damped out. • • April 2012 © 2006 by Fabian Kung Wai Lee 61 Some Steps to Improve Oscillator Performance • • • • • • • To improve the frequency stability of the oscillator. the following steps can be taken. and the reader should refer to [1] and [7] for the concepts. AGC (automatic gain control) and biasline filtering.Frequency Stability • • The process of oscillation depends on the non-linear behavior of the negative-resistance network.8). April 2012 © 2006 by Fabian Kung Wai Lee 62 31 . the effects of active device variations due to temperature. Use differential oscillator architecture (see [4] and [7]). Reduce noise. Use components with known temperature coefficients.11) are not enough to guarantee a stable state of oscillation. power supply and circuit load changes. (3.1). equations (3. stability requires that any perturbation in current. e.10) and (3. or swamp-out with resistors. especially capacitors. use shielding. Use an oven or temperature compensating circuitry (such as thermistor). In particular. The conditions discussed.

1 pb_phl_BFR92A_19921214 Q1 C Cc1 C=4.1 C C2 C=0.0 V L LC L=2.8 pF {t} R RE R=100 Ohm {t} L L1 L=15.2 nH {t} R=0.0 pF R RL R=50 Ohm V_DC VCC Vdc=3. • • April 2012 © 2006 by Fabian Kung Wai Lee 63 Reconciliation Between Feedback and Negative Resistance Oscillator Perspectives • It must be emphasized that the circuit we obtained using negative resistance approach can be cast into the familiar feedback form. “Stability of negative resistance oscillator circuits”. 1969. 19371955.7 pF C C1 C=1.8 pF {t} Feedback Network April 2012 © 2006 by Fabian Kung Wai Lee 64 32 . no. 5 pp.. “Some basic characteristics of broadband negative resistance oscillator circuits”.0 pF {t} C Cc1 C=4.0 pF {t} R RE R=100 Ohm {t} C C2 C=0. V.. 1992.810-819. Nguyen N. Bell System Technical Journal. Grebennikov A. 36. 1999.G. International journal of Electronic Engineering Education.M..0 nH {t} R=0. Meyer R. pp.2 R RB1 R=10000 Ohm {t} Amplifier VL R RL R=50 Ohm VL C Cc2 C=1.0 pF pb_phl_BFR92A_19921214 Q1 L L1 L=15.7 pF C C1 C=1. vol 27.2 nH {t} R=0.0 nH {t} R=0.IEEE journal of Solid-State Circuits.Extra References for This Section • • Some recommended journal papers on frequency stability of oscillator: Kurokawa K. 242-254. Vol. pp. “Start-up and frequency stability in highfrequency oscillators”..2 can be redrawn as: V_DC VCC Vdc=3. For instance an oscillator circuit similar to Example 4.0 V Negative Resistance Oscillator L LC L=2.2 R RB1 R=10000 Ohm {t} C Cc2 C=1.

for a range of frequencies from ω1 to ω2. Similar concepts as in the design of fixed-frequency oscillators are employed. a wide-band NPN transistor which comes in SOT-23 package.0 Voltage Controlled Oscillator April 2012 © 2006 by Fabian Kung Wai Lee 65 About the Voltage Controlled Oscillator (VCO) (1) • • • A simple transistor VCO using Clapp-Gouriet or CE configuration will be designed to illustrate the principles of VCO. The transistor chosen for the job is BFR92A. Lower April 2012 © 2006 by Fabian Kung Wai Lee Upper 66 33 . Where we design the biasing of the transistor. destabilize the network and carefully choose a load so that from the input port (Port 1). the oscillator circuit has an impedance (assuming series representation is valid): Z1 (ω ) = R1 (ω ) + jX 1 (ω ) • Of which R1 is negative.5.

The rationale is that only the initial spectral of the noise signal fulfilling Xs = X1 will start the oscillation. • • For example. if X1 is positive. one can change the oscillation frequency of the circuit. one can change the oscillation frequency. By changing the capacitance. If X1 is negative. Xs must be positive. such that within a range of frequencies from ω1 to ω2: Z s (ω ) = Rs (ω ) + jX s (ω ) Rs (ω ) < R1 (ω ) R1 (ω ) < 0 • X s (ω ) = X 1 (ω ) The circuit will oscillate within this range of frequencies. April 2012 © 2006 by Fabian Kung Wai Lee 68 34 . A variable capacitor in series with a suitable inductor will allow us to adjust the value of Xs. and it can be generated by a series capacitor. then Xs must be negative. By changing the value of Xs.About the Voltage Controlled Oscillator (VCO) (2) Zs Clapp-Gouriet Oscillator Circuit with Load ZL Z1 = R1 + jX1 April 2012 © 2006 by Fabian Kung Wai Lee 67 About the Voltage Controlled Oscillator (VCO) (3) • If we can connect a source impedance Zs to the input port.

0 V L Lc L=220.0. 0 R load=100 t VtP WL Vtrig V_Tran=pwl(t ime. from negative to positive. Together these components form the frequency determining network. 0V. 0 pF R Re R=220 O hm R V _D C R1 R=4700 Ohm S RC1 V dc=-1. It must be a high quality SMD resistor. 0ns .Schematic of the VCO Initial noise source to start the oscillation DC DC D C1 T R ANS IE NT Tran Tran1 StopTim e=100. 1ns. Cb4 is optional.7 pF 2-port network April 2012 © 2006 by Fabian Kung Wai Lee 69 More on the Schematic • L2 together with Cb3. The effectiveness of isolation can be improved by adding a RF choke in series with R1 and a shunt capacitor at the control voltage.0 nH R= Variable capacitance tuning network L L2 L=47.5 V di_s ms _bas 40_19930908 D1 C C b4 C =4. 0 ns ec MaxTimeS tep=1. 01V.0V) R Rb R=47 k Ohm V_DC Vcc Vdc =3. R1 is used to isolate the control voltage Vdc from the frequency determining network. 2 pF pb_phl_BF R92A_19921214 Q1 C Cb3 C=4. 2ns . 7 pF C Cb2 C=10. 0 pF R=50 O hm R RL R=Rload C Cb1 C=2. This is provided by the loss resistance of L2 and the junction resistance of D1. it is used to introduce a capacitive offset to the junction capacitance of D1. • • • April 2012 © 2006 by Fabian Kung Wai Lee 70 35 .2 nsec P ARAM ET ER SWEEP ParamSweep Sweep1 SweepVar="R load" SimI ns tanc eNam e[1] ="Tran1" SimI ns tanc eNam e[2] = SimI ns tanc eNam e[3] = SimI ns tanc eNam e[4] = SimI ns tanc eNam e[5] = SimI ns tanc eNam e[6] = St art=100 St op=700 V ar VAR E qn St ep=100 VAR 1 X=1. Cb4 and the junction capacitance of D1 can produce a range of reactance value. 0 nH R= R C Rout C c2 C =330. Notice that the frequency determining network has no actual resistance to counter the effect of |R1(ω)|.

0 -1.5V April 2012 © 2006 by Fabian Kung Wai Lee 71 Load-Pull Experiment • Peak-to-peak output voltage versus Rload for Vdc = -1.Time Domain Result 1.5V.5 0 10 20 30 40 50 60 70 80 90 100 Vout when Vdc = -1.5 0. 5 4 Vout(pp) 3 2 1 100 200 300 400 500 600 700 800 RLoad April 2012 © 2006 by Fabian Kung Wai Lee 72 36 .0 -0.5 -1.0 0.

This is shown in the next slide. This can be reduced by decreasing the positive feedback. as shown below there is a lot of distortion.Controlling Harmonic Distortion (1) • Since the resistance in the frequency determining network is too small. large amount of non-linearity is needed to limit the output voltage waveform. by adding a small capacitance across the collector and base of transistor Q1. April 2012 © 2006 by Fabian Kung Wai Lee 74 37 . Vout April 2012 © 2006 by Fabian Kung Wai Lee 73 Controlling Harmonic Distortion (2) • • The distortion generates substantial amount of higher harmonics.

0 nH C R= Cb1 pb_phl_BFR92A_19921214 C=6. 2ns. Control voltage Vcontrol Capacitor to control positive feedback DC DC1 DC TRANSIENT Tran Tran1 StopTime=280.7 pF C Cb2 C=10.0 nH R R= Rb R=47 kOhm I_Probe V_DC I_Probe Iload Vcc IC Vdc=3.7 pF April 2012 © 2006 by Fabian Kung Wai Lee 75 Controlling Harmonic Distortion (4) • The output waveform Vout after this modification is shown below: Vout April 2012 © 2006 by Fabian Kung Wai Lee 76 38 .0V) L=220. 0V.0 V C Ccb C=1.0.01V.0 pF R Rout R=50 Ohm R RL R=50 Ohm R R1 V_DC R=4700 Ohm SRC1 Vdc=0.Controlling Harmonic Distortion (3) The observant person would probably notice that we can also reduce the harmonic distortion by introducing a series resistance in the tuning network. However this is not advisable as the phase noise at the oscillator’s output will increase ( more about this later). 0ns.5 V di_sms_bas40_19930908 D1 C Cb4 C=0. 1ns.0 pF L L2 L=47.0 nsec MaxTimeStep=1.2 nsec t VtPWL L Vtrig Lc V_Tran=pwl(time.8 pF Q1 C Cb3 C=4.0 pF R Re R=220 Ohm C Cc2 C=330.

Since the oscillator is operating in nonlinear mode. Another practical design example will illustrate this approach. Such LPF is usually called Harmonic Filter.5 1 Vdc 1.5 2 2. it should be noted that we should also add a low-pass filter (LPF) at the output of the oscillator to suppress the higher harmonic components. with the frequency measured using a high bandwidth digital storage oscilloscope.5 April 2012 © 2006 by Fabian Kung Wai Lee Volts 78 39 . a varactor manufactured by Phillips Semiconductor (Now NXP). 410 D1 is BB149A.Controlling Harmonic Distortion (5) • Finally. 405 f MHz 400 395 0 0. care must be taken in designing the LPF. • • April 2012 © 2006 by Fabian Kung Wai Lee 77 The Tuning Range • Actual measurement is carried out.

and in frequency domain the effect of the spectra will ‘smear out’. v(t) T = 1/fo Leeson’s expression • LPM ∝ 10 log [ FkT A 1 ⋅ 8Q ⋅ L ( )] fo 2 f offset t fo v(t) f Contains both phase and amplitude modulation of the sinusoidal waveform at frequency fo f Large phase noise t fo Small phase noise April 2012 © 2006 by Fabian Kung Wai Lee 80 40 . the instantaneous frequency and magnitude of oscillation are not constant.Phase Noise in Oscillator (1) • • Since the oscillator output is periodic. In a practical oscillation system. These will fluctuate as a function of time. the output in the frequency domain is ‘smeared’ out. As a result. vosc (t ) = (Vo + mnoise (t )) cos(ωt + θ + θ noise (t )) These random fluctuations are noise. In frequency domain we would expect a series of harmonics. we can say that the instantaneous frequency and magnitude of oscillation are not constant. t • Ideal oscillator output t fo 2fo 3fo f Smearing Real oscillator output April 2012 © 2006 by Fabian Kung Wai Lee fo 2fo 3fo 79 f Phase Noise in Oscillator (2) • Mathematically. These will fluctuate as a function of time.

Phase Noise in Oscillator (3) • Typically the magnitude fluctuation is small (or can be minimized) due to the oscillator nonlinear limiting process under steady-state.4GHz. • Thus the smearing is largely attributed to phase variation and is known as Phase Noise. • Phase noise is measured with respect to the signal level at various offset frequencies. • For example -90dBc/Hz @ 100kHz offset from a CW sine wave at 2. 81 Assume amplitude limiting effect Of the oscillator reduces amplitude fluctuation April 2012 © 2006 by Fabian Kung Wai Lee Reducing Phase Noise (1) • Requirement 1: The resonator network of an oscillator must have a high Q factor. This is an indication of low dissipation loss in the tuning network (See Chapter 3a – impedance transformation network on Q factor). Xtune Variation in Xtune due to environment causes small change in instantaneous frequency. Signal level vosc (t ) ≅ Vo cos(ωt + θ + θ noise (t )) • Phase noise is measured in v(t) .90dBc/Hz t 100kHz f fo dBc/Hz @ foffset. • dBc/Hz stands for dB down from the carrier (the ‘c’) in 1 Hz bandwidth. Xtune X1 Tuning Network with High Q ∆f f X1 ∆f Tuning Network with Low Q f -X1 2∆|X1| -X1 Ztune = Rtune +jXtune © 2006 by Fabian Kung Wai Lee 2∆|X1| April 2012 82 41 .

W. McGraw-Hill. e. Collin for more discussions on Q factor. Rhea. the LC tuning networks can be substituted with transmission line sections. April 2012 © 2006 by Fabian Kung Wai Lee 83 • • • • Reducing Phase Noise (3) • • • Requirement 3: The voltage level of Vcontrol should be stable. Ceramic resonator can provide Q factor greater than 500. Requirement 5: Use low noise components in the construction of the oscillator. or the book by R. while piezoelectric crystal can provide Q factor > 10000.E. See R. 2nd edition 1995. April 2012 © 2006 by Fabian Kung Wai Lee 84 42 . We have looked at LC tuning networks. Requirement 2: The power supply to the oscillator circuit should also be very stable to prevent unwanted amplitude modulation at the oscillator’s output. low-loss capacitors and inductors. which can give Q factor of up to 40. At microwave frequency. small resistance values. “Oscillator design & computer simulation”.Reducing Phase Noise (2) • A Q factor in the tuning network of at least 20 is needed for medium performance oscillator circuits at UHF. Q factor of the tuning network must be in excess or 1000.g. Requirement 4: The circuit has to be properly shielded from electromagnetic interference from other modules. low-loss PCB dielectric. For highly stable oscillator. use discrete components instead of integrated circuits.

“The art of phase noise measurement”. For instance the mathematical model of phase noise in oscillator and the famous Leeson’s equation is not shown here. Hajimiri. April 2012 © 2006 by Fabian Kung Wai Lee 85 More Materials • • This short discussion cannot do justice to the material on phase noise. Lee. Kluwer. 1985. Hewlett Packard RF & Microwave Measurement Symposium. A. – T. and some material for further readings on this topic: – D. Schere. “The design of low noise oscillators”. April 2012 © 2006 by Fabian Kung Wai Lee 86 43 . VCO output with high phase noise VCO output with low phase noise *The spectrum analyzer internal oscillator must of course has a phase noise of an order of magnitude lower than our VCO under test. You can find further discussion in [4]. 1999.Example of Phase Noise from VCOs • Comparison of two VCO outputs on a spectrum analyzer*.

but low sensitivity (e. • The hyperabrupt junction varactor Cjo Forward biased has low Q. but higher sensitivity. When a diode is forward biased. so that at low Vcontrol. Cj decreases. This configuration helps to decrease the harmonic distortion. the other is still being reverse biased. It is always operated in the reverse-biased mode to prevent nonlinearity. April 2012 Vcontrol © 2006 by Fabian Kung Wai Lee 44 . at least one of the diode will be reverse biased. To suppress RF signals Vcontrol Vcontrol Symbol for Varactor 88 • • • To negative resistance amplifier At any one time. hence the oscillation frequency increases. Cj • The abrupt junction varactor has high Q. which generate harmonics. • As we increase the negative biasing voltage Vj . The reverse biased diode has smaller junction capacitance. the PN junction capacitance becomes nonlinear.More on Varactor • • The varactor diode is basically a PN junction optimized for its linear junction capacitance. 0 April 2012 Vj Reverse biased Linear region Vj © 2006 by Fabian Kung Wai Lee 87 A Better Variable Capacitor Network • The back-to-back varactors are commonly employed in a VCO circuit. when one of the diode is being affected by the AC voltage.g. The junction capacitance of the reverse biased diode will dominate the overall capacitance of the network. Cj varies little over large voltage change). and this dominates the overall capacitance of the back-to-back varactor network.

0 GHz Step=1.0 dBm. DC DC DC1 S-PARAMETERS S_Param SP1 Start=0.Example 5.c.0V. Power supply = 3. Output power (into 50Ω load) minimum -3. biasing and AC simulation.7 GHz Stop=1.3 V R RB R=33 kOhm b82496c3120j000 LC param=SIMID 0603-C (12 nH +-5%) 100pF_NPO_0603 Cc2 pb_phl_BFR92A_19921214 Q1 4_7pF_NPO_0603 Term Cc1 Term1 Num=1 Z=50 Ohm 2_2pF_NPO_0603 C1 R RL R=100 Ohm Z11 April 2012 3_3pF_NPO_0603 C2 R RE R=100 Ohm © 2006 by Fabian Kung Wai Lee 90 45 .1 – VCO Design for Frequency Synthesizer • • • To design a low power VCO that works from 810 MHz to 910 MHz.1 Cont… • Checking the d.0 MHz V_DC SRC1 Vdc=3. April 2012 © 2006 by Fabian Kung Wai Lee 89 Example 5.

80 0. m1 freq=775.412 imag(Z(1.0MHz m1=-89.0 nH R= C C3 C=0.0 nH R= 100pF_NPO_0603 C2 BB833_SOD323 D1 April 2012 © 2006 by Fabian Kung Wai Lee 92 46 .0 MHz Var Eqn VAR VAR1 Vcontrol=0.96 0.Example 5.82 0.2 L L1 L=10.68 pF Term Term1 Num=1 Z=50 Ohm Vvar V_DC SRC1 Vdc=Vcontrol V L L2 L=33.84 0. PARAMETER SWEEP ParamSweep Sweep1 SweepVar="Vcontrol" SimInstanceName[1]="SP1" SimInstanceName[2]= SimInstanceName[3]= SimInstanceName[4]= SimInstanceName[5]= SimInstanceName[6]= Start=0.72 0.78 0.1)) -70 -80 -90 -100 -110 -120 0.88 0.1)) real(Z(1.98 1.94 0.1 Cont… • The resonator design. GHz April 2012 © 2006 by Fabian Kung Wai Lee 91 Example 5.76 0.7 GHz Stop=1.579 -40 -50 -60 m2 freq=809.70 0.00 m2 m1 freq.1 Cont… • Checking the results – real and imaginary portion of Z1 when output is terminated with ZL = 100Ω.5 S-PARAMETERS S_Param SP1 Start=0.0MHz m2=-84.86 0.0 GHz Step=1.90 0.92 0.74 0.0 Stop=3 Step=0.

Example 5.00 freq.2 V 100pF_NPO_0603 C4 R R1 R=100 Ohm BB833_SOD323 D1 C C5 C=0.725 Vcontrol=0.0 nsec DC DC1 DC t Low-pass filter b82496c3120j000 L3 param=SIMID 0603-C (12 nH +-5%) 100pF_NPO_0603 Cc2 b82496c3150j000 L4 param=SIMID 0603-C (15 nH +-5%) VtPWL Src_trigger V_T ran=pwl(time.1 Cont… • The resonator reactance. 1ns.0V.90 0.0. 2ns.2 pF pb_phl_BFR92A_19921214 Q1 2_7pF_NPO_0603 C8 0_47pF_NPO_0603 C9 R RL R=100 Ohm b82496c3330j000 L2 param=SIMID 0603-C (33 nH +-5%) Vvar V_DC SRC2 Vdc=1.Z(1..1)) imag(Z(1.000000 m1 100 -imag(VCO_ac.80 0. 120 -X1 of the destabilized amplifier m1 freq=882.3 V R RB R=33 kOhm b82496c3100j000 L1 param=SIMID 0603-C (10 nH +-5%) 4_7pF_NPO_0603 C Cc1 C6 C=2.0 nsec MaxTimeStep=1. GHz © 2006 by Fabian Kung Wai Lee 93 Example 5.70 0.1)) 80 60 40 Resonator reactance as a function of control voltage April 2012 20 The theoretical tuning range 0 0. TRANSIENT Tran Tran1 StopT ime=1000.1 Cont… • The complete schematic with the harmonic suppression filter.3 pF R RE R=100 Ohm April 2012 © 2006 by Fabian Kung Wai Lee 94 47 .1V.0MHz m1=64.75 0. 0ns.0V) V_DC SRC1 Vdc=3.85 0.95 1.68 pF C C7 C=3.

-0. Fundamental -1.Example 5.1 Cont… • Examining the phase noise of the oscillator (of course the accuracy is limited by the stability of the spectrum analyzer used).30 dBm April 2012 © 2006 by Fabian Kung Wai Lee 95 Example 5.1 Cont… • The prototype and the result captured from a spectrum analyzer (9 kHz to 3 GHz).5 dBm Harmonic VCO suppression filter .42 dBm Span = 500 kHz RBW = 300 Hz VBW = 300 Hz 300Hz April 2012 © 2006 by Fabian Kung Wai Lee 96 48 .

0 Vcontrol/Volts 98 © 2006 by Fabian Kung Wai Lee 49 .0 1.2 pF pb_phl_BFR92A_19921214 Q1 2_7pF_NPO_0603 C8 Spectrum Analyzer 0_47pF_NPO_0603 C9 Vvar Port Vcontrol Num=1 R Rcontrol R=1000 Ohm BB833_SOD323 D1 C C7 C=3.3 pF R RE R=100 Ohm April 2012 © 2006 by Fabian Kung Wai Lee 97 Example 5.5 1.0 3.5 3.5 4.35 Volt 750 0.1 Cont… • VCO gain (ko) measurement setup: Variable power supply V_DC SRC1 Vdc=3.74 MHz/Volt 1.3 V R RB R=33 kOhm b82496c3120j000 L3 param=SIMID 0603-C (12 nH +-5%) 100pF_NPO_0603 Cc2 b82496c3150j000 L4 param=SIMID 0603-C (15 nH +-5%) R Rattn R=50 Ohm Port Vout Num=2 b82496c3100j000 L1 param=SIMID 0603-C (10 nH +-5%) 4_7pF_NPO_0603 Cc1 C C5 C=0.5 2.68 pF C C6 C=2.0 April 2012 0.0 2.1 Cont… • Measured results: fVCO / MHz 950 900 850 800 ko ≅ 55 MHz = 40.Example 5.

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