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Hambley:
• Circuitos Conformadores de Onda y
Convertidores de Datos: 1-2-3
• Circuitos operacionales
Figure 2.1 Circuit symbol for the op amp.
Figure 2.2 Equivalent circuit for the ideal op amp. A
OL
is very large (approaching
infinity).
Figure 2.3 Op-amp symbol showing power supplies.

Infinita

M. Grande > 10
5
O

Impedancia de Salida

Cero

Pequeña < 100 O

Ganancia en Tensión

Infinita

M. Grande > 10
5

Ancho de Banda Máximo

Infinito

M. Grande > 10
5
Hz

Características básicas del A.O.
Ideal

Real

Excursión de la Tensión de Salida Infinita ó Vcc Vcc - IoRo ó < Vcc
a) Lazo abierto
con realimentación negativa
con realimentación positiva
-
o
V V
V
A
÷
= · =
+
0 V V
-
= ÷
+ -
V V =
+
Cortocircuito virtual
· =
O
V
( )
-
o
V V A V ÷ · =
+
• Circuitos operacionales
Figure 2.4 Inverting amplifier.
1
2
R
R
i
v
v
O
÷ =
Figure 2.5 We make use of the summing-point constraint in the analysis of the inverting amplifier.
Figure 2.11 Noninverting amplifier.
1
2
1
R
R
v
v
i
O
+ =
Figure 2.12 Voltage follower.
• Circuitos operacionales
Figure 2.16 IC resistors are fabricated from a layer of conductive material.
Figure 2.18 A resistor having L/W = 3.
Figure 2.21 If very high value resistors are used, stray capacitance can couple unwanted signals into the circuit.
• Circuitos operacionales
uA 741
AO-Patillaje
Figure 2.28 For a real op amp, clipping occurs if the output voltage reaches certain limits.
Margen dinámico
uA 741
uA 741
Impedancias de entrada y de salida
Figure 2.25 Bode plot of open-loop gain for a typical op amp.
Ganancia diferencial
Figure 2.26 Noninverting amplifier.
Figure 2.27 Bode plots for Example 2.5.
uA 741
SR
dt
dv
o
s
max max
2 f V V SR
p p
t e = =
p
πV
SR
f
2
max
=
( ) πf V V
dt
dVo
t V V
p p p o
2 sin
max
= = ¬ = e e
Slew rate
uA 741
uA 741
CMRR

D D C
D
C
D D C C D D
V A V
A
A
V A V A V A Vo ~
|
|
.
|

\
|
+ = + =
C
D
A
A
CMRR log 20 =
Figure 2.33 Current sources and a voltage source model the dc imperfections of an op amp.
2
÷ +
+
=
B B
B
I I
I
÷ +
÷ =
B B IO
I I I
Corriente de polarización
Corriente de offset
Tensión de offset
IO
V
Figure 2.35 Adding the resistor R to the inverting amplifier
circuit causes the effects of bias currents to cancel.
Figure 2.36 Noninverting amplifier, including resistor R to
balance the effects of the bias currents. See Exercise~2.17.
La tensión de offset de salida es consecuencia tanto de la
tensión de offset como de la corriente de offset. El fabricante
proporciona dos terminales de offset null. Entre ambas se
deberá colocar un potenciómetro de 10KO con el cursor
CC
). Para compensar este
desajuste se pondrá a tierra la entrada del circuito. Se
observará la salida mientras se ajusta el cursor. Cuando la
salida sea nula, se retirará la puesta a tierra de la entrada del
circuito.
29
uA 741
• Circuitos operacionales
Figure 2.47 Inverting amplifier.

Figure 2.48 Ac-coupled inverting amplifier.
Figure 2.49 Summing amplifier.

Figure 2.50 Noninverting amplifier. This circuit approximates an ideal voltage amplifier.

Figure 2.51 Ac-coupled noninverting amplifier.
Figure 2.52 Ac-coupled voltage follower with bootstrapped bias resistors.
Figure 2.53 Differential amplifier.

Figure 2.54 Instrumentation-quality differential amplifier.

Figure 2.55 Voltage-to-current converter (transconductance amplifier).
Convertidor V-I

Figure 2.56 Voltage-to-current converter with grounded load (Howland circuit).
Figure 2.57 Current-to-voltage converter (transresistance amplifier).
Convertidor I-V

Figure 2.58 Current amplifier.
Figure 2.60 Integrator.

Figure 2.64a Comparative Bode plots.
Figure 2.63 Differentiator.

Figure 2.64b Comparative Bode plots.
1 3
min
1 3
2
10
2
1
C R
f
C R
f
CH
t t
> ¬ =
1 3
max
1 3
2
10
2
1
C R
f
C R
f
CL
t t
< ¬ =
• Circuitos operacionales
Figure 12.1 Circuit symbol for the comparator. If
v
1
> v
2
, then v
o
is high; if v
1
< v
2,
then v
o
is low.
Figure 12.2 Transfer characteristics of ideal comparators.
Figure 12.4 The LM111 has an open-
collector output.
Figure 12.3 Transfer characteristic of a real
comparator.
Figure 12.5 The input voltage v
in
is compared to the reference voltage V
r
.
Figure 12.6 Noise added to the input signal can cause undesired transitions in the output signal.
Figure 12.7 A Schmitt trigger is formed by
using positive feedback with a comparator.
Figure 12.8 Noninverting Schmitt trigger.
Figure 2.10b Schmitt trigger circuit
and waveforms.
OL TL
OH TH
V
R
R
V
V
R
R
V
2
1
2
1
÷ =
=
Schmitt trigger

Figure 12.9 Schmitt triggers that can be designed to have specified thresholds.
• Circuitos operacionales
Reloj
Figure 12.16a Astable multivibrator.
Figure 12.16b Astable multivibrator.

Figure 12.20 Circuit for Exercise 12.5. Figure 12.22 Circuit for Exercise 12.6.
• Circuitos operacionales
Figure 12.24 Simplified functional block diagram of 555 timer IC.
H
H
H H
L L
L
L
L
H
L
555

Figure 12.25 Monostable multivibrator.
C R . C R T
A A
1 1 3 ln ~ =