INTEGRATED CIRCUITS

DATA SHEET
For a complete data sheet, please also download:
• The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC

HEF4069UB gates Hex inverter
Product specification File under Integrated Circuits, IC04 January 1995

2 Pinning diagram.3 Schematic diagram (one inverter).Philips Semiconductors Product specification Hex inverter DESCRIPTION The HEF4069UB is a general purpose hex inverter. FAMILY DATA. Each of the six inverters is a single stage. IDD LIMITS category GATES See Family Specifications for VIH/VIL unbuffered stages Fig. HEF4069UB gates Fig. ceramic (cerdip) (SOT73) 14-lead SO. January 1995 2 .1 Functional diagram. plastic (SOT27-1) 14-lead DIL. HEF4069UBP(N): HEF4069UBD(F): HEF4069UBT(D): 14-lead DIL. plastic (SOT108-1) ( ): Package Designator North America Fig.

input transition times ≤ 20 ns VDD V Propagation delays In → On HIGH to LOW LOW to HIGH Output transition times HIGH to LOW 5 10 15 5 10 15 5 10 15 5 LOW to HIGH 10 15 tTLH tTHL tPLH tPHL SYMBOL TYP. 45 20 15 40 20 15 60 30 20 60 30 20 90 ns 40 ns 25 ns 80 ns 40 ns 30 ns 120 ns 60 ns 40 ns 120 ns 60 ns 40 ns HEF4069UB gates TYPICAL EXTRAPOLATION FORMULA 18 ns + (0.23 ns/pF) CL 7 ns + (0.42 ns/pF) CL 6 ns + (0. CL = 50 pF.55 ns/pF) CL 9 ns + (0. (MHz) CL = load capacitance (pF) ∑ (foCL) = sum of outputs VDD = supply voltage (V) January 1995 3 . MAX.28 ns/pF) CL 10 ns + (1.16 ns/pF) CL 13 ns + (0. Tamb = 25 °C.16 ns/pF) CL 10 ns + (1.28 ns/pF) CL VDD V Dynamic power dissipation per package (P) 5 10 15 TYPICAL FORMULA FOR P (µW) 600 fi + ∑ (foCL) × VDD2 4 000 fi + ∑ (foCL) × 22 000 fi + ∑ (foCL) × VDD2 VDD2 where fi = input freq.Philips Semiconductors Product specification Hex inverter AC CHARACTERISTICS VSS = 0 V.55 ns/pF) CL 9 ns + (0.0 ns/pF) CL 9 ns + (0. (MHz) fo = output freq.23 ns/pF) CL 7 ns + (0.42 ns/pF) CL 6 ns + (0.0 ns/pF) CL 9 ns + (0.

VDD = 5 V. ___ VO. _ _ _ ID (drain current).4 Typical transfer characteristics. IO = 0. VDD = 10 V. _ _ _ ID (drain current). IO = 0. _ _ _ ID (drain current).6 Typical transfer characteristics.5 Typical transfer characteristics. VDD = 15 V. Fig. ___ VO. Fig.Philips Semiconductors Product specification Hex inverter HEF4069UB gates Fig. January 1995 4 . IO = 0. ___ VO.

The period is fairly independent of VDD. (b) Waveforms at the points marked A. (a) (b) The function of R2 is to minimize the influence of the forward voltage across the protection diodes on the frequency. Fig.and T 2 = R1C1 In --------------------------------T 1 = R1C1 In ---------------------------V ST V DD – V ST VST is the signal threshold level of the inverter. HEF4069UB gates In Fig. The duty factor.7 an astable relaxation oscillator is given.where . The oscillation frequency is mainly determined by R1C1.Philips Semiconductors Product specification Hex inverter APPLICATION INFORMATION Some examples of applications for the HEF4069UB are shown below. however. provided R1 << R2 and R2C2 << R1C1. January 1995 5 . in which V DD + V ST 2 V DD – V ST . The period Tp is given by Tp = T1 + T2. is influenced by VST.7 (a) Astable relaxation oscillator using two HEF4069UB inverters. C2 is a parasitic capacitance. B. VST and temperature. C and D in the circuit diagram. the diodes may be BAW62. C2 is a stray (parasitic) capacitance.

Fig.8 Crystal oscillator for frequencies up to 10 MHz. using two HEF4069UB inverters.10 Supply current as a function of supply voltage.11 Test set-up for measuring graphs of Figs 9 and 10. It is also an example of an analogue amplifier using one HEF4069UB. January 1995 6 . Fig.Philips Semiconductors Product specification Hex inverter HEF4069UB gates (1) This inverter is added to amplify the oscillator output voltage to a level sufficient to drive other LOCMOS circuits.9 Voltage gain (VO/VI) as a function of supply voltage. Fig. Fig.

13 Typical forward transconductance gfs as a function of the supply voltage at Tamb = 25 °C. B : average + 2 s.Philips Semiconductors Product specification Hex inverter HEF4069UB gates Fig. Fig. C : average − 2 s. A : average.12 Test set-up for measuring forward transconductance gfs = dio/dvi at vo is constant (see also graph Fig. where: ‘s’ is the observed standard deviation.13). January 1995 7 .

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