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Bi tp iu phi

Bi 1 : Xt tp cc tin trnh sau:


IO ln 1
Thi gian
IO ln 2
Tin trnh Thi im Thi gian
s dng Thi Thit b s dng Thi Thiet
vo RQ
CPU ln 1 gian
CPU ln 2 gian
b
P1

R1

Null

P2

R2

R1

P3

10

R1

R2

P4

11

20

R2

Null

Bit rng mi loi thit b IO ch c 1 th hin, v trong mi chu k IO, mi tin trnh yu cu
1 th hin duy nht ca mt loi thit b.
Hy v s iu phi CPU (s dng chin lc SJF khng c quyn), v ti nguyn R1,
R2 (s dng chin lc FIFO) cho cc tin trnh.
p n:
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
CPU 1 1 2 1 1 1 1 1 1
3 2 2 4 1 4 4
R1
1 1 1 1 1 2 2 2
R2
2 2 2 2 2 2 2 2

17
3
2
4

18 19 20
3 3 3
2
4 4 4

21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
3
3 3
3 3 3 3 3
4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 3 3 3

CPU
0
2
3
9
10
11
13
14
15
17
22
27
29

R1
P1(8)
P1(6), P2(1)
P1(6)
null
P3(6)
P2(2), P3(5), P4(3)
P3(5), P4(3)
P1(1), P3(5), P4(2)
P3(5), P4(2), P1(end)
P3(5)
null
P3(2)
null

9
13
14
19
22
27

R2

P1(5)
P1(1), P2(5)
P2(5)
null, P2(end)
P3(5)
null

3
11
17
29
37
40

P2(8)
null
P4(20)
P3(3), P4(8)
P3(3), P4(end)
null, P3(end)

Bi 2: Thc hin iu phi theo chin lc SJF khng c quyn cho cc tin trnh sau:
Tin trnh Vo RL CPU ln 1 I/O ln 1 CPU ln 2 I/O ln 2 CPU ln 3
P1
0.5
2
R1(4)
3
P2
2.5
6
R2(3)
2
R1(3)
2
P3
3.5
4
R2(4)
2
P4
4
3
R1(3)
1
R1(3)
2
p n:

0
CPU
R1
R2

1
1

2
1

3
2
1

4
4
1

5
4
1

6
4
1

7
1
4

8
1
4

9
1
4

10 11 12 13 14 15 16 17 18
4 3 3 3 3 4 4 2 2
4 4 4
3 3 3 3

19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
CPU 3 3 2 2 2
2 2
2 2
R1
2 2 2
R2
2 2 2
0.5
1
2.5
3
3.5
4

10

11

14

P1(2) vo RL, RL = {P1(2)}


P1(2) dng CPU ln 1 (3 ht), RL = {}
P2(6) vo RL, RL = {P2(6)}
P1 ht CPU ln 1, dng R1(4) ln 1 (7 ht)
P2(6) dng CPU ln 1(9 ht), RL = {}
P3(4) vo RL, RL = {P3(4)}
P4(3) vo RL, RL = {P3(4), P4(3)}
P4(3) cp CPU ca P2(5) ang chy, (7 ht)
RL = {P3(4), P2(5)}
P1 ht IO ln 1, vo RL
RL = {P3(4), P2(5), P1(3)}
P4 ht CPU ln 1, dng R1(3) ln 1 (10 ht)
P1(3) dng CPU ln 2 (10 ht)
RL = {P3(4), P2(5)}
P4 ht IO ln 1, vo RL,
RL = {P3(4), P2(5), P4(1)}
P1 ht CPU ln 2, P1 kt thc.
P4(1) dng CPU ln 2 (11 ht)
RL = {P3(4), P2(5)}
P4 ht CPU ln 2, dng R1(3) ln 2 (14 ht)
P3(4) dng CPU ln 1 (15 ht)
RL = {P2(5)}
P4 ht IO ln 2, vo RL
RL = {P2(5), P4(2)}

Bi 3: Thc hin iu phi theo chin lc SJF khng c quyn cho cc tin trnh sau:
Tin trnh Vo RL CPU ln 1 I/O ln 1 CPU ln 2 I/O ln 2 CPU ln 3
P1
0.5
1
R1(4)
3
P2
1.5
5
R2(3)
2
R1(2)
P3
1.5
4
R2(3)
2
P4
2.5
3
R1(4)
1
R1(2)
3
p n:

0
CPU
R1
R2

1
1

2
3
1

3
3
1

4
3
1

5
3
1

6
4

7
4

8
4

9
3
4

10 11 12 13 14 15 16 17 18
3 1 1 1 4 2 2 2 2
4 4 4
4 4

19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
CPU 2 4 4 4 2 2
R1
2 2
R2
2 2 2
P1: WT = (1 0.5) + (11 6) = 5.5
P2: WT = (15 1.5) = 13.5
P3: WT = (2 1.5) = 0.5
P4: WT = (6 2.5) + (14 13) + (20 17) = 7.5

Bi 4: Thc hin iu phi theo chin lc SJF khng c quyn cho cc tin trnh sau:
Tin trnh Vo RL CPU ln 1 I/O ln 1 CPU ln 2 I/O ln 2 CPU ln 3
P1
1.5
5
R1(3)
1
P2
0.5
3
R2(2)
3
R2(3)
P3
2.5
4
R2(3)
2
R2(2)
1
P4
2.5
3
R1(4)
1
R1(2)
3
p n:

0
CPU
R1
R2

1
2

2
2

3
2

4
4

5
4

6
4

7
2
4

8
2
4

9
2
4

10 11 12 13 14 15 16 17 18
3 4 3 3 3 4 4 4 3
4
4 4
2 2 2
3 3 3

19 20 21 22 23 24 25 26 27 28 29 30 31 32 33
CPU 3 1 1 3 1 1 1
1
R1
1 1 1
R2
3 3
P1: WT = (20 1.5) + (23 - 22) = 19.5
P2: WT = (1 0.5) + (7 6) = 1.5
P3: WT = (10 2.5) + (12 - 11) = 8.5
P4: WT = (4 2.5) + (15 14) = 2.5

Bi 5: Thc hin iu phi theo chin lc SJF khng c quyn cho cc tin trnh sau:
Tin
Thi im vo
CPU ln I/O ln CPU ln
trnh
RL
1
1
2
P1
0
2
4
3
P2
3
6
3
2
P3
4
4
4
2
P4
4
3
4
1
a. Trnh by qu trnh iu phi v v s iu phi.
b. Tnh thi gian ch cho cc tin trnh.

I/O ln
2

CPU ln
3

Bi 6: Thc hin iu phi theo chin lc SJF khng c quyn cho cc tin trnh sau:
Tin
Vo h
Vo
CPU ln I/O ln CPU ln I/O ln CPU ln
trnh
thng
RL
1
1
2
2
3
P1
0
0.5
1
R1(4)
3
P2
1
1.5
6
R2(3)
2
R1(4)
1
P3
1
2.5
4
R2(4)
2
P4
2
2.5
3
R1(3)
1
R1(4)
1
Cc ti nguyn c xem nh ch c duy nht mt th hin v vic yu cu ti nguyn l c
quyn. Chin lc iu phi c s dng cho ti nguyn l FIFO.
a. Trnh by qu trnh iu phi .
b. Tnh thi gian ch cho cc tin trnh.

Bi 7: iu phi theo SJF khng c quyn


Tin
trnh
P1

Vo h
thng
1.0

Vo
RL
1.5

CPU1

I/O1

CPU2

2(R2)

P2

1.5

3(R2)

P3

2.5

3(R1)

P4

2.5

2(R1)

I/O2

CPU3

2(R2)

Cc ti nguyn c xem nh ch c duy nht mt th hin v vic yu cu ti nguyn l c


quyn. Chin lc iu phi c s dng cho ti nguyn l FIFO.
a. Trnh by qu trnh iu phi .
b. Tnh thi gian ch cho cc tin trnh.
Bi 8:
Khi iu phi vi RR (q=2):
P1(4), P6(4) cng vo RL ti thi im 0.5.
P2(4), P7(4) cng vo RL ti thi im 2.5.
P3 v P8 cng ht IO1 ti thi im 2.5 chuyn sang CPU2 : P3(4) v P8(4).
P4(4) v P9(4) cng vo RL ti thi im 3.
Cho bit:

RL ngay sau thi im 0.


RL ngay sau thi im 2.
RL ngay sau thi im 2.5.
RL ngay sau thi im 4.