Professional Documents
Culture Documents
1
CK
APPD
M78-DVT
REV
ZONE
ECN
ENG
APPD
DESCRIPTION OF CHANGE
DATE
33
503047
ENGINEERING RELEASED
DATE
05/09/07 ?
05/09/2007
D
(.csa)
Page
Date
Contents
Sync
Page
TABLE_TABLEOFCONTENTS_HEAD
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
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TABLE_TABLEOFCONTENTS_ITEM
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TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
C
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
A
TABLE_TABLEOFCONTENTS_ITEM
D
Date
(.csa)
Contents
Sync
PATA Connector
SATA Connectors
EXTERNAL USB CONNECTORS
Internal USB Connections
SMC
SMC Support
LPC+ Debug Connector
SMBUS CONNECTIONS
Current & Voltage Sensing
Thermal Sensors
HD AND OD FAN
CPU FAN
ALS Support
SPI BootROM
POWER SEQUENCING BLOCK DIAGRAM
PGOOD and Power Sequencing
IMVP6 CPU VCore Regulator
IMVP6 3RD PHASE
1.5V / 1.05V SUPPLIES
1.25V / MCH CORE SUPPLIES
1.8V S3 /0.9V S0 SUPPLIES
5V S5 / 3.3V S3 SUPPLIES
3.3V / 2.5V POWER SUPPLIES
S3 & S0 FETs
MXM PCI-E & PWR
MXM I/O
INTERNAL DISPLAY CONNS
Analog Video Support
External Display Conns
MLB: AUDIO CONNECTOR
CPU/FSB Constraints
NB Constraints
Memory Constraints
SB Constraints (1 of 2)
SB Constraints (2 of 2)
Clock Constraints
FireWire & SMC Constraints
M72/M78 SPECIFIC CONSTRAINTS
M72/M78 RULE DEFINITIONS
N/A
DAVE_MASTER
TABLE_TABLEOFCONTENTS_HEAD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
1
2
3
4
5
6
7
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
37
38
39
40
42
43
Table of Contents
System Block Diagram
Power Block Diagram
BOM Configuration
Revision History
Power Conn / Alias
Functional / ICT Test
GROUNDING ALIASES
CPU FSB
CPU Power & Ground
CPU Decoupling & VID
eXtended Debug Port (XDP)
NB CPU Interface
NB PEG / Video Interfaces
NB Misc Interfaces
NB DDR2 Interfaces
NB Power 1
NB Power 2
NB Grounds
NB Standard Decoupling
NB Graphics Decoupling
SB Enet, Disk, FSB, LPC
SB PCI, PCIe, DMI, USB
SB Pwr Mgt, GPIO, Clink
SB Power & Ground
SB Decoupling
SB Misc
Clock (CK505)
Clock Termination
DDR2 SO-DIMM Connector A
DDR2 SO-DIMM Connector B
Memory Active Termination
PCI-E MiniCard Connector
Ethernet (Yukon)
YUKON/ULTRA SUPPORT
ETHERNET CONNECTOR
FW: 1394B CONTROLLER
FW: 1394B MISC
FIREWIRE CONNECTORS
N/A
N/A
TABLE_TABLEOFCONTENTS_ITEM
1/19/2007
DEREK
TABLE_TABLEOFCONTENTS_ITEM
N/A
MARK
TABLE_TABLEOFCONTENTS_ITEM
10/16/06
JAMES
TABLE_TABLEOFCONTENTS_ITEM
10/16/06
JAMES
TABLE_TABLEOFCONTENTS_ITEM
N/A
MARK
TABLE_TABLEOFCONTENTS_ITEM
10/16/06
JAMES
TABLE_TABLEOFCONTENTS_ITEM
(10/02/2006)
MARK
TABLE_TABLEOFCONTENTS_ITEM
11/09/06
JAMES
TABLE_TABLEOFCONTENTS_ITEM
11/09/06
JAMES
TABLE_TABLEOFCONTENTS_ITEM
10/10/2006
MARK
TABLE_TABLEOFCONTENTS_ITEM
11/06/2006
T9_MLB_NOME
TABLE_TABLEOFCONTENTS_ITEM
10/30/2006
T9_MLB
TABLE_TABLEOFCONTENTS_ITEM
10/30/2006
T9_MLB
TABLE_TABLEOFCONTENTS_ITEM
01/21/2007
T9_MLB
TABLE_TABLEOFCONTENTS_ITEM
10/30/2006
T9_MLB
TABLE_TABLEOFCONTENTS_ITEM
10/30/2006
T9_MLB
TABLE_TABLEOFCONTENTS_ITEM
10/30/2006
T9_MLB
TABLE_TABLEOFCONTENTS_ITEM
10/30/2006
T9_MLB
TABLE_TABLEOFCONTENTS_ITEM
11/03/2006
JAMES
TABLE_TABLEOFCONTENTS_ITEM
10/16/06
JAMES
TABLE_TABLEOFCONTENTS_ITEM
03/22/2007
T9_MLB_NOME
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
03/22/2007
T9_MLB_NOME
TABLE_TABLEOFCONTENTS_ITEM
03/22/2007
T9_MLB_NOME
TABLE_TABLEOFCONTENTS_ITEM
N/A
DAVE_MASTER
TABLE_TABLEOFCONTENTS_ITEM
N/A
DAVE_MASTER
TABLE_TABLEOFCONTENTS_ITEM
11/27/2006
JAMES
TABLE_TABLEOFCONTENTS_ITEM
10/18/2006
P
JAMES
10/17/06
JAMES
10/17/06
JAMES
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
TABLE_TABLEOFCONTENTS_ITEM
12/04/2006
JAMES
TABLE_TABLEOFCONTENTS_ITEM
10/30/2006
DOUG
TABLE_TABLEOFCONTENTS_ITEM
11/08/2006
DOUG
TABLE_TABLEOFCONTENTS_ITEM
(10/02/2006)
DOUG
TABLE_TABLEOFCONTENTS_ITEM
11/06/2006
DOUG
TABLE_TABLEOFCONTENTS_ITEM
12/15/2006
M78_MLB
TABLE_TABLEOFCONTENTS_ITEM
10/10/2006
DOUG
TABLE_TABLEOFCONTENTS_ITEM
10/10/2006
DOUG
TABLE_TABLEOFCONTENTS_ITEM
y
r
Page
Contents
TABLE_TABLEOFCONTENTS_HEAD
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
44
45
46
47
49
50
51
52
53
55
56
57
58
61
69
70
71
72
73
74
75
76
77
78
84
85
90
91
94
98
100
101
102
103
104
105
106
108
109
TABLE_TABLEOFCONTENTS_ITEM
10/10/2006
DOUG
TABLE_TABLEOFCONTENTS_ITEM
12/11/2006
DOUG
TABLE_TABLEOFCONTENTS_ITEM
12/15/2006
M78_MLB
TABLE_TABLEOFCONTENTS_ITEM
12/15/2006
T9_MLB_NOME
79
80
81
82
83
84
85
86
87
110
111
112
113
114
Cross
Cross
Cross
Cross
Cross
Cross
Cross
Cross
Cross
a
n
i
TABLE_TABLEOFCONTENTS_ITEM
N/A
DAVE_MASTER
TABLE_TABLEOFCONTENTS_ITEM
03/22/2007
T9_MLB_NOME
TABLE_TABLEOFCONTENTS_ITEM
N/A
DAVE_MASTER
TABLE_TABLEOFCONTENTS_ITEM
N/A
DAVE_MASTER
115
116
117
118
TABLE_TABLEOFCONTENTS_ITEM
N/A
DAVE_MASTER
N/A
DAVE_MASTER
N/A
DAVE_MASTER
Reference
Reference
Reference
Reference
Reference
Reference
Reference
Reference
Reference
Sync
Page
Page
Page
Page
Page
Page
Page
Page
Page
N/A
DAVE_MASTER
03/22/2007
T9_MLB_NOME
N/A
MARK
m
il
e
r
03/22/2007
T9_MLB_NOME
Date
(.csa)
N/A
MARK
N/A
MARK
N/A
MARK
N/A
MARK
N/A
MARK
N/A
MARK
N/A
MARK
N/A
MARK
N/A
MARK
11/01/2006
M78_MLB
11/01/2006
M78_MLB
11/01/2006
M78_MLB
11/01/2006
M78_MLB
11/01/2006
M78_MLB
4/23/2007
DEREK
09/27/2006
T9_MLB
09/27/2006
T9_MLB
09/27/2006
T9_MLB
09/27/2006
T9_MLB
(10/02/2006)
(MASTER)
09/27/2006
DIMENSIONS ARE IN MILLIMETERS
T9_MLB
XX
T9_MLB
METRIC
09/27/2006
09/27/2006
X.XX
T9_MLB
DRAFTER
T9_MLB
DESIGN CK
09/27/2006
X.XXX
TABLE_TABLEOFCONTENTS_ITEM
ENG APPD
MFG APPD
QA APPD
DESIGNER
RELEASE
SCALE
ANGLES
TITLE
SCH,M78,MLB
NONE
DRAWING
SIZE
TITLE=M78
ABBREV=DRAWING
LAST_MODIFIED=Wed May
9 10:26:54 2007
MATERIAL/FINISH
NOTED AS
APPLICABLE
DRAWING NUMBER
REV.
051-7229
SHT
33
OF
118
U1000
CPU
U2900
CK 505
2.X GHZ
Core ~1.2V
PG 11
J1300
Clocks
TERMS
PG 29
PG 30
MINI-XDP
PG 10
PG 13
FSB
S/PDIF
64-Bit
800/1066? MHz
PG 14
J8400
x16 PCI-E
NB-GMCH
PG 84
Core
PG 15
1.05 - 1.25V
PG 90
PG 94
y
r
AMBIENT INTAKE
HARD DRIVE
a
n
i
OPTICAL DRIVE
Misc
PG 16
PG 18,19,20
LVDS
VGA
MUX
GPU HEATSINK
667/800? MHZ
CPU DIE
RGB
U9130
VGA / TV OUT
CPU HEATSINK
PG 33
1.8V - 64 Bits
PAGE 55
PG31,32
TMDS
MINI-DVI
Conn
Temp Sense
Parallel
Term
DIMM
DDR2 - Dual Channel
TV
Out
J9410
PG 16/17
PCI-E
MXM CONNECTOR
Int Disp
Conn
J3100
J3200?
U1400
Main Memory
J9002
POWER SENSE
PG 15
DMI
CLnk 0
PG 16
PG 16
PG 53
TV OUT
U6100
SPI
Boot ROM
x4 DMI
PG 61
2.5 GHz
A
BSA
B,0
BSB
ADC
Fan
Ser
J5100
Prt
SMC
LPC Conn
U4900
SATA
Conn
CLnk 0
SPI
PG 25
PG 24
LPC
DMI
PG 24
PG 23
SATA-0
J4510
m
il
U2300
J4610
PG 25
Ln6
FW
Mini PCI-E
AirPort
PG 40
PG 34
8
6
5
3
2
E-NET
CLnk 1
PCI
AZALIA
PG 23
PG 25
PG 24
PG 23
P
YUKON
S/PDIF
DIMMS
Clk Gen
J3100
U2900
J3200
INTERCONNECT PAGE 98
INTERCONNECT PAGE 99
U6200
Audio
Codec
PG 62
E-NET
PG 37
T3900
PG 47
PG 25
Ln5
PG 26
SMB
PCI-E
Ln4
PG 24
Ln3
FW643
Bluetooth
PG 58
Ln2
Core
AUDIO BOARD
U3700
ANALOG
IR / ALS
USB
2.5 GHz
PG 24
e
r
Ln1
6 - x1
J4720
J5880
UATA
PG 44
J3400
PG 47
Core 1.05V
PG 23
100 MHz
Conn
U4000
CAMERA
PG 46
3.3 V
UATA
J4630
USB
Connectors
SB-ICH8
SATA-2
J4401
J4620
J4700
GPIOs
SATA
SATA-1
PG 23
PG 45
PG 51
PG 49
MAGNETICS
U6300
U6400
U6500/U6600
Line In
Amp
Line Out
Amp
Speaker
Amps
PG 63
PG 64
PG 65,66
SYNC_MASTER=DEREK
SYNC_DATE=1/19/2007
PG 39
J4301
S800
S400
J3900
J6700/1/2/3/4
FireWire
Conn
E-NET
Conn
Audio
Conns
PG 43
PG 39
PG 67
SIZE
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
OF
33
118
ACDC_TEMP
CONTROL
DCM/FCM
TEMP SENSOR
12V_S5
PM_SLP_S3_OD
PAGE 6
24V_S0
(M78 ONLY)
PP24V_S0_INV
(M78 ONLY)
y
r
PP12V_S0_HDD
PP12V_S0_INV
PP12V_S5
PP12V_S0
24" PANEL
HARD DRIVE
FANS
MXM
FIREWIRE PORTS
21" INVERTER
PM_S4_STATE
a
n
i
PP12V_S3
FET (17.4A)
PAGE 77
PP5V_S5
0.1A (S5)
10A (S3 & S0)
PAGE 76
ICH8_REF
LEDS
MISC
PP1V8_S3
13.4A (S3 & S0)
PAGE 75
PM_S4_STATE
PPVCORE_CPU
.95-1.25V @ 55A
PAGE 71-72
PM_SLP_S3
PP5V_S3
FET (3.7A)
PAGE 78
MAIN MEMORY
MCH_VCCSM
USB
PM_SLP_S3
PP5V_S0
FET (6.2A)
PAGE 78
PP3V3_S5
3.3V @ 0.54A
PAGE 77
AUDIO
CAMERA
20" PANEL
OPTICAL
MXM
HDD
PP1V25_S0
1.25V @ 2.5A
PAGE 74
m
il
PP1V5_S0
1.5V @ 2.7A
PAGE 73
PP1V9R2V5_S3
1.9/2.5V @ 0.2A
PAGE 38
FIREWIRE
PP3V3_S3
3.3V @ 4.5A
PAGE 76
ETHERNET
BT
AP
MCH_VCCAXD
MCH_VCCAXF
MCH_PLL
ICH8_IO
MEM_VTT
PP0V9_S0
0.9V @ 0.8A
PAGE 75
BOOT ROM
ICH8_IO
SMC
FW
PP1V_S5
1.0V @ 0.08A
PAGE 42
MXM
PP1V8_S0
FET (3.5A)
PAGE 78
CPU_CORE
CPU_AVDD
ICH8_GLAN
AP PCIE
ENET
PP1V05_S0
1.05V @ 3.5A
PAGE 73
MCH_VCCAXM
MCH_PCIE
ICH8_VCC
ICH8_IO
PM_SLP_S3
e
r
PP3V3_S0
FET (2.9A)
PAGE 78
PP1V9_S3
1.9V @ 0.3A
PAGE 38
AUDIO
MXM
CLOCK
MCH_HV
ICH8_IO
PPMCH_CORE_SO
1.05V @ 6.7A
PAGE 74
MCH_CORE
CPU_VCCP
VTT
B
PP2V5_S0
2.5V @ 0.5A
PAGE 77
MXM
PP4V5_AUDIO
4.5V @ .06A
AUDIO BOARD
AUDIO
ENET_CORE
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
OF
33
118
BOM Variants
TABLE_BOMGROUP_HEAD
BOM NUMBER
BOM NAME
BOM OPTIONS
630-7977
PCBA,MLB,M78,CTO,2.8G
24_INCH_LCD,2P8GHZ_CPU,BASIC,CR_E,V8
630-7976
PCBA,MLB,M78,BTR,2.4G
24_INCH_LCD,2P4GHZ_CPU,BASIC,CR_STD,V6
630-7875
PCBA,MLB,M78,CTO,2.2G
24_INCH_LCD,2P2GHZ_CPU,BASIC,CR_STD,V6
TABLE_BOMGROUP_ITEM
COMMON
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_BOMGROUP_ITEM
607-0429
M78 DEVELOPMENT
TABLE_5_ITEM
CPU_TDIODE,DEVELOPMENT,XDP_CONN,LIT_IO,LPCPLUS,MXM_PWR_SENSE
338S0430
IC,NB,CRESTLINE,PM,C0,QS
U1400
CRITICAL
338S0427
IC,SB,ICH8M,B1,QS
U2300
CRITICAL
359S0130
U2900
CRITICAL
PCB,FAB,IO ALIGNMENT,M72
IO1
CRITICAL
069-2046
825-6447
MLB LABEL,48.0X4.8
338S0381 - GM965
TABLE_5_ITEM
TABLE_BOMGROUP_ITEM
630-7979
PCBA,MLB,M72,CTO,2.4G
TABLE_5_ITEM
20_INCH_LCD,2P4GHZ_CPU,BASIC,CR_STD,V6
537 - 359S0127
TABLE_BOMGROUP_ITEM
630-7978
PCBA,MLB,M72,BTR,2.2G
20_INCH_LCD,2P2GHZ_CPU,BASIC,CR_STD,V6
630-7874
PCBA,MLB,M72,GD,2.0G
20_INCH_LCD,2P0GHZ_CPU,BASIC,CR_STD,V6
607-0462
M72 DEVELOPMENT
CPU_TDIODE,DEVELOPMENT,ITP_CONN,LIT_IO,LPCPLUS,MXM_PWR_SENSE
TABLE_5_ITEM
y
r
DOC1
TABLE_BOMGROUP_ITEM
TABLE_5_ITEM
X14
CRITICAL
BOM GROUPS
TABLE_BOMGROUP_HEAD
BOM GROUP
BOM OPTIONS
BASIC
5V1V8REG_SKIP,ALTERNATE,COMMON,ITP/XDP,MXM_ROM,NBCFG_PEG_REVERSE,YUKON_ULTRA
TABLE_BOMGROUP_ITEM
TABLE_BOMGROUP_ITEM
V6
LOW_TDP
V8
HIGH_TDP
TABLE_BOMGROUP_ITEM
PART#
QTY
DESCRIPTION
REFERENCE DES
CRITICAL
BOM OPTION
C Module Parts
PART NUMBER
QTY
DESCRIPTION
REFERENCE DES
CRITICAL
056-XXXX (MCO)
057-XXXX (PANEL) 820-2110
DESCRIPTION
(341S1904 - DEV)
(341S1905 - PVT)
(335S0384 - BLNK)
(341S2066 - PROG) 341T0049
(338S0274 - BLNK)
114S0307
132S0010
132S0178
132S0082
051-7228
056-2161 (MCO)
057-0399 (PANEL) 820-2143
(341SXXXX - PVT)
341T0056
(335S0384 - BLNK)
114S0303
132S0205
132S0178
132S0082
REFERENCE DESIGNATOR(S)
PCB,SCHEM,MLB,M78
SCH1
PCB,FAB,MLB,M78,HF
MLB1
IC,SMC,M78
U4900
RES,8.25K,0402,1%,1/16W,LF
R7117
CAP,CER,390PF,10%,50V,0402
C7113
CAP,CER,0.47UF,10%,6.3V,0402
C7128
CAP,CER,0.068UF,10%,16V,0402
C7134
m
il
e
r
a
n
i
QTY
051-7229
BOM OPTION
TABLE_5_ITEM
TABLE_BOMGROUP_ITEM
U8570
CRITICAL
CRITICAL
CRITICAL
TABLE_5_HEAD
BOM OPTION
TABLE_5_ITEM
24_INCH_LCD
TABLE_5_ITEM
24_INCH_LCD
TABLE_5_ITEM
24_INCH_LCD
TABLE_5_ITEM
24_INCH_LCD
TABLE_5_ITEM
24_INCH_LCD
TABLE_5_ITEM
24_INCH_LCD
TABLE_5_ITEM
24_INCH_LCD
TABLE_5_ITEM
24_INCH_LCD
TABLE_5_ITEM
PCB,SCHEM,MLB,M72
SCH1
20_INCH_LCD
PCB,FAB,MLB,M72,HF
MLB1
20_INCH_LCD
TABLE_5_ITEM
TABLE_5_ITEM
EFI ROM,M72/M78
U6100
CRITICAL
IC,SMC,M72
U4900
CRITICAL
RES,7.5K,0402,1%,1/16W,LF
R7117
20_INCH_LCD
CAP,CER,270PF,10%,50V,0402
C7113
20_INCH_LCD
CAP,CER,0.47UF,10%,6.3V,0402
C7128
20_INCH_LCD
CAP,CER,0.068UF,10%,10V,0402
C7134
20_INCH_LCD
U8570
TABLE_5_ITEM
20_INCH_LCD
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_5_ITEM
CRITICAL
20_INCH_LCD
TABLE_5_ITEM
337S3438
IC,MDC,SR,E1,QS,2.8G,55W,800FSB,4M,PGA
CPU
CRITICAL
2P8GHZ_CPU
337S3436
IC,MDC,SR,E1,QS,2.6G,45W,800FSB,4M,PGA
CPU
CRITICAL
2P6GHZ_CPU
TABLE_5_ITEM
TABLE_5_ITEM
337S3435
IC,MDC,SR,E1,QS,2.4G,35W,800FSB,4M,PGA
CPU
CRITICAL
2P4GHZ_CPU
337S3461
IC,MDC,SR,E1,QS,2.2G,35W,800FSB,4M,PGA
CPU
CRITICAL
2P2GHZ_CPU
337S3460
IC,MDC,SR,E1,QS,2.0G,35W,800FSB,4M,PGA
CPU
CRITICAL
2P0GHZ_CPU
TABLE_5_ITEM
TABLE_5_ITEM
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
337S3437
337S3436
124-0361
124-0339
BOM OPTION
REF DES
COMMENTS:
CPU
CPU,2.6G,55W
TABLE_ALT_ITEM
TABLE_ALT_ITEM
C7490,C7491
CAP
TABLE_ALT_ITEM
371S0464
371S0154
D7624,D7664
DIODES
BOM Configuration
MXM_PWR_SENSE BOMOPTION CHANGE FOR PRODUCTION
SYNC_MASTER=JAMES
SYNC_DATE=10/16/06
TABLE_5_HEAD
PART#
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_5_ITEM
107S0070
RES,0-OHM,2512
116S0090
RES,10K-OHM,5%,0402
R5350
PRODUCTION
C5358,C5359
PRODUCTION
TABLE_5_ITEM
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
OF
33
118
y
r
a
n
i
m
il
e
r
33
SYNC_MASTER=JAMES
SYNC_DATE=10/16/06
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
OF
33
118
7
78 77 70 13 7 6
PP3V3_S0
"S0" RAILS
APN: 518-0278
CRITICAL
R610
J600
HM9706E-M2
M-RT-TH
PM_SLP_S3_OD
90
76 74 73 7 6
LCD_PWM
PP12V_S0
CRITICAL
C624
10UF
C625
10%
2 16V
X5R-CERM
1210
10
11
12
75 70 7
PP12V_S5
ACDC_TEMP
INV_EN_BL_OR_PANEL_ID
=PP5V_S0_SATA
C622
1UF
100UF
C623
10UF
10%
2 35V
X7R
805
20%
2 16V
ELEC
6.3X5.5-SM
20%
2 10V
X5R
805
50
28 85
72 71 7
C621
78 70 7
20%
2 25V
CERM
603
77 7
0.1uF
10%
16V
X5R
402
2N7002
IN
PM_SLP_S3_L
SOT23-LF
=PPVCORE_S0_CPU
PP1V8_S0
=PP1V8_S0_MXM
33
77 75 70 7 6
=PP2V5_S0_MXM
PP2V5_S0
11 12 53
78 75 7
PP1V8_S3
MAKE_BASE=TRUE
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
84
85
=PP1V8_S3M_MEM_NB
=PP1V8_S3M_NB_VCC
=PP1V8_S3_MEM
=PP1V8_S3_MEMVTT
=PP1V8_S3_ENET
=PPVCORE_S0_NB
=PPVCORE_S0_NB_FOLLOW
=PP1V05_S0_CPU
=PP1V25R1V05_S0_FSB_NB
=PP1V25R1V05_S0_NB_VTT
=PP1V05_S0_SB_CPU_IO
21
y
r
31 32
75
38
18 21
78 76 75 70 7 6
21
10 11 12 13 50
14 30
PP3V3_S3
MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
=PP3V3_S3_MINI
=PP3V3_S3_ENET
=PP3V3_S3_BT
34
38 39
47
19 21
23 26 27
2
73 34 7
PP1V05_S0
=PP1V05_S0M_NB_VCCAXM
=PP1V05_S0_NB_PCIE
=PP1V05_S0_NB_FOLLOW
=PPVCORE_S0_SB
MAKE_BASE=TRUE
VOLTAGE=1.05V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
73 7
PP1V5_S0
MAKE_BASE=TRUE
VOLTAGE=1.5V
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
=PP1V5_S0_CPU
=PP1V5_S0_NB_TVDAC
=PP1V5_S0_SB_VCC1_5_A_ARX
=PP1V5_S0_SB_VCC1_5_A_ATX
=PP1V5_S0_SB_VCCUSBPLL
=PP1V5_S0_SB_VCC1_5_A_USB_CORE
=PP1V5_S0_SB_VCC1_5_A
=PP1V5_S0_SB
=PP1V5_S0_MINI
C
74 7
PP1V25_S0
=PP1V25_S0_NB_VCCDMI
=PP1V25_S0M_NB_VCCA
=PP1V25_S0M_NB_VCC
=PP1V25_S0_NB_PLL
=PP1V25_S0_NB_VCC
=PP1V25_S0M_NB_PLL
=PP1V25_S0_SB_DMI
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=1.25V
MAKE_BASE=TRUE
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
78 77 70 13 7 6
e
r
PP3V3_S0
1
R604
1K
5%
1/16W
MF-LF
2 402
GPU_PRESENT_R
1
LED604
GREEN-3.6MCD
2.0X1.25MM-SM
SILKSCREEN:3
GPU_PRESENT_DRAIN
Q600
2N7002
28
GPU_PRESENT
IN
SOT23-LF
S
2
77 75 70 7 6
PP3V3_S5
78 76 75 70 7 6
PP3V3_S3
ITS_ALIVE
LED601
LCD_SHOULD_ON
LED602
GREEN-3.6MCD
2.0X1.25MM-SM
SILKSCREEN:1
PP5V_S0
MAKE_BASE=TRUE
VOLTAGE=5V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
5%
1/10W
MF-LF
2 603
94 78 74 73 72 71 70 7
3.3K
5%
1/16W
MF-LF
2 402
ITS_PLUGGED_IN
PART NUMBER
R605
1K
5%
1/16W
MF-LF
2 402
R600
1K
P
OMIT
R602
90
PPV_LCD_CONN
LED603
GREEN-3.6MCD
2.0X1.25MM-SM
SILKSCREEN:2
GREEN-3.6MCD
2.0X1.25MM-SM
76 74 73 7 6
SILKSCREEN:4
CRITICAL
PP12V_S0
21
21
11 12
QTY
DESCRIPTION
REFERENCE DES
RES,MF,1/10W,910OHM,5,0603,SMD,LF
R605
BOM OPTION
20_INCH_LCD
113S0095
RES,MF,1/10W,3.3KOHM,5,0603,SMD,LF
R605
24_INCH_LCD
PP5V_S3
MAKE_BASE=TRUE
VOLTAGE=5V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
22
26 27
26 27
26 27
26 27
26
27
34
19 21
21
21
21
21
21
=PP3V3_S0_NB_VCCHV
=PP3V3_S0_SB
=PP3V3_S0_SB_GPIO
=PP3V3_S0_SB_VCCGLAN3_3
=PP3V3_S0_SB_VCC3_3_PCI
=PP3V3_S0_SB_VCC3_3_IDE
=PP3V3_S0_SB_PCI
=PP3V3_S0_SB_PM
=PP3V3_S0_PATA
=PP3V3_S0_FAN
=PPSPD_S0_MEM
=PP3V3_S0_IMVP
=PP3V3_S0_AUDIO
=PP3V3_S0_LPCPLUS
=PP3V3_S0_SMBUS_SB
=PP3V3_S0_SMC_LS
=PP3V3_S0_SMBUS_SMC_0_S0
=PP3V3_S0_SMBUS_SMC_B_S0
=PP3V3_S0_SMBUS_SMC_MGMT
=PP3V3_S0_CK505
=PP3V3_S0_MXM
=PP3V3_S0_SATALED
=PP3V3_S0M_CK505
=PP3V3_S0MWOL_SB_CLINK0
=PP3V3_S0_SB_VCC3_3_DMI
=PP3V3_S0_SB_VCC3_3_SATA
=PP3V3_S0_SB_VCC3_3_VCCPCORE
=PP3V3R1V5_S0_SB_VCCHDA
=PP3V3_S0MWOL_SB_VCCLAN3_3
=PP3V3_S0MWOL_SB_VCCCL3_3
=PP3V3_S0_TSENS
=PP3V3_S0_SMC
=PP3V3_S0_NB_VCCA_PEG_BG
=PP3V3_S0_NB_FOLLOW
=PP3V3_S0_VIDEO
=PP3V3_S0_ENET
26 27
=PP5V_S0_SB
=PP5V_S0_PATA
=PP5V_S0_LPCPLUS
=PP5V_S0_AUDIO
=PP5V_S0_SATA
=PP5V_S0_MXM
=PPV_S0_LCD_20INCH
=PP12V_S0_FAN
16 19 21
27
23 25
26
26 27
26 27
24
28
44
=PP5V_S3_BNDI
=PP5V_S3_MEMVTT
=PP5V_S3_SYSLED
=PP5V_S3_ALS
47 58
75
50
58
78 77 76 70 7
PP5V_S5
PP12V_S5
26 27
52
40 42 43
49 50
61
25
25
26 27
7 51
52
56 57
46
52
27
50
46
78
43
31 32
71
98
51
52
50
52
52
52
29 30
85
45
29 30
25
26 27
26 27
26
26 27
26 27
26 27
55
53
19 21
21
90 91 94
38
27
44
7 51
98
SYNC_MASTER=MARK
6
84
SYNC_DATE=N/A
90
56 57
=PP12V_S0_AUDIO_SPKRAMP
=PP12V_S0_CPU
=PPV_S0_LCD_24INCH
=PPV_S0_MXM_PWRSRC
53 71 72
SIZE
90
53
DRAWING NUMBER
SCALE
REV.
051-7229
SHT
NONE
26 27
=PP12V_S5_FET
=PP12V_S5_FW
MAKE_BASE=TRUE
VOLTAGE=12V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
28
=PP5V_S5_SB
=PPVIN_S5_SMCVREF
=PP5V_S5_USB
MAKE_BASE=TRUE
VOLTAGE=5V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
78 76 70 7 6
24
56 57
MAKE_BASE=TRUE
VOLTAGE=12V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
113S0082
78 76 75 70 7
25 27 28
m
il
PP3V3_S0
MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
78 77 70 13 7 6
a
n
i
18 21
26 27
=PP3V3_S5_SB
=PP3V3_S5_SB_USB
=PP3V3_S5_SB_PM
=PP3V3_S5_SB_VCCSUS3_3
=PP3V3_S5_SB_VCCSUS3_3_USB
=PP3V3_S5_SMBUS_SB_ME
=PP3V3_S5_FW
=PP3V3_S5_SMC
=PP3V3_S5_ROM
=PP3V3_S5_SB_GPIO
=PP3V3_S5_SB_CLINK1
=PP3V3_S5_SB_3V3_VCCSUSHDA
=PP3V3_S5_LPCPLUS
=PP3V3_S5_SMBUS_SMC_BSA
=PP3V3_S5_FAN
=PP3V3_S5_SMCUSBMUX
=PP3V3_S5_SMBUS_SMC_A_S5
16 18 21 22
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
PPMCH_CORE_S0
PP3V3_S5
MAKE_BASE=TRUE
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
MAKE_BASE=TRUE
VOLTAGE=1.05V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
C600
Q610
74 73 55 7
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
PPVCORE_CPU
MAKE_BASE=TRUE
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.4 mm
MIN_NECK_WIDTH=0.2 mm
0.1UF
NOSTUFF
3
=PP0V9_S0M_MEM_TERM
1
"S5" RAILS
MAKE_BASE=TRUE
VOLTAGE=1.25V
MIN_LINE_WIDTH=0.6MM NET_SPACING_TYPE=PWR
MIN_NECK_WIDTH=0.3MM MAX_NECK_LENGTH=3 MM
VOLTAGE=0V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
70 49 25 7
78 75
PP0V9_S0
MAKE_BASE=TRUE
VOLTAGE=0.9V
MIN_LINE_WIDTH=0.4 mm
MIN_NECK_WIDTH=0.2 mm
6 7 70 76 78
MAKE_BASE=TRUE
VOLTAGE=2.5V
MIN_LINE_WIDTH=0.4 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=GND
"S3" RAILS
ONLY ON IN RUN
1.5K
1%
1/16W
MF-LF
402
OF
33
118
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 13 10
100 51 23 10
100 23 10
100 23 10
100 23 10
100 23 10
100 23 10
100 23 10
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
105 30 10
105 30 10
FSB_A_L<6>
FSB_ADSTB_L<0>
FSB_A_L<27>
FSB_ADSTB_L<1>
FSB_D_L<0>
FSB_DSTB_L_N<0>
FSB_DSTB_L_P<0>
FSB_DINV_L<0>
FSB_D_L<16>
FSB_DSTB_L_N<1>
FSB_DSTB_L_P<1>
FSB_DINV_L<1>
FSB_D_L<41>
FSB_DSTB_L_N<2>
FSB_DSTB_L_P<2>
FSB_DINV_L<2>
FSB_D_L<59>
FSB_DSTB_L_N<3>
FSB_DSTB_L_P<3>
FSB_DINV_L<3>
FSB_LOCK_L
FSB_CPURST_L
CPU_INIT_L
CPU_A20M_L
CPU_IGNNE_L
CPU_STPCLK_L
CPU_INTR
CPU_NMI
CPU_SMI_L
FSB_REQ_L<0>
FSB_REQ_L<1>
FSB_REQ_L<2>
FSB_REQ_L<3>
FSB_REQ_L<4>
FSB_CLK_CPU_P
FSB_CLK_CPU_N
1
PP1000 SM
1
PP1001 SM
1
PP1002 SM
1
PP1003 SM
1
PP1004 SM
1
PP1005 SM
1
PP1006 SM
1
PP1007 SM
SM
PP1008 1
1
PP1009 SM
1
PP1010 SM
1
PP1011 SM
1
PP1012 SM
1
PP1013 SM
1
PP1014 SM
SM
PP1015 1
1
PP1016 SM
1
PP1017 SM
1
PP1018 SM
1
PP1019 SM
1
PP1020 SM
1
PP1021 SM
1
PP1022 SM
1
PP1023 SM
1
PP1024 SM
1
PP1025 SM
1
PP1026 SM
1
PP1027 SM
1
PP1028 SM
1
PP1029 SM
1
PP1030 SM
1
PP1031 SM
1
PP1032 SM
1
PP1033 SM
1
PP1034 SM
1
PP1035 SM
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10
100 14 10
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
100 14 10
100 14 10
100 14 10
100 14 10
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
100 14 10 7
105 30 16 7
105 30 23
103 44 23
103 44 23
103 44 23
104 34 24
104 34 24
104 37 24
104 37 24
104 42 40
104 42 40
101 24 16
101 24 16
105 30 24
105 30 24 7
49 28 25
51 49 25 7
105 30 25
105 30 25
105 30 24
28 23
103 45 23
103 45 23
51 49 23 7
103 47 24
103 47 24
103 47 24
103 47 24
103 47 24
103 47 24
103 61
103 61 24
104 25 16 7
104 25 16 7
SB_CLK100M_SATA_P
SB_CLK100M_SATA_N
1
PP2100 SM
1
PP2101 SM
IDE_PDIOR_L
IDE_PDIORDY
IDE_PDD<9>
PP2102
1
PP2103 SM
1
PP2104 SM
1
SM
PP
PP
PP
PP
PP
PCIE_MINI_D2R_P
PCIE_MINI_D2R_N
1
PP2105 SM
1
PP2106 SM
PP
PCIE_ENET_D2R_P
PCIE_ENET_D2R_N
1
PP2107 SM
1
PP2108 SM
PP
PCIE_FW_D2R_P
PCIE_FW_D2R_N
1
PP2132 SM
1
PP2133 SM
PP
DMI_N2S_P<0>
DMI_N2S_N<0>
SB_CLK100M_DMI_P
SB_CLK100M_DMI_N
1
PP2109 SM
1
PP2110 SM
1
PP2111 SM
1
PP2112 SM
PM_SYSRST_L
PM_CLKRUN_L
1
PP2113 SM
1
PP2114 SM
SB_CLK14P3M_TIMER
SB_CLK48M_USBCTLR
1
PP2115 SM
1
PP2116 SM
1
PP2117 SM
PCI_CLK33M_SB
SB_RTC_RST_L
1
PP2118 SM
SATA_A_D2R_P
SATA_A_D2R_N
1
PP2119 SM
1
PP2120 SM
LPC_AD<1>
1
PP2121 SM
USB_CAMERA_P
USB_CAMERA_N
1
PP2122 SM
1
PP2123 SM
USB_IR_P
USB_IR_N
USB_BT_P
USB_BT_N
SPI_SCLK
SPI_SO
CLINK_NB_CLK
CLINK_NB_DATA
1
PP2124 SM
1
PP2125 SM
1
PP2126 SM
1
PP2127 SM
1
PP2128 SM
1
PP2129 SM
1
PP2130 SM
1
PP2131 SM
PP
PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
102 31 17
102 31 17
102 31 17
102 31 17
102 31 17
P4MM
102 31 17
102 31 17
PP
OMIT
P4MM
OMIT
P4MM
102 31 17
102 31 17
102 31 17
PP
PP
PP
PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
102 31 17
102 31 17
102 31 17
102 31 17
102 31 17
PP
PP
PP
PP
PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
102 31 17
102 31 17
102 31 17
102 31 17
102 31 17
P4MM
102 32 17
PP
OMIT
P4MM
102 32 17
PP
OMIT
P4MM
OMIT
102 32 17
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
102 32 17
102 32 17
102 32 17
102 32 17
102 32 17
102 32 17
102 32 17
102 32 17
102 32 17
102 32 17
102 32 17
102 32 17
P4MM
102 32 17
OMIT
P4MM
OMIT
102 32 17
P4MM
102 32 17
102 32 17
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
102 31 17
P4MM
PP
1
PP1438 SM
1
PP1439 SM
DMI_S2N_N<0>
DMI_S2N_P<0>
102 31 17
OMIT
P4MM
OMIT
PP
PP
=PP0V9_S3M_MEM_NBVREFB
102 31 17
PP
1
PP1436 SM
1
PP1437 SM
=PP0V9_S3M_MEM_NBVREFA
OMIT
P4MM
OMIT
PP
NB_CLK100M_PCIE_P
NB_CLK100M_PCIE_N
22 16
102 31 17
PP
PP
22 16
P4MM
PP
1
PP1434 SM
1
PP1435 SM
101 24 16
PP
VR_PWRGOOD_DELAY
NB_RESET_L
101 24 16
105 30 23
PP
PP
28 16
105 30 16
PP
1
PP1432 SM
1
PP1433 SM
71 70 22 16 7
P4MM
PP
FSB_CLK_NB_P
FSB_CLK_NB_N
105 30 14
105 30 14 7
P4MM
OMIT
P4MM
OMIT
1
PP1400 SM
1
PP1401 SM
1
PP1402 SM
1
PP1403 SM
1
PP1404 SM
1
PP1405 SM
1
PP1406 SM
1
PP1407 SM
SM
PP1408 1
1
PP1409 SM
1
PP1410 SM
1
PP1411 SM
1
PP1412 SM
1
PP1413 SM
1
PP1414 SM
SM
PP1415 1
1
PP1416 SM
1
PP1417 SM
1
PP1418 SM
1
PP1419 SM
1
PP1420 SM
1
PP1421 SM
SM
PP1422 1
1
PP1423 SM
1
PP1424 SM
1
PP1425 SM
1
PP1426 SM
1
PP1427 SM
1
PP1428 SM
1
PP1429 SM
1
PP1430 SM
1
PP1431 SM
102 32 17
102 32 17
102 32 17
102 32 17
102 32 17
101 84 15
101 84 15
104 25 16 7
104 25 16 7
1
PP1440 SM
1
PP1441 SM
MEM_A_DQ<7>
MEM_A_DQ<14>
MEM_A_DQ<16>
MEM_A_DQ<25>
MEM_A_DQ<39>
MEM_A_DQ<47>
MEM_A_DQ<54>
MEM_A_DQ<59>
MEM_A_DQS_P<0>
MEM_A_DQS_N<0>
MEM_A_DQS_P<1>
MEM_A_DQS_N<1>
MEM_A_DQS_P<2>
MEM_A_DQS_N<2>
MEM_A_DQS_P<3>
MEM_A_DQS_N<3>
MEM_A_DQS_P<4>
MEM_A_DQS_N<4>
MEM_A_DQS_P<5>
MEM_A_DQS_N<5>
MEM_A_DQS_P<6>
MEM_A_DQS_N<6>
MEM_A_DQS_P<7>
MEM_A_DQS_N<7>
1
PP1442 SM
1
PP1443 SM
SM
PP1444 1
1
PP1445 SM
1
PP1446 SM
1
PP1447 SM
1
PP1448 SM
1
PP1449 SM
1
PP1450 SM
SM
PP1451 1
1
PP1452 SM
1
PP1453 SM
1
PP1454 SM
1
PP1455 SM
1
PP1456 SM
1
PP1457 SM
SM
PP1458 1
1
PP1459 SM
1
PP1460 SM
1
PP1461 SM
1
PP1462 SM
1
PP1463 SM
1
PP1464 SM
1
PP1465 SM
MEM_B_DQ<6>
MEM_B_DQ<8>
MEM_B_DQ<23>
MEM_B_DQ<25>
MEM_B_DQ<38>
MEM_B_DQ<44>
MEM_B_DQ<48>
MEM_B_DQ<62>
MEM_B_DQS_P<0>
MEM_B_DQS_N<0>
MEM_B_DQS_P<1>
MEM_B_DQS_N<1>
MEM_B_DQS_P<2>
MEM_B_DQS_N<2>
MEM_B_DQS_P<3>
MEM_B_DQS_N<3>
MEM_B_DQS_P<4>
MEM_B_DQS_N<4>
MEM_B_DQS_P<5>
MEM_B_DQS_N<5>
MEM_B_DQS_P<6>
MEM_B_DQS_N<6>
MEM_B_DQS_P<7>
MEM_B_DQS_N<7>
1
PP1466 SM
1
PP1467 SM
1
PP1468 SM
1
PP1469 SM
1
PP1470 SM
1
PP1471 SM
1
PP1472 SM
1
PP1473 SM
1
PP1474 SM
1
PP1475 SM
1
PP1476 SM
1
PP1477 SM
1
PP1478 SM
1
PP1479 SM
1
PP1480 SM
1
PP1481 SM
1
PP1482 SM
1
PP1483 SM
1
PP1484 SM
1
PP1485 SM
SM
PP1486 1
1
PP1487 SM
1
PP1488 SM
1
PP1489 SM
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM78
OMIT
108 37
108 37
37 28
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PP
PEG_D2R_P<7>
PEG_D2R_N<7>
1
PP1490 SM
1
PP1491 SM
PP
CLINK_NB_CLK
CLINK_NB_DATA
1
PP1492 SM
1
PP1493 SM
PP
PP
PP
1
PP3700 SM
1
PP3701 SM
PCIE_ENET_R2D_P
PCIE_ENET_R2D_N
1
PP3702 SM
1
PP3703 SM
ENET_RESET_L
1
PP3704 SM
LPC CONNECTOR
OMIT
P4MM
OMIT
PP
PP
P4MM
105 40 30
105 40 30
108 40
108 40
40 28
IN
PP
P4MM
51 49 23
IN
PP
OMIT
51 49 23 7
IN
51 49 23
IN
51 49 23
IN
51 49 23
IN
PP
PCIE_FW_R2D_P
PCIE_FW_R2D_N
1
PP4002 SM
1
PP4003 SM
PP
49 28
51 50 49 7
51 49 23 7
76 75 70 7 6
1
PP4900 SM
1
PP4901 SM
1
PP4902 SM
1
PP4903 SM
PCI_CLK33M_SMC
SMC_LRESET_L
SMC_RESET_L
LPC_AD<1>
IN
IN
P4MM
51 49 25 7
IN
51 24
IN
51 50 49
IN
OMIT
P4MM
OMIT
PP
P4MM
OMIT
P4MM
OMIT
PP
P4MM
IN
IN
51 49
IN
PP
PP
PP
=PP3V3_S5_LPCPLUS
=PP5V_S0_LPCPLUS
FWH_INIT_L
PCI_CLK33M_LPCPLUS
LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
LPC_FRAME_L
PM_CLKRUN_L
BOOT_LPC_SPI_L
SMC_TMS
DEBUG_RESET_L
SMC_TRST_L
SMC_TDO
SMC_MD1
SMC_TX_L
INT_SERIRQ
PM_SUS_STAT_L
SMC_TDI
SMC_TCK
SMC_RESET_L
SMC_NMI
SMC_RX_L
LINDACARD_GPIO
IN
51 49 25
IN
51 50 49 25 7
IN
51 50 49
IN
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
PP
IN
51 49
51 50 49 46
OMIT
PP
51 28
51 50 49
P4MM
51 6
105 51 30
1
PP4000 SM
1
PP4001 SM
1
PP4004 SM
IN
OMIT
P4MM
OMIT
PP
PCIE_CLK100M_FW_P
PCIE_CLK100M_FW_N
FW_RESET_L
51 6
51
51 50 49
IN
51 50 49 7
IN
51 49
IN
51 50 49 46
IN
51 25
IN
"S0" RAILS
FUNC_TEST=TRUE
75 70 6
IN
FUNC_TEST=TRUE
72 71 6
IN
FUNC_TEST=TRUE
78 70 6
IN
FUNC_TEST=TRUE
77 6
IN
FUNC_TEST=TRUE
74 73 55 6
IN
FUNC_TEST=TRUE
73 34 6
IN
FUNC_TEST=TRUE
74 6
IN
FUNC_TEST=TRUE
78 77 70 13 7 6
IN
FUNC_TEST=TRUE
94 78 74 73 72 71 70 6
IN
FUNC_TEST=TRUE
76 74 73 6
IN
FUNC_TEST=TRUE
73 6
IN
FUNC_TEST=TRUE
PP3V3_S0
84 70 50 49 7
IN
70 28 25 7
IN
6 7 13 70 77 78
C702
71 49
IN
28 25
IN
71 70 22 16 7
IN
0.01UF
10%
50V
X7R
402
P4MM
OMIT
P4MM
OMIT
70 28 25 7
P4MM
78 76 70 7 6
10%
50V
X7R
402
FUNC_TEST=TRUE
FUNC_TEST=TRUE
77 75 70 6
IN
FUNC_TEST=TRUE
78 77 76 70 6
IN
PP12V_S3
0.01UF
C706
10%
50V
X7R
402
0.01UF
10%
50V
X7R
402
C707
0.01UF
C708
10%
50V
X7R
402
0.01UF
e
r
10%
50V
X7R
402
C709
0.01UF
C710
10%
50V
X7R
402
P4MM
OMIT
P4MM
OMIT
0.01UF
10%
50V
X7R
402
SC0700
EMI-SPRING
CLIP-SM1
452-0508
SDF0726
IN
IN
84 70 50 49 7
IN
100 23 13 10
IN
7 50 75 76 78
78 76 70 7 6
IN
105 30 16 7
IN
105 30 14 7
IN
16
IN
16
IN
16
IN
16
IN
104 24
IN
FUNC_TEST=TRUE
104 24
IN
FUNC_TEST=TRUE
105 30 24 7
IN
30
IN
30
IN
40
IN
40
IN
40
IN
FUNC_TEST=TRUE
40
IN
FUNC_TEST=TRUE
FUNC_TEST=TRUE
40
IN
FUNC_TEST=TRUE
40
IN
FUNC_TEST=TRUE
40
IN
FUNC_TEST=TRUE
40
IN
40
IN
103 61
IN
103 61
IN
OMIT
EMI-SPRING
3P9R3P15
SC0702
EMI-SPRING
CLIP-SM1
TH
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
PP3V3_S5
PP5V_S5
PP12V_S5
y
r
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
"S5" RAILS
3 TPS
FUNC_TEST=TRUE
FUNC_TEST=TRUE
5 TPS
FUNC_TEST=TRUE
NB_CLK100M_PCIE_N
FSB_CLK_NB_N
TP_NB_CFG<13>
TP_NB_CFG<12>
TP_NB_CFG<18>
NB_CFG<19>
FUNC_TEST=TRUE
PCI_REQ1_L
PCI_REQ2_L
SB_CLK100M_DMI_N
FUNC_TEST=TRUE
TP_CK505_REF1
TP_CK505_PCI1_CLK
FUNC_TEST=TRUE
TP_FW_TCK
TP_FW_TMS
TP_FW_TDI
TP_FW_TDO
FW_TRST_L
TP_FW_SM
TP_FW_SE
TP_FW_NAND_TREE
TP_FW_CE
FUNC_TEST=TRUE
SPI_CE_L<0>
SPI_A_SO_R
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
ZH500
FUNC_TEST=TRUE
HOLE-VIA
FUNC_TEST=TRUE
ZH501
FUNC_TEST=TRUE
HOLE-VIA
FUNC_TEST=TRUE
ZH511
ZH521
HOLE-VIA
HOLE-VIA
FUNC_TEST=TRUE
ZH502
HOLE-VIA
ZH512
ZH522
HOLE-VIA
HOLE-VIA
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
ZH503
FUNC_TEST=TRUE
HOLE-VIA
FUNC_TEST=TRUE
ZH513
ZH523
HOLE-VIA
HOLE-VIA
FUNC_TEST=TRUE
FUNC_TEST=TRUE
FUNC_TEST=TRUE
ZH504
HOLE-VIA
ZH514
ZH524
HOLE-VIA
HOLE-VIA
FUNC_TEST=TRUE
ZH505
HOLE-VIA
ZH515
ZH525
HOLE-VIA
HOLE-VIA
ZH506
HOLE-VIA
ZH516
ZH526
HOLE-VIA
HOLE-VIA
ZH507
HOLE-VIA
ZH517
ZH527
HOLE-VIA
HOLE-VIA
ZH508
HOLE-VIA
ZH518
ZH528
HOLE-VIA
HOLE-VIA
OMIT
ZH0723
OMIT
ZH0724
3P9R3P15
ZH509
ZH0725
3P9R3P15
HOLE-VIA
3P9R3P15
ZH519
ZH529
HOLE-VIA
HOLE-VIA
860-0895
OMIT
OMIT
OMIT
OMIT
4P75R4
4P75R4
4P75R4
4P75R4
SDF0717
SDF0721
SDF0750
SDF0751
SYNC_DATE=10/16/06
OMIT
OMIT
OMIT
ZH0715
ZH0718
ZH0720
ZH0750
4P25R3P5
4P25R3P5
4P25R3P5
4P25R3P5
4P25R3P5
4P25R3P5
4P25R3P5
OMIT
OMIT
OMIT
OMIT
P4MM
OMIT
P4MM
OMIT
SIZE
P4MM
DRAWING NUMBER
REV.
051-7229
SHT
NONE
SCALE
ZH520
HOLE-VIA
FUNC_TEST=TRUE
ZH510
HOLE-VIA
SC57
FUNC_TEST=TRUE
FOR ICT
FUNC_TEST=TRUE
PM_SUS_STAT_L
PM_SLP_S3_L
PM_S4_STATE_L
ALL_SYS_PWRGD
CPU_PWRGD
FUNC_TEST=TRUE
FUNC_TEST=TRUE
ZH0722
SC0701
NOSTUFF
HSK-NUT-6.5MM HSK-NUT-6.5MM
TH
IN
78 75 49 46 25 7
BTW DIMMS
SDF0727
51 50 49 25 7
78 75 70 49 25 6
FUNC_TEST=TRUE
a
n
i
FUNC_TEST=TRUE
m
il
PP12V_S5
IN
SHUTDOWN/SLEEP TIMING
C705
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
IN
FUNC_TEST=TRUE
PP12V_S3
PP1V8_S3
PP3V3_S3
PP5V_S3
PM_S4_STATE_L
FUNC_TEST=TRUE
0.01UF
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
P4MM
OMIT
IMVP_VR_ON
VR_PWRGD_CLKEN
VR_PWRGOOD_DELAY
PM_SB_PWROK
C704
10%
50V
X7R
402
OMIT
P4MM
OMIT
78 75 49 46 25 7
FUNC_TEST=TRUE
0.01UF
P4MM
IN
FUNC_TEST=TRUE
C703
OMIT
P4MM
OMIT
IN
78 76 75 70 6
10%
50V
X7R
402
P4MM
IN
FUNC_TEST=TRUE
PWROK SEQUENCING
ALL_SYS_PWRGD
FUNC_TEST=TRUE
PM_SB_PWROK
FUNC_TEST=TRUE
0.01UF
OMIT
P4MM
OMIT
IN
78 75 6
FUNC_TEST=TRUE
FUNC_TEST=TRUE
C701
OMIT
P4MM
OMIT
78 76 75 50 7
78 76 75 70 7 6
FUNC_TEST=TRUE
16 TPS
IN
FUNC_TEST=TRUE
"S3" RAILS
3 TPS
FUNC_TEST=TRUE
P4MM
PP3V3_S3
PP0V9_S0
PPVCORE_CPU
PP1V8_S0
PP2V5_S0
PPMCH_CORE_S0
PP1V05_S0
PP1V25_S0
PP3V3_S0
PP5V_S0
3 TPS
PP12V_S0
PP1V5_S0
FUNC_TEST=TRUE
P4MM
P
PP
PCIE_CLK100M_ENET_P
PCIE_CLK100M_ENET_N
OF
33
118
GND RAILS
98
GND_AUDIO_SPKRAMP
VOLTAGE=0V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
NET_SPACING_TYPE=GND
y
r
CHASSIS GND
GND
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=0V
NET_SPACING_TYPE=GND
46
GND_CHASSIS_USB
a
n
i
MAKE_BASE=TRUE
MAX_NECK_LENGTH=4.1 MM
43
GND_CHASSIS_FIREWIRE
39
GND_CHASSIS_ENET
94
=GND_CHASSIS_DVI
NOTE:
PER EMC REQUIREMENTS, ALL CHASSIS GROUNDS ARE TIED DIRECTLY TO GND
m
il
e
r
GROUNDING ALIASES
SYNC_MASTER=MARK
SYNC_DATE=(10/02/2006)
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
OF
33
118
CRITICAL
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14 7
BI
100 14 7
BI
100 14 7
BI
100 14 7
BI
100 14 7
BI
100 14 7
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14 7
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14 7
BI
100 23 7
100 23
100 23 7
IN
IN
100 23 7
IN
100 23 7
K3
FSB_A_L<17>
FSB_A_L<18>
FSB_A_L<19>
FSB_A_L<20>
FSB_A_L<21>
FSB_A_L<22>
FSB_A_L<23>
FSB_A_L<24>
FSB_A_L<25>
FSB_A_L<26>
FSB_A_L<27>
FSB_A_L<28>
FSB_A_L<29>
FSB_A_L<30>
FSB_A_L<31>
FSB_A_L<32>
FSB_A_L<33>
FSB_A_L<34>
FSB_A_L<35>
FSB_ADSTB_L<1>
Y2
IN CPU_A20M_L
OUT CPU_FERR_L
100 23 7
100 23 7
FSB_REQ_L<0>
FSB_REQ_L<1>
FSB_REQ_L<2>
FSB_REQ_L<3>
FSB_REQ_L<4>
IN
IN
J1
N3
P5
P2
L2
P4
P1
R1
M1
H2
K2
J3
L1
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
A6
A5
CPU_IGNNE_L
C4
CPU_STPCLK_L
CPU_INTR
CPU_NMI
CPU_SMI_L
TP_CPU_RSVD0
TP_CPU_RSVD1
TP_CPU_RSVD2
TP_CPU_RSVD3
TP_CPU_RSVD4
TP_CPU_RSVD5
TP_CPU_RSVD6
TP_CPU_RSVD7
TP_CPU_RSVD8
TP_CPU_RSVD9
N2
D5
C6
B4
A3
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
REQ0*
REQ1*
REQ2*
REQ3*
REQ4*
A17*
A18*
A19*
A20*
A21*
A22*
A23*
A24*
A25*
A26*
A27*
A28*
A29*
A30*
A31*
A32*
A33*
A34*
A35*
ADSTB1*
XDP_TMS
100 13 10
XDP_TDI
14 100
=PP1V05_S0_CPU
BI
7 14 100
F1
FSB_BREQ0_L
BI
7 14 100
IN
BI
IERR*
INIT*
D20
B3
CPU_IERR_L
CPU_INIT_L
LOCK*
H4
FSB_LOCK_L
RESET*
RS0*
RS1*
RS2*
TRDY*
C1
FSB_CPURST_L
FSB_RS_L<0>
FSB_RS_L<1>
FSB_RS_L<2>
FSB_TRDY_L
F3
F4
G3
G2
100
E4
AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20
R1002
6 10 11 12 13 50
PLACE TESTPOINT ON
FSB_IERR_L WITH A GND
0.1" AWAY
54.9
1%
1/16W
MF-LF
2 402
7 23 51 100
IN
7 13 14 100
IN
14 100
IN
14 100
IN
14 100
IN
14 100
XDP_BPM_L<0>
XDP_BPM_L<1>
XDP_BPM_L<2>
XDP_BPM_L<3>
XDP_BPM_L<4>
XDP_BPM_L<5>
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST_L
XDP_DBRESET_L
BI
7 14 100
BI
7 14 100
BI
13 100
BI
13 100
BI
13 100
BI
13 100
BI
=PP1V05_S0_CPU
6 10 11 12 13 50
R1003 1
54.9
1%
1/16W
MF-LF
402
13 100
THERMTRIP*
B25
CPU_PROCHOT_L
CPU_THERMD_P
CPU_THERMD_N
C7
PM_THRMTRIP_L
A24
BI
A22
A21
1%
1/16W
MF-LF
402
54.9
XDP_TDO
1%
1/16W
MF-LF
402
R1022
54.9
XDP_TCK
R1023
649
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
BI
100 14
BI
100 14
BI
100 14
BI
BI
100 14
BI
IN
10 13 100
100 14
BI
OUT
10 13 100
100 14
BI
IN
10 13 100
100 14
BI
IN
10 13 100
100 14
BI
13 28
OUT
55 108
OUT
55 108
OUT
16 23 50 100
IN
7 30 105
IN
7 30 105
100 14
R1004
50 100
BI
100 14
BI
100 14
BI
100 14 7
BI
100 14 7
BI
100 14 7
BI
a
n
i
FSB_D_L<0>
FSB_D_L<1>
FSB_D_L<2>
FSB_D_L<3>
FSB_D_L<4>
FSB_D_L<5>
FSB_D_L<6>
FSB_D_L<7>
FSB_D_L<8>
FSB_D_L<9>
FSB_D_L<10>
FSB_D_L<11>
FSB_D_L<12>
FSB_D_L<13>
FSB_D_L<14>
FSB_D_L<15>
FSB_DSTB_L_N<0>
FSB_DSTB_L_P<0>
FSB_DINV_L<0>
E22
F24
E26
G22
F23
G25
E25
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
FSB_D_L<16>
FSB_D_L<17>
FSB_D_L<18>
FSB_D_L<19>
FSB_D_L<20>
FSB_D_L<21>
FSB_D_L<22>
FSB_D_L<23>
FSB_D_L<24>
FSB_D_L<25>
FSB_D_L<26>
FSB_D_L<27>
FSB_D_L<28>
FSB_D_L<29>
FSB_D_L<30>
FSB_D_L<31>
FSB_DSTB_L_N<1>
FSB_DSTB_L_P<1>
FSB_DINV_L<1>
m
il
PM_THRMTRIP#
SHOULD CONNECT TO ICH AND
GMCH WITHOUT T (NO STUB)
e
r
6 10 11 12 13 50
R1024
100 14
BI
50 13 12 11 10 6
54.9
BI
100 14
OUT
=PP1V05_S0_CPU
100 14
10 13 100
H CLK
BCLK0
BCLK1
BI
IN
OUT
FSB_CLK_CPU_P
FSB_CLK_CPU_N
100 14 7
100 14
13 100
5%
1/16W
MF-LF
2 402
D21
y
r
7 14 100
CRITICAL
FSB_HIT_L
FSB_HITM_L
G6
54.9
14 100
BI
E1
PROCHOT*
THERMDA
THERMDC
RSVD0
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
XDP_TRST_L
BI
BR0*
F21
THERMAL
100 13 10
14 100
68
1%
1/16W
MF-LF
402
100 13 10
7 14 100
BI
H5
BPM0*
BPM1*
BPM2*
BPM3*
PRDY*
PREQ*
TCK
TDI
TDO
TMS
TRST*
DBR*
R1021
100 13 10
14 100
BI
DEFER*
DRDY*
DBSY*
R1020
100 13 10
BI
FSB_DEFER_L
FSB_DRDY_L
FSB_DBSY_L
HIT*
HITM*
A20M*
FERR*
IGNNE*
STPCLK*
LINT0
LINT1
SMI*
G5
=PP1V05_S0_CPU
R1005
1K
1%
1/16W
MF-LF
402
R1006
2.0K
1%
1/16W
MF-LF
402 2
100 14 7
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14
BI
100 14 7
BI
100 14 7
BI
100 14 7
BI
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
AD26
C23
D25
C24
AF26
AF1
A26
D0*
D1*
D2*
D3*
D4*
D5*
D6*
D7*
D8*
D9*
D10*
D11*
D12*
D13*
D14*
D15*
DSTBN0*
DSTBP0*
DINV0*
D16*
D17*
D18*
D19*
D20*
D21*
D22*
D23*
D24*
D25*
D26*
D27*
D28*
D29*
D30*
D31*
DSTBN1*
DATBP1*
DINV1*
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
J1000
MEROM
BGA-SKT-P
2 OF 4
DATA GRP 2
BI
1 OF 4
FSB_ADS_L
FSB_BNR_L
FSB_BPRI_L
H1
E2
DATA GRP 3
BI
100 14
M3
ADS*
BNR*
BPRI*
MEROM
BGA-SKT-P
DATA GRP 0
100 14
K5
J1000
DATA GRP 1
BI
L4
CONTROL
100 14 7
L5
XDP/ITP SIGNALS
BI
A3*
A4*
A5*
A6*
A7*
A8*
A9*
A10*
A11*
A12*
A13*
A14*
A15*
A16*
ADSTB0*
ADDR GROUP0
BI
100 14
J4
ADDR GROUP1
100 14
FSB_A_L<3>
FSB_A_L<4>
FSB_A_L<5>
FSB_A_L<6>
FSB_A_L<7>
FSB_A_L<8>
FSB_A_L<9>
FSB_A_L<10>
FSB_A_L<11>
FSB_A_L<12>
FSB_A_L<13>
FSB_A_L<14>
FSB_A_L<15>
FSB_A_L<16>
FSB_ADSTB_L<0>
ICH
BI
RESERVED
100 14
10%
16V
X5R
402
100 30
OUT
100 30
OUT
100 30
OUT
CPU_BSEL<0>
CPU_BSEL<1>
CPU_BSEL<2>
B22
B23
C21
D48*
D49*
D50*
D51*
D52*
D53*
D54*
D55*
D56*
D57*
D58*
D59*
D60*
D61*
D62*
D63*
DSTBN3*
DSTBP3*
DINV3*
COMP0
COMP1
COMP2
COMP3
MISC
DPRSTP*
DPSLP*
DPWR*
PWRGOOD
SLP*
PSI*
0.1uF
D32*
D33*
D34*
D35*
D36*
D37*
D38*
D39*
D40*
D41*
D42*
D43*
D44*
D45*
D46*
D47*
DSTBN2*
DSTBP2*
DINV2*
BSEL0
BSEL1
BSEL2
Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22
AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20
R26
U26
AA1
Y1
E5
B5
D24
D6
D7
AE6
FSB_D_L<32>
FSB_D_L<33>
FSB_D_L<34>
FSB_D_L<35>
FSB_D_L<36>
FSB_D_L<37>
FSB_D_L<38>
FSB_D_L<39>
FSB_D_L<40>
FSB_D_L<41>
FSB_D_L<42>
FSB_D_L<43>
FSB_D_L<44>
FSB_D_L<45>
FSB_D_L<46>
FSB_D_L<47>
FSB_DSTB_L_N<2>
FSB_DSTB_L_P<2>
FSB_DINV_L<2>
FSB_D_L<48>
FSB_D_L<49>
FSB_D_L<50>
FSB_D_L<51>
FSB_D_L<52>
FSB_D_L<53>
FSB_D_L<54>
FSB_D_L<55>
FSB_D_L<56>
FSB_D_L<57>
FSB_D_L<58>
FSB_D_L<59>
FSB_D_L<60>
FSB_D_L<61>
FSB_D_L<62>
FSB_D_L<63>
FSB_DSTB_L_N<3>
FSB_DSTB_L_P<3>
FSB_DINV_L<3>
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
7 14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
7 14 100
BI
7 14 100
BI
7 14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
7 14 100
BI
14 100
BI
14 100
BI
14 100
BI
14 100
BI
7 14 100
BI
7 14 100
BI
7 14 100
LAYOUT NOTE:
COMP0,2 CONNECT WITH ZO=27.4OHM,
MAKE TRACE LENGTH SHORTER THAN 0.5".
COMP1,3 CONNECT WITH ZO=55OHM,
MAKE TRACE LENGTH SHORTER THAN 0.5".
R1016
27.4
R1017
54.9
CPU_COMP<0>
100 CPU_COMP<1>
100 CPU_COMP<2>
100 CPU_COMP<3>
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R1018
R1019
1%
1/16W
MF-LF
402
27.4
100
CPU_DPRSTP_L
CPU_DPSLP_L
FSB_DPWR_L
CPU_PWRGD
FSB_CPUSLP_L
CPU_PSI_L
54.9
IN
16 23 71 100
IN
23 100
IN
7 14 100
IN
7 13 23 100
IN
14 100
OUT
1%
1/16W
MF-LF
402
28
NOSTUFF
R1030
0
NOSTUFF
R1012 1
5%
1/16W
MF-LF
402
NOSTUFF
1
1K
5%
1/16W
MF-LF
402
R1007
1K
5%
1/16W
MF-LF
402
NOTE:
CPU FSB
SYNC_MASTER=JAMES
SYNC_DATE=11/09/06
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
10
OF
33
118
A4
P6
CRITICAL
A8
P21
A11
P24
J1000
6 11 12 53
A14
44
41
30.4
23
AB20
A7
CRITICAL
AB7
A9
(SV
(SV
(SV
(LV
Design Target)
HFM)
LFM)
Design Target)
T1
MEROM
AC9
AC12
B11
3 OF 4
AC13
B13
A17
AC15
B16
A18
AC17
B19
A20
B21
AD7
B24
B9
AD9
C5
B10
AD10
C8
B12
AD12
C11
B14
AD14
B15
AD15
B17
AD17
B18
AD18
B20
AE9
C10
AE12
C12
AE13
C13
AE15
C15
AE17
C17
AE18
C18
AE20
AF10
D12
AF12
D14
AF14
D15
VCC
AF17
D18
AF18
G21
E12
V6
E13
J6
E15
K6
E17
M6
E18
J21
E20
K21
F7
M21
VCCP
F9
N6
F12
R21
F14
R6
F15
T21
F17
T6
F18
V21
F20
W21
AA9
VID0
VID1
VID2
VID3
VID4
VID5
VID6
AA15
a
n
i
D13
D16
D19
D23
D26
m
il
e
r
6 12
130 mA
AA17
AA18
AA20
AB9
AC10
AB10
AB12
VCCSENSE
AB14
AB15
AB17
VSSSENSE
AB18
AF5
AE5
AF4
AE3
AF3
AE2
CPU_VID<0>
CPU_VID<1>
CPU_VID<2>
CPU_VID<3>
CPU_VID<4>
CPU_VID<5>
CPU_VID<6>
OUT
OUT
12 100
OUT
12 100
OUT
12 100
OUT
12 100
OUT
12 100
OUT
12 100
P
AF7
AE7
CPU_VCCSENSE_P
CPU_VCCSENSE_N
12 100
=PPVCORE_S0_CPU
1%
1/16W
MF-LF
402
OUT
OUT
71 100
71 100
R1101
LAYOUT NOTE:
PROVIDE A TEST POINT (WITH NO STUB)
TO CONNECT A DIFFERENTIAL PROBE
BETWEEN VCCSENSE AND VSSSENSE
100
1%
1/16W
MF-LF
402
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA19
E6
AA25
E8
AB1
VSS
VSS
AA16
AB4
AB8
E16
AB11
E19
AB13
E21
AB16
E24
AB19
F5
AB23
F8
AB26
F11
AC3
F13
AC6
F16
AC8
F19
AC11
F2
AC14
F22
AC16
F25
AC19
G4
AC21
G1
AC24
G23
AD2
G26
AD5
H3
AD8
H6
AD11
H21
AD13
H24
AD16
J2
AD19
J5
AD22
J22
AD25
J25
AE1
K1
AE4
K4
AE8
6 11 12 53
LAYOUT NOTE:
PLACE R1100 AND R1101 WITHIN
1 INCH OF CPU, NO STUBS
100
LAYOUT NOTE:
CPU_VCCSENSE_P/CPU_VCCSENSE_N USE
ZO=27.4 OHM DIFFERENTIAL TRACE ROUTING.
R1100
W4
AA22
E14
6 10 12 13 50
W1
E3
E11
C26
AD6
V25
D11
AA12
AA13
V22
D8
B26
VCCA
V5
D4
=PP1V5_S0_CPU
AA10
V2
D1
U24
C25
N21
F10
U21
C22
=PP1V05_S0_CPU
E9
U6
C2
AF20
E10
U3
C19
T26
C16
AF15
D17
T23
C14
AF9
D10
y
r
B8
AC18
T4
B6
B7
D9
R25
AF2
BGA-SKT-P
AE10
R22
4 OF 4
A23
J1000
C9
R5
BGA-SKT-P
A19
A13
VCC
R2
MEROM
A16
A12
A15
A
A
A
A
AC7
A10
K23
AE11
K26
AE14
L3
AE16
L6
AE19
L21
AE23
L24
AE26
M2
A2
M5
AF6
M22
AF8
M25
AF11
N1
AF13
N4
AF16
N23
AF19
N26
AF21
P3
A25
NOTE:
AF25
SYNC_DATE=11/09/06
DRAWING NUMBER
SCALE
SHT
NONE
Current numbers from Merom for Santa Rosa EMTS, doc #20905.
REV.
051-7229
11
OF
33
118
53 11 6
=PPVCORE_S0_CPU
y
r
LAYOUT NOTE:
PLACE INSIDE SOCKET CAVITY (ON BOTTOMSIDE)
NOSTUFF
C1200
C1201
C1202
C1203
C1204
C1205
C1206
C1207
C1208
22UF
22UF
22UF
22UF
22UF
22UF
22UF
22UF
22UF
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
C1209
22UF
a
n
i
LAYOUT NOTE:
1
C1210
C1211
C1212
C1213
C1214
C1215
C1216
C1217
C1218
C1219
22UF
22UF
22UF
22UF
22UF
22UF
22UF
22UF
22UF
22UF
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
C
LAYOUT NOTE:
1
C1220
C1221
NOSTUFF
C1222
NOSTUFF
C1223
NOSTUFF
C1224
NOSTUFF
C1225
22UF
22UF
22UF
22UF
22UF
22UF
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
20%
6.3V
X5R
805
C1226
C1227
m
il
LAYOUT NOTE:
PLACE NEAR SOCKET SOUTH SIDE (ON TOPSIDE)
22UF
2
22UF
20%
6.3V
X5R
805
NOSTUFF
C1228
22UF
20%
6.3V
X5R
805
CRITICAL
1 NOSTUFF
C1250
PLACE ON BOTTOMSIDE
220UF
20%
2V
POLY
CASE-D2-SM1
20%
6.3V
X5R
805
CRITICAL
C1251
20%
2V
POLY
CASE-D2-SM1
C1229
C1230
22UF
2
NOSTUFF
C1231
22UF
20%
6.3V
X5R
805
20%
6.3V
X5R
805
e
r
CRITICAL
220UF
NOSTUFF
22UF
20%
6.3V
X5R
805
B
LAYOUT NOTE:
C1254
CRITICAL
C1255
220UF
220UF
20%
2V
POLY
CASE-D2-SM1
20%
2V
POLY
CASE-D2-SM1
CRITICAL
C1252
CRITICAL
220UF
20%
2V
POLY
CASE-D2-SM1
=PP1V5_S0_CPU
100 11
CPU_VID<0>
5%
1/16W
MF-LF
402
CPU_VID<1>
100 11
CPU_VID<2>
5%
1/16W
MF-LF
402
CPU_VID<3>
100 11
5%
1/16W
MF-LF
402
CPU_VID<5>
IMVP6_VID<1>
71 100
IMVP6_VID<2>
71 100
IMVP6_VID<3>
71 100
IMVP6_VID<4>
71 100
IMVP6_VID<5>
71 100
IMVP6_VID<6>
71 100
R1295
0
CPU_VID<6>
5%
1/16W
MF-LF
402
CPU_VID<4>
71 100
R1293
5%
1/16W
MF-LF
402
R1296
100 11
5%
1/16W
MF-LF
402
R1294
100 11
R1292
100 11
IMVP6_VID<0>
R1291
5%
1/16W
MF-LF
402
1x 10uF, 1x 0.01uF
C1280
10uF
C1281
0.01UF
20%
6.3V
X5R
603
10%
16V
CERM
402
LAYOUT NOTE:
PLACE C1281 NEAR PIN B26 OF U1000
LAYOUT NOTE:
C1253
220UF
11 6
R1290
100 11
20%
2V
POLY
CASE-D2-SM1
PLACE ON BOTTOMSIDE
=PP1V05_S0_CPU
CRITICAL 1
C1235
330UF
20%
6.3V
ELEC
6.3X8-SM
C1236
C1237
C1238
C1239
C1240
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
C1241
0.1UF
20%
10V
CERM
402
LAYOUT NOTE:
PLACE C1235 CLOSE TO CPU
SYNC_DATE=10/10/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
12
OF
33
118
y
r
Mini-XDP Connector
NOTE: This is not the standard XDP pinout.
Use with 920-0451 adapter board to support CPU, NB & SB debugging.
78 77 70 7 6
50 12 11 10 6
PP3V3_S0
=PP1V05_S0_CPU
XDP
R1315 1
XDP
R1330 1
54.9
1%
1/16W
MF-LF
402 2
100 10
OUT
100 10
IN
100 10
BI
XDP
1
CRITICAL
XDP_CONN
R1331
10K
10K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
402
2
F-ST-SM
2
XDP_BPM_L<5>
XDP_BPM_L<4>
OBSFN_A0
OBSFN_A1
XDP_BPM_L<3>
XDP_BPM_L<2>
OBSDATA_A0
OBSDATA_A1
10
12
11
14
13
16
15
18
17
20
19
22
21
24
23
26
25
28
27
30
29
32
31
34
33
36
35
100 10
NB CFG[0]
NB CFG[1]
NB CFG[4]
NB CFG[5]
NB CFG[6]
NB CFG[7]
XDP
100 10
IN
100 10
IN
100 30 16
BI
100 30 16
IN
16
BI
16
IN
16
IN
16
IN
R1399
100 23 10 7
IN
CPU_PWRGD
1K
IN
XDP_BPM_L<1>
XDP_BPM_L<0>
OBSDATA_A2
OBSDATA_A3
NB_BSEL<0>
NB_BSEL<1>
(OBSDATA_A0)
(OBSDATA_A1)
NB_CFG<4>
NB_CFG<5>
OBSDATA_B0
OBSDATA_B1
NB_CFG<6>
NB_CFG<7>
OBSDATA_B2
OBSDATA_B3
XDP_OBS20
TP_XDP_HOOK2
TP_XDP_HOOK3
22 15
BI
22 15
BI
100 10
OUT
LVDS_CTRL_DATA
LVDS_CTRL_CLK
PWRGD/HOOK0
HOOK1
VCC_OBS_AB
HOOK2
HOOK3
SDA
SCL
TCK1
TCK0
XDP_TCK
IN
16
IN
25 49
OBSDATA_C0
OBSDATA_C1
USB_EXTA_OC_L
SB_GPIO40
IN
24 46
IN
24
OBSDATA_C2
OBSDATA_C3
USB_EXTD_OC_L
WOW_EN
IN
24
IN
24
(OBSDATA_A2)
(OBSDATA_A3)
NB_BSEL<2>
NB_CFG<3>
IN
16 30 100
IN
16
OBSDATA_D0
OBSDATA_D1
PM_LATRIGGER_L
EXTGPU_LVDS_EN
IN
24
IN
24
OBSDATA_D2
OBSDATA_D3
SB_GPIO30
USB_EXTB_OC_L
IN
24
IN
24 46
NC
38
37
40
39
42
41
44
43
46
45
48
47
50
49
52
51
54
53
56
55
58
57
60
59
XDP_CLK_P
ITPCLK/HOOK4
IN
XDP_CLK_N
ITPCLK#/HOOK5
IN
(VCC_OBS_CD)
XDP_CPURST_L
RESET#/HOOK6
XDP_DBRESET_L
DBR#/HOOK7
OUT
NOTE: XDP_DBRESET_L must be pulled-up to 3.3V.
XDP_TDO
TDO
IN
XDP_TRST_L
TRSTn
OUT
XDP_TDI
TDI
OUT
XDP_TMS
TMS
OUT
XDP_PRESENT#
XDP
XDP
e
r
NB_CFG<8>
SMC_WAKE_SCI_L
OBSFN_C0
OBSFN_C1
m
il
XDP_PWRGD
5%
1/16W
MF-LF
402
a
n
i
J1300
LTH-030-01-G-D-A-TR
C1300
10%
16V
X5R
402
998-1565
0.1uF
NB CFG[8]
SB GPIO[8]
SB OC[0]#
SB OC[1]#
SB OC[2]#
SB OC[3]#
NB CFG[2]
NB CFG[3]
SB OC[4]#
SB OC[5]#
SB OC[6]#
SB OC[7]#
30 100 105
XDP
30 100 105
10 28
R1303
1
1K
FSB_CPURST_L
IN
7 10 14 100
5%
1/16W
MF-LF
402
10 100
10 100
10 100
10 100
C1301
0.1uF
10%
16V
X5R
402
SYNC_DATE=11/06/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
13
OF
33
118
OMIT
U1400
CRESTLINE
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10 7
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
=PP1V25R1V05_S0_FSB_NB
R1421
R1425
1K
1%
1/16W
MF-LF
402 2
R1426
1
1
2.0K
1%
1/16W
MF-LF
402
R1420
54.9
54.9
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R1410
P
2
C1425
0.1uF
10%
16V
X5R
402
R1415
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10 7
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
FSB_D_L<0>
FSB_D_L<1>
FSB_D_L<2>
FSB_D_L<3>
FSB_D_L<4>
FSB_D_L<5>
FSB_D_L<6>
FSB_D_L<7>
FSB_D_L<8>
FSB_D_L<9>
FSB_D_L<10>
FSB_D_L<11>
FSB_D_L<12>
FSB_D_L<13>
FSB_D_L<14>
FSB_D_L<15>
FSB_D_L<16>
FSB_D_L<17>
FSB_D_L<18>
FSB_D_L<19>
FSB_D_L<20>
FSB_D_L<21>
FSB_D_L<22>
FSB_D_L<23>
FSB_D_L<24>
FSB_D_L<25>
FSB_D_L<26>
FSB_D_L<27>
FSB_D_L<28>
FSB_D_L<29>
FSB_D_L<30>
FSB_D_L<31>
FSB_D_L<32>
FSB_D_L<33>
FSB_D_L<34>
FSB_D_L<35>
FSB_D_L<36>
FSB_D_L<37>
FSB_D_L<38>
FSB_D_L<39>
FSB_D_L<40>
FSB_D_L<41>
FSB_D_L<42>
FSB_D_L<43>
FSB_D_L<44>
FSB_D_L<45>
FSB_D_L<46>
FSB_D_L<47>
FSB_D_L<48>
FSB_D_L<49>
FSB_D_L<50>
FSB_D_L<51>
FSB_D_L<52>
FSB_D_L<53>
FSB_D_L<54>
FSB_D_L<55>
FSB_D_L<56>
FSB_D_L<57>
FSB_D_L<58>
FSB_D_L<59>
FSB_D_L<60>
FSB_D_L<61>
FSB_D_L<62>
FSB_D_L<63>
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10
BI
100 10 7
BI
100 10
BI
BI
100 10
BI
100 10
BI
G2
G7
M6
H7
H3
G4
F3
N8
H2
M10
N12
N9
H5
P13
K9
M2
W10
Y8
V4
M3
J1
N5
N3
W6
W9
N2
Y7
Y9
P4
W3
N1
AD12
AE3
AD9
AC9
AC7
NB_FSB_SCOMP
NB_FSB_SCOMP_L
AC14
AD11
AC11
AB2
AD7
AB1
Y3
AC6
AE2
AC5
AG3
AJ9
AH8
AJ14
AE9
AE11
AH12
AJ5
AH5
AJ6
AE7
AJ7
AJ2
AE5
AJ3
AH2
AH13
100 13 10 7
OUT
100 10
OUT
B3
C2
W1
W2
FSB_CPURST_L
FSB_CPUSLP_L
B6
NB_FSB_VREF
B9
E5
A9
R1411
100
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
H_D0*
H_D1*
H_D2*
H_D3*
H_D4*
H_D5*
H_D6*
H_D7*
H_D8*
H_D9*
H_D10*
H_D11*
H_D12*
H_D13*
H_D14*
H_D15*
H_D16*
H_D17*
H_D18*
H_D19*
H_D20*
H_D21*
H_D22*
H_D23*
H_D24*
H_D25*
H_D26*
H_D27*
H_D28*
H_D29*
H_D30*
H_D31*
H_D32*
H_D33*
H_D34*
H_D35*
H_D36*
H_D37*
H_D38*
H_D39*
H_D40*
H_D41*
H_D42*
H_D43*
H_D44*
H_D45*
H_D46*
H_D47*
H_D48*
H_D49*
H_D50*
H_D51*
H_D52*
H_D53*
H_D54*
H_D55*
H_D56*
H_D57*
H_D58*
H_D59*
H_D60*
H_D61*
H_D62*
H_D63*
H_A3*
H_A4*
H_A5*
H_A6*
H_A7*
H_A8*
H_A9*
H_A10*
H_A11*
H_A12*
H_A13*
H_A14*
H_A15*
H_A16*
H_A17*
H_A18*
H_A19*
H_A20*
H_A21*
H_A22*
H_A23*
H_A24*
H_A25*
H_A26*
H_A27*
H_A28*
H_A29*
H_A30*
H_A31*
H_A32*
H_A33*
H_A34*
H_A35*
J13
H_ADS*
H_ADSTB0*
H_ADSTB1*
H_BNR*
H_BPRI*
H_BREQ*
H_DEFER*
H_DBSY*
HPLL_CLK
HPLL_CLK*
H_DPWR*
H_DRDY*
H_HIT*
H_HITM*
H_LOCK*
H_TRDY*
G12
FCBGA
(1 OF 10)
NB_FSB_SWING
NB_FSB_RCOMP
24.9
BI
100 10
100 10
221
1%
1/16W
MF-LF
402
100 10
E2
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP*
H_CPURST*
H_CPUSLP*
H_AVREF
H_DVREF
FSB_A_L<3>
FSB_A_L<4>
FSB_A_L<5>
FSB_A_L<6>
FSB_A_L<7>
FSB_A_L<8>
FSB_A_L<9>
FSB_A_L<10>
FSB_A_L<11>
FSB_A_L<12>
FSB_A_L<13>
FSB_A_L<14>
FSB_A_L<15>
FSB_A_L<16>
FSB_A_L<17>
FSB_A_L<18>
FSB_A_L<19>
FSB_A_L<20>
FSB_A_L<21>
FSB_A_L<22>
FSB_A_L<23>
FSB_A_L<24>
FSB_A_L<25>
FSB_A_L<26>
FSB_A_L<27>
FSB_A_L<28>
FSB_A_L<29>
FSB_A_L<30>
FSB_A_L<31>
FSB_A_L<32>
FSB_A_L<33>
FSB_A_L<34>
FSB_A_L<35>
BI
10 100
BI
10 100
BI
10 100
BI
7 10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
y
r
a
n
i
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
H17
G20
m
il
e
r
B
30 6
BI
100 10
100 10
BI
100 10
HOST
100 10 7
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
H_DINV0*
H_DINV1*
H_DINV2*
H_DINV3*
K5
H_DSTBN0*
H_DSTBN1*
H_DSTBN2*
H_DSTBN3*
M7
H_DSTBP0*
H_DSTBP1*
H_DSTBP2*
H_DSTBP3*
L7
L2
AD13
AE13
K3
AD2
AH11
K2
AC2
AJ10
H_REQ0*
H_REQ1*
H_REQ2*
H_REQ3*
H_REQ4*
M14
H_RS0*
H_RS1*
H_RS2*
E12
E13
A11
H13
B12
D7
D8
FSB_ADS_L
FSB_ADSTB_L<0>
FSB_ADSTB_L<1>
FSB_BNR_L
FSB_BPRI_L
FSB_BREQ0_L
FSB_DEFER_L
FSB_DBSY_L
FSB_CLK_NB_P
FSB_CLK_NB_N
FSB_DPWR_L
FSB_DRDY_L
FSB_HIT_L
FSB_HITM_L
FSB_LOCK_L
FSB_TRDY_L
FSB_DINV_L<0>
FSB_DINV_L<1>
FSB_DINV_L<2>
FSB_DINV_L<3>
FSB_DSTB_L_N<0>
FSB_DSTB_L_N<1>
FSB_DSTB_L_N<2>
FSB_DSTB_L_N<3>
FSB_DSTB_L_P<0>
FSB_DSTB_L_P<1>
FSB_DSTB_L_P<2>
FSB_DSTB_L_P<3>
FSB_REQ_L<0>
FSB_REQ_L<1>
FSB_REQ_L<2>
FSB_REQ_L<3>
FSB_REQ_L<4>
FSB_RS_L<0>
FSB_RS_L<1>
FSB_RS_L<2>
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
7 10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
10 100
BI
7 10 100
BI
7 10 100
BI
OUT
BI
OUT
BI
7 10 100
10 100
7 10 100
10 100
7 10 100
IN
7 30 105
IN
7 30 105
BI
7 10 100
BI
10 100
BI
BI
IN
OUT
7 10 100
7 10 100
7 10 100
10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
BI
7 10 100
OUT
10 100
OUT
10 100
OUT
10 100
1
1
NB CPU Interface
C1410
0.1uF
2
2
10%
16V
X5R
402
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
14
OF
33
118
PP1V05_S0_NB_VCCPEG
1
U1400
2
R1510
1%
1/16W
MF-LF
402
CRESTLINE
OUT
22
OUT
22 13
22 13
BI
22
BI
22
BI
22
OUT
22
22
22
IN
IN
OUT
22
OUT
22
OUT
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
22
22
Follow instructions for LVDS and CRT & TV-Out Disable above.
Can also tie CRT_DDC_*, L_CTRL_*, L_DDC_*, SDVO_CTRL_* and
TV_DCONSELx to GND.
Tie DPLL_REF_CLK and DPLL_REF_SSCLK to GND.
Tie DPLL_REF_CLK* and DPLL_REF_SSCLK* to VCC (VCore).
Tie VCCA_DPLLA and VCCA_DPLLB to VCC (VCore).
Tie VCC_AXG and VCC_AXG_NCTF to GND.
Leave GFX_VID<3..0> and GFX_VR_EN as NC.
OUT
OUT
OUT
22
OUT
e
r
OUT
22
22
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
BI
22
BI
22
OUT
22
OUT
22
OUT
E39
L_BKLT_EN
L_CTRL_CLK
FCBGA
PEG_COMPI
N43
(3 OF 10)
PEG_COMPO
M43
E40
PEG_RX0*
PEG_RX1*
J51
L_CTRL_DATA
C37
L_DDC_CLK
L_DDC_DATA
PEG_RX2*
N47
D35
L_VDD_EN
PEG_RX3*
PEG_RX4*
T45
K40
PEG_RX5*
PEG_RX6*
U40
=TV_A_RTN
=TV_B_RTN
=TV_C_RTN
TV_DCONSEL<0>
TV_DCONSEL<1>
=CRT_BLUE
=CRT_BLUE_L
=CRT_GREEN
=CRT_GREEN_L
=CRT_RED
=CRT_RED_L
CRT_DDC_CLK
CRT_DDC_DATA
=CRT_HSYNC_R
=CRT_TVO_IREF
=CRT_VSYNC_R
T50
LVDS_IBG
L43
LVDS_VBG
LVDS_VREFH
PEG_RX7*
Y40
AB51
LVDS_VREFL
PEG_RX8*
PEG_RX9*
LVDSA_CLK*
LVDSA_CLK
PEG_RX10*
AD44
LVDSB_CLK*
PEG_RX11*
PEG_RX12*
AD40
PEG_RX13*
AH49
PEG_RX14*
PEG_RX15*
AG45
N41
N40
D46
C45
D44
E42
LVDS_A_DATA_P<0>
LVDS_A_DATA_P<1>
LVDS_A_DATA_P<2>
=TV_A_DAC
=TV_B_DAC
=TV_C_DAC
L51
L41
LVDSB_CLK
E51
LVDSA_DATA0*
LVDSA_DATA1*
F49
LVDSA_DATA2*
G50
E50
LVDSA_DATA0
LVDSA_DATA1
F48
LVDSA_DATA2
G44
LVDSB_DATA0*
B47
LVDSB_DATA1*
LVDSB_DATA2*
B45
E44
LVDSB_DATA0
A47
LVDSB_DATA1
LVDSB_DATA2
A45
G27
TVA_DAC
TVB_DAC
K27
TVC_DAC
E27
F27
J27
L27
TVA_RTN
TVB_RTN
TVC_RTN
M35
TV_DCONSEL0
P33
TV_DCONSEL1
Y44
W49
AG46
AG41
PEG_RX0
J50
PEG_RX1
PEG_RX2
L50
PEG_RX3
U44
PEG_RX4
PEG_RX5
T49
PEG_RX6
W45
PEG_RX7
PEG_RX8
W41
PEG_RX9
Y48
M47
T41
AB50
PEG_RX10
PEG_RX11
AC45
PEG_RX12
PEG_RX13
AH47
PEG_RX14
AH45
PEG_RX15
AG42
PEG_TX0*
PEG_TX1*
N45
PEG_TX2*
U47
PEG_TX3*
PEG_TX4*
N51
PEG_TX5*
PEG_TX6*
T42
PEG_TX7*
W46
PEG_TX8*
PEG_TX9*
W38
AC41
AG49
U39
R50
Y43
AD39
PEG_TX10*
AC46
PEG_TX11*
PEG_TX12*
AC49
PEG_TX13*
AH39
PEG_TX14*
PEG_TX15*
AE49
AC42
AH44
PEG_TX0
M45
CRT_BLUE
CRT_BLUE*
PEG_TX1
PEG_TX2
T38
G32
K29
CRT_GREEN
PEG_TX3
N50
J29
F29
CRT_GREEN*
CRT_RED
PEG_TX4
PEG_TX5
R51
E29
CRT_RED*
PEG_TX6
W42
PEG_TX7
PEG_TX8
Y47
PEG_TX9
AC38
H32
T46
U43
Y39
K33
CRT_DDC_CLK
G35
CRT_DDC_DATA
CRT_HSYNC
PEG_TX10
PEG_TX11
AD47
CRT_TVO_IREF
CRT_VSYNC
PEG_TX12
PEG_TX13
AD43
PEG_TX14
AE50
PEG_TX15
AH43
F33
C32
E33
PEG_COMP
AC50
AG39
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
7 84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
PEG_D2R_P<0>
PEG_D2R_P<1>
PEG_D2R_P<2>
PEG_D2R_P<3>
PEG_D2R_P<4>
PEG_D2R_P<5>
PEG_D2R_P<6>
PEG_D2R_P<7>
PEG_D2R_P<8>
PEG_D2R_P<9>
PEG_D2R_P<10>
PEG_D2R_P<11>
PEG_D2R_P<12>
PEG_D2R_P<13>
PEG_D2R_P<14>
PEG_D2R_P<15>
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
7 84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
84 101
IN
PEG_R2D_C_N<0>
PEG_R2D_C_N<1>
PEG_R2D_C_N<2>
PEG_R2D_C_N<3>
PEG_R2D_C_N<4>
PEG_R2D_C_N<5>
PEG_R2D_C_N<6>
PEG_R2D_C_N<7>
PEG_R2D_C_N<8>
PEG_R2D_C_N<9>
PEG_R2D_C_N<10>
PEG_R2D_C_N<11>
PEG_R2D_C_N<12>
PEG_R2D_C_N<13>
PEG_R2D_C_N<14>
PEG_R2D_C_N<15>
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
PEG_R2D_C_P<0>
PEG_R2D_C_P<1>
PEG_R2D_C_P<2>
PEG_R2D_C_P<3>
PEG_R2D_C_P<4>
PEG_R2D_C_P<5>
PEG_R2D_C_P<6>
PEG_R2D_C_P<7>
PEG_R2D_C_P<8>
PEG_R2D_C_P<9>
PEG_R2D_C_P<10>
PEG_R2D_C_P<11>
PEG_R2D_C_P<12>
PEG_R2D_C_P<13>
PEG_R2D_C_P<14>
PEG_R2D_C_P<15>
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
OUT
84 101
SDVO_TVCLKIN#
SDVO_INT#
SDVO_FLDSTALL#
y
r
a
n
i
m
il
L_BKLT_CTRL
H39
G51
LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>
OUT
J40
LVDS_A_DATA_N<0>
LVDS_A_DATA_N<1>
LVDS_A_DATA_N<2>
LVDS_B_DATA_N<0>
LVDS_B_DATA_N<1>
LVDS_B_DATA_N<2>
OUT
22
22
LVDS_IBG
TP_LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDS_A_CLK_N
LVDS_A_CLK_P
LVDS_B_CLK_N
LVDS_B_CLK_P
BI
22
22
BI
LVDS_BKLT_CTL
LVDS_BKLT_EN
LVDS_CTRL_CLK
LVDS_CTRL_DATA
LVDS_DDC_CLK
LVDS_DDC_DATA
LVDS_VDD_EN
LVDS
22
VGA
TV
PCI-EXPRESS GRAPHICS
LVDS Disable
19 21
24.9
OMIT
SDVO_TVCLKIN
SDVO_INT
SDVO_FLDSTALL
SDVOB_RED#
SDVOB_GREEN#
SDVOB_BLUE#
SDVOB_CLKN
SDVOC_RED#
SDVOC_GREEN#
SDVOC_BLUE#
SDVOC_CLKN
SDVOB_RED
SDVOB_GREEN
SDVOB_BLUE
SDVOB_CLKP
SDVOC_RED
SDVOC_GREEN
SDVOC_BLUE
SDVOC_CLKP
SYNC_DATE=10/30/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
15
OF
33
118
7
NB_CFG<5>
RESERVED
U1400
CRESTLINE
NB_CFG<9>
16
NBCFG_PEG_REVERSE
NB_CFG<7>
RESERVED
R1659
3.9K
NB_CFG<8>
RESERVED
2
NB_CFG<9>
High = Normal
PCIe Graphics
Lane Reversal
Low
5%
1/16W
MF-LF
402
= Reversed
NB_CFG<16>
NBCFG_DYN_ODT_DISABLE
RESERVED
NB_CFG<10>
16
R1666
3.9K
RESERVED
NB_CFG<11>
NB_CFG<12>
5%
1/16W
MF-LF
402
See Below
NB_CFG<13>
See Below
=PP3V3_S0_NB_VCCHV
6 16 19 21
NBCFG_DMI_REVERSE
NB_CFG<14>
RESERVED
R1669
3.9K
NB_CFG<15>
RESERVED
2
102 33 31
102 33 32
NB_CFG<19>
NB_CFG<16>
5%
1/16W
MF-LF
402
High = Enabled
FSB Dynamic
ODT
Low
OUT
7 16
= Disabled
=PP3V3_S0_NB_VCCHV
6 16 19 21
NBCFG_SDVO_AND_PCIE
RESERVED
NB_CFG<17>
OUT
R1670
3.9K
RESERVED
NB_CFG<18>
NB_CFG<19>
NB_CFG<20>
High = Reversed
DMI Lane
Reversal
Low
NB_CFG<20>
5%
1/16W
MF-LF
402
100 30 13
IN
100 30 13
IN
100 30 13
OUT
13
BI
NB_CFG<13:12>
13
00
01
10
11
=
=
=
=
RESERVED
XOR Mode Enabled
All-Z Mode Enabled
Normal Operation
IN
13
BI
OUT
13
OUT
13
OUT
16
21 19 16 6
=PP3V3_S0_NB_VCCHV
16
R1630 1
49 31
49 32
IN
IN
R1631
10K
10K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
2 402
16 7
16
25
100 71 23 10
PM_EXTTS_L<0>
PM_EXTTS_L<1>
IN
71 70 22 7
IN
28 7
IN
100 50 23 10
100 71 25
OUT
OUT
IN
PM_BMBUSY_L
CPU_DPRSTP_L
VR_PWRGOOD_DELAY
NB_RESET_L
PM_THRMTRIP_L
PM_DPRSLPVR
TP_NB_NC<1>
TP_NB_NC<2>
TP_NB_NC<3>
TP_NB_NC<4>
TP_NB_NC<5>
TP_NB_NC<6>
TP_NB_NC<7>
TP_NB_NC<8>
TP_NB_NC<9>
TP_NB_NC<10>
TP_NB_NC<11>
TP_NB_NC<12>
TP_NB_NC<13>
TP_NB_NC<14>
TP_NB_NC<15>
TP_NB_NC<16>
AV29
BB23
R35
SM_CK1
SM_CK3
N35
RSVD4
SM_CK4
AV23
AR12
SM_CK0*
AW30
AR13
RSVD5
RSVD6
RSVD7
SM_CK1*
SM_CK3*
BA23
AM12
AN13
RSVD8
RSVD9
SM_CK4*
AW23
SM_CKE0
BE29
SM_CKE1
SM_CKE3
AY32
SM_CKE4
BG37
SM_CS0*
SM_CS1*
BG20
SM_CS2*
BG16
SM_CS3*
BE13
SM_ODT0
SM_ODT1
BH18
SM_ODT2
BJ14
AR37
RSVD10
AM36
RSVD11
RSVD12
AM37
D20
RSVD13
RSVD14
BA25
AW25
BD39
H10
RSVD20
B51
RSVD21
BJ20
BK22
RSVD22
RSVD23
BF19
RSVD24
BH20
BK18
RSVD25
RSVD26
BE16
RSVD27
SM_ODT3
BJ18
BF23
SM_CK2
SM_CK2*
SM_RCOMP
SM_RCOMP*
BL15
SM_CK5
SM_CK5*
SM_RCOMP_VOH
BK31
SM_RCOMP_VOL
BL31
BG23
BC23
BD24
BJ29
SA_MA14
BH39
SB_MA14
RSVD34
AW20
RSVD35
BK20
C48
RSVD36
RSVD37
D47
RSVD38
BE24
B44
C44
SM_VREF0
SM_VREF1
BK16
BJ15
BK14
MEM_CLK_P<0>
MEM_CLK_P<1>
MEM_CLK_P<3>
MEM_CLK_P<4>
MEM_CLK_N<0>
MEM_CLK_N<1>
MEM_CLK_N<3>
MEM_CLK_N<4>
MEM_CKE<0>
MEM_CKE<1>
MEM_CKE<3>
MEM_CKE<4>
MEM_CS_L<0>
MEM_CS_L<1>
MEM_CS_L<2>
MEM_CS_L<3>
MEM_ODT<0>
MEM_ODT<1>
MEM_ODT<2>
MEM_ODT<3>
DPLL_REF_CLK
DPLL_REF_CLK*
B42
DPLL_REF_SSCLK
DPLL_REF_SSCLK*
H48
C42
H47
RSVD43
B34
C34
RSVD44
RSVD45
P27
CFG0
DMI_RXN0
AN47
N27
CFG1
DMI_RXN1
AJ38
N24
CFG2
CFG3
DMI_RXN2
DMI_RXN3
AN42
DMI_RXP0
AM47
DMI_RXP1
DMI_RXP2
AJ39
DMI_RXP3
AN45
DMI_TXN0
AJ46
DMI_TXN1
DMI_TXN2
AJ41
DMI_TXN3
AM44
DMI_TXP0
AJ47
DMI_TXP1
DMI_TXP2
AJ42
DMI_TXP3
AM43
GFX_VID0
E35
GFX_VID1
A39
GFX_VID2
GFX_VID3
C38
GFX_VR_EN
E36
N23
CFG6
J20
CFG7
CFG8
C20
CFG9
R24
L23
CFG10
CFG11
J23
CFG12
E23
CFG13
CFG14
G23
E20
K23
M20
CFG15
CFG16
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPD
IPD
IPD
M24
CFG17
L32
N33
CFG18
CFG19
L35
CFG20
G41
PM_BM_BUSY*
L39
PM_DPRSTP*
PM_EXT_TS0*
L36
J36
AW49
AV20
N20
G36
PM_EXT_TS1*
PWROK
RSTIN*
THERMTRIP*
DPRSLPVR
BJ51
NC1
BK51
NC2
BK50
NC3
NC4
BL50
BL49
BL3
BL2
BK1
BJ1
NC6
NC7
NC8
NC9
NC10
A5
C51
NC11
NC12
B50
NC13
A49
NC14
NC15
BK2
NC16
A50
31 102
OUT
31 102
OUT
32 102
OUT
32 102
OUT
31 33 102
OUT
31 33 102
OUT
32 33 102
OUT
32 33 102
OUT
31 33 102
OUT
31 33 102
OUT
32 33 102
OUT
32 33 102
OUT
31 33 102
OUT
31 33 102
OUT
32 33 102
OUT
32 33 102
PEG_CLK
K44
PEG_CLK*
K45
y
r
22 21 18 6
=PP1V8_S3M_MEM_NB
R1610 1
=NB_CLK96M_DOT_P
=NB_CLK96M_DOT_N
=NB_CLK100M_DPLLSS_P
=NB_CLK100M_DPLLSS_N
NB_CLK100M_PCIE_P
NB_CLK100M_PCIE_N
IN
22
IN
22
IN
22
IN
22
IN
7 30 105
IN
7 30 105
IN
7 24 101
IN
24 101
IN
24 101
IN
24 101
IN
7 24 101
IN
24 101
IN
24 101
IN
24 101
20%
10V
CERM
402
IN
7 22
IN
7 22
20
1%
1/16W
MF-LF
402
a
n
i
1
1K
C1623
AN46
AN41
AM40
AM39
DMI_S2N_N<0>
DMI_S2N_N<1>
DMI_S2N_N<2>
DMI_S2N_N<3>
DMI_S2N_P<0>
DMI_S2N_P<1>
DMI_S2N_P<2>
DMI_S2N_P<3>
DMI_N2S_N<0>
DMI_N2S_N<1>
DMI_N2S_N<2>
DMI_N2S_N<3>
DMI_N2S_P<0>
DMI_N2S_P<1>
DMI_N2S_P<2>
DMI_N2S_P<3>
GFX_VID<0>
GFX_VID<1>
GFX_VID<2>
GFX_VID<3>
GFX_VID<4>
=GFX_VR_EN
10%
16V
CERM
402
B39
0.1uF
20%
10V
CERM
402
2.2UF
20%
6.3V
CERM1
603
R1622
3.01K
C1625
20
1%
1/16W
MF-LF
402
0.01UF
10%
16V
CERM
402
OUT
7 24 101
OUT
24 101
OUT
24 101
OUT
24 101
OUT
7 24 101
OUT
24 101
OUT
24 101
OUT
24 101
1%
1/16W
MF-LF
402
C1624
R1624
1K
2.2UF
20%
6.3V
CERM1
603
1%
1/16W
MF-LF
402
OUT
22
OUT
22
OUT
22
OUT
22
OUT
22
CL_CLK
AM49
CL_DATA
AK50
CL_PWROK
CL_RST*
AT43
CL_VREF
AM50
AN49
CLINK_NB_CLK
CLINK_NB_DATA
=NB_CLINK_MPWROK
CLINK_NB_RESET_L
104 NB_CLINK_VREF
BI
7 25 104
BI
7 25 104
IN
OUT
25 104
H35
SDVO_CTRL_DATA
CLKREQ*
K36
ICH_SYNC*
G40
TEST1
A37
TEST2
R32
G39
SDVO_CTRLCLK
SDVO_CTRLDATA
NB_CLKREQ_L
NB_SB_SYNC_L
BI
22
BI
22
OUT
29 30
OUT
25
R1640
1K
22
C1640
SDVO_CTRL_CLK
19 21
R1641
392
0.1uF
20%
10V
CERM
402
1%
1/16W
MF-LF
402
2
2
1%
1/16W
MF-LF
402
NB Misc Interfaces
SYNC_MASTER=T9_MLB
SYNC_DATE=01/21/2007
NB_TEST1
NB_TEST2
1
R1690
5%
1/16W
MF-LF
402
DRAWING NUMBER
SHT
NONE
REV.
051-7229
D
SCALE
C1622
R1611 1
PP1V25_S0M_NB_VCCAXD
5%
1/16W
MF-LF
402
OUT
20K
0.01UF
1%
1/16W
MF-LF
402
R1691 1
R1620
C1616
NC5
E1
32 102
OUT
=PP0V9_S3M_MEM_NBVREFA
=PP0V9_S3M_MEM_NBVREFB
m
il
F23
32 102
OUT
0.1uF
RSVD39
RSVD40
CFG4
CFG5
31 102
OUT
C1615
B36
C23
31 102
OUT
MEM_RCOMP_VOH
MEM_RCOMP_VOL
AW4
RSVD41
RSVD42
C21
OUT
MEM_RCOMP
MEM_RCOMP_L
AR49
B37
A35
e
r
SM_CK0
(2 OF 10)
AL36
TP_NB_RSVD<20>
TP_NB_RSVD<21>
TP_NB_RSVD<22>
TP_NB_RSVD<23>
TP_NB_RSVD<24>
TP_NB_RSVD<25>
TP_NB_RSVD<26>
TP_NB_RSVD<27>
TP_MEM_CLKP2
TP_MEM_CLKN2
TP_MEM_CLKP5
TP_MEM_CLKN5
MEM_A_A<14>
MEM_B_A<14>
TP_NB_RSVD<34>
TP_NB_RSVD<35>
TP_NB_RSVD<36>
TP_LVDS_A_DATAN3
TP_LVDS_A_DATAP3
TP_LVDS_B_DATAN3
TP_LVDS_B_DATAP3
TP_NB_RSVD<41>
TP_NB_RSVD<42>
TP_NB_RSVD<43>
TP_NB_RSVD<44>
TP_NB_RSVD<45>
NB_BSEL<0>
NB_BSEL<1>
NB_BSEL<2>
NB_CFG<3>
NB_CFG<4>
NB_CFG<5>
NB_CFG<6>
NB_CFG<7>
NB_CFG<8>
NB_CFG<9>
TP_NB_CFG<10>
TP_NB_CFG<11>
TP_NB_CFG<12>
TP_NB_CFG<13>
TP_NB_CFG<14>
TP_NB_CFG<15>
NB_CFG<16>
TP_NB_CFG<17>
TP_NB_CFG<18>
NB_CFG<19>
NB_CFG<20>
FCBGA
RSVD2
RSVD3
J12
= Normal
Concurrent
SDVO/PCIe x1
16
RSVD1
P37
RSVD
RESERVED
P36
DDR MUXING
TP_NB_RSVD<1>
TP_NB_RSVD<2>
TP_NB_RSVD<3>
TP_NB_RSVD<4>
TP_NB_RSVD<5>
TP_NB_RSVD<6>
TP_NB_RSVD<7>
TP_NB_RSVD<8>
TP_NB_RSVD<9>
TP_NB_RSVD<10>
TP_NB_RSVD<11>
TP_NB_RSVD<12>
TP_NB_RSVD<13>
TP_NB_RSVD<14>
= DMIx2
CLK
NB_CFG<6>
5%
1/16W
MF-LF
402
CFG
DMI
Low
OMIT
3.9K
PM
GRAPHICS VID
High = DMIx4
DMI x2 Select
R1655
ME
RESERVED
NB_CFG<5>
13 16
NC
NB_CFG<4>
NBCFG_DMI_X2
1
MISC
NB_CFG<3>
16
OF
33
118
OMIT
BI
102 31
BI
102 31
BI
102 31
BI
102 31 7
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31 7
BI
102 31
BI
102 31 7
BI
102 31
BI
102 31
BI
102 31
BI
102 31
102 31
BI
BI
102 31
BI
102 31
BI
102 31
BI
102 31 7
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31
102 31
BI
BI
102 31
BI
102 31
BI
102 31
BI
102 31 7
BI
102 31
BI
102 31
BI
102 31
BI
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31 7
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31 7
BI
102 31
BI
102 31
BI
102 31
BI
102 31
BI
102 31 7
BI
102 31
BI
102 31
BI
102 31
102 31
BI
BI
AR43
AW44
BA45
SA_DQ1
SA_DQ2
AR41
SA_DQ3
SA_DQ4
AR45
SA_DQ5
AY46
AT42
AW47
SA_DQ6
SA_DQ7
BB45
SA_DQ8
BF48
SA_DQ9
SA_DQ10
BG47
BJ45
SA_DQ11
BB47
SA_DQ12
SA_DQ13
BG50
BE45
SA_DQ14
SA_DQ15
AW43
SA_DQ16
BH49
BG42
SA_DQ17
SA_DQ18
BE40
SA_DQ19
BE44
BF44
BH45
SA_DQ20
SA_DQ21
BG40
SA_DQ22
BF40
SA_DQ23
SA_DQ24
AR40
AT39
SA_DQ25
SA_DQ26
AW36
SA_DQ27
AW40
FCBGA
(4 OF 10)
SA_BS0
BB19
SA_BS1
SA_BS2
BK19
BF29
BL17
MEM_A_CAS_L
SA_DM0
AT45
SA_DM1
BD44
SA_DM2
SA_DM3
BD42
SA_DM4
AW13
SA_DM5
SA_DM6
BG8
SA_DM7
AN6
MEM_A_DM<0>
MEM_A_DM<1>
MEM_A_DM<2>
MEM_A_DM<3>
MEM_A_DM<4>
MEM_A_DM<5>
MEM_A_DM<6>
MEM_A_DM<7>
AW38
AY5
SA_DQS0
AT46
SA_DQS1
SA_DQS2
BE48
SA_DQS3
BC37
BB43
SA_DQS4
SA_DQS5
BB16
SA_DQS6
BB2
SA_DQS7
SA_DQS0*
AP3
AT47
SA_DQS1*
BD47
SA_DQS2*
SA_DQS3*
BC41
SA_DQS4*
SA_DQS5*
BA16
SA_DQS6*
BC1
BH6
BA37
BH7
AV38
SA_DQ30
AT38
SA_MA0
BJ19
AV13
SA_DQ31
SA_DQ32
SA_DQ33
SA_MA1
SA_MA2
BD20
AT13
AW11
SA_DQ34
SA_DQ35
AU15
AT11
BA13
SA_DQS7*
SA_DQ36
SA_DQ37
SA_DQ38
AP2
BK27
SA_MA3
BH28
SA_MA4
SA_MA5
BL24
SA_MA6
SA_MA7
BJ27
BK28
BJ25
SA_MA8
BE10
SA_DQ39
SA_DQ40
SA_DQ41
SA_MA9
SA_MA10
BA28
BD10
SA_MA11
BE28
AY9
SA_DQ42
SA_DQ43
BG10
SA_DQ44
SA_MA12
SA_MA13
BA11
BD8
AW9
BD7
SA_DQ47
SA_DQ48
AY7
SA_DQ49
AT5
AT7
SA_DQ50
SA_DQ51
AY6
SA_DQ52
BB7
AR5
SA_DQ53
SA_DQ54
AR8
SA_DQ55
AR9
SA_DQ56
SA_DQ57
AN3
AM8
AN10
AT9
AN9
AM9
AN11
SA_RAS*
SA_RCVEN*
SA_WE*
P
SA_DQ58
SA_DQ59
SA_DQ60
SA_DQ61
SA_DQ62
SA_DQ63
BL28
BC19
BG30
BJ16
BE18
AY20
BA19
102 32
BI
OUT
31 33 102
102 32
BI
OUT
31 33 102
102 32
BI
102 32
BI
OUT
31 33 102
OUT
31 102
OUT
31 102
OUT
31 102
OUT
31 102
OUT
31 102
OUT
31 102
BI
102 32
BI
102 32 7
BI
102 32
BI
102 32 7
BI
102 32
BI
BI
102 32
BI
31 102
BI
7 31 102
BI
7 31 102
BI
7 31 102
102 32
BI
102 32
BI
102 32
BI
102 32
BI
102 32
7 31 102
BI
7 31 102
BI
7 31 102
BI
102 32
BI
102 32
102 32
BI
7 31 102
BI
7 31 102
BI
7 31 102
7 31 102
BI
7 31 102
BI
7 31 102
BI
7 31 102
BI
BI
102 32
BI
102 32 7
BI
102 32
BI
BI
102 32
7 31 102
BI
BI
102 32
31 102
7 31 102
BI
102 32
102 32
BI
BI
BI
102 32 7
BI
102 32
BI
102 32
BI
102 32
BI
102 32
BI
102 32
BI
7 31 102
MEM_B_DQ<0>
MEM_B_DQ<1>
MEM_B_DQ<2>
MEM_B_DQ<3>
MEM_B_DQ<4>
MEM_B_DQ<5>
MEM_B_DQ<6>
MEM_B_DQ<7>
MEM_B_DQ<8>
MEM_B_DQ<9>
MEM_B_DQ<10>
MEM_B_DQ<11>
MEM_B_DQ<12>
MEM_B_DQ<13>
MEM_B_DQ<14>
MEM_B_DQ<15>
MEM_B_DQ<16>
MEM_B_DQ<17>
MEM_B_DQ<18>
MEM_B_DQ<19>
MEM_B_DQ<20>
MEM_B_DQ<21>
MEM_B_DQ<22>
MEM_B_DQ<23>
MEM_B_DQ<24>
MEM_B_DQ<25>
MEM_B_DQ<26>
MEM_B_DQ<27>
MEM_B_DQ<28>
MEM_B_DQ<29>
MEM_B_DQ<30>
MEM_B_DQ<31>
MEM_B_DQ<32>
MEM_B_DQ<33>
MEM_B_DQ<34>
MEM_B_DQ<35>
MEM_B_DQ<36>
MEM_B_DQ<37>
MEM_B_DQ<38>
MEM_B_DQ<39>
MEM_B_DQ<40>
MEM_B_DQ<41>
MEM_B_DQ<42>
MEM_B_DQ<43>
MEM_B_DQ<44>
MEM_B_DQ<45>
MEM_B_DQ<46>
MEM_B_DQ<47>
MEM_B_DQ<48>
MEM_B_DQ<49>
MEM_B_DQ<50>
MEM_B_DQ<51>
MEM_B_DQ<52>
MEM_B_DQ<53>
MEM_B_DQ<54>
MEM_B_DQ<55>
MEM_B_DQ<56>
MEM_B_DQ<57>
MEM_B_DQ<58>
MEM_B_DQ<59>
MEM_B_DQ<60>
MEM_B_DQ<61>
MEM_B_DQ<62>
MEM_B_DQ<63>
OUT
31 33 102
OUT
31 33 102
OUT
31 33 102
OUT
31 33 102
OUT
31 33 102
31 33 102
OUT
31 33 102
OUT
31 33 102
OUT
BI
102 32
BI
OUT
31 33 102
OUT
31 33 102
BI
102 32
BI
31 33 102
OUT
31 33 102
BI
102 32
BI
102 32
BI
102 32
BI
102 32
OUT
BI
102 32
31 33 102
31 33 102
OUT
BI
102 32
102 32 7
OUT
OUT
102 32
102 32
OUT
BI
BI
102 32
BI
102 32 7
BI
102 32
BI
102 32
BI
31 33 102
102 32
BI
102 32 7
BI
102 32
BI
102 32
BI
102 32
BI
102 32
BI
102 32
BI
102 32
BI
31 33 102
102 32
BI
102 32
BI
102 32
BI
102 32
BI
102 32
BI
102 32
BI
102 32
BI
102 32 7
102 32
BI
BI
AP49
SB_DQ0
CRESTLINE
AR51
SB_DQ1
SB_DQ2
(5 OF 10)
AW50
AN51
SB_DQ3
SB_DQ4
AN50
SB_DQ5
AW51
AV50
AV49
FCBGA
SB_DQ6
SB_DQ7
BA50
SB_DQ8
BB50
SB_DQ9
SB_DQ10
y
r
SB_BS0
AY17
SB_BS1
SB_BS2
BG18
BG36
MEM_B_BS<0>
MEM_B_BS<1>
MEM_B_BS<2>
SB_CAS*
BE17
MEM_B_CAS_L
SB_DM0
AR50
SB_DM1
BD49
SB_DM2
SB_DM3
BK45
SB_DM4
BH12
SB_DM5
SB_DM6
BJ7
SB_DM7
AW2
MEM_B_DM<0>
MEM_B_DM<1>
MEM_B_DM<2>
MEM_B_DM<3>
MEM_B_DM<4>
MEM_B_DM<5>
MEM_B_DM<6>
MEM_B_DM<7>
a
n
i
m
il
102 32
MEM_A_RAS_L
TP_MEM_A_RCVEN_L
MEM_A_WE_L
31 33 102
OUT
MEM_A_DQS_P<0>
MEM_A_DQS_P<1>
MEM_A_DQS_P<2>
MEM_A_DQS_P<3>
MEM_A_DQS_P<4>
MEM_A_DQS_P<5>
MEM_A_DQS_P<6>
MEM_A_DQS_P<7>
MEM_A_DQS_N<0>
MEM_A_DQS_N<1>
MEM_A_DQS_N<2>
MEM_A_DQS_N<3>
MEM_A_DQS_N<4>
MEM_A_DQS_N<5>
MEM_A_DQS_N<6>
MEM_A_DQS_N<7>
MEM_A_A<0>
MEM_A_A<1>
MEM_A_A<2>
MEM_A_A<3>
MEM_A_A<4>
MEM_A_A<5>
MEM_A_A<6>
MEM_A_A<7>
MEM_A_A<8>
MEM_A_A<9>
MEM_A_A<10>
MEM_A_A<11>
MEM_A_A<12>
MEM_A_A<13>
OUT
OUT
e
r
SA_DQ45
SA_DQ46
BB5
BB9
MEM_A_BS<0>
MEM_A_BS<1>
MEM_A_BS<2>
SA_CAS*
AY41
AV11
U1400
CRESTLINE
SA_DQ28
SA_DQ29
AW41
SA_DQ0
BI
102 31
102 31
BI
102 31
MEM_A_DQ<0>
MEM_A_DQ<1>
MEM_A_DQ<2>
MEM_A_DQ<3>
MEM_A_DQ<4>
MEM_A_DQ<5>
MEM_A_DQ<6>
MEM_A_DQ<7>
MEM_A_DQ<8>
MEM_A_DQ<9>
MEM_A_DQ<10>
MEM_A_DQ<11>
MEM_A_DQ<12>
MEM_A_DQ<13>
MEM_A_DQ<14>
MEM_A_DQ<15>
MEM_A_DQ<16>
MEM_A_DQ<17>
MEM_A_DQ<18>
MEM_A_DQ<19>
MEM_A_DQ<20>
MEM_A_DQ<21>
MEM_A_DQ<22>
MEM_A_DQ<23>
MEM_A_DQ<24>
MEM_A_DQ<25>
MEM_A_DQ<26>
MEM_A_DQ<27>
MEM_A_DQ<28>
MEM_A_DQ<29>
MEM_A_DQ<30>
MEM_A_DQ<31>
MEM_A_DQ<32>
MEM_A_DQ<33>
MEM_A_DQ<34>
MEM_A_DQ<35>
MEM_A_DQ<36>
MEM_A_DQ<37>
MEM_A_DQ<38>
MEM_A_DQ<39>
MEM_A_DQ<40>
MEM_A_DQ<41>
MEM_A_DQ<42>
MEM_A_DQ<43>
MEM_A_DQ<44>
MEM_A_DQ<45>
MEM_A_DQ<46>
MEM_A_DQ<47>
MEM_A_DQ<48>
MEM_A_DQ<49>
MEM_A_DQ<50>
MEM_A_DQ<51>
MEM_A_DQ<52>
MEM_A_DQ<53>
MEM_A_DQ<54>
MEM_A_DQ<55>
MEM_A_DQ<56>
MEM_A_DQ<57>
MEM_A_DQ<58>
MEM_A_DQ<59>
MEM_A_DQ<60>
MEM_A_DQ<61>
MEM_A_DQ<62>
MEM_A_DQ<63>
102 31
BI
OMIT
U1400
102 31
BA49
BE50
SB_DQ11
BA51
SB_DQ12
SB_DQ13
AY49
BF49
SB_DQ14
SB_DQ15
BJ50
SB_DQ16
BF50
BJ43
SB_DQ17
SB_DQ18
BL43
SB_DQ19
BJ44
BK47
BK49
SB_DQ20
SB_DQ21
BK43
SB_DQ22
BK42
SB_DQ23
SB_DQ24
BJ41
BJ37
SB_DQ25
SB_DQ26
BJ36
SB_DQ27
BL41
BL39
BF3
SB_DQS0
AT50
SB_DQS1
SB_DQS2
BD50
SB_DQS3
BK39
SB_DQS4
SB_DQS5
BL7
SB_DQS6
BE2
SB_DQS7
SB_DQS0*
AV2
SB_DQS1*
BC50
SB_DQS2*
SB_DQS3*
BL45
BK46
BJ12
AU50
BK38
SB_DQS4*
SB_DQS5*
BK7
SB_DQS6*
BF2
SB_DQS7*
AV3
BK12
BJ40
SB_DQ28
SB_DQ29
BL35
SB_DQ30
BK37
SB_MA0
BC18
BK13
SB_DQ31
SB_DQ32
SB_DQ33
SB_MA1
SB_MA2
BG28
BE11
BK11
SB_DQ34
SB_DQ35
SB_MA3
AW17
SB_MA4
SB_MA5
BF25
SB_MA6
SB_MA7
BA29
SB_MA8
AY28
BJ10
SB_DQ39
SB_DQ40
SB_DQ41
SB_MA9
SB_MA10
BD37
BL9
SB_MA11
BE37
BL5
SB_DQ42
SB_DQ43
SB_DQ44
SB_MA12
SB_MA13
BA39
BK9
SB_RAS*
SB_RCVEN*
AV16
AY18
SB_WE*
BC17
BK41
BC11
BC13
BE12
BC12
BG12
BK5
BK10
BJ8
SB_DQ36
SB_DQ37
SB_DQ38
SB_DQ47
SB_DQ48
BH5
SB_DQ49
BG1
BC2
SB_DQ50
SB_DQ51
BK3
SB_DQ52
BE4
BD3
SB_DQ53
SB_DQ54
BJ2
SB_DQ55
BA3
SB_DQ56
SB_DQ57
BB3
AT3
SB_DQ58
SB_DQ59
AY2
SB_DQ60
AY3
AU2
SB_DQ61
SB_DQ62
AT2
SB_DQ63
AR1
BE25
BC28
BG17
BG13
SB_DQ45
SB_DQ46
BF4
BJ6
BG25
MEM_B_DQS_P<0>
MEM_B_DQS_P<1>
MEM_B_DQS_P<2>
MEM_B_DQS_P<3>
MEM_B_DQS_P<4>
MEM_B_DQS_P<5>
MEM_B_DQS_P<6>
MEM_B_DQS_P<7>
MEM_B_DQS_N<0>
MEM_B_DQS_N<1>
MEM_B_DQS_N<2>
MEM_B_DQS_N<3>
MEM_B_DQS_N<4>
MEM_B_DQS_N<5>
MEM_B_DQS_N<6>
MEM_B_DQS_N<7>
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 102
OUT
32 102
OUT
32 102
OUT
32 102
OUT
32 102
OUT
32 102
OUT
32 102
OUT
32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
BI
7 32 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
OUT
32 33 102
MEM_B_RAS_L
TP_MEM_B_RCVEN_L
OUT
32 33 102
MEM_B_WE_L
OUT
32 33 102
MEM_B_A<0>
MEM_B_A<1>
MEM_B_A<2>
MEM_B_A<3>
MEM_B_A<4>
MEM_B_A<5>
MEM_B_A<6>
MEM_B_A<7>
MEM_B_A<8>
MEM_B_A<9>
MEM_B_A<10>
MEM_B_A<11>
MEM_B_A<12>
MEM_B_A<13>
NB DDR2 Interfaces
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
17
OF
33
118
VCC4
VCC6
AJ31
VCC7
AJ28
VCC8
VCC9
AH31
VCC10
AH29
VCC11
AF32
VCC12
=PP1V8_S3M_MEM_NB
(2 ch, 667MHz)
(2 ch, 533MHz)
(1 ch, 667MHz)
(1 ch, 533MHz)
(standby)
AU33
AU35
AV33
AW33
VCC_SM4
VCC_SM5
VCC_SM6
AY35
VCC_SM7
VCC_SM8
BA33
VCC_SM9
BA35
VCC_SM10
VCC_SM11
BB33
BC32
BC33
BC35
BD32
BD35
BE32
BE33
BE35
VCC_SM12
VCC_SM13
VCC_SM14
VCC_SM15
VCC_SM16
VCC_SM17
VCC_SM18
VCC_SM19
BF33
VCC_SM20
BF34
VCC_SM21
VCC_SM22
BG32
BG33
BG35
BH32
BH34
BH35
VCC_SM23
VCC_SM24
VCC_SM25
VCC_SM26
VCC_SM27
BJ32
VCC_SM28
BJ33
VCC_SM29
VCC_SM30
BJ34
BK32
VCC_SM31
BK33
VCC_SM32
VCC_SM33
BK34
BK35
VCC_SM34
BL33
VCC_SM35
VCC_SM36
AU30
=PPVCORE_S0_NB_GFX
R20
VCC_AXG1
T14
VCC_AXG2
W13
W14
Y12
AA20
AA23
AA26
AA28
AB21
AB24
AB29
AC20
AC21
AC23
VCC_AXG5
VCC_AXG6
VCC_AXG7
VCC_AXG8
VCC_AXG9
VCC_AXG10
VCC_AXG11
VCC_AXG12
VCC_AXG14
VCC_AXG15
VCC_AXG16
AC26
VCC_AXG17
VCC_AXG18
AC29
AD20
VCC_AXG19
VCC_AXG20
AD23
VCC_AXG21
AD24
AD28
VCC_AXG22
VCC_AXG23
AF21
VCC_AXG24
AF26
AA31
VCC_AXG25
VCC_AXG26
AH20
VCC_AXG27
AH21
VCC_AXG28
VCC_AXG29
AH23
AH24
AH26
VCC_AXG30
VCC_AXG31
AD31
VCC_AXG32
AJ20
VCC_AXG33
VCC_AXG34
AN14
VCC_AXG_NCTF4
VCC_AXG_NCTF5
T21
VCC_AXG_NCTF6
VCC_AXG_NCTF7
T23
VCC_AXG_NCTF8
U15
VCC_AXG_NCTF9
VCC_AXG_NCTF10
U16
VCC_AXG_NCTF11
U19
VCC_AXG_NCTF12
VCC_AXG_NCTF13
U20
VCC_AXG_NCTF14
U23
VCC_AXG_NCTF15
VCC_AXG_NCTF16
U26
T22
U1400
21 18 6
T25
=PPVCORE_S0_NB
CRESTLINE
AB33
AB36
VCC_NCTF1
VCC_NCTF2
AB37
VCC_NCTF3
AC33
AC35
VCC_NCTF4
VCC_NCTF5
AC36
VCC_NCTF6
AD35
AD36
VCC_NCTF7
VCC_NCTF8
AF33
VCC_NCTF9
AF36
VCC_NCTF10
VCC_NCTF11
U17
U21
V16
VCC_AXG_NCTF17
VCC_AXG_NCTF18
V17
VCC_AXG_NCTF19
V20
VCC_AXG_NCTF20
VCC_AXG_NCTF21
V21
VCC_AXG_NCTF22
V24
VCC_AXG_NCTF23
VCC_AXG_NCTF24
Y15
AH33
V19
AH35
AH36
Y17
VCC_AXG_NCTF26
VCC_AXG_NCTF27
Y19
Y20
VCC_AXG_NCTF28
VCC_AXG_NCTF29
Y21
AJ33
AJ35
VCC_NCTF15
VCC_NCTF16
AK33
VCC_NCTF17
AK35
AK36
VCC_NCTF18
VCC_NCTF19
AK37
VCC_NCTF20
AD33
VCC_NCTF21
VCC_NCTF22
VCC_AXG_NCTF20
Y24
VCC_AXG_NCTF31
VCC_AXG_NCTF32
Y26
VCC_AXG_NCTF33
Y29
VCC_AXG_NCTF34
VCC_AXG_NCTF35
AA16
VCC_AXG_NCTF36
AB16
VCC_AXG_NCTF37
VCC_AXG_NCTF38
AB19
AJ36
Y23
AM35
Y28
AA17
AC16
VCC_AXG_NCTF39
VCC_AXG_NCTF40
AC17
VCC_AXG_NCTF41
AD15
VCC_AXG_NCTF42
VCC_AXG_NCTF43
AD16
VCC_AXG_NCTF44
AF16
VCC_AXG_NCTF45
VCC_AXG_NCTF46
AF19
VCC_AXG_NCTF47
AH16
VCC_AXG_NCTF48
VCC_AXG_NCTF49
AH17
VCC_AXG_NCTF50
VCC_AXG_NCTF51
AJ16
VCC_AXG_NCTF52
AJ19
VCC_AXG_NCTF53
VCC_AXG_NCTF54
AK16
VCC_AXG_NCTF55
AL16
VCC_AXG_NCTF56
VCC_AXG_NCTF57
AL17
VCC_AXG_NCTF58
AL20
VCC_AXG_NCTF59
VCC_AXG_NCTF60
AL21
VCC_AXG_NCTF61
VCC_AXG_NCTF62
AM15
VCC_AXG_NCTF63
AM19
VCC_AXG_NCTF64
VCC_AXG_NCTF65
AM20
VCC_AXG_NCTF66
AM23
VCC_AXG_NCTF67
VCC_AXG_NCTF68
AP15
VCC_AXG_NCTF69
AP17
VCC_AXG_NCTF70
VCC_AXG_NCTF71
AP19
VCC_AXG_NCTF72
VCC_AXG_NCTF73
AP21
VCC_AXG_NCTF74
AP24
VCC_AXG_NCTF75
VCC_AXG_NCTF76
AR20
VCC_AXG_NCTF77
AR23
VCC_AXG_NCTF78
VCC_AXG_NCTF79
AR24
VCC_AXG_NCTF80
V26
VCC_AXG_NCTF81
VCC_AXG_NCTF82
V28
VCC_AXG_NCTF83
Y31
AL33
VCC_NCTF23
VCC_NCTF24
AL35
VCC_NCTF25
AA33
AA35
VCC_NCTF26
VCC_NCTF27
AA36
VCC_NCTF28
AP35
AP36
VCC_NCTF29
VCC_NCTF30
AR35
VCC_NCTF31
AR36
VCC_NCTF32
VCC_NCTF33
Y32
AC19
Y33
AD17
m
il
AH15
AH19
AJ17
AK19
AL19
AM16
AM21
AP16
AP20
VCC_NCTF34
VCC_NCTF35
Y36
VCC_NCTF36
Y37
T30
VCC_NCTF37
VCC_NCTF38
T34
VCC_NCTF39
T35
VCC_NCTF40
VCC_NCTF41
U31
VCC_NCTF42
U32
VCC_NCTF43
VCC_NCTF44
U33
U35
e
r
AL23
Y35
U29
21 18 6
D
VSS_NCTF1
VSS_NCTF2
T27
VSS_NCTF3
U24
VSS_NCTF4
VSS_NCTF5
U28
VSS_NCTF6
VSS_NCTF7
V35
VSS_NCTF8
AB17
VSS_NCTF9
VSS_NCTF10
AB35
VSS_NCTF11
AD37
VSS_NCTF12
VSS_NCTF13
AF17
VSS_NCTF14
AK17
VSS_NCTF15
VSS_NCTF16
AM17
VSS_NCTF17
VSS_NCTF18
AP26
VSS_NCTF19
AR15
VSS_NCTF20
VSS_NCTF21
AR19
y
r
VCC_NCTF14
a
n
i
Y16
FCBGA
(7 OF 10)
VCC_NCTF12
VCC_NCTF13
AH37
V23
VCC_AXG_NCTF25
VCC_AXG13
AC24
AC28
VCC_AXG3
VCC_AXG4
VCC GFX
22 18
VCC_SM2
VCC_SM3
AW35
BA32
VCC_SM1
AU32
mA
mA
mA
mA
mA
VCC SM
22 21 16 6
3300
2700
1700
1395
5
VCC13
T19
VCC SM LF
R30
VCC_AXG_NCTF3
18 22
T18
POWER
AK32
T17
VSS NCTF
VCC5
AC31
AH32
=PPVCORE_S0_NB_GFX
VCC_AXG_NCTF1
VCC_AXG_NCTF2
U36
VCC_NCTF45
VCC_NCTF46
V32
VCC_NCTF47
V33
V36
VCC_NCTF48
VCC_NCTF49
V37
VCC_NCTF50
VSS SCB
AC32
(6 FCBGA
OF 10)
T37
V31
AA19
AD19
AF35
AM24
AP28
AR28
VSS_SCB1
VSS_SCB2
A3
VSS_SCB3
VSS_SCB4
C1
VSS_SCB5
BL51
VSS_SCB6
A51
VCC_AXM1
AT33
VCC_AXM2
VCC_AXM3
AT31
VCC_AXM4
VCC_AXM5
AK24
VCC_AXM6
AJ26
VCC_AXM7
AJ23
B2
BL1
=PP1V05_S0M_NB_VCCAXM
VCC AXM
AH28
VCC2
VCC3
POWER
VCC1
AT34
VCC CORE
CRESTLINE
AT35
VCC NCTF
=PPVCORE_S0_NB
OMIT
U1400
21 18 6
AK29
AK23
=PP1V05_S0M_NB_VCCAXM
AL24
AL26
AL28
VCC_AXM_NCTF3
VCC_AXM_NCTF4
AM28
VCC_AXM_NCTF5
AM29
AM31
VCC_AXM_NCTF6
VCC_AXM_NCTF7
AM32
VCC_AXM_NCTF8
AM33
AP29
VCC_AXM_NCTF9
VCC_AXM_NCTF10
AP31
VCC_AXM_NCTF11
AP32
VCC_AXM_NCTF12
VCC_AXM_NCTF13
AP33
AL29
AL31
VCC_AXM_NCTF14
VCC_AXM_NCTF15
AL32
VCC_AXM_NCTF16
AR31
AR32
VCC_AXM_NCTF17
VCC_AXM_NCTF18
AR33
VCC_AXM_NCTF19
AR21
AR26
VCC_AXM_NCTF1
VCC_AXM_NCTF2
AM26
AP23
V29
NB Power 1
VCC_SM_LF1
AW45
VCC_SM_LF2
VCC_SM_LF3
BC39
VCC_SM_LF4
BD17
BE39
VCC_SM_LF5
VCC_SM_LF6
BD4
VCC_SM_LF7
AT6
AW8
NB_VCCSM_LF1
NB_VCCSM_LF2
NB_VCCSM_LF3
NB_VCCSM_LF4
NB_VCCSM_LF5
NB_VCCSM_LF6
NB_VCCSM_LF7
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
C1807
0.1uF
20%
10V
CERM
402
C1806
0.1uF
2
20%
10V
CERM
402
C1805
0.22UF
20%
6.3V
X5R
402
C1804
0.22UF
2
20%
6.3V
X5R
402
C1803
0.47UF
2
10%
6.3V
CERM-X5R
402
C1802
1uF
2
10%
6.3V
CERM
402
C1801
1uF
2
10%
6.3V
CERM
402
SIZE
2
DRAWING NUMBER
SHT
NONE
REV.
051-7229
D
SCALE
6 18 21
540 mA
18
OF
33
118
OMIT
U1400
=PP1V25R1V05_S0_NB_VTT
CRESTLINE
22
=PP3V3_S0_NB_VCCSYNC
J32
80 mA
22
PP3V3_S0_NB_VCCA_CRTDAC
A33
VCCA_CRT_DAC1
B33
VCCA_CRT_DAC2
A30
VCCA_DAC_BG
22
PP3V3_S0_NB_VCCA_DAC_BG
B32
=GND_NB_VSSA_DAC_BG
U13
(8 OF 10)
VTT2
VTT3
U12
VTT4
VTT5
U9
VTT6
U7
VTT7
VTT8
U5
VTT9
U2
VTT10
VTT11
U1
VTT12
T11
VTT13
VTT14
T10
VTT15
VTT16
T7
VSSA_DAC_BG
22
PP1V25_S0_NB_VCCA_DPLLA
B49
VCCA_DPLLA
22
PP1V25_S0_NB_VCCA_DPLLB
H49
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL
VTT
22
VTT1
CRT
5 mA
FCBGA
VCC_SYNC
POWER
30 mA
21
PP1V25_S0M_NB_VCCA_MPLL
AM2
K50
VCCA_PEG_BG
21
=GND_NB_VSSA_PEG_BG
K49
VSSA_PEG_BG
21
PP1V25_S0_NB_PEGPLL
U51
VCCA_PEG_PLL
21
PP1V25_S0M_NB_VCCA_SM
AW18
VCCA_SM1
AV19
VCCA_SM2
VCCA_SM3
AU19
AU18
VCCA_SM4
AU17
VCCA_SM5
AT22
VCCA_SM7
AT21
VCCA_SM8
VCCA_SM9
VCCA_SM11
40 mA
22
60 mA
60 mA
250 mA
150 mA
PP3V3_S0_NB_VCCA_TVDACA
22
=PP1V5_S0_NB_VCCD_CRT
PP1V5_S0_NB_VCCD_TVDAC
22
PP1V5_S0_NB_VCCD_QDAC
22
P
5 mA
PP3V3_S0_NB_VCCA_TVDACB
21
22
BC29
VCCA_SM_CK1
BB29
VCCA_SM_CK2
C25
B25
T6
VTT17
T5
VTT18
VTT19
T3
VTT20
R3
VTT21
VTT22
R2
T2
a
n
i
R1
VCC_AXD4
VCC_AXD5
AT29
VCC_AXD6
AT30
VCC_AXD_NCTF
AR29
PP1V25_S0M_NB_VCCAXD
16 21
515 mA
PP1V25_S0_NB_VCCAXF
21
495 mA
=PP1V25_S0_NB_VCCDMI
6 21
100 mA
21
200 mA
19 22
100 mA
=PP3V3_S0_NB_VCCHV
6 16 21
100 mA
PP1V05_S0_NB_VCCPEG
15 21
1260 mA
PP1V05_S0_NB_VCCRXRDMI
21
260 mA
AU28
AT25
VCC_AXF1
VCC_AXF2
B23
VCC_AXF3
A21
B21
VCC_DMI
AJ50
VCC_SM_CK1
BK24
VCC_SM_CK2
VCC_SM_CK3
BK23
VCC_SM_CK4
BJ23
C27
VCCA_TVA_DAC2
VCCA_TVB_DAC1
B27
VCCA_TVB_DAC2
B28
VCCA_TVC_DAC1
VCCA_TVC_DAC2
A28
M32
VCCD_CRT
L29
VCCD_TVDAC
N28
VCCD_QDAC
PP1V8_S3M_NB_VCCSMCK
VCC_TX_LVDS
VCCA_TVA_DAC1
BJ24
S0 or S3M is acceptable
PP1V8_S0_NB_VCCTXLVDS
A43
VCC_HV1
C40
VCC_HV2
B40
VCC_PEG1
AD51
VCC_PEG2
W50
VCC_PEG3
VCC_PEG4
W51
VCC_PEG5
V50
V49
VCC_RXR_DMI1
AH50
VCC_RXR_DMI2
AH51
=PP1V25_S0M_NB_VCCD_HPLL
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
22
PP3V3_S0_NB_VCCA_TVDACC
T9
VCC_AXD3
PEG
e
r
22
40 mA
PP1V25_S0M_NB_VCCA_SM_CK
VCCA_SM_NCTF1
VCCA_SM_NCTF2
y
r
T13
AU24
SM CK
VCCA_SM10
AT17
AR16
40 mA
U3
AT23
HV
AT18
AR17
21
U8
m
il
AT19
35 mA
U11
VCC_AXD1
VCC_AXD2
=PP1V8_S0_NB_VCCD_LVDS
J41
VCCD_LVDS1
H42
VCCD_LVDS2
VTTLF
A CK
VSSA_LVDS
=PP3V3_S0_NB_VCCA_PEG_BG
21 6
100 mA
B41
CRT
0.4 mA
=GND_NB_VSSA_LVDS
VCCA_LVDS
DMI
22
A41
TV/CRT
22 19
LVDS
10 mA
S0 or S3M is acceptable
PP1V8_S0_NB_VCCTXLVDS
AXF
150 mA
A LVDS
PP1V25_S0M_NB_VCCA_HPLL
A PEG
AXD
21
A SM
50 mA
AL2
PLL
100 mA
6 21
VTTLF1
A7
VTTLF2
F2
VTTLF3
AH1
NB_VTTLF_CAP1
NB_VTTLF_CAP2
NB_VTTLF_CAP3
1
C1913
0.47UF
2
10%
6.3V
CERM-X5R
402
C1912
0.47UF
2
10%
6.3V
CERM-X5R
402
C1911
0.47UF
10%
6.3V
CERM-X5R
402
NB Power 2
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
19
OF
33
118
U1400
U1400
CRESTLINE
VSS100
AW24
C46
VSS199
FCBGA
VSS287
W11
A15
VSS2
VSS3
(9 OF 10)
VSS101
VSS102
AW29
C50
(10 OF 10)
VSS288
VSS289
W39
C7
VSS200
VSS201
VSS103
AW5
D13
VSS202
VSS290
W47
VSS104
VSS105
AW7
D24
D3
VSS291
VSS292
W5
AY10
VSS203
VSS204
VSS4
AA21
VSS5
VSS6
AA29
W7
VSS106
VSS107
AY24
D32
D39
VSS205
VSS206
VSS293
VSS294
Y13
AY37
AB23
VSS9
VSS108
AY42
D45
VSS207
VSS295
Y41
AB26
VSS10
VSS11
VSS109
VSS110
AY43
D49
AY45
E10
VSS208
VSS209
VSS296
VSS297
Y45
AB28
AB31
VSS12
VSS111
AY47
E16
VSS210
VSS298
Y5
AC10
VSS13
VSS14
VSS112
VSS113
AY50
E24
E28
VSS211
VSS212
VSS299
VSS300
Y50
B10
E32
VSS213
VSS301
P29
VSS214
VSS215
VSS302
T29
AC3
VSS15
VSS114
B20
AC39
VSS16
VSS17
VSS115
VSS116
B24
E47
B29
F19
VSS18
VSS19
VSS117
VSS118
B30
F36
AD1
B35
F4
VSS216
VSS217
AD21
VSS20
VSS119
B38
F40
VSS218
AD26
VSS21
VSS22
VSS120
VSS121
B43
F50
AD29
G1
VSS219
VSS220
AD3
VSS23
VSS122
B5
G13
VSS221
AD41
VSS24
VSS25
VSS123
VSS124
B8
G16
BA1
G19
G24
AC47
AD45
B46
AD49
VSS26
VSS125
BA17
AD5
VSS27
VSS28
VSS126
VSS127
BA18
G28
BA2
G29
G33
AD50
AD8
AE10
VSS29
VSS30
VSS128
VSS129
BA24
BB12
G42
AE14
VSS31
VSS130
BB25
G45
AE6
VSS32
VSS33
VSS131
VSS132
BB40
G48
AF20
BB44
G8
AF23
VSS34
VSS133
BB49
H24
AF24
VSS35
VSS36
VSS134
VSS135
BB8
H28
AF31
BC16
H4
AG2
VSS37
VSS136
BC24
H45
AG38
VSS38
VSS39
VSS137
VSS138
BC25
J11
BC36
J16
VSS40
VSS41
VSS139
VSS140
BC40
J2
AG50
BC51
J24
AH3
VSS42
VSS141
BD13
J28
AH40
VSS43
VSS44
VSS142
VSS143
BD2
J33
AH41
BD28
J35
AH7
VSS45
VSS144
BD45
AH9
VSS46
VSS47
VSS145
VSS146
BD48
AJ11
AJ13
VSS48
VSS147
BE1
AJ21
VSS49
VSS50
VSS148
VSS149
BE19
VSS150
VSS151
BE30
AJ32
VSS51
VSS52
AJ43
VSS53
VSS152
BE51
AJ45
VSS54
VSS55
VSS153
VSS154
BE8
AJ49
AK20
VSS56
VSS155
BF16
AK21
VSS57
VSS58
VSS156
VSS157
BF36
AK26
AK28
VSS59
VSS158
BG2
AK31
VSS60
VSS61
VSS159
VSS160
BG24
VSS62
VSS63
VSS161
VSS162
BG39
VSS163
BG5
AG43
AG47
AJ24
AJ29
AK51
AL1
AM11
AM13
AM3
VSS64
m
il
J39
BD5
K12
K47
K8
BE23
L1
L17
BE42
L20
L24
L28
BF12
e
r
BG19
BG29
BG48
VSS309
AF28
VSS233
VSS234
VSS310
VSS311
AF29
VSS235
VSS312
AV25
VSS236
VSS237
VSS313
H50
VSS249
VSS250
VSS251
VSS254
M28
VSS255
VSS256
M42
VSS257
M46
VSS258
VSS259
M50
VSS260
VSS261
M9
VSS262
N11
N14
VSS263
VSS264
N17
VSS265
N29
N32
VSS266
VSS267
N36
VSS268
N39
VSS269
VSS270
VSS169
BH8
AN39
VSS71
VSS72
VSS170
VSS171
BJ11
VSS172
VSS173
BJ38
VSS174
BJ42
VSS175
VSS176
BJ46
VSS177
BK17
VSS178
VSS179
BK25
VSS180
BK36
VSS181
VSS182
BK40
VSS183
VSS184
BK6
U41
BK8
U45
VSS282
VSS283
VSS185
BL11
U50
VSS284
VSS186
VSS187
BL13
V2
BL19
V3
VSS285
VSS286
VSS188
BL22
VSS189
VSS190
BL37
VSS78
AR2
AR39
VSS79
VSS80
AR44
VSS81
AR47
VSS82
VSS83
AR7
AT10
AT14
VSS84
VSS85
P
BK29
BK44
AT41
VSS86
AT49
AU1
VSS87
VSS88
AU23
VSS89
AU29
AU3
VSS90
VSS91
AU36
VSS92
VSS191
C12
AU49
VSS93
VSS94
VSS192
VSS193
C16
VSS194
VSS195
C28
AV48
VSS95
VSS96
AW1
VSS97
VSS196
C33
AW12
VSS98
VSS99
VSS197
VSS198
C36
AU51
AV39
AW16
N7
VSS271
VSS272
P19
VSS273
P2
P23
VSS274
VSS275
P3
VSS276
P50
R49
VSS277
VSS278
T39
VSS279
T43
VSS280
VSS281
T47
VSS247
VSS248
VSS70
AR11
55
VSS246
AN38
BK15
=NB_TDB_SENSE
VSS245
BH44
VSS76
VSS77
55
NOTE: TDB = _N
VSS243
VSS167
VSS168
VSS75
AT27
=NB_TDB_FORCE
VSS241
VSS242
VSS68
VSS69
AP50
AD32
55
VSS240
AN1
AP48
TDB_SENSE
=NB_TDE_FORCE
VSS238
VSS239
AM45
BJ4
T33
VSS232
BH30
AP4
VSS304
AB32
VSS166
AN7
TDB_FORCE
AA32
L49
N49
T31
VSS307
VSS308
VSS164
VSS165
VSS73
VSS74
VSS303
VSS306
VSS67
AN5
TDE_FORCE
VSS230
VSS231
VSS252
VSS253
N44
55
NOTE: TDE = _P
VSS229
VSS65
VSS66
BJ13
=NB_TDE_SENSE
VSS227
VSS228
AM4
BH46
R28
AM41
BH17
y
r
Y11
VSS305
VSS225
VSS226
L33
M5
Y49
VSS224
L3
M49
TDE_SENSE
Y2
a
n
i
VSS222
VSS223
BG51
AN43
W43
VSS7
VSS8
AC43
AW32
AB20
AC13
VSS
FCBGA
AA24
CRESTLINE
VSS1
A24
OMIT
A13
A17
OMIT
VSS
NB Grounds
SYNC_MASTER=T9_MLB
SYNC_DATE=10/30/2006
BL47
C19
C29
SIZE
C41
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
20
OF
33
118
18 6
=PP1V25_S0_NB_VCC
R2170
PP1V25_S0_NB_VCCAXF
0
1
C2100 1
C2101
330UF
20%
6.3V
ELEC
6.3X8-SM
C2102
C2103
0.22uF
0.22uF
0.1uF
20%
6.3V
CERM
805
20%
6.3V
X5R
402
20%
6.3V
X5R
402
20%
10V
CERM
402
5%
1/10W
MF-LF
603
C2104
22uF
19
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
495 mA
C2170
10uF
20%
6.3V
X5R
603
=PP1V25_S0M_NB_PLL
495 mA
=PP1V25_S0M_NB_VCCD_HPLL
450 mA
C2171
1UF
2
y
r
L2181
L2173
=PP1V05_S0M_NB_VCCAXM
PP1V05_S0_NB_VCCPEG
C2111
22uF
20%
6.3V
CERM
805
0.22uF
2
0.22uF
20%
6.3V
X5R
402
C2112
C2113
C2114
0.1uF
20%
6.3V
X5R
402
0.1uF
20%
10V
CERM
402
1210
CRITICAL 1
C2115
20%
10V
CERM
402
20%
10V
CERM
402
C2173
Layout Note:
Place L and C
close to MCH
0.1uF
C2174
10uF
220UF
20%
16V
ELEC
SM-CASE-C1
20%
6.3V
X5R
603
C2120
C2121
20%
6.3V
ELEC
6.3X8-SM
C2122
4.7uF
330UF
C2123
4.7uF
20%
6.3V
CERM
603
20%
6.3V
CERM
603
2.2uF
20%
6.3V
CERM1
603
C2124
0.47UF
C2177
10uF
10%
6.3V
CERM-X5R
402
20%
6.3V
X5R
603
22 18 16 6
3300
2700
1700
1395
5
mA
mA
mA
mA
mA
(2ch 667MHz)
(2ch 533MHz)
(1ch 667MHz)
(1ch 533MHz)
(standby)
C2130 1
C2135
330UF
20%
6.3V
ELEC
6.3X8-SM
C2131
C2132
0.1uF
22uF
22uF
20%
10V
CERM
402
20%
6.3V
CERM
805
20%
6.3V
CERM
805
R2141
0
330UF
20%
6.3V
ELEC
6.3X8-SM
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
NO STUFF
5%
1/10W
MF-LF
603
C2140 1
PP1V25_S0M_NB_VCCA_SM
C2141
C2142
22uF
22uF
20%
6.3V
CERM
805
20%
6.3V
CERM
805
C2143
4.7UF
2
20%
6.3V
CERM
603
e
r
NO STUFF
5%
1/10W
MF-LF
603
C2145
NO STUFF
L2150
FERR-120-OHM-0.2A
=PP1V25_S0M_NB_VCC
1
0603
R2150
19 16 6
19 6
20%
6.3V
CERM1
603
C2151
1UF
10%
10V
X5R
402-1
=PP3V3_S0_NB_VCCA_PEG_BG
1
C2160
C2161
C2165
0.1uF
0.1uF
0.1uF
20%
10V
CERM
402
20%
10V
CERM
402
20%
10V
CERM
402
C2148
0.1uF
20%
6.3V
CERM
805
=PP3V3_S0_NB_VCCHV
=PP1V25_S0_NB_VCCDMI
2.2uF
2
22uF
0
5%
1/10W
MF-LF
603
100 mA
100 mA
C2146
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
NO STUFF
C2150
1
20%
10V
CERM
402
PP1V25_S0M_NB_VCCAXD
515 mA
22uF
20%
6.3V
CERM
805
19
35 mA
19
C2183
20%
6.3V
CERM
805
PP3V3_S0_NB1V05_FOLLOW_R
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
C2182
0.1uF
20%
10V
CERM
402
L2183
FERR-120-OHM-0.2A
1
PP1V25_S0M_NB_VCCA_MPLL
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
0603
R2183 1
0.51
1%
1/16W
MF-LF
402
19
150 mA
C2184
0.1uF
20%
10V
CERM
402
10
=PP3V3_S0_NB_FOLLOW
1%
1/16W
MF-LF
402
BOMOPTION=CR_E
BOMOPTION=CR_E
D2186
R2186
SOT23
R2185
SOT23
BAT54E3
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
22UF
D2185
PP1V25_S0M_NB_MPLL_RC
Layout Note:
10uF caps should
be close to MCH
on opposite side.
PP3V3_S0_NBCORE_FOLLOW_R
BAT54E3
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
10
1%
1/16W
MF-LF
402
L2190
FERR-220-OHM
=PP1V25_S0_NB_PLL
100 mA
PP1V25_S0_NB_PEGPLL
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
2
0805
R2190 1
1.1
1%
1/16W
MF-LF
402
C2191
0.1uF
2
2
19
100 mA
C2192
0.1uF
20%
10V
CERM
402
20%
10V
CERM
402
PP1V25_S0_NB_PEGPLL_RC
C2190
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
10uF
20%
6.3V
X5R
603
16 19
515 mA
L2195
6
=PP1V8_S3M_NB_VCC
1.0UH-220MA-0.12-OHM
1
200 mA
PP1V8_S3M_NB_VCCSMCK
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.8V
2
0805
R2195
1%
1/16W
MF-LF
402
6 19
19
200 mA
NOTE:
SYNCED FROM T9_MLB_NOME ON 10/31/06
CHANGED C2100,20,30,40,73 TO ELEC
C2196
1.1
22uF
2
20%
6.3V
CERM
805
C2197
0.1uF
20%
10V
CERM
402
NB Standard Decoupling
PP1V8_S3M_NB_VCCSMCK_RC
0.4 mA
=GND_NB_VSSA_PEG_BG
260 mA
10%
10V
X5R
402-1
MIN_LINE_WIDTH=0.4 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
=PPVCORE_S0_NB_FOLLOW
PP1V25_S0M_NB_VCCA_SM_CK
19
1UF
2
R2145
1
C2144
=PP1V05_S0_NB_FOLLOW
m
il
6
20%
6.3V
CERM
805
19
50 mA
PP1V05_S0_NB_VCCRXRDMI
22UF
Layout Note:
10uF caps should
be close to MCH
on opposite side.
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.05V
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.25V
C2181
1260 mA
a
n
i
19 6
15 19
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.05V
MAKE_BASE=TRUE
1520 mA
PP1V25_S0M_NB_VCCA_HPLL
0603
91NH
=PP1V05_S0_NB_PCIE
1
540 mA
1
20%
10V
CERM
402
C2110
C2180
0.1uF
10%
10V
X5R
402-1
FERR-120-OHM-0.2A
18 6
19
250 mA
C2195
SYNC_MASTER=JAMES
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.8V
SYNC_DATE=11/03/2006
10uF
20%
6.3V
X5R
603
19
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
21
OF
33
118
NOTE:
SANTA ROSA DESIGN GUIDE REV 1.5
P. 227-228 TABLE 95
15
15
15 13
15 13
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
16
16
16
16
16
16
16
16
16
16
16
LVDS_BKLT_CTL
LVDS_BKLT_EN
LVDS_CTRL_CLK
LVDS_CTRL_DATA
LVDS_DDC_CLK
LVDS_DDC_DATA
LVDS_VDD_EN
NOTE:
SANTA ROSA DESIGN GUIDE REV 1.5
P. 227-228 TABLE 95
TP_LVDS_BKLT_CTL
TP_LVDS_BKLT_EN
TRUE
TRUE
PP1V25_S0_NB_VCCA_DPLLA
19
PP1V25_S0_NB_VCCA_DPLLB
19
=PP1V5_S0_NB_VCCD_CRT
19
LVDS_IBG
LVDS_VREFH
LVDS_VREFL
LVDS_A_CLK_N
LVDS_A_CLK_P
LVDS_B_CLK_N
LVDS_B_CLK_P
LVDS_A_DATA_N<0>
LVDS_A_DATA_N<1>
LVDS_A_DATA_N<2>
LVDS_A_DATA_P<0>
LVDS_A_DATA_P<1>
LVDS_A_DATA_P<2>
LVDS_B_DATA_N<0>
LVDS_B_DATA_N<1>
LVDS_B_DATA_N<2>
LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
y
r
TP_LVDS_IBG
TP_LVDS_VREFH
TP_LVDS_VREFL
TP_LVDS_A_CLK_N
TP_LVDS_A_CLK_P
TP_LVDS_B_CLK_N
TP_LVDS_B_CLK_P
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TRUE
TP_LVDS_A_DATA_N<0>
TP_LVDS_A_DATA_N<1>
TP_LVDS_A_DATA_N<2>
a
n
i
TP_LVDS_A_DATA_P<0>
TP_LVDS_A_DATA_P<1>
TP_LVDS_A_DATA_P<2>
TP_LVDS_B_DATA_N<0>
TP_LVDS_B_DATA_N<1>
TP_LVDS_B_DATA_N<2>
TP_LVDS_B_DATA_P<0>
TP_LVDS_B_DATA_P<1>
TP_LVDS_B_DATA_P<2>
=TV_A_DAC
=TV_B_DAC
=TV_C_DAC
=TV_A_RTN
=TV_B_RTN
=TV_C_RTN
m
il
TV_DCONSEL<0>
TV_DCONSEL<1>
=CRT_BLUE
=CRT_BLUE_L
=CRT_GREEN
=CRT_GREEN_L
=CRT_RED
=CRT_RED_L
CRT_DDC_CLK
CRT_DDC_DATA
=CRT_HSYNC_R
=CRT_TVO_IREF
=CRT_VSYNC_R
e
r
=NB_CLK96M_DOT_P
=NB_CLK96M_DOT_N
=NB_CLK100M_DPLLSS_P
=NB_CLK100M_DPLLSS_N
SDVO_CTRLCLK
SDVO_CTRLDATA
GFX_VID<1>
GFX_VID<2>
GFX_VID<3>
GFX_VID<4>
=GFX_VR_EN
TP_LVDS_VDD_EN
TRUE
TP_GFX_VID<1>
TP_GFX_VID<2>
TP_GFX_VID<3>
TP_GFX_VID<4>
TP_GFX_VR_EN
TRUE
TRUE
TRUE
TRUE
TRUE
PP1V5_S0_NB_VCCD_QDAC
=PPVCORE_S0_NB_GFX
PP3V3_S0_NB_VCCA_CRTDAC
19
PP3V3_S0_NB_VCCA_TVDACA
19
PP3V3_S0_NB_VCCA_TVDACB
19
PP3V3_S0_NB_VCCA_TVDACC
19
PP3V3_S0_NB_VCCA_DAC_BG
19
NOTE:
SANTA ROSA PLATFORM P180 FIG 119 - NC
ALSO CONFIRMED WITH INTEL
=GND_NB_VSSA_DAC_BG
19
PP1V8_S0_NB_VCCTXLVDS
19
TP_NB_VSSA_LVDS
TRUE
16
19
18
=GND_NB_VSSA_LVDS
19
=PP1V8_S0_NB_VCCD_LVDS
19
=PP3V3_S0_NB_VCCSYNC
19
=NB_CLINK_MPWROK
VR_PWRGOOD_DELAY
7 16 70 71
TRUE
C2201
22000pF-1000mA
16V
NFM18
=PP1V5_S0_NB_TVDAC
C2213
0.1uF
20%
6.3V
X5R
603
20%
10V
CERM
402
MIN_LINE_WIDTH=0.3 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.5V
19
60 mA
C2200
10uF
PP1V5_S0_NB_VCCD_TVDAC
3
65 mA
Layout Note:
THESE CAPS SHOULD BE
within 6.35 mm of NB edge
B
21 18 16 6
=PP1V8_S3M_MEM_NB
R2200
1K
5%
1/16W
MF-LF
2 402
R2202
1K
5%
1/16W
MF-LF
2 402
PP0V9_S3M_MEM_NBVREFA
=PP0V9_S3M_MEM_NBVREFA
7 16
=PP0V9_S3M_MEM_NBVREFB
7 16
VOLTAGE=0.9V
TRUE
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.25MM
PP0V9_S3M_MEM_NBVREFB
VOLTAGE=0.9V
TRUE
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.25MM
R2201
1K
5%
1/16W
MF-LF
2 402
R2203
1K
5%
1/16W
MF-LF
2 402
NB Graphics Decoupling
SYNC_MASTER=JAMES
SYNC_DATE=10/16/06
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
22
OF
33
118
25 23 6
28 27 26
5%
1/16W
MF-LF
402
R2300 1
28
28
IN
OUT
8.2K
PP1V5_S0_SB_VCC1_5_B
PP3V3_G3_SB_RTC
R2301
332K
24.9
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R2311
10K
5%
1/16W
MF-LF
402
R2302
332K
AG25
AF24
U2300
RTCX1
RTCX2
ICH8M
SB_RTC_RST_L
AF23
RTCRST*
IN
SB_SM_INTRUDER_L
AD22
INTRUDER*
104
C21
TP_LAN_R2D<0>
TP_LAN_R2D<1>
TP_LAN_R2D<2>
D21
LAN_ENERGY_DET
GLAN_COMP
C22
E20
C20
AH21
D25
C25
103 98
OUT
HDA_BIT_CLK
HDA_SYNC
103 98
OUT
HDA_RST_L
103 98
103 98
IN
OUT
R2313
R2314
33
33
1
1
R2315
33
2
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
103
5%
1/16W
MF-LF
HDA_SDOUT_R
103 45 7
IN
103 45 7
IN
103 45
OUT
103 45
OUT
IN
103 45
103 45
103 45
IN
OUT
OUT
45
IN
45
IN
45
OUT
45
OUT
105 30 7
105 30 7
P
45
45
HDA_BIT_CLK
HDA_RST#
HDA_SDIN[0-2]
INTEGRATED PDs
HDA_SDOUT
INTEGRATED PD
ACZ_SYNC
INTEGRATED PD
TP_SB_SATALED_L
SATA_A_D2R_N
SATA_A_D2R_P
SATA_A_R2D_C_N
SATA_A_R2D_C_P
AE10
AG14
AF10
AF6
AF5
AH5
AH6
IN
IN
IN
IN
SATA_B_D2R_N
SATA_B_D2R_P
SATA_B_R2D_C_N
SATA_B_R2D_C_P
AG3
SATA_C_D2R_N
SATA_C_D2R_P
SATA_C_R2D_C_N
SATA_C_R2D_C_P
AF2
SB_CLK100M_SATA_N
SB_CLK100M_SATA_P
AB7
SATA_RBIAS_N
SATA_RBIAS_P
AG1
AG4
AJ4
AJ3
AF1
AE4
AE3
AC6
AG2
E6
TP_LPC_DRQ0_L
EXTGPU_PWR_EN
AD24
CPUPWRGD/GPIO49
AG29
CPU_PWRGD
IGNNE*
AF27
CPU_IGNNE_L
INIT*
INTR
RCIN*
AE24
CPU_INIT_L
CPU_INTR
SB_RCIN_L
NMI
SMI*
AD23
AG28
CPU_NMI
CPU_SMI_L
STPCLK*
AA24
CPU_STPCLK_L
THRMTRIP*
AE27
CPU_THERMTRIP_R
AE26
AC20
AH14
TP8
AA23
TP_SB_TP8
m
il
INT PD
INT PD
INT PU
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
SATA2RXN
SATA2RXP
SATA2TXN
SATA2TXP
SATA_CLKN
SATA_CLKP
SATARBIAS*
SATARBIAS
BI
=PP3V3_S0_SB_GPIO
7 49 51
7 49 51
28
R2303 1
5%
1/16W
MF-LF
402
INT PD
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DD10
DD11
DD12
DD13
DD14
DD15
DA0
DA1
DA2
V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6
AA4
AA1
AB3
DCS1*
DCS3*
Y6
DIOR*
DIOW*
DDACK*
IDEIRQ
IORDY
DDREQ
W4
Y5
W3
Y2
Y3
Y1
W5
IDE_PDD<0>
IDE_PDD<1>
IDE_PDD<2>
IDE_PDD<3>
IDE_PDD<4>
IDE_PDD<5>
IDE_PDD<6>
IDE_PDD<7>
IDE_PDD<8>
IDE_PDD<9>
IDE_PDD<10>
IDE_PDD<11>
IDE_PDD<12>
IDE_PDD<13>
IDE_PDD<14>
IDE_PDD<15>
IDE_PDA<0>
IDE_PDA<1>
IDE_PDA<2>
IDE_PDCS1_L
IDE_PDCS3_L
IDE_PDIOR_L
IDE_PDIOW_L
IDE_PDDACK_L
IDE_IRQ14
IDE_PDIORDY
IDE_PDDREQ
R2306
10K
8.2K
5%
1/16W
MF-LF
2 402
6 23 25
=PP1V05_S0_SB_CPU_IO
a
n
i
CPU_DPRSTP_L
CPU_DPSLP_L
INT PD
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
7 49 51
OUT
7 10 100
OUT
10 16 71 100
OUT
10 100
OUT
7 10 13 100
OUT
7 10 100
OUT
7 10 51 100
OUT
7 10 100
OUT
7 10 100
OUT
7 10 100
OUT
7 10 100
R2305 1
54.9
1%
1/16W
MF-LF
402
6 26 27
R2309
54.9
1%
1/16W
MF-LF
402
CPU_FERR_L
IN
10 100
R2308
NO STUFF
HDA_DOCK_EN*/GPIO33
HDA_DOCK_RST*/GPIO34
SATALED*
7 49 51
BI
SB_A20GATE
CPU_A20M_L
FERR*
AG26
7 49 51
BI
BI
AF26
INT PD
INT PD
G9
BI
OUT
DPRSTP*
DPSLP*
INT PD
INT PD
HDA_SDOUT
e
r
103 45
HDA
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDIN3
402
45
AE13
LPC_FRAME_L
GLAN_COMPI
GLAN_COMPO
HDA_RST*
AD13
C4
GLAN_DOCK*/GPIO13
AE14
AH15
LAN_TXD0
LAN_TXD1
LAN_TXD2
AJ15
AH17
33
INT PU
HDA_RST_L_R
AJ17
R2316
INT PU
HDA_BIT_CLK
HDA_SYNC
103
FWH4/LFRAME*
G8
AF13
INT PU
AJ16
HDA_SDIN0
TP_HDA_SDIN1
TP_HDA_SDIN2
TP_HDA_SDIN3
HDA_SDOUT
LAN_RXD0
LAN_RXD1
LAN_RXD2
F6
LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
F5
A20GATE
A20M*
LAN_RSTSYNC
HDA_BIT_CLK_R
103 HDA_SYNC_R
103
5%
HDA_DOCK_EN_L
TP_HDA_DOCK_RST_L
B21
GLAN_CLK
CPU
TP_LAN_D2R<0>
TP_LAN_D2R<1>
TP_LAN_D2R<2>
INT PU
IDE
28
D22
E5
LDRQ0*
LDRQ1*/GPIO23
28
B24
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
INT PU
LAN/GLAN
TP_LAN_RSTSYNC
AD21
INTVRMEN
LAN100_SLP
IHDA
TP_ENET_GLAN_CLK
AF25
SATA
SB_INTVRMEN
SB_LAN100_SLP
LPC
IN
28
(1 OF 6)
RTC
28 7
OUT
y
r
OMIT
SB_RTC_X1
SB_RTC_X2
BGA
103 98
=PP3V3_S0_SB_GPIO
R2310 1
27 26 24
INT PU
R2304
24.9
1%
1/16W
MF-LF
402
PM_THRMTRIP_L
IN
10 16 50 100
2.2K
BI
44 103
BI
44 103
BI
44 103
BI
44 103
BI
44 103
BI
44 103
BI
44 103
BI
44 103
BI
44 103
BI
7 44 103
BI
44 103
BI
44 103
BI
44 103
BI
44 103
BI
44 103
BI
5%
1/16W
MF-LF
402
44 103
OUT
44 103
OUT
44 103
OUT
44 103
OUT
44 103
OUT
44 103
OUT
7 44 103
OUT
44 103
OUT
44 103
IN
44 103
IN
7 44 103
IN
44 103
SYNC_DATE=05/07/2007
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
23
OF
33
118
OMIT
D
ExpressCard
42
42
FireWire
42
42
104 34 7
104 34 7
IN
IN
104 34
OUT
104 34
C
IN
OUT
13
IN
13
OUT
13
OUT
13
OUT
13
OUT
46 13
IN
IN
46
IN
R2404
R2408
10K
10K
10K
10K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
402 2
R2401
R2403
R2405
104 37 7
Ethernet
Yukon-PCIE
Nineveh-GLCI
IN
104 37 7
IN
104 37
OUT
104 37
OUT
R2407
BI
103 61
BI
10K
10K
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
402
2
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
103 61
BI
103 61 7
BI
USB_EXTA_OC_L
SB_GPIO40
USB_EXTD_OC_L
WOW_EN
PM_LATRIGGER_L
EXTGPU_LVDS_EN
SB_GPIO30
USB_EXTB_OC_L
EXCARD_OC_L
USB_EXTC_OC_L
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 28
BI
104 24
BI
104 24
BI
104 24
BI
104 24
BI
H26
G29
G28
F26
E29
E28
PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
PCIE_ENET_D2R_N
PCIE_ENET_D2R_P
PCIE_ENET_R2D_C_N
PCIE_ENET_R2D_C_P
D27
D26
C29
C28
SPI_SCLK_R
SPI_CE_R_L<0>
TP_SPI_CE_R_L<1>
C23
SPI_SI_R
SPI_SO
D23
B23
E22
F21
PERN4
PERP4
PETN4
PETP4
PERN5
PERP5
PETN5
PETP5
AG15
AE15
AF15
AG17
AD12
AD14
AH18
e
r
D20
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
ICH8M
BGA
(3 OF 6)
INT PU
INT PU
INT PU
REQ0*
INT PU
GNT0*
REQ1*/GPIO50
GNT1*/GPIO51
REQ2*/GPIO52
GNT2*/GPIO53
REQ3*/GPIO54
GNT3*/GPIO55
PCI
PCI_FW_REQ_L
IN
E18
C18
B19
F18
A11
C10
IRDY*
PAR
PCIRST*
DEVSEL*
PERR*
PLOCK*
SERR*
STOP*
TRDY*
FRAME*
PLTRST*
PCICLK
PME*
PU
C17
E15
F16
E17
C8
D9
G6
D16
A7
B7
F10
C16
C9
A17
AG24
B10
G7
24 104
PCI_FW_GNT_L
D7
MAKE_BASE=TRUE
PCI_REQ1_L
TP_SB_GPIO51
PCI_REQ2_L
TP_SB_GPIO53
ODD_RST_5VTOL_L
TP_SB_GPIO55
PCI_C_BE_L<0>
PCI_C_BE_L<1>
PCI_C_BE_L<2>
PCI_C_BE_L<3>
PCI_IRDY_L
PCI_PAR
PCI_RST_L
PCI_DEVSEL_L
PCI_PERR_L
PCI_LOCK_L
PCI_SERR_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
IN
7 24 104
IN
7 24 104
BOOT_LPC_SPI_L
R2415
1K
OUT
C/BE0*
C/BE1*
C/BE2*
C/BE3*
INT
A4
PLT_RST_L
PCI_CLK33M_SB
TP_PCI_PME_L
44 103
BI
28 104
BI
28 104
BI
28 104
BI
28 104
BI
24 104
BI
OUT
5%
1/16W
MF-LF
402
OUT
104
OUT
7 51
INT PU
SPI_MOSI
SPI_MISO
INT PU
INT PU
24 104
24 104
BI
24 104
BI
24 28 104
BI
24 104
BI
24 104
BI
24 104
IN
OC0*
OC1*/GPIO40
OC2*/GPIO41
OC3*/GPIO42
OC4*/GPIO43
OC5*/GPIO29
OC6*/GPIO30
OC7*/GPIO31
OC8*
OC9*
F9
B5
C5
A10
PIRQA*
PIRQB*
PIRQC*
PIRQD*
USB
G11
F12
B3
INT_PIRQE_L
INT_PIRQF_L
DVI_HOTPLUG_DET
ODD_PWR_EN_L
BI
AC29
AC28
7 16 101
T25
INT PD
INT PD
INT PD
INT PD
INT PD
INT PD
7 16 101
IN
16 101
IN
16 101
OUT
16 101
OUT
16 101
IN
16 101
IN
16 101
OUT
16 101
OUT
16 101
IN
16 101
IN
16 101
OUT
16 101
OUT
SB_CLK100M_DMI_N
SB_CLK100M_DMI_P
T26
16 101
IN
7 30 105
IN
7 30 105
R2413
Y23
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2
PP1V5_S0_SB_VCC1_5_B
23 26 27
24.9
1/16W
MF-LF
R2414
103
F3
402
BI
46 103
BI
46 103
BI
34 103
BI
34 103
BI
46 103
BI
46 103
BI
7 47 103
BI
7 47 103
BI
7 47 103
BI
7 47 103
BI
47 103
BI
47 103
BI
7 47 103
BI
7 47 103
BI
46 103
BI
46 103
BI
47 103
BI
47 103
BI
46 103
BI
46 103
External A
Geyser Trackpad/Keyboard
Bluetooth
External B
ExpressCard
External C
22.6
USB_RBIAS
1%
1/16W
MF-LF
402
GNT0#
LPC
SPI
104 24
104 24
104 24
104 24
104 28 24
104 24
104 24
104 24
104 24
28
7 16 101
y
r
DMI_N2S_N<3>
DMI_N2S_P<3>
DMI_S2N_N<3>
DMI_S2N_P<3>
AD26
7 16 101
IN
GNT0# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H
104 24 7
7 30 105
104 24
104 24
BI
AA28
F2
INT PD
INT PD
104 24
F8
AA29
USBRBIAS*
USBRBIAS
INT PD
INT PD
NOTE:
DMI_N2S_N<2>
DMI_N2S_P<2>
DMI_S2N_N<2>
DMI_S2N_P<2>
AB25
1%
INT PD
104 24
PIRQE*/GPIO2
PIRQF*/GPIO3
PIRQG*/GPIO4
PIRQH*/GPIO5
AD27
W28
USB_EXTA_N
USB_EXTA_P
USB_MINI_N
USB_MINI_P
USB_EXTD_N
USB_EXTD_P
USB_CAMERA_N
USB_CAMERA_P
USB_IR_N
USB_IR_P
USB_TPAD_N
USB_TPAD_P
USB_BT_N
USB_BT_P
USB_EXTB_N
USB_EXTB_P
USB_EXCARD_N
USB_EXCARD_P
USB_EXTC_N
USB_EXTC_P
INT PD
104 24
INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
W29
G3
INT PD
104 24
INTERRUPT I/F
AB26
Y26
IN
OUT
OUT
DMI_N2S_N<1>
DMI_N2S_P<1>
DMI_S2N_N<1>
DMI_S2N_P<1>
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
INT PD
INT PD
104 24 7
OUT
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
U28
DMI_IRCOMP_R
INT PD
INT PU
28 104
BI
Y27
U29
Y24
INT PD
28
BI
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
V26
a
n
i
PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP
m
il
AJ18
V27
DMI_ZCOMP
DMI_IRCOMP
SPI_CLK
SPI_CS0*
SPI_CS1*
DMI_N2S_N<0>
DMI_N2S_P<0>
DMI_S2N_N<0>
DMI_S2N_P<0>
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI_CLKN
DMI_CLKP
INT PD
AG16
U2300
104 28
J28
AJ19
OMIT
BI
F27
J29
PERN3
PERP3
PETN3
PETP3
INT PD
104 28
PCIE_MINI_D2R_N
PCIE_MINI_D2R_P
PCIE_MINI_R2D_C_N
PCIE_MINI_R2D_C_P
K26
R2409
10K
10K
BI
H27
L28
PERN2
PERP2
PETN2
PETP2
INT PD
103 61
5%
1/16W
MF-LF
402 1
104 28
TP_PCIE_FW_D2R_N
TP_PCIE_FW_D2R_P
TP_PCIE_FW_R2D_C_N
TP_PCIE_FW_R2D_C_P
L29
(2 OF 6)
EHCI0
R2402
R2406
K27
M26
BGA
EHCI1
13
TP_PCIE_EXCARD_D2R_N
TP_PCIE_EXCARD_D2R_P
TP_PCIE_EXCARD_R2D_C_N
TP_PCIE_EXCARD_R2D_C_P
N28
ICH8M
=PP3V3_S5_SB_USB
R2400
46 13
OUT
M27
N29
U2300
PERN1
PERP1
PETN1
PETP1
SPI
TP_PCIE_B_D2R_N
TP_PCIE_B_D2R_P
TP_PCIE_B_R2D_C_N
TP_PCIE_B_R2D_C_P
P26
(x2-capable,
pull HDA_SYNC
high for x2)
P27
PCI_EXPRESS
Spares
TP_PCIE_A_D2R_N
TP_PCIE_A_D2R_P
TP_PCIE_A_R2D_C_N
TP_PCIE_A_R2D_C_P
24
24 104
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L
PCI_SERR_L
PCI_DEVSEL_L
PCI_PERR_L
PCI_LOCK_L
R2423
R2424
R2425
R2426
R2427
R2428
R2430
R2429
PCI_FW_REQ_L
PCI_REQ1_L
PCI_REQ2_L
R2432
R2431
R2433
INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
INT_PIRQE_L
INT_PIRQF_L
ODD_PWR_EN_L
R2437
R2436
R2438
R2439
R2440
R2441
R2442
=PP3V3_S0_SB_PCI
1
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
24 104
IN
28
OUT
24
SYNC_DATE=05/07/2007
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
8.2K
FireWire INT*
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
24
OF
33
118
25 23 6
6
NO_REBOOT_MODE
1
R2506
10K
1K
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
R2550
R2552
R2547
R2505
R2507
10K
10K
10K
10K
8.2K
8.2K
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
R2532 2
R2510
10K
OMIT
U2300
103 52
BI
103 52
BI
SMB_CLK
SMB_DATA
TP_CLINK_WLAN_RESET_L
SMB_ME_CLK
SMB_ME_DATA
IN
PM_RI_L
103 52
BI
103 52
BI
34
25
51 50 49 7
49 28 7
16
51 25 7
IN
RI*
AC17
F4
AD15
AG12
LINDACARD_GPIO
IN
AF17
AG21
PM_BMBUSY_L
IN
AE19
SMBCLK
SMBDATA
LINKALERT*
SMLINK0
SMLINK1
AD19
PM_SUS_STAT_L
PM_SYSRST_L
OUT
AJ26
AG22
ICH8M
BGA
(4 OF 6)
SUS_STAT*/LPCPD*
SYS_RESET*
SMBALERT*/GPIO11
PM_STPPCI_L
PM_STPCPU_L
AE20
OUT
AG18
STP_PCI*/GPIO15
STP_CPU*/GPIO25
BI
PM_CLKRUN_L
AH11
CLKRUN*/GPIO32
AE17
PCIE_WAKE_L
INT_SERIRQ
IN
IN
28 25
49 13
IN
WAKE*
SERIRQ
THRM*
VR_PWRGD_CLKEN
AJ20
VRMPWRGD
TP_SB_TP7
AJ22
TP7
PCI_PME_FW_L
SB_GPIO6
AJ8
AJ9
SMC_RUNTIME_SCI_L
SMC_WAKE_SCI_L
AH9
AE16
25
OUT
28 25
OUT
28
25
25
30 29
OUT
LAN_PHYPC
EXTGPU_RST_L
SB_GPIO18
TP_SB_GPIO20
SB_SCLOCK
SATA_B_PWR_EN_L
FWH_MFG_MODE
SB_SATA_CLKREQ_L
SB_SLOAD
SB_SDATAOUT<0>
SB_SDATAOUT<1>
AC19
AG8
AH12
AE11
AG10
AH25
AD16
AG13
AF9
AD10
IN
AD9
SPKR
INT PD
NB_SB_SYNC_L
AJ13
MCH_SYNC*
TP_SB_TP3
AJ21
TP3
INT PU
5%
1/16W
MF-LF
402
RSVD_EXTGPU_LVDS_EN
SATA_B_DET_L
SB_GPIO36
SB_CRT_TVOUT_MUX_L
AJ12
AJ10
AF11
AG11
G5
SB_CLK14P3M_TIMER
SB_CLK48M_USBCTLR
D3
SUS_CLK_SB
SLP_S3*
SLP_S4*
SLP_S5*
AG23
AD18
PM_SLP_S3_L
TP_PM_SLP_S4_L
PM_SLP_S5_L
S4_STATE*/GPIO26
AH27
PM_S4_STATE_L
PWROK
AE23
PM_SB_PWROK
CLK14
CLK48
SUSCLK
AG9
AF21
e
r
25
28 27 25 6
=PP3V3_S5_SB
R2511
10K
5%
1/16W
MF-LF
402
R2515
10K
5%
1/16W
MF-LF
402
R2514
100K
5%
1/16W
MF-LF
402
LINDACARD_GPIO
ARB_DETECT_L
FWH_MFG_MODE
NOSTUFF
1
A
2
R2512
ARB_ONLY
1
R2516
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
P
7 25 51
40 25
28 25
28 25
25
R2530
SATA_B_PWR_EN_L
10K
OUT
BATLOW*
AE21
PM_BATLOW_L
IN
PWRBTN*
C2
PM_PWRBTN_L
IN
LAN_RST*
AH20
PM_LAN_ENABLE
RSMRST*
AG27
PM_RSMRST_L
CK_PWRGD
E1
CLK_PWRGD
CLPWROK
E3
CL_DATA0
CL_DATA1
F22
AE18
D24
104
AH23
104
CL_RST*
AJ23
CLINK_NB_RESET_L
AJ27
ARB_DETECT_L
SB_GPIO10_CL1
SB_GPIO14_CL2
WOL_EN
AG19
49 50
7 46 49 75 78
7 28 70
16 71 100
25 49
49
29
R2524 1
100K
28
5%
1/16W
MF-LF
402
IN
49
IN
49
R2525
10K
5%
1/16W
MF-LF
402
BI
=PP3V3_S0MWOL_SB_CLINK0
1
R2526
3.24K
7 16 104
28 34
1%
1/16W
MF-LF
402
OUT
BI
1
16 104
C2500
10%
16V
X5R
402
25
R2527
453
0.1uF
25
2
2
1%
1/16W
MF-LF
402
25
R2523 1
100K
5%
1/16W
MF-LF
402
=PP3V3_S5_SB_CLINK1
1
C2501
=PP3V3_S5_SB
6 25 27 28
10%
16V
X5R
402
1%
1/16W
MF-LF
402
R2529
453
0.1uF
6 23 25
R2528
3.24K
=PP3V3_S0_SB_GPIO
2
2
1%
1/16W
MF-LF
402
10K
R2536
PM_RI_L
10K
R2544
PM_BATLOW_L
LAN_PHYPC
SYNC_MASTER=T9_MLB_NOME
5%
1/16W
MF-LF
402
R2598
10K
1
SYNC_DATE=05/07/2007
SB_GPIO10_CL1
SB_GPIO14_CL2
8.2K
10K
R2546
10K
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
DRAWING NUMBER
SCALE
REV.
051-7229
SHT
NONE
1%
1/16W
MF-LF
402
7 16 104
10K
R2545
25
6 7 49 70 75 78
SB_CLINK_VREF0
SB_CLINK_VREF1
MEM_LED/GPIO24
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14
WOL_EN/GPIO9
AF22
50
34
CLINK_NB_DATA
TP_CLINK_WLAN_DATA
AF19
AJ24
BI
7 30 105
1%
1/16W
MF-LF
402
25
25
IN
CLINK_NB_CLK
TP_CLINK_WLAN_CLK
CL_VREF0
CL_VREF1
INT PU
OUT
7 30 105
1%
1/16W
MF-LF
402
R2597
1
1%
1/16W
MF-LF
402
25
IN
PM_DPRSLPVR
D
91
R2596
SB_GPIO6
25
49 25
OUT
TP_PM_SLP_M_L
5%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
EXTGPU_RST_L
OUT
F23
1%
1/16W
MF-LF
402
R2531
PCI_PME_FW_L
10K
IN
OUT
AJ25
y
r
IN
AJ14
SLP_M*
10K
OUT
OUT
CL_CLK0
CL_CLK1
R2534
OUT
DPRSLPVR/GPIO16
INT PU
10K
R2533 2
5%
1/16W
MF-LF
402
a
n
i
m
il
AJ11
SB_SPKR
16
TACH1/GPIO1
TACH2/GPIO6
TACH3/GPIO7
GPIO8
GPIO12
TACH0/GPIO17
GPIO18
GPIO20 INT PD
SCLOCK/GPIO22
QRT_STATE0/GPIO27
QRT_STATE1/GPIO28
SATACLKREQ*/GPIO35
SLOAD/GPIO38
SDATAOUT0/GPIO39
SDATAOUT1/GPIO48
GPIO
40 25
IN
AC13
AF12
28 7
49
PM_THRM_L
MISC
IN
POWER MGT
OUT
30 29
BI
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37
BMBUSY*/GPIO0
30 29
37 34
5%
1/16W
MF-LF
402
R2535
10K
10K
SATA
GPIO
R2504
8.2K
CLOCKS
R2553
8.2K
CONTROLLER LINK
R2551
1K
SMB
R2502
R2500
SYS GPIO
51 49 7
=PP3V3_S0_SB_GPIO
=PP3V3_S5_SB_GPIO
51 49 7
25
OF
33
118
7
6 uA S0-G3
PP3V3_G3_SB_RTC
AD25
VCCRTC
1 mA
L1
ICH8M
27
PP5V_S0_SB_V5REF
A16
T7
L13
(5 OF 6)
C14
D14
1 mA S0-S5
L26
AB1
27
PP5V_S5_SB_V5REF_SUS
G4
27 24 23
PP1V5_S0_SB_VCC1_5_B
AA25
G14
V5REF_SUS
E14
F14
L27
657 mA
L4
AC11
L5
AA26
L11
AC14
M12
AA27
L12
AC25
M13
AB27
L14
AC26
M14
AB28
AC27
M15
AB29
AD17
M16
D28
AD20
M17
D29
M11
AD28
M23
E25
M18
AD29
M28
E26
P11
AD3
M29
E27
P18
AD4
M3
F24
T11
AD6
N1
F25
T18
CORE
L17
L18
AE1
N11
G24
U18
N12
H23
V17
AE2
N13
H24
V14
AE22
N14
J23
V11
AD1
N15
J24
U11
AE25
N16
K24
V18
AE5
N17
K25
AE6
N18
L23
AE9
N26
L24
AF14
N27
L25
AF16
N4
M24
AF18
N5
M25
AF3
N6
N23
AF4
P12
N24
AG5
P24
P15
P25
AH13
P16
R24
AH16
P17
R25
AH19
P23
R26
AH2
P28
R27
P29
T23
R11
T24
R12
T27
AH26
R13
T28
AH3
R14
T29
AH4
R15
U24
AH8
R16
W25
AJ5
R17
V24
B11
R18
U25
B14
R28
Y25
B17
R4
V25
V23
AF28
AH22
VSS
B2
T12
B20
T13
B22
T14
B8
T15
C24
T16
C26
T17
47 mA
27
PP1V5_S0_SB_VCCSATAPLL
AJ6
VCCA3GP
V12
VCCDMIPLL
VCC_DMI
R29
PP1V5_S0_SB_VCCDMIPLL
27
23 mA
AE28
=PP1V25_S0_SB_DMI
6 27
50 mA
=PP1V05_S0_SB_CPU_IO
6 23 27
AE29
AC23
V_CPU_IO
AC24
VCC3_3
AF29
=PP3V3_S0_SB_VCC3_3_DMI
6 27
VCC3_3
AD2
=PP3V3_S0_SB_VCC3_3_SATA
6 27
AC8
=PP3V3_S0_SB_VCC3_3_VCCPCORE
=PP3V3_S0_SB_VCC3_3_IDE
6 27
=PP3V3_S0_SB_VCC3_3_PCI
6 27
AD8
VCC3_3
AE8
AF8
m
il
AA3
U7
V7
VCC3_3
W1
W6
W7
Y7
VCCSATAPLL
A8
B15
AE7
B18
AF7
AH7
e
r
U13
D15
U14
D18
U15
D2
U16
D4
U17
1080 mA
E21
U23
E24
U26
E4
U27
E9
U3
F15
U5
E23
V13
F28
V15
F29
V28
F7
V29
G1
W2
E2
W26
G10
W27
G13
Y28
G19
Y29
G23
Y4
G25
AB4
G26
AB23
G27
AB5
H25
AB6
H28
AD5
27 6
=PP1V5_S0_SB_VCC1_5_A_ATX
AC1
AC2
AC3
AC4
AC5
=PP1V5_S0_SB_VCC1_5_A
AC10
AC9
AA5
AA6
H29
10 mA
U4
H3
W24
H6
J1
A1
J25
A2
J26
A28
J27
A29
J4
AH1
J5
P
27 6
27 6
=PP1V5_S0_SB_VCC1_5_A_USB_CORE
=PP1V5_S0_SB_VCCUSBPLL
TP_VCCLAN1_05_INTERNAL_REG1
TP_VCCLAN1_05_INTERNAL_REG2
=PP3V3_S0MWOL_SB_VCCCL3_3
19 mA S0, 27 6
63 mA M1 & WOL
G12
G17
D5
E10
VCC1_5_A
E7
F11
VCCHDA
AC12
=PP3V3R1V5_S0_SB_VCCHDA
6 27
VCCSUSHDA
AD11
=PP3V3_S5_SB_3V3_VCCSUSHDA
6 27
J6
AJ1
K28
AJ2
VCCSUS1_05
AF20
TP_VCCSUS1_05_INTERNAL_REG1
TP_VCCSUS1_05_INTERNAL_REG2
VCC1_5_A
VCCSUS1_5
AC16
TP_VCCSUS1_5_INTERNAL_REG1
VCCSUS1_5
J7
TP_VCCSUS1_5_INTERNAL_REG2
VCCSUS3_3
C3
=PP3V3_S5_SB_VCCSUS3_3
AJ29
K6
B1
6 27
AC18
VCC1_5_A
VCCUSBPLL
F1
L6
L7
VCC1_5_A
M6
M7
AC21
VCCSUS3_3
AC22
AG20
AH28
P6
=PP3V3_S5_SB_VCCSUS3_3_USB
6 27
G18
C1
P1
VCCLAN1_05
P2
VCCSUS3_3
G21
P3
P4
SYNC_MASTER=T9_MLB_NOME
R1
VCCCL3_3
C2600
R3
A24
80 mA
27
=PP1V5_S0_SB_VCCGLAN1_5
B27
VCCGLANPLL
B28
VCCGLAN1_5
B26
B29
A26
=PP3V3_S0_SB_VCCGLAN3_3
B25
10%
6.3V
CERM
402
R6
VCCCL1_05
G22
1uF
R5
PP1V5_S0_SB_VCCGLANPLL
C2601
0.1uF
2
20%
10V
CERM
402
TP_VCCCL1_05_INTERNAL_REG
VCCCL1_5
A22
VCCCL1_5V
F19
=PP3V3_S0MWOL_SB_VCCLAN3_3
SIZE
VCCLAN3_3
19 mA S0,
51 mA M1 & WOL
6 27
G20
VCCGLAN3_3
DRAWING NUMBER
SHT
NONE
REV.
051-7229
D
SCALE
Current numbers from ICH8M Max Power Estimates Rev 2.0, doc #610194.
SYNC_DATE=05/07/2007
P5
F20
27
117 mA S0,
44 mA S3-S5
P7
VCC1_5_A24
F17
23 mA
1 mA
N7
W23
A27
K3
11 mA S0,
1 mA S3-S5
NOTE:
VccHDA and VccSusHDA can be 1.5V or 3.3V
depending on VIO of HD Audio interface.
VCC1_5_A
AJ28
K29
32 mA
VCC1_5_A
AH29
VSS_NCTF
K23
C15
AC7
D1
442 mA
B9
VCC3_3
H7
AD7
D13
GLAN POWER
D12
(VCC1_5_A total)
AJ7
VCCPSUS
U12
VCCPUSB
C6
1 mA
B4
PCI
T2
ARX
C27
VCC1_5_A
ATX
AG7
USB CORE
27 6
=PP1V5_S0_SB_VCC1_5_A_ARX
y
r
a
n
i
V16
VCCP CORE
N25
P14
VCC1_5_B
IDE
P13
AG6
AH10
L16
VCC1_05
AE12
VSS
1130 mA
6 27
C13
(6 OF 6)
V5REF
AB24
AH24
=PPVCORE_S0_SB
OMIT
OMIT
B13
L15
A25
A13
ICH8M
BGA
BGA
AA7
U2300
(VCC3_3 total)
A5
AA2
28 27 23
K7
U2300
(VCCSUS3_3 total)
A23
26
OF
33
118
8
=PP3V3_S5_SB
=PP5V_S5_SB
1 mA S0-S5
R2701
10
BAT54DW
10%
16V
X5R
402
2
26
1 mA S0-S5
=PP3V3_S0_SB
=PP5V_S0_SB
BAT54DW
SOT-363
6
1
26
117 mA S0 /
44 mA S3-S5
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=5V
1 mA
PLACEMENT NOTE:
PLACE C2703 < 2.54MM OF PIN A16..T7 OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
PLACEMENT NOTE:
PLACE C2700 & C2705-07 < 2.54MM OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
DISTRIBUTED BETWEEN AA25..V23
CRITICAL
FERR-330-OHM-1.5A
1
837 mA
C2719
0.1UF
10%
16V
X5R
402
=PP1V5_S0_SB_VCC1_5_A_ARX
0805-1
C2700
220UF
20%
16V 2
ELEC
SM-CASE-C1
C2705
C2706
C2707
22UF
22UF
2.2UF
20%
6.3V
CERM
805
20%
6.3V
CERM
805
20%
6.3V
CERM1
603
C2711
1UF
10%
6.3V
CERM
402
26
PP1V5_S0_SB_VCCGLANPLL
26
33 mA
C2732
2.2uF
20%
6.3V
CERM1
603
P
2
L2702
R2735
10UH-100MA
1
PP1V5_S0_SB_VCCSATAPLL_F
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.5V
5%
1/16W
MF-LF
402
PP1V5_S0_SB_VCCSATAPLL
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.5V
0805
47 mA
C2735
20%
6.3V
X5R
603
1UF
5%
1/10W
MF-LF
603
20%
6.3V
CERM
603
1.0UH-0.5A
1
PP1V5_S0_SB_VCCDMIPLL_F
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.5V
C2708
10UF
PLACEMENT NOTE:
PLACE CAPS < 2.54MM OF SB ON
SECONDARY SIDE OR 3.56MM ON PRIMARY
20%
6.3V
X5R
603
26 6
a
n
i
1
442 mA
26 6
C2738
10%
6.3V
CERM
402
0.1UF
10%
16V
X5R
402
C2712
=PP3V3_S0_SB_VCC3_3_DMI
PLACEMENT NOTE:
PLACE CAP < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN AF29
C2737
0.1UF
10%
16V
X5R
402
=PP1V5_S0_SB_VCC1_5_A_USB_CORE
10 mA
0.1UF
2
10%
16V
X5R
402
C2715
=PP1V5_S0_SB_VCCUSBPLL
PLACEMENT NOTE:
PLACE C2715 NEAR PIN D1 OF SB
0.1UF
2
=PP3V3_S0_SB_VCC3_3_PCI
C2726
C2727
0.1UF
0.1UF
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
PLACEMENT NOTE:
DISTRIBUTE IN PCI SECTION OF SB
NEAR PINS A8 ... F11
26 6
10%
16V
X5R
402
=PP1V25_S0_SB_DMI
1
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN AE29
C2728
0.1UF
26 6
1130 mA
26 6
=PPVCORE_S0_SB
0.1UF
C2702
0.1UF
10%
16V
X5R
402
10%
16V
X5R
402
C2721
0.1UF
PLACEMENT NOTE:
PLACE CAPS AT EDGE OF SB
10%
16V
X5R
402
B
ICH V_CPU_IO BYPASS
(ICH CPU I/O 1.05V PWR)
C2718
20%
6.3V
CERM
805
=PP3V3R1V5_S0_SB_VCCHDA
1
C2739
22UF
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN AC12
11 mA S0 /
1 mA S3-S5
(@ 1.5V)
50 mA
1 mA
26 23 6
=PP1V05_S0_SB_CPU_IO
=PP3V3_S5_SB_3V3_VCCSUSHDA
1
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN AD11
C2724
C2741
4.7UF
0.1UF
20%
6.3V
CERM
603
10%
16V
X5R
402
C2723
0.1UF
C2722
0.1UF
10%
16V
X5R
402
10%
16V
X5R
402
PLACEMENT NOTE:
PLACE NEAR PINS AC23,AC24 OF SB
26
SB Decoupling
SYNC_MASTER=DAVE_MASTER
SYNC_DATE=N/A
23 mA
C2701
10%
16V
CERM
402
DRAWING NUMBER
SHT
NONE
Current numbers from ICH8M Max Power Estimates Rev 2.0, doc #610194.
REV.
051-7229
D
SCALE
C2714
1UF
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS F1..M7
0.01UF
2
47 mA
PP1V5_S0_SB_VCCDMIPLL
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=1.5V
1210
23 mA
=PP1V5_S0_SB_VCC1_5_A_ATX
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PIN AC1..AC5
L2703
R2700
10%
6.3V
CERM
402
CRITICAL
C2717
10UF
PLACEMENT NOTE:
PLACE CAPS < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN AJ6
4.7uF
2
1080 mA
CRITICAL
C2733
32 mA
(@ 1.5V)
e
r
PLACEMENT NOTE:
PLACE CAPS < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN A24
=PP3V3_S0_SB_VCC3_3_SATA
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY
OR 3.56MM ON PRIMARY NEAR PIN AD2
26 6
10%
16V
X5R
402
m
il
657 mA
20%
6.3V
CERM
603
10%
16V
X5R
402
C2734
26 6
C2736
0.1UF
2
y
r
C2725
0.1UF
2
=PP3V3_S5_SB_VCCSUS3_3_USB
4.7uF
2
80 mA
1
PLACEMENT NOTE:
PLACE C2736 NEAR PIN B27..A26
10%
16V
X5R
402
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS AA3...Y7
23 24 26
=PP1V5_S0_SB_VCCGLAN1_5
PP1V5_S0_SB_VCC1_5_B
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=1.5V
MAKE_BASE=TRUE
CRITICAL
C2731
=PP3V3_S0_SB_VCC3_3_IDE
26 6
L2700
=PP1V5_S0_SB
26 6
PLACEMENT NOTE:
PLACE CAP NEAR PINS
P6..R6
10%
16V
X5R
402
PLACEMENT NOTE:
PLACE CAP UNDER SB NEAR PINS
F19 AND G20
PLACEMENT NOTE:
PLACE CAPS NEAR PINS AC18..AH28
26 6
10%
16V
X5R
402
0.1UF
0.1UF
10%
16V
X5R
402
26 6
PLACEMENT NOTE:
PLACE < 2.54MM OF SB ON SECONDARY OR
3.56MM ON PRIMARY NEAR PINS AE7..AJ7
PP5V_S0_SB_V5REF
C2703
0.1UF
=PP3V3_S5_SB_VCCSUS3_3
D2702
5
NC
5%
1/16W
MF-LF
402
100
C2730
1 mA
R2702
0.1UF
PLACEMENT NOTE:
PLACE CAPS NEAR PIN AD25 OF SB
PLACEMENT NOTE:
PLACE C2704 < 2.54MM OF PIN G4 OF SB
ON SECONDARY SIDE OR 3.56MM ON PRIMARY
(VCCSUS3_3 Total)
=PP3V3_S0MWOL_SB_VCCLAN3_3
=PP3V3_S0MWOL_SB_VCCCL3_3
38 mA S0 / 26 6
26 6
114 mA M1 & WOL
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=5V
26 6
6
C2729
0.1UF
PP3V3_G3_SB_RTC
28 26 23
SOT-363
PP5V_S5_SB_V5REF_SUS
C2704
0.6 uA G3
D2702
NC
5%
1/16W
MF-LF
402
(VCC1_5_A Total)
5
ICH VCCRTC BYPASS
(ICH RTC 3.3V PWR)
(VCC3_3 Total)
28 25 6
27
OF
33
118
R2807
PPVBATT_G3_RTC
MIN_LINE_WIDTH=0.3 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=3.3V
1K
PPVBATT_G3_RTC_R
MIN_LINE_WIDTH=0.3 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=3.3V
5%
1/16W
MF-LF
402
CRITICAL
1
R2800
=PP3V3_S5_SB
27 25 6
IMAC
Coin-Cell Holder
R2806 1
20K
5%
1/16W
MF-LF
402
R2885
SB_RTC_RST_L
NC
NC 2
NC
J2800
5%
1/16W
MF-LF
402
OUT
7 23
24
IN
PLT_RST_L
C2805
10%
6.3V
CERM
402
100
y
r
5%
1/16W
MF-LF
402
C2810
1UF
511S0012
10%
6.3V
CERM
402
NOTE: R2807 and D2800 form the doublefault protection for RTC battery.
SB_SM_INTRUDER_L
OUT
NB_RESET_L
OUT
7 16
DEBUG_RESET_L
OUT
7 51
SMC_LRESET_L
OUT
7 49
MINI_RESET_L
OUT
34
ENET_RESET_L
OUT
7 37
PEG_RESET_L
OUT
85
FW_RESET_L
OUT
7 40
R2883
47
SM
5%
1/16W
MF-LF
402
R2881
BB1020
2
47
1UF
1M
5
NC
Unbuffered
23 26 27
MIN_LINE_WIDTH=0.3 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=3.3V
SOT-363
PP3V3_G3_SB_RTC
BAT54DW
5%
1/16W
MF-LF
402
23
R2891
100
R2892
SB RTC Crystal
1
2
5%
1/16W
MF-LF
402
R2809 1
CRITICAL
10M
32.768K
2
5%
50V
CERM
402
Y2800
SM-LF
5%
1/16W
MF-LF
402 2
23
SB_RTC_X1_R
SB_RTC_X1
15PF
104 24
104 24
104 24
23
C2809
104 24
15PF
104 24
SB_RTC_X2
104 24
104 24
5%
50V
CERM
402
104 24
104 24
104 24
104 24
104 24
104 24
104 24
104 24
104 24
104 24
104 24
104 24
104 24
104 24
104 24
104 24
104 24
IN
CPU_PSI_L
IMVP6_PSI_L
MAKE_BASE=TRUE
OUT
71
104 24
104 24
104 24
104 24
e
r
104 24
104 24
104 24
25
=SB_CLINK_MPWROK
PM_SB_PWROK
MAKE_BASE=TRUE
7 25 70
104 24
104 24
104 24
104 24
24
104 24
VRMPWRGD INVERTER
6
=PP3V3_S0_SB_PM
C2811
13 10
PCI_AD<0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
PCI_C_BE_L<0>
PCI_C_BE_L<1>
PCI_C_BE_L<2>
PCI_C_BE_L<3>
PCI_RST_L
PCI_PAR
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
TP_PCI_AD_0
TP_PCI_AD_1
TP_PCI_AD_2
TP_PCI_AD_3
TP_PCI_AD_4 NO_TEST=TRUE
TP_PCI_AD_5
TP_PCI_AD_6
TP_PCI_AD_7
TP_PCI_AD_8
TP_PCI_AD_9
TP_PCI_AD_10
TP_PCI_AD_11
TP_PCI_AD_12
TP_PCI_AD_13
TP_PCI_AD_14
TP_PCI_AD_15
TP_PCI_AD_16
TP_PCI_AD_17
TP_PCI_AD_18
TP_PCI_AD_19
TP_PCI_AD_20
TP_PCI_AD_21
TP_PCI_AD_22
TP_PCI_AD_23
TP_PCI_AD_24
TP_PCI_AD_25
TP_PCI_AD_26
TP_PCI_AD_27
TP_PCI_AD_28
TP_PCI_AD_29
TP_PCI_AD_30
TP_PCI_AD_31
5
1
IN
VR_PWRGD_CLKEN_L
IN
104 24
IN
TP_LAN_D2R<2>
TP_CLINK_WLAN_DATA
PCI_SERR_L
NO_TEST=TRUE
NO_TEST=TRUE
NO_TEST=TRUE
5%
1/16W
MF-LF
402
R2890
47
5%
1/16W
MF-LF
402
R2896
IN
XDP_DBRESET_L
25
SB_GPIO6
20_INCH_LCD
R2710
85 6
INV_EN_BL_OR_PANEL_ID
TO ACDC ON M72 ONLY
0
1
PANEL_ID
MAKE_BASE=TRUE
25
UNUSED GPIOS
24
DVI_HOTPLUG_DET
25
EXTGPU_RST_L
23
EXTGPU_PWR_EN
23
LAN_ENERGY_DET
MAKE_BASE=TRUE
SB_GPIO4
R2850
10K
TP_EXTGPU_RST_L
MAKE_BASE=TRUE
TP_EXTGPU_PWR_EN
MAKE_BASE=TRUE
TP_LAN_ENERGY_DET
MAKE_BASE=TRUE
PM_SYSRST_L
OUT
7 25 49
DEVELOPMENT
SW2800
SPST
SM-LF
1
SB Misc
SYNC_MASTER=DAVE_MASTER
3
SYNC_DATE=N/A
VR_PWRGD_CLKEN
OUT
7 25
SILK_PART=SYS RESET
R2803
100K
5%
1/16W
MF-LF
2 402
DRAWING NUMBER
SHT
NONE
REV.
051-7229
D
SCALE
TP_SB_GPIO20
5%
1/16W
MF-LF
402
SC70-5
5%
1/16W
MF-LF
402
2
5%
1/16W
MF-LF
402
GPU_PRESENT
MAKE_BASE=TRUE
R2897
1K
1
RE-PURPOSED GPIOS
10K
ITP&XDP
5%
1/16W
MF-LF
402
R2893
=PP3V3_S5_SB_PM
1
100
MC74VHC1G00
U2803
71
IN
47
TP_PCI_C_BE_L_0
TP_PCI_C_BE_L_1
TP_PCI_C_BE_L_2
TP_PCI_C_BE_L_3
TP_PCI_RST_L
TP_PCI_PAR
0.1UF
20%
10V
CERM
402
23
34 25
m
il
104 24
10
a
n
i
C2808
R2810
5%
1/16W
MF-LF
402
28
OF
33
118
L2902
R2901
PP3V3_S0M_CK505_VDD48
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm
VOLTAGE=3.3V
C2909
0.1UF
10%
16V
X5R
402
FERR-120-OHM-1.5A
1
C2910
=PP3V3_S0M_CK505
6 29 30
2
0402
5%
1/16W
MF-LF
402
10UF
2
2.2
C2911
1UF
20%
6.3V
X5R
603
10%
6.3V
CERM
402
L2901
30 29 6
FERR-120-OHM-1.5A
=PP3V3_S0M_CK505
PP3V3_S0M_CK505_VDD_CPU_SRC
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm
VOLTAGE=3.3V
0402
C2900
C2901
1UF
10UF
10%
6.3V
CERM
402
20%
6.3V
X5R
603
y
r
PP3V3_S0M_CK505_VDD_PCI
1
C2902
C2903
C2904
C2905
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm
VOLTAGE=3.3V
C2906
C2912
C2913
0.1UF
0.1UF
10%
16V
X5R
402
10%
16V
X5R
402
C2914
10UF
20%
6.3V
X5R
603
L2903
R2900
R2902
PP3V3_S0M_CK505_VDDA
PP3V3_S0M_CK505_VDD_REF
1
C2907
C2908
Y2901
14.31818
VDD_CPU
VDD_48
CRITICAL
18pF
C2990
OMIT
18pF
5%
50V
CERM
402
5%
50V
CERM
402
38
CK505_XTAL_IN
CK505_XTAL_OUT
30
30 6
R2903 1
10K
5%
1/16W
MF-LF
402 2
105 30
OUT
CK505_PCIF0_CLK_ITPEN
FW PCI 33MHz
Spare 33MHz
SMC LPC 33MHz
Spare 33MHz
Spare 33MHz
Linda/LPC+ 33MHz
ICH PCI 33MHz
IN
105 30
OUT
105 30
OUT
105 30
OUT
105 30
OUT
105 30
BI
105 30
52
FS_B/TEST_MODE
57
58
PCI_1
PCI_2
63
PCI_3
64
PCI_4
65
PCI_5/FCT_SEL
68
PCIF_0/ITP_EN
IN
47
SCL
48
SDA
TP_CK505_PGMODE
40
BI
FS_A
CPU_1_MCH*
CPU_1_MCH
41
CPU_ITP*/SRC_10*
CPU_ITP/SRC_10
36
PGMODE (INT
PU)
37
10
SRC_1*
14
SRC_1
CLKREQ_1*
11
13
(INT PU*)
(INT PD)
SRC_2*
16
SRC_2
15
SRC_3*
SRC_3
19
CLKREQ_3*
59
18
VSS_48
SRC_4*
22
C2916
10UF
20%
6.3V
X5R
603
PM_STPPCI_L
PM_STPCPU_L
SRC_4
CLKREQ_4*
20
21
24
VSS_PCI
SRC_5
CLKREQ_5*
60
66
52
VSS_REF
VSS_SRC
23
27
26
CLKREQ_6*
25
69
THRM_PAD
(266.6)
200.0
SRC_7*
SRC_7
30
SRC_8*
32
SRC_8
CLKREQ_8*
34
29
33
OUT
30 105
CK505_CPU1_N
CK505_CPU1_P
OUT
30 105
OUT
30 105
CK505_CPU2_ITP_SRC10_N
CK505_CPU2_ITP_SRC10_P
OUT
30 105
OUT
30 105
CK505_LVDS_N
CK505_LVDS_P
OUT
30 105
OUT
30 105
OUT
30 105
CK505_SRC1_N
CK505_SRC1_P
CK505_CLKREQ1_L
CK505_SRC2_N
CK505_SRC2_P
CK505_SRC3_N
CK505_SRC3_P
CK505_CLKREQ3_L
CK505_SRC4_N
CK505_SRC4_P
SB_SATA_CLKREQ_L
CK505_SRC5_N
CK505_SRC5_P
NB_CLKREQ_L
CK505_SRC6_N
CK505_SRC6_P
CK505_CLKREQ6_L
CK505_SRC7_N
CK505_SRC7_P
CK505_SRC8_N
CK505_SRC8_P
CK505_CLKREQ8_L
(INT PU*)
166.6
(333.3)
100.0
(400.0)
DOT_96*/27M_SS
DOT_96/27M
CK505_DOT96_27M_N
CK505_DOT96_27M_P
VTT_PWRGD*/PD
CLK_PWRGD
CK505_48M_FSA
CK505_REF0_FSC
CK505_REF1
(CKPWRGD/PD#)
48M/FS_A
REF_0/FS_C/TEST_SEL
REF_1
RSVD
54
53
25 30
30 105
(INT PU*)
CPU MHz
25 30
IN
OUT
(INT PU*)
SRC_6
IN
CK505_CPU0_N
CK505_CPU0_P
(INT PU*)
SRC_5*
31
27M
42
SRC_0*/LCD_CLK*
SRC_0/LCD_CLK
SRC_6*
133.3
DOT_96+
PCIF_1
62
PIN 6
45
VSS_CPU
46
(INT PU*)
44
XTAL_OUT
=SMBUS_CK505_SCL
=SMBUS_CK505_SDA
FS_B
XTAL_IN
CK505_PCIF1_CLK
e
r
CPU_0*
CPU_0
(INT PD)
FS_C
FCT_SEL
55
QFN
m
il
CK505_PCI1_CLK
CK505_PCI2_CLK
CK505_PCI3_CLK
CK505_PCI4_CLK
CK505_PCI5_CLK_FCTSEL
51
39
OUT
52
56
CPU_STOP*
SLG8LP537V
VDD_A
VSS_A
50
CK505_FSB_TEST_MODE
=PP3V3_S0_CK505
ITP&XDP
PCI_STOP*
U2900
5X3.2-SM
C2989
1
5%
1/16W
MF-LF
402
a
n
i
10%
16V
X5R
402
35
0.1UF
10%
16V
X5R
402
C2915
0.1UF
20%
6.3V
X5R
603
28
10UF
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm
VOLTAGE=3.3V
17
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm
VOLTAGE=3.3V
12
VDD_SRC
5%
1/16W
MF-LF
402
49
2.2
67
VDD_REF
PP3V3_S0M_CK505_VDDA_R
MIN_LINE_WIDTH=0.5mm
MIN_NECK_WIDTH=0.2mm
VOLTAGE=3.3V
61
2
0402
VDD_PCI
43
FERR-120-OHM-1.5A
OUT
IN
30 105
30 105
OUT
30 105
OUT
30 105
IN
OUT
OUT
IN
OUT
OUT
IN
OUT
OUT
IN
30 105
30 105
30 105
25 30
30 105
30 105
16 30
30 105
30 105
30
OUT
OUT
30 105
OUT
30 105
IN
30 40
30 105
OUT
30 85
OUT
OUT
30 105
Spare 100MHz
Yukon PCIe 100MHz
30
OUT
30 105
OUT
30 105
25
From ICH
OUT
30 105
OUT
30 105
OUT
30
IN
NOTE:
SYNCED FROM T9_MLB_NOME
ADDED 475-OHM RESISTOR TO NB_CLKREQ_L PER INTEL
DELETED RES AFTER INTEL SAID ITS NOT NEEDED!
PIN 7
PIN 10
DOT_96-
LCD_CLK+
27M w/SS
SRC_0+
From ICH
Clock (CK505)
PIN 11
LCD_CLKSRC_0-
SYNC_MASTER=JAMES
SYNC_DATE=11/27/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
29
OF
33
118
CLK Termination
CLKREQ Controls
105 29
IN
105 29
IN
CK505_CPU0_P
CK505_CPU0_N
FSB_CLK_CPU_P
FSB_CLK_CPU_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
OUT
7 10 105
OUT
7 10 105
29 6
=PP3V3_S0M_CK505
NO STUFF
R3050
105 29
R3067
105 29
IN
IN
CK505_CPU1_P
CK505_CPU1_N
FSB_CLK_NB_P
FSB_CLK_NB_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
10K
5%
1/16W
MF-LF
402
BI
OUT
7 14 105
NO STUFF
OUT
7 14 105
R3051
y
r
40 29
CK505_PCI5_CLK_FCTSEL
105 29
105 29
IN
IN
CK505_CPU2_ITP_SRC10_P
CK505_CPU2_ITP_SRC10_N
XDP_CLK_P
XDP_CLK_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
OUT
13 100 105
OUT
13 100 105
NO STUFF
R3080
105 29
IN
105 29
IN
CK505_LVDS_P
CK505_LVDS_N
a
n
i
TP_CK505_LVDS_P
TP_CK505_LVDS_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
1K
5%
1/16W
MF-LF
402
R3081
100 16 13
OUT
NB_BSEL<0>
105
CK505_FSA
5%
1/16W
MF-LF
402
105 29
CPU_BSEL<0>
IN
10 100
105 29
IN
IN
CK505_SRC1_P
CK505_SRC1_N
GPU_CLK100M_PCIE_P
GPU_CLK100M_PCIE_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
5%
1/16W
MF-LF
402
105 29
IN
105 29
IN
CK505_SRC2_P
CK505_SRC2_N
SB_CLK100M_DMI_P
SB_CLK100M_DMI_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
BI
CK505_48M_FSA
33
SB_CLK48M_USBCTLR
5%
1/16W
MF-LF
402
(TO/FROM CK505)
85 105
OUT
85 105
OUT
7 24 105
OUT
7 24 105
34
29
38
29
29 25
29 25
OUT
BI
BI
IN
OUT
IN
CK505_CLKREQ3_L
OUT
7 25 105
105 29
IN
105 29
IN
CK505_SRC3_P
CK505_SRC3_N
PCIE_CLK100M_FW_P
PCIE_CLK100M_FW_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
OUT
7 40 105
OUT
7 40 105
R3084 1
1K
5%
1/16W
MF-LF
402
R3085
100 16 13
OUT
NB_BSEL<1>
1K
NO STUFF
R3087
CPU_BSEL<1>
5%
1/16W
MF-LF
402
IN
R3088 1
1K
OUT
5%
1/16W
MF-LF
402
1K
NB_BSEL<2>
105
R3091 1
CPU_BSEL<2>
2
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402 2
10K
R3034
105 29
BI
CK505_REF0_FSC
(TO/FROM CK505)
FS_C
FS_B
FS_A
33
SB_CLK14P3M_TIMER
5%
1/16W
MF-LF
402
(266.6)
133.3
10 100
P
OUT
CPU MHz
IN
1K
R3035 2
5%
1/16W
MF-LF
402
R3090
0
CK505_FSC
5%
1/16W
MF-LF
402
105 29
IN
105 29
IN
7 25 105
105 29
IN
105 29
IN
105 29
IN
105 29
IN
105 29
IN
105 29
IN
105 29
IN
105 29
IN
105 29
IN
200.0
166.6
(333.3)
100.0
(400.0)
NB_CLK100M_PCIE_P
NB_CLK100M_PCIE_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
CK505_SRC6_P
CK505_SRC6_N
105 29
105 29
IN
IN
PCIE_CLK100M_MINI_P
PCIE_CLK100M_MINI_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
OUT
7 23 105
OUT
7 23 105
OUT
7 16 105
OUT
7 16 105
OUT
34 105
OUT
34 105
10K
NO STUFF
R3053
1
5%
1/16W
MF-LF
402
NO STUFF
R3054
10K
MINI_CLKREQ_L
2
5%
1/16W
MF-LF
402
CK505_CLKREQ6_L
NO STUFF
R3055
ENET_CLKREQ_L
10K
MAKE_BASE=TRUE
OUT
OUT
PM_STPPCI_L
5%
1/16W
MF-LF
402
NO STUFF
R3046
10K
5%
1/16W
MF-LF
402
NO STUFF
R3047
10K
PM_STPCPU_L
2
5%
1/16W
MF-LF
402
Unused Clocks
29
IN
CK505_REF1
TP_CK505_REF1
MAKE_BASE=TRUE
(Spare 14.318MHZ)
R3098
CK505_SRC7_P
CK505_SRC7_N
CK505_SRC8_P
CK505_SRC8_N
PCIE_CLK100M_ENET_P
PCIE_CLK100M_ENET_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
OUT
7 37 105
OUT
7 37 105
OUT
7 51 105
OUT
7 24 105
CK505_DOT96_27M_P
CK505_DOT96_27M_N
TP_CK505_27M_P
TP_CK505_27M_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
CK505_PCIF0_CLK_ITPEN
33
PCI_CLK33M_LPCPLUS
R3027
CK505_PCIF1_CLK
33
PCI_CLK33M_SB
5%
1/16W
MF-LF
402
CK505_PCI1_CLK
Clock Termination
SYNC_MASTER=JAMES
IN
105 29
IN
IN
SYNC_DATE=10/18/2006
MAKE_BASE=TRUE
CK505_PCI2_CLK
TP_PCI_CLK33M_TPM
MAKE_BASE=TRUE
CK505_PCI3_CLK
CK505_PCI4_CLK
33
1
R3030
RSVD
NO STUFF
10K
2
5%
1/16W
MF-LF
402
MAKE_BASE=TRUE
PCI_CLK33M_SMC
2
5%
1/16W
MF-LF
402
7 49 105
SIZE
MAKE_BASE=TRUE
DRAWING NUMBER
SHT
NONE
REV.
051-7229
D
SCALE
R3052
1
5%
1/16W
MF-LF
402
105 29
CK505_SRC5_P
CK505_SRC5_N
MAKE_BASE=TRUE
e
r
=PP1V25R1V05_S0_FSB_NB
R3089
SB_CLK100M_SATA_P
SB_CLK100M_SATA_N
MAKE_BASE=TRUE
NO STUFF
NO STUFF
100 16 13
CK505_SRC4_P
CK505_SRC4_N
5%
1/16W
MF-LF
402 2
CK505_FSB_TEST_MODE
IN
10 100
(TO CK505)
30 14 6
IN
105 29
R3086
1K
OUT
105 29
5%
1/16W
MF-LF
402
m
il
=PP1V25R1V05_S0_FSB_NB
5%
1/16W
MF-LF
402
NB_CLKREQ_L
30 14 6
10K
2
5%
1/16W
MF-LF
402
SB_SATA_CLKREQ_L
CK505_CLKREQ8_L
OUT
R3032
105 29
OUT
1K
2.2K
5%
1/16W
MF-LF
402
0
5%
1/16W
MF-LF
402
R3083 1
R3033
R3082
29 25
29 16
=PP1V25R1V05_S0_FSB_NB
1K
10K
1
=PP3V3_S0_CK505
29 6
105 29
OUT
CK505_CLKREQ1_L
30
OF
33
118
C3131
2.2UF
0.1uF
20%
6.3V
2 CERM1
603
102 17
20%
10V
CERM
402
102 17
7
9
2
102 17 7
102 17 7
MEM_A_DQ<0>
MEM_A_DQ<1>
11
MEM_A_DQS_N<0>
MEM_A_DQS_P<0>
13
15
102 17
102 17
17
MEM_A_DQ<2>
MEM_A_DQ<3>
19
21
102 17
102 17
23
MEM_A_DQ<8>
MEM_A_DQ<9>
25
27
102 17 7
102 17 7
29
MEM_A_DQS_N<1>
MEM_A_DQS_P<1>
31
33
102 17
102 17
35
MEM_A_DQ<10>
MEM_A_DQ<11>
37
39
41
102 17 7
102 17
43
MEM_A_DQ<16>
MEM_A_DQ<17>
45
47
102 17 7
102 17 7
49
MEM_A_DQS_N<2>
MEM_A_DQS_P<2>
51
53
102 17
102 17
55
MEM_A_DQ<18>
MEM_A_DQ<19>
57
59
102 17
102 17 7
61
MEM_A_DQ<24>
MEM_A_DQ<25>
63
65
102 17
67
MEM_A_DM<3>
NC
69
71
102 17
102 17
73
MEM_A_DQ<26>
MEM_A_DQ<27>
75
77
102 33 16
79
MEM_CKE<0>
81
NC
102 33 17
83
85
MEM_A_BS<2>
87
102 33 17
102 33 17
102 33 17
MEM_A_A<12>
MEM_A_A<9>
MEM_A_A<8>
89
91
93
102 33 17
102 33 17
MEM_A_A<5>
MEM_A_A<3>
MEM_A_A<1>
97
99
101
103
102 33 17
102 33 17
102 33 17
MEM_A_A<10>
MEM_A_BS<0>
MEM_A_WE_L
105
107
109
111
102 33 17
102 33 16
MEM_A_CAS_L
MEM_CS_L<1>
113
115
117
102 33 16
MEM_ODT<1>
119
e
r
102 17
102 17
102 17 7
102 17 7
102 17
102 17
102 17
102 17
32 6
102 17
102 17
102 17
102 17
102 17 7
102 17 7
C3140
2.2UF
20%
2 6.3V
CERM1
603
C3141
MEM_A_DQS_N<4>
MEM_A_DQS_P<4>
MEM_A_DQ<34>
MEM_A_DQ<35>
MEM_A_DQ<40>
MEM_A_DQ<41>
MEM_A_DM<5>
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
MEM_A_DQ<42>
MEM_A_DQ<43>
153
155
157
MEM_A_DQ<48>
MEM_A_DQ<49>
159
161
NC
165
167
MEM_A_DQS_N<6>
MEM_A_DQS_P<6>
169
102 17
102 17
173
MEM_A_DQ<50>
MEM_A_DQ<51>
175
177
0.1uF
20%
10V
CERM
402
163
171
=PPSPD_S0_MEM
1
102 17
MEM_A_DQ<32>
MEM_A_DQ<33>
102 17
102 17
179
MEM_A_DQ<56>
MEM_A_DQ<57>
181
183
102 17
185
MEM_A_DM<7>
187
102 17
102 17 7
189
MEM_A_DQ<58>
MEM_A_DQ<59>
191
193
52
52
DQ0
CRITICAL
J3100
F-RT-SM
DQ1
VSS4
DQS0*
DQS0
VSS6
DQ2
DQ3
VSS8
DQ8
DQ9
VSS0
DQ4
DQ5
VSS2
DM0
VSS5
DQ6
DQ7
VSS7
DQ12
DQ13
VSS9
DM1
VSS11
VSS10
DQS1*
DQS1
CK0
CK0*
VSS12
VSS13
DQ10
DQ11
DQ14
DQ15
VSS14
VSS15
KEY
VSS16
DQ16
VSS17
DQ20
DQ17
DQ21
VSS19
NC0
VSS18
DQS2*
DQS2
DM2
VSS21
DQ18
VSS22
DQ22
DQ19
DQ23
VSS23
DQ24
VSS24
DQ28
DQ25
VSS25
DQ29
VSS26
DM3
DQS3*
NC1
VSS27
DQS3
VSS28
DQ26
DQ30
DQ27
VSS29
DQ31
VSS30
CKE0
NC/CKE1
VDD0
NC2
VDD1
NC/A15
BA2
VDD2
NC/A14
VDD3
A12
A11
A9
A8
A7
A6
195
=I2C_DIMMA_SDA
=I2C_DIMMA_SCL
197
199
VDD4
VDD5
A5
A3
A4
A2
A1
A0
VDD6
A10/AP
VDD7
BA1
RAS*
S0*
BA0
WE*
VDD8
VDD9
CAS*
NC/S1*
ODT0
NC/A13
VDD10
VDD11
NC/ODT1
VSS31
NC3
VSS32
DQ32
DQ36
DQ33
VSS33
DQ37
VSS34
DQS4*
DQS4
DM4
VSS35
DQ38
VSS36
DQ34
DQ35
DQ39
VSS37
VSS38
DQ44
DQ40
DQ41
DQ45
VSS39
VSS40
DQS5*
DM5
VSS41
DQS5
VSS42
DQ46
DQ47
DQ42
DQ43
VSS43
VSS44
DQ48
DQ49
DQ52
DQ53
VSS45
VSS46
NC_TEST
VSS47
CK1
CK1*
DQS6*
VSS48
DQS6
VSS49
DM6
VSS50
DQ50
DQ51
DQ54
DQ55
VSS51
VSS52
DQ56
DQ57
DQ60
DQ61
VSS53
VSS54
DM7
VSS55
DQS7*
DQS7
DQ58
VSS56
DQ59
VSS57
DQ62
DQ63
SDA
SCL
VSS58
SA0
VDDSPD
516S0565
GND
SA1
6 31 32
MEM_A_DQ<4>
MEM_A_DQ<5>
17 102
17 102
8
10
MEM_A_DM<0>
17 102
12
14
MEM_A_DQ<6>
MEM_A_DQ<7>
16
17 102
7 17 102
18
20
MEM_A_DQ<12>
MEM_A_DQ<13>
22
17 102
17 102
24
26
MEM_A_DM<1>
17 102
28
30
MEM_CLK_P<0>
MEM_CLK_N<0>
32
y
r
16 102
16 102
34
36
MEM_A_DQ<14>
MEM_A_DQ<15>
38
7 17 102
17 102
32 31 6
40
=PP1V8_S3_MEM
42
R3100
44
MEM_A_DQ<20>
MEM_A_DQ<21>
46
1K
17 102
1%
1/16W
MF-LF
2 402
17 102
48
50
PM_EXTTS_L<0>
MEM_A_DM<2>
16 49
a
n
i
52
54
56
MEM_A_DQ<22>
MEM_A_DQ<23>
58
60
62
MEM_A_DQ<28>
MEM_A_DQ<29>
64
66
68
MEM_A_DQS_N<3>
MEM_A_DQS_P<3>
70
72
74
76
86
94
96
98
102
104
106
MEM_A_BS<1>
MEM_A_RAS_L
MEM_CS_L<0>
108
110
112
114
MEM_ODT<0>
MEM_A_A<13>
116
7 17 102
7 17 102
16 33 102
MEM_A_A<4>
MEM_A_A<2>
MEM_A_A<0>
100
17 102
TP_MEM_A_A<15>
MEM_A_A<14>
MEM_A_A<11>
MEM_A_A<7>
MEM_A_A<6>
92
17 102
16 33 102
88
90
17 102
MEM_CKE<1>
82
84
17 102
17 102
78
80
17 102
MEM_A_DQ<30>
MEM_A_DQ<31>
m
il
95
102 33 17
VREF
VSS1
=PP1V8_S3_MEM
17 102
PP0V9_S3_MEM_A_VREF
=PP0V9_S3_MEM_A_VREF
R3101
1K
1%
1/16W
MF-LF
2 402
17 33 102
17 33 102
17 33 102
17 33 102
32 31 6
=PP1V8_S3_MEM
17 33 102
17 33 102
17 33 102
C3100
10UF
2
16 33 102
C3101
10UF
20%
20%
17 33 102
6.3V
X5R
603
C3110
6.3V
X5R
603
16 33 102
120
17 33 102
NC
122
124
MEM_A_DQ<36>
MEM_A_DQ<37>
126
2
17 102
C3111
1UF
1UF
10%
10%
10%
6.3V
CERM
402
C3114
6.3V
CERM
402
C3115
C3112
1UF
C3113
1UF
10%
6.3V
CERM
402
6.3V
CERM
402
17 102
128
130
MEM_A_DM<4>
134
MEM_A_DQ<38>
MEM_A_DQ<39>
136
1
17 102
7 17 102
138
140
MEM_A_DQ<44>
MEM_A_DQ<45>
142
17 102
132
C3116
C3117
1UF
1UF
1UF
1UF
10%
10%
10%
10%
6.3V
CERM
402
C3118
6.3V
CERM
402
C3119
6.3V
CERM
402
6.3V
CERM
402
17 102
17 102
144
146
MEM_A_DQS_N<5>
MEM_A_DQS_P<5>
148
1
7 17 102
1UF
10%
7 17 102
6.3V
2 CERM
150
152
MEM_A_DQ<46>
MEM_A_DQ<47>
154
1UF
10%
10%
6.3V
2 CERM
402
C3120
1UF
402
C3121
1UF
10%
6.3V
2 CERM
402
6.3V
CERM
402
17 102
7 17 102
156
158
MEM_A_DQ<52>
MEM_A_DQ<53>
160
17 102
C3122
1UF
17 102
10%
2 6.3V
CERM
164
MEM_CLK_P<1>
MEM_CLK_N<1>
166
2 6.3V
CERM
402
16 102
C3123
1UF
10%
162
402
16 102
168
170
MEM_A_DM<6>
17 102
172
174
MEM_A_DQ<54>
MEM_A_DQ<55>
176
7 17 102
17 102
178
180
MEM_A_DQ<60>
MEM_A_DQ<61>
182
17 102
SYNC_MASTER=JAMES
SYNC_DATE=10/17/06
17 102
184
186
MEM_A_DQS_N<7>
MEM_A_DQS_P<7>
188
7 17 102
7 17 102
190
192
MEM_A_DQ<62>
MEM_A_DQ<63>
194
196
ADDR=0xA0(WR)/0xA1(RD)
198
MEM_A_SA<0>
MEM_A_SA<1>
200
R3140
1
1/16W 5%
10K
2
2
1/16W 5%
SIZE
MF-LF 402
MF-LF 402
10K
R3141
DRAWING NUMBER
SCALE
REV.
051-7229
SHT
NONE
31
VOLTAGE=0.9V
TRUE
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.25MM
118
205
C3130
204
DDR2-SODIMM-M72
=PP1V8_S3_MEM
5
32 31 6
=PP0V9_S3_MEM_A_VREF
203
Page Notes
31
202
201
31
OF
33
118
C3231
2.2UF
0.1uF
20%
6.3V
2 CERM1
603
102 17
20%
10V
CERM
402
102 17
7
9
2
102 17 7
102 17 7
MEM_B_DQ<0>
MEM_B_DQ<1>
11
MEM_B_DQS_N<0>
MEM_B_DQS_P<0>
13
15
102 17
102 17
17
MEM_B_DQ<2>
MEM_B_DQ<3>
19
21
102 17 7
102 17
23
MEM_B_DQ<8>
MEM_B_DQ<9>
25
27
102 17 7
102 17 7
29
MEM_B_DQS_N<1>
MEM_B_DQS_P<1>
31
33
102 17
102 17
35
MEM_B_DQ<10>
MEM_B_DQ<11>
37
39
41
102 17
102 17
43
MEM_B_DQ<16>
MEM_B_DQ<17>
45
47
102 17 7
102 17 7
49
MEM_B_DQS_N<2>
MEM_B_DQS_P<2>
51
53
102 17
102 17
55
MEM_B_DQ<18>
MEM_B_DQ<19>
57
59
102 17
102 17 7
61
MEM_B_DQ<24>
MEM_B_DQ<25>
63
65
102 17
67
MEM_B_DM<3>
NC
69
71
102 17
102 17
73
MEM_B_DQ<26>
MEM_B_DQ<27>
75
77
102 33 16
79
MEM_CKE<3>
81
NC
102 33 17
83
85
MEM_B_BS<2>
87
102 33 17
102 33 17
102 33 17
MEM_B_A<12>
MEM_B_A<9>
MEM_B_A<8>
89
91
93
102 33 17
102 33 17
MEM_B_A<5>
MEM_B_A<3>
MEM_B_A<1>
97
99
101
103
102 33 17
102 33 17
102 33 17
MEM_B_A<10>
MEM_B_BS<0>
MEM_B_WE_L
105
107
109
111
102 33 17
102 33 16
MEM_B_CAS_L
MEM_CS_L<3>
113
115
117
102 33 16
MEM_ODT<3>
119
e
r
102 17
102 17
102 17 7
102 17 7
102 17
102 17
102 17
102 17
32 31 6
102 17
102 17
102 17
102 17 7
102 17
102 17 7
102 17 7
C3240
2.2UF
20%
6.3V
2 CERM1
603
C3241
MEM_B_DQS_N<4>
MEM_B_DQS_P<4>
MEM_B_DQ<34>
MEM_B_DQ<35>
MEM_B_DQ<40>
MEM_B_DQ<41>
MEM_B_DM<5>
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
MEM_B_DQ<42>
MEM_B_DQ<43>
153
155
157
MEM_B_DQ<48>
MEM_B_DQ<49>
159
161
NC
165
167
MEM_B_DQS_N<6>
MEM_B_DQS_P<6>
169
102 17
102 17
173
MEM_B_DQ<50>
MEM_B_DQ<51>
175
177
102 17
102 17
179
MEM_B_DQ<56>
MEM_B_DQ<57>
181
183
102 17
185
MEM_B_DM<7>
187
0.1uF
20%
10V
CERM
402
163
171
=PPSPD_S0_MEM
1
MEM_B_DQ<32>
MEM_B_DQ<33>
102 17
2
102 17
189
MEM_B_DQ<58>
MEM_B_DQ<59>
191
193
52
52
DQ0
CRITICAL
J3200
F-RT-SM
DQ1
VSS4
DQS0*
DQS0
VSS6
DQ2
DQ3
VSS8
DQ8
DQ9
VSS0
DQ4
DQ5
VSS2
DM0
VSS5
DQ6
DQ7
VSS7
DQ12
DQ13
VSS9
DM1
VSS11
VSS10
DQS1*
DQS1
CK0
CK0*
VSS12
VSS13
DQ10
DQ11
DQ14
DQ15
VSS14
VSS15
KEY
VSS16
DQ16
VSS17
DQ20
DQ17
DQ21
VSS19
NC0
VSS18
DQS2*
DQS2
DM2
VSS21
DQ18
VSS22
DQ22
DQ19
DQ23
VSS23
DQ24
VSS24
DQ28
DQ25
VSS25
DQ29
VSS26
DM3
DQS3*
NC1
VSS27
DQS3
VSS28
DQ26
DQ30
DQ27
VSS29
DQ31
VSS30
CKE0
NC/CKE1
VDD0
NC2
VDD1
NC/A15
BA2
VDD2
NC/A14
VDD3
A12
A11
A9
A8
A7
A6
MEM_B_DQ<4>
MEM_B_DQ<5>
195
=I2C_DIMMB_SDA
=I2C_DIMMB_SCL
197
199
VDD4
VDD5
A5
A3
A4
A2
A1
A0
VDD6
A10/AP
VDD7
BA1
RAS*
S0*
BA0
WE*
VDD8
VDD9
CAS*
NC/S1*
ODT0
NC/A13
VDD10
VDD11
NC/ODT1
VSS31
NC3
VSS32
DQ32
DQ36
DQ33
VSS33
DQ37
VSS34
DQS4*
DQS4
DM4
VSS35
DQ38
VSS36
DQ34
DQ35
DQ39
VSS37
VSS38
DQ44
DQ40
DQ41
DQ45
VSS39
VSS40
DQS5*
DM5
VSS41
DQS5
VSS42
DQ46
DQ47
DQ42
DQ43
VSS43
VSS44
DQ48
DQ49
DQ52
DQ53
VSS45
VSS46
NC_TEST
VSS47
CK1
CK1*
DQS6*
VSS48
DQS6
VSS49
DM6
VSS50
DQ50
DQ51
DQ54
DQ55
VSS51
VSS52
DQ56
DQ57
DQ60
DQ61
VSS53
VSS54
DM7
VSS55
DQS7*
DQS7
DQ58
VSS56
DQ59
VSS57
DQ62
DQ63
SDA
SCL
VSS58
SA0
VDDSPD
516S0565
GND
SA1
6 31 32
17 102
17 102
8
10
MEM_B_DM<0>
17 102
12
14
MEM_B_DQ<6>
MEM_B_DQ<7>
16
7 17 102
17 102
18
20
MEM_B_DQ<12>
MEM_B_DQ<13>
22
17 102
17 102
24
26
MEM_B_DM<1>
17 102
28
30
MEM_CLK_P<3>
MEM_CLK_N<3>
32
y
r
16 102
16 102
34
36
MEM_B_DQ<14>
MEM_B_DQ<15>
38
17 102
17 102
40
42
32 31 6
44
MEM_B_DQ<20>
MEM_B_DQ<21>
46
17 102
17 102
50
PM_EXTTS_L<1>
MEM_B_DM<2>
R3200
1K
16 49
a
n
i
52
54
56
MEM_B_DQ<22>
MEM_B_DQ<23>
58
60
62
66
68
7 17 102
17 102
17 102
MEM_B_DQS_N<3>
MEM_B_DQS_P<3>
70
72
74
76
86
MEM_CKE<4>
16 33 102
TP_MEM_B_A<15>
MEM_B_A<14>
16 33 102
88
90
7 17 102
17 102
82
84
7 17 102
MEM_B_DQ<30>
MEM_B_DQ<31>
78
80
17 102
MEM_B_A<11>
MEM_B_A<7>
MEM_B_A<6>
92
94
96
98
102
104
106
110
112
114
=PP0V9_S3_MEM_B_VREF
R3201
1K
1%
1/16W
MF-LF
2 402
17 33 102
32 31 6
=PP1V8_S3_MEM
17 33 102
17 33 102
17 33 102
C3200
10UF
2
16 33 102
C3201
10UF
20%
17 33 102
20%
6.3V
X5R
603
C3210
6.3V
X5R
603
16 33 102
17 33 102
118
120
NC
122
124
MEM_B_DQ<36>
MEM_B_DQ<37>
126
17 102
C3211
1UF
1UF
10%
10%
10%
6.3V
CERM
402
C3214
6.3V
CERM
402
C3215
C3212
1UF
C3213
1UF
10%
6.3V
CERM
402
6.3V
CERM
402
17 102
128
130
MEM_B_DM<4>
134
MEM_B_DQ<38>
MEM_B_DQ<39>
136
7 17 102
17 102
138
140
MEM_B_DQ<44>
MEM_B_DQ<45>
142
17 102
132
C3216
C3217
1UF
1UF
1UF
1UF
10%
10%
10%
10%
6.3V
CERM
402
C3218
6.3V
CERM
402
C3219
6.3V
CERM
402
6.3V
CERM
402
7 17 102
17 102
144
146
MEM_B_DQS_N<5>
MEM_B_DQS_P<5>
148
7 17 102
7 17 102
1UF
1UF
10%
10%
10%
6.3V
2 CERM
150
6.3V
2 CERM
402
152
MEM_B_DQ<46>
MEM_B_DQ<47>
154
C3220
1UF
402
C3221
1UF
10%
6.3V
2 CERM
402
6.3V
CERM
402
17 102
17 102
156
158
MEM_B_DQ<52>
MEM_B_DQ<53>
160
17 102
C3222
1UF
17 102
164
MEM_CLK_P<4>
MEM_CLK_N<4>
10%
166
2 6.3V
CERM
402
16 102
C3223
1UF
10%
2 6.3V
CERM
162
402
16 102
168
170
MEM_B_DM<6>
17 102
172
174
MEM_B_DQ<54>
MEM_B_DQ<55>
176
17 102
17 102
178
180
MEM_B_DQ<60>
MEM_B_DQ<61>
182
17 102
SYNC_MASTER=JAMES
186
=PPSPD_S0_MEM
MEM_B_DQS_N<7>
MEM_B_DQS_P<7>
188
7 17 102
196
7 17 102
17 102
R3240
2
198
1
MEM_B_SA<0>
1/16W 5%
MEM_B_SA<1>
200
6 31 32
R3241
10K
MEM_B_DQ<62>
MEM_B_DQ<63>
194
7 17 102
190
192
SYNC_DATE=10/17/06
17 102
184
5%
1/16W
MF-LF
402
10K
SIZE
MF-LF 402
ADDR=0XA4(WR)/0XA5(RD)
DRAWING NUMBER
SCALE
REV.
051-7229
SHT
NONE
32
MIN_LINE_WIDTH=0.25MM
MIN_NECK_WIDTH=0.25MM
17 33 102
MEM_ODT<2>
MEM_B_A<13>
116
PP0V9_S3_MEM_B_VREF
VOLTAGE=0.9V
TRUE
17 33 102
MEM_B_BS<1>
MEM_B_RAS_L
MEM_CS_L<2>
108
1%
1/16W
MF-LF
2 402
17 33 102
MEM_B_A<4>
MEM_B_A<2>
MEM_B_A<0>
100
17 102
17 102
MEM_B_DQ<28>
MEM_B_DQ<29>
64
=PP1V8_S3_MEM
48
m
il
95
102 33 17
VREF
VSS1
=PP1V8_S3_MEM
205
C3230
204
DDR2-SODIMM-M72
=PP1V8_S3_MEM
5
32 31 6
=PP0V9_S3_MEM_B_VREF
203
Page Notes
32
202
201
32
OF
33
118
One cap for each side of every RPAK, one cap for every two discrete resistors
Ensure CS_L and ODT resistors are close to SO-DIMM connector
102 31 16
IN
102 31 16
IN
102 32 16
102 32 16
IN
102 31 16
IN
102 31 16
IN
102 32 16
IN
102 32 16
IN
IN
102 31 16
IN
102 31 16
IN
102 32 16
IN
102 32 16
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 17
IN
102 31 16
IN
RP3346
RP3330
RP3362
RP3310
MEM_CS_L<0>
MEM_CS_L<1>
MEM_CS_L<2>
MEM_CS_L<3>
56
56
56
56
=PP0V9_S0M_MEM_TERM
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
R3300
R3301
R3302
R3303
RP3346
R3304
RP3362
R3305
MEM_ODT<0>
MEM_ODT<1>
MEM_ODT<2>
MEM_ODT<3>
56
56
56
56
56
56
56
56
RP3342
RP3358
RP3342
RP3358
RP3342
RP3358
RP3300
RP3300
RP3305
RP3305
RP3358
RP3300
RP3305
RP3346
RP3300
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
SM-LF
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
0.1uF
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
20%
10V
CERM
402
IN
102 31 17
IN
102 31 17
IN
5%
7
5%
5%
1/16W
1/16W
1/16W
1/16W
SM-LF
MF-LF
RP3330
RP3342
RP3305
56
56
56
SM-LF
MF-LF
IN
102 31 17
IN
102 31 17
IN
MEM_A_RAS_L
MEM_A_CAS_L
MEM_A_WE_L
RP3346
RP3330
RP3330
402
1
5%
1/16W
SM-LF
5%
1/16W
SM-LF
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
102 32 16
IN
102 32 17
IN
102 32 17
IN
102 32 17
IN
MEM_B_A<0>
MEM_B_A<1>
MEM_B_A<2>
MEM_B_A<3>
MEM_B_A<4>
MEM_B_A<5>
MEM_B_A<6>
MEM_B_A<7>
MEM_B_A<8>
MEM_B_A<9>
MEM_B_A<10>
MEM_B_A<11>
MEM_B_A<12>
MEM_B_A<13>
MEM_B_A<14>
RP3350
RP3334
RP3350
RP3334
RP3350
RP3334
RP3338
RP3338
RP3354
RP3354
RP3334
RP3338
RP3354
RP3362
RP3338
56
56
56
56
56
56
56
56
56
56
56
56
56
56
56
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
RP3310
RP3350
RP3354
56
56
56
IN
102 32 17
IN
102 32 17
IN
RP3362
RP3310
RP3310
MEM_B_RAS_L
MEM_B_CAS_L
MEM_B_WE_L
56
56
56
y
r
0.1uF
2
20%
10V
CERM
402
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
5%
1/16W
SM-LF
5%
1/16W
SM-LF
C3310
20%
10V
CERM
402
C3312
C3330
20%
10V
CERM
402
C3334
20%
10V
CERM
402
C3338
SM-LF
20%
10V
CERM
402
C3342
20%
10V
CERM
402
C3346
20%
10V
CERM
402
C3350
7
7
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
5%
1/16W
SM-LF
0.1uF
5%
1/16W
SM-LF
20%
10V
CERM
402
5
8
5%
1/16W
5%
1/16W
SM-LF
5%
1/16W
SM-LF
C3332
0.1uF
20%
10V
CERM
402
C3336
0.1uF
20%
10V
CERM
402
C3340
SM-LF
20%
10V
CERM
402
C3344
0.1uF
20%
10V
CERM
402
C3348
0.1uF
20%
10V
CERM
402
C3352
0.1uF
20%
10V
CERM
402
C3354
C3358
C3362
20%
10V
CERM
402
C3356
0.1uF
20%
10V
CERM
402
C3360
0.1uF
20%
10V
CERM
402
C3364
0.1uF
20%
10V
CERM
402
0.1uF
2
0.1uF
20%
10V
CERM
402
0.1uF
0.1uF
20%
10V
CERM
402
0.1uF
0.1uF
0.1uF
102 32 17
C3307
0.1uF
MEM_B_BS<0>
MEM_B_BS<1>
MEM_B_BS<2>
0.1uF
e
r
102 32 17
56
56
56
20%
10V
CERM
402
a
n
i
102 31 17
0.1uF
0.1uF
402
m
il
MEM_A_BS<0>
MEM_A_BS<1>
MEM_A_BS<2>
C3302
C3305
5%
102 31 17
20%
10V
CERM
402
5%
MEM_A_A<0>
MEM_A_A<1>
MEM_A_A<2>
MEM_A_A<3>
MEM_A_A<4>
MEM_A_A<5>
MEM_A_A<6>
MEM_A_A<7>
MEM_A_A<8>
MEM_A_A<9>
MEM_A_A<10>
MEM_A_A<11>
MEM_A_A<12>
MEM_A_A<13>
MEM_A_A<14>
1/16W
0.1uF
2
5%
MEM_CKE<0>
MEM_CKE<1>
MEM_CKE<3>
MEM_CKE<4>
C3300
0.1uF
2
20%
10V
CERM
402
C3368
5%
1/16W
SM-LF
5%
1/16W
SM-LF
0.1uF
0.1uF
5%
1/16W
SM-LF
20%
10V
CERM
402
20%
10V
CERM
402
C3366
SYNC_MASTER=JAMES
SYNC_DATE=12/04/2006
C3370
0.1uF
2
20%
10V
CERM
402
SIZE
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
33
OF
33
118
y
r
=PP3V3_S3_MINI 6
----------------------------------------3.3V S3 CURRENT
D0-D2,D3HOT
D3COLD |
MAX CONT.
1100MA
250MA |
MAX PEAK
2750MA
2750MA |
|
1.5V CURRENT
|
MAX CONT.
375MA
N/A
|
MAX PEAK
500MA
N/A
|
----------------------------------------NOTE: CURRENT DATA PER 5/16/2005 PCIE MINI CEM ECN
|
|
|
|
|
|
|
NO STUFF
0
54
37 25
R3401
2
5%
1/16W
MF-LF
402
OUT
30
105 30
105 30
OUT
PCIE_WAKE_L
RSVD_MINI_WLAN_ACTIVE
RSVD_MINI_BT_ACTIVE
MINI_CLKREQ_L
PCIE_CLK100M_MINI_N
PCIE_CLK100M_MINI_P
IN
IN
10
11
12
13
14
16
15
104 24 7
104 24 7
OUT
PCIE_MINI_D2R_N
OUT
PCIE_MINI_D2R_P
RESERVED
RESERVED
0.1uF
PCIE_MINI_R2D_C_N
PCIE_MINI_R2D_N
108 PCIE_MINI_R2D_P
108
10%
16V
X5R
402
C3430
0.1uF
104 24
IN
PCIE_MINI_R2D_C_P
2
10%
16V
X5R
402
e
r
25
CLINK_WLAN_CLK
25
CLINK_WLAN_DATA
25
CLINK_WLAN_RESET_L
TP_CLINK_WLAN_CLK
MAKE_BASE=TRUE
TP_CLINK_WLAN_DATA
MAKE_BASE=TRUE
NC
NC
NC
NC
20
21
22
23
24
0.1uF
20%
10V
CERM 2
402
NC
MINI_RESET_L
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
10uF
20%
6.3V 2
X5R
603
C3400 1 C3401 1
18
19
20%
10V
CERM 2
402
IN
28
=SMBUS_MINI_SCL
=SMBUS_MINI_SDA
IN
52
BI
52
USB_MINI_N
USB_MINI_P
BI
24 103
BI
24 103
NC
NC
NC
=PP1V5_S0_MINI 6
10uF
20%
6.3V 2
X5R
603
53
516S0391
SDF3400_1
860-0691
1
R3410
TP_CLINK_WLAN_RESET_L
MAKE_BASE=TRUE
KEY
NC
NC
NC
NC
NC
m
il
C3431
IN
17
25
104 24
NC
NC
0.1uF
PP1V05_S0
F-RT-SM
NO STUFF
C3420 1 C3421 1
a
n
i
ASOB226-S80N-7F
5%
1/16W
MF-LF
402
20%
10V
CERM 2
402
J3400
0.1uF
CRITICAL
R3400
1
C3410 1
5%
1/16W
MF-LF
2 402
SYNC_DATE=10/30/2006
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7229
33
OF
34
118
Page Notes
Power aliases required by this page:
- =PP3V3_ENET_PHY
(EC
/ Ultra)
- =PP1V9R2V5_ENET_PHY
(2.5V / 1.8V)
- =YUKON_EC_PP2V5_ENET
(2.5V / GND)
- =PP1V2_ENET_PHY
31
Yukon EC
No link:
10 Mbps:
100 Mbps:
1000 Mbps:
171
179
203
426
mA
mA
mA
mA
No link:
10 Mbps:
100 Mbps:
1000 Mbps:
130
130
150
290
NOSTUFF
mA
mA
mA
mA
C3700
4.7UF
20%
6.3V
CERM
603
C3701
C3702
C3703
C3704
C3705
C3706
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
0.1UF
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
31
No link:
10 Mbps:
100 Mbps:
1000 Mbps:
60
70
70
80
mA
mA
mA
mA
C3710
20%
6.3V
CERM
603
C3712
C3713
C3714
0.1UF
0.1UF
0.1UF
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
10%
16V
X5R
402
C3721
C3722
C3723
0.1UF
PP1V9R2V5_ENET_PHY_AVDD
a
n
i
2
10%
0.1uF
IN
PCIE_ENET_R2D_C_P
C3736
C3730
IN
C3731
PCIE_ENET_R2D_C_N
2
10%
66
16V
X5R
PCIE_ENET_D2R_C_P
PCIE_ENET_D2R_C_N
49
50
TX_P
16V
X5R
2
10%
0.1uF
66 3
16V
X5R
PCIE_ENET_R2D_P
PCIE_ENET_R2D_N
54
IN
67 25 3
IN
PCIE_CLK100M_ENET_P
PCIE_CLK100M_ENET_N
31
OUT
=ENET_CLKREQ_L
29 20
OUT
PCIE_WAKE_L
IN
ENET_RESET_L
23 3
66 32
BI
66 32
BI
66 32
BI
66 32
BI
66 32
BI
66 32
BI
66 32
BI
66 32
BI
53
m
il
ENET_MDI_P<0>
ENET_MDI_N<0>
56
REFCLKN
42
CLKREQ*
17
18
ENET_MDI_P<1>
ENET_MDI_N<1>
20
21
e
r
ENET_MDI_P<2>
ENET_MDI_N<2>
ENET_MDI_P<3>
ENET_MDI_N<3>
R3740
49.9
1%
1/16W
MF-LF
2 402
R3741
49.9
1%
1/16W
MF-LF
402 2
49.9
1%
1/16W
MF-LF
2 402
ENET_MDI0
1
C3740
0.001UF
10%
50V
CERM
402
R3742
R3743
49.9
0.001UF
10%
50V
CERM
402
R3744
1%
1/16W
MF-LF
2 402
R3745
49.9
1%
1/16W
MF-LF
402 2
C3744
1%
1/16W
MF-LF
2 402
ENET_MDI3
0.001UF
10%
50V
CERM
402
R3746
49.9
ENET_MDI2
P
C3742
49.9
1%
1/16W
MF-LF
402 2
ENET_MDI1
1
C3746
0.001UF
R3747
ENET_CLK25M_XTALI
ENET_CLK25M_XTALO
49.9
1%
1/16W
MF-LF
402 2
58
48
44
12
VMAIN_AVLBL
47
SWITCH_VCC
11
EC:CTRL25
PCI EXPRESS
EC:NO CONNECT
WAKE*
LED
PERST*
MDIP0
MDIN0
SPI
NC
MDIP2
MDIN2
30
MDIP3
31
MDIN3
15
XTALI
14
XTALO
TWSI
RSET
16
YUKON_RSET
63
(IPU)
SPI_DO
34
(IPU)
SPI_DI
SPI_CLK
35
62
37
(IPU)
SPI_CS
36
(IPU)
VPD_CLK
38
(IPU)
VPD_DATA
41
(IPD)
TESTMODE
46
RSVD_24
24
RSVD_25
RSVD_29
25
RSVD_43
43
29
Y3750
NC
NC
NC
NC
5%
50V
CERM
402
10%
50V
CERM
402
C3780
R3765
4.99K
32
32
32
1%
1/16W
MF-LF
402
10%
16V
X5R
402
NC
NC
5%
50V
CERM
402
5%
1/16W
MF-LF
402
VCC
2
1
7
4.7K
8
C3751
B
R3780
0.1UF
27PF
32
VPD ROM
197S0167
CL = 20PF
31
YUKON_VPD_CLK
YUKON_VPD_DATA
SM-3-LF
27PF
31
OUT
NC
NC
NC
NC
25.0000M
C3750
OUT
YUKON_ULTRA
ENET_LED_ACT_L
ENET_LED_LINK10_100_L
ENET_LED_LINK1000_L
ENET_LED_LINK_L
THRML_PAD
CRITICAL
NC
TP_YUKON_CTRL18
TP_YUKON_CTRL12
LED_DUPLEX*
ENET_LOM_DIS_L
60
MAIN CLK
5%
1/16W
MF-LF
402
59
TEST/RSVD
4.7K
CTRL12
LED_ACT*
MEDIA
R3760 1
CTRL18
LED_LINK10/100*
LED_LINK1000*
(IPU)
MDIP1
MDIN1
27
26
VDD6
VDD7
33
39
VDD5
13
VDD2
VDD3
VDD4
VAUX_AVLBL
SWITCH_VAUX
ANALOG
REFCLKP
10
RX_N
55
LOM_DISABLE*
QFN
402
88E8058
RX_P
U3700
402
66 3
CRITICAL
OMIT
TX_N
402
2
10%
0.1uF
66 19
402
66
0.1uF
X5R
65
PCIE_ENET_D2R_N
EC:AVDD 2.5V
16V
VDD0
VDD1
NC_32
NC_51
C3735
61
=YUKON_EC_PP2V5_ENET
AVDDH
10%
16V
X5R
402
45
0.1UF
2
40
C3724
VDDO_TTL3
10%
16V
X5R
402
VDDO_TTL1
VDDO_TTL2
0.1UF
10%
16V
X5R
402
28
0.1UF
10%
16V
X5R
402
VDDO_TTL0
0.1UF
23
20%
6.3V
CERM
603
AVDD3
4.7UF
22
C3720
(EC:2.5V)
mA
mA
mA
mA
19
MIN_LINE_WIDTH=0.4 mm
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=1.8V
AVDD1
AVDD2
No link:
0
10 Mbps:
30
100 Mbps:
40
1000 Mbps: 150
32
64
PCIE_ENET_D2R_P
OUT
y
r
C3715
0.1UF
32
31
C3711
AVDD0
5%
1/16W
Yukon Ultra (1.8V) MF-LF
402
No link:
82 mA
10 Mbps:
108 mA
100 Mbps: 126 mA
1000 Mbps: 218 mA
R3720
=PP1V9R2V5_ENET_PHY
Yukon EC (2.5V)
4.7UF
57
mA
mA
mA
mA
52
4
4
4
4
66 19 3
10%
16V
X5R
402
=PP3V3_ENET_PHY
51
No link:
10 Mbps:
100 Mbps:
1000 Mbps:
31
OUT
0.1UF
2
Yukon Ultra
NC_57
NC_64
Yukon EC
66 19 3
C3708
C3707
0.1UF
NC_52
=PP1V2_ENET_PHY
Yukon Ultra
E2
NC1 OMIT SDA
NC0 U3780 SCL
M24C08
SO8
WC*
R3781
4.7K
5%
1/16W
MF-LF
402
5
6
CRITICAL
VSS
4
PART NUMBER
REFERENCE DES
CRITICAL
338S0386
QTY
1
DESCRIPTION
U3700
CRITICAL
BOM OPTION
YUKON_ULTRA
341S2060
U3780
CRITICAL
YUKON_ULTRA
338S0270
U3700
CRITICAL
YUKON_EC
341S1797
IC,EEPROM,SERIAL IIC,8KBIT,SO8
U3780
CRITICAL
YUKON_EC
114S0285
RES,4.87K,1%,1/16W,0402,LF
R3760
Ethernet (Yukon)
YUKON_EC
SYNC_MASTER=DOUG
SYNC_DATE=11/08/2006
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7229
33
OF
37
118
=PP3V3_ENET_PHY
y
r
YUKON_ULTRA
30
R3880
25
ENET_CLKREQ_L
FERR-330-OHM-1.5A
=PP3V3_S3_ENET
PP3V3_S3_ENET_O
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
0805-1
1
C3800
22UF
20%
6.3V
2 CERM-X5R
805-1
C3801
0.1UF
C3802
22UF
C3803
4.7UF
20%
6.3V
2 CERM-X5R
805-1
10%
16V
2 X5R
402
ENET_CLKREQ_R_L
MAKE_BASE=TRUE
5%
1/16W
MF-LF
402
L3800
32 31 2
C3804
R38011
0.1UF
20%
6.3V
2 CERM
603
4.7K
10%
16V
2 X5R
402
5%
1/16W
MF-LF
402 2
3
1
a
n
i
Q3800
31
PBSS5540Z
SOT223
31 ENET_CTRL19R25
PP1V9R2V5_S3_ENET 31
NOSTUFF
1
C3805
4.7UF
NOSTUFF
C3806
0.1UF
10%
16V
2 X5R
402
20%
6.3V
2 CERM
603
NOSTUFF
1
PP1V9R2V5_S3_ENET
MAKE_BASE=TRUE
30
=PP1V9R2V5_ENET_PHY
30
YUKON_EC
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=2.5V
R38901
C3807
10UF
20%
6.3V
2 CERM
805-1
PP1V9R2V5_S3_ENET_R
5%
1/10W
MF-LF
603 2
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=2.5V
m
il
e
r
=ENET_CLKREQ_L
=YUKON_EC_PP2V5_ENET
YUKON_EC
1
C3890
0.1UF
10%
2 16V
X5R
402
30
YUKON_EC
1
C3891
0.001UF
10%
2 50V
CERM
402
=PP1V8_S3_ENET
R3820
1
0
32 31 2
=PP3V3_S3_ENET
R3821
1
1/10W
603
1/10W
603
NOSTUFF
L3810
FERR-330-OHM-1.5A
PPV_S3_ENET_R
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
P
C3810
22UF
20%
2 6.3V
CERM-X5R
805-1
C3811
0.1UF
10%
2 16V
X5R
402
TP_YUKON_CTRL18
ENET_CTRL19R25
C3812
22UF
20%
2 6.3V
CERM-X5R
805-1
C3813
4.7UF
C3814
0.1UF
20%
2 6.3V
CERM
603
30
TP_YUKON_CTRL12
ENET_CTRL12
31
MAKE_BASE=TRUE
R38111
4.7K
10%
2 16V
X5R
402
31
31
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
0805-1
30
PPV_S3_ENET_O
YUKON T9 ALIASES
5%
1/16W
MF-LF
402 2
30
3
1
=ENET_VMAIN_AVLBL
=PP3V3_S0_ENET
Q3810
PBSS5540Z
SOT223
ENET_CTRL12
=PP1V2_ENET_PHY
30
PP1V2_S3_ENET
NOSTUFF
1
C3815
4.7UF
20%
2 6.3V
CERM
603
C3816
0.1UF
10%
2 16V
X5R
402
C3817
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=1.2V
10UF
20%
2 6.3V
CERM
805-1
YUKON/ULTRA SUPPORT
SYNC_MASTER=DOUG
SYNC_DATE=(10/02/2006)
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7229
33
OF
38
118
L3900
FERR-0.5A-600-OHM
30
PP1V9R2V5_ENET_PHY_AVDD
PP2V5_ENET_CTAP
MIN_LINE_WIDTH=0.50mm
MIN_NECK_WIDTH=0.38mm
VOLTAGE=2.5V
0805
C3900
0.1UF
C3901
0.001UF
20%
2 10V
CERM
402
C3902
0.001UF
10%
2 50V
CERM
402
10%
2 50V
CERM
402
C3903
a
n
i
CRITICAL
T3900
LFE9245A-AP
66 30
ENET_MDI_N<0>
66 30
ENET_MDI_P<0>
y
r
0.001UF
10%
2 50V
CERM
402
SOI
1CT:1CT
14 MX4+
TD4+ 11
15 MCT4
TCT4 10
13 MX4-
TD4- 12
70
70
ENET_MDI_T_N<0>
(514-0401)
CRITICAL
ENET_MDI_T_P<0>
J3900
RJ45-M72
1CT:1CT
17 MX3+
TD3+ 8
18 MCT3
TCT3 7
16 MX3-
TD3- 9
66 30
ENET_MDI_N<1>
66 30
ENET_MDI_P<1>
66 30
ENET_MDI_N<2>
1CT:1CT
20 MX2+
70
ENET_MDI_T_N<1>
70
ENET_MDI_T_P<1>
F-ANG-TH
9
m
il
21 MCT2
TD2+ 5
70
ENET_MDI_T_N<2>
TCT2 4
66 30
ENET_MDI_P<2>
19 MX2-
66 30
ENET_MDI_N<3>
1CT:1CT
23 MX1+
66 30
ENET_MDI_P<3>
TD2- 6
24 MCT1
TD1+ 2
ENET_MDI_T_P<2>
70
ENET_MDI_T_N<3>
10
11
TCT1 1
e
r
22 MX1-
TD1- 3
ENET_MDI_T_P<3>
SYM (2 OF 2)
31 2
=PP3V3_S3_ENET
DEVELOPMENT
DEVELOPMENT
R3901
R3902
330
330
5%
1/10W
MF-LF
2 603
5%
1/10W
MF-LF
2 603
LED4300_1
DEVELOPMENT
LED4301_1
DEVELOPMENT 1
DEVELOPMENT 1
LED3901
LED3902
GREEN-3.6MCD
2.0X1.25MM-SM
GREEN-3.6MCD
2.0X1.25MM-SM
30
30
30
30
R3904
330
330
5%
1/10W
MF-LF
2 603
5%
1/10W
MF-LF
2 603
LED4302_1
GREEN-3.6MCD
2.0X1.25MM-SM
2
DEVELOPMENT
R3903
LED3900
DEVELOPMENT
LED4303_1
GND_CHASSIS_ENET
4 32
ENET_CTAP_<0>
ENET_CTAP_<1>
ENET_CTAP_<2>
ENET_CTAP_<3>
1
5%
1/16W
MF-LF
2 402
75
5%
1/16W
MF-LF
2 402
75
5%
1/16W
MF-LF
2 402
75
5%
1/16W
MF-LF
2 402
C3910
0.001UF
ENET_CTAP_COMMON
GND_CHASSIS_ENET
4 32
20%
2KV
CERM
1808
DEVELOPMENT 1
ETHERNET CONNECTOR
LED3903
GREEN-3.6MCD
2.0X1.25MM-SM
SYNC_MASTER=DOUG
SYNC_DATE=11/06/2006
ENET_LED_ACT_L
MAKE_BASE=TRUE
ENET_LED_LINK10_100_L
MAKE_BASE=TRUE
ENET_LED_LINK1000_L
MAKE_BASE=TRUE
ENET_LED_LINK_L
MAKE_BASE=TRUE
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
39
OF
33
118
=PP3V3_S5_FW
D
PP1V0_S5_FW_DVDD
D
42
PP1V0_S5_FW_AVDD
42
42
43
43
43
43
43
43
43
43
FW_PORTS_VP_R
43
43
R4001
R4002
390K
5%
1/16W
MF-LF
2 402
43
43
2.94K
1%
1/16W
MF-LF
2 402
43
43
43
43
1%
1/16W
MF-LF
402
B7 TPBIAS0
C3 TPBIAS1
A2 TPBIAS2
C4000
R4000
22PF
1
FW_XO_R
Y4000
412
FW_XO
FW_XI
TP_FW_SE
TP_FW_SM
PD INTERNAL TP_FW_MODE_A
7 TP_FW_CE
PU INTERNAL TP_FW_FW620_L
TP_FW_JASI_EN
TP_FW_AVREG
TP_FW_VBUF
FW_PU_RST_L
7
7
HC49-USMD
2
5%
50V
CERM
402
C4090
0.33UF
10%
6.3V
2 CERM-X5R
402
FW_OCR10_CTL
R4090
470K
5%
1/16W
MF-LF
2 402
K12
L6
L9
L5
L10
BGA
N8
N7
N5
N6
REFCLKN N9
REFCLKP N10
1394 PHY
WAKE*
NAND TREE PIN
FIXME!!! - TYPO IN SYMBOL REGCTL REGCLT
NAND TREE PIN VAUX_DETECT
POWER MANAGEMENT
NAND TREE PIN VAUX_DISABLE
CLKREQN
m
il
SCIF
K1
L8
F13
G13
NAND_TREE
REXT
XO
XI NAND TREE PIN
M13
N13
J2
L13
D12
D1
A10
H13
K13
J12 OCR_CTL_V10
NC J13 OCR_CTL_V12
A12
D5
D6
D8
FW643
e
r
42
TP_FW_NAND_TREE
PCIE_RXD0N
PCIE_RXD0P
PCIE_TXD0N
PCIE_TXD0P
TEST CONTROLLER
B11 R0
B10 TPCPS
FW_REXT
1%
1/16W
MF-LF
402
24.576M
C4001
1
CRITICAL
1
22PF
a
n
i
CRITICAL
TPA0N
TPA0P
TPA1N
TPA1P
TPA2N
TPA2P
TPB0N
TPB0P
TPB1N
TPB1P
TPB2N
TPB2P
VREG_PWR
U4000
5%
50V
CERM
402
FW_P0_TPBIAS
FW_P1_TPBIAS
FW_P2_TPBIAS
VP25
SERIAL EEPROM
CONTROLLER
C2
D13
E1
D2
L2
G2
G1
H1
F2
PCIE_FW_R2D_N
PCIE_FW_R2D_P
PCIE_FW_D2R_C_N
PCIE_FW_D2R_C_P
C40201
10%
2 16V
0.1UF
X5R 402
C40211
10%
2 16V
0.1UF
X5R 402
C40111
10%
2 16V
0.1UF
X5R 402
PCIE_FW_D2R_N 7
PCIE_FW_R2D_C_P 42
104
42 104
PCIE_FW_D2R_P 7 42 104
0.1UF
X5R 402
PCIE_CLK100M_FW_N 7 30 105
LAYOUT NOTE: PLACE C4020,C4021 CLOSE TO FW643(U4000)
PCIE_CLK100M_FW_P 7 30 105
TP_FW_TCK 7
TP_FW_TDI 7
TP_FW_TDO 7
TP_FW_TMS 7
=PP3V3_S5_FW 6
40 42 43
NOSTUFF
R4010
FW_TRST_L
PCI_PME_FW_L 25
FW643_REGCTL
FW_VAUX_DETECT
TP_FW_VAUX_DISABLE
CK505_CLKREQ3_L 29 30
R4013
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
TP_FW_SCIFCLK
TP_FW_SCIFDAIN
TP_FW_SCIFDOUT
TP_FW_SCIFMC
N12
M11
FW_SCL
TP_FW_SDA
MISCELLANEOUS
CHIP RESET
VSS
B2
D4
D7
D9
D10
E4
E5
E9
F4
F6
F7
F8
F10
G4
G6
G7
G8
G10
H4
H6
H7
H8
H10
J4
J5
J9
J10
K4
K5
K7
K8
K9
L7
K6
K10
B8
A8
B5
A5
B3
A3
B9
A9
B6
A6
B4
A4
FW_R0
FW_TPCPS
R4080
191
FW_P0_TPA_N
FW_P0_TPA_P
FW_P1_TPA_N
FW_P1_TPA_P
FW_P2_TPA_N
FW_P2_TPA_P
FW_P0_TPB_N
FW_P0_TPB_P
FW_P1_TPB_N
FW_P1_TPB_P
FW_P2_TPB_N
FW_P2_TPB_P
VP
6 40 42 43
N4
FW_RESET_L 7
28
VREG_VSS
R4011
R4012
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
L12
42
VDDH
VDD33
FW_PHY_DS0
FW_PHY_DS1
FW_PHY_DS2
42
C1
C12
F1
G12
J1
L3
L11
M2
A1
B1
B12
C13
E2
E10
H2
H12
K2
L1
M12
N3
N11
=PP3V3_S5_FW
NC B13 ATBUSB
NC A13 ATBUSH
NC A11 ATBUSN
y
r
42
PP3V3_S5_FW_AVDD2
VDD10
6 40 42 43
PP3V3_S5_FW_AVDD1
42
SYNC_DATE=12/15/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
40
OF
33
118
=PP3V3_S5_FW
y
r
L4200
120-OHM-0.3A-EMI
1
PP1V0_S5_FW_AVDD 33
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=1.0V
25MA PCIE SERDES
2
0402-LF
FIXME!!!: CHOOSE FOR POWER DISSIPATION, DC GAIN, AND LOW VCE SAT
35
Q4200
BCP69
33
FW_PHY_DS0
33
FW_PHY_DS1
33
FW_PHY_DS2
SOT223-4
2
PP1V0_S5_FW_DVDD
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=1.0V
110MA DIGITAL CORE
=PP3V3_S5_FW
3
4
1
C4200
2.2UF
20%
6.3V
2 CERM
402-LF
C4210
0.1UF
C4201
20%
2 10V
CERM
402
2.2UF
20%
6.3V
2 CERM
402-LF
C4211
0.1UF
C4212
10UF
20%
2 10V
CERM
402
20%
2 6.3V
CERM
805-1
33 35
a
n
i
C4213
10UF
20%
2 6.3V
CERM
805-1
R4200
33
FW_OCR10_CTL
75
FW_OCR10_CTL_R
5%
1/16W
MF-LF
402
m
il
FW643 DECOUPLING
NOTE: PLACE 1 CAP CLOSE TO EACH POWER PIN ON U4000
36 35 33 2
36 35 33 2
=PP3V3_S5_FW
7MA I/O
C4250
1UF
C4251
1UF
10%
6.3V
2 CERM
402
C4252
1UF
10%
6.3V
2 CERM
402
10%
6.3V
2 CERM
402
C4253
1UF
=PP3V3_S5_FW
0MA VREG PWR
C4254
C4290
e
r
1UF
10%
6.3V
2 CERM
402
10%
6.3V
2 CERM
402
0.1UF
10%
16V
2 X7R-CERM
402
10K
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
36 35 33 2
NOSTUFF
1
NOSTUFF
NOSTUFF
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
FW 3.3V FILTERING
36 35 33 2
=PP3V3_S5_FW
L4210
120-OHM-0.3A-EMI
1
PP3V3_S5_FW_AVDD1
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.3V
114MA FIREWIRE PHY
0402-LF
C4291
PP1V0_S5_FW_DVDD
C4260
1UF
10%
2 6.3V
CERM
402
35 33
C4261
1UF
10%
2 6.3V
CERM
402
35 33
C4240
1UF
10%
6.3V
2 CERM
402
C4241
1UF
10%
6.3V
2 CERM
402
1UF
C4263
1UF
C4264
10%
2 6.3V
CERM
402
1UF
10%
2 6.3V
CERM
402
PP3V3_S5_FW_AVDD2
C4242
10%
6.3V
2 CERM
402
1UF
10%
2 6.3V
CERM
402
PP3V3_S5_FW_AVDD1
C4262
C4280
1UF
10%
6.3V
2 CERM
402
C4265
1UF
10%
2 6.3V
CERM
402
35 33
C4266
1UF
10%
2 6.3V
CERM
402
33 35
L4211
1UF
10%
6.3V
2 CERM
402
120-OHM-0.3A-EMI
1
PP3V3_S5_FW_AVDD2
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=3.3V
17MA PCIE SERDES
0402-LF
35 33
33 35
FW PCIE ALIASES
19
TP_PCIE_FW_R2D_C_N
PCIE_FW_R2D_C_N
19
TP_PCIE_FW_R2D_C_P
PCIE_FW_R2D_C_P
33
MAKE_BASE=TRUE
33
MAKE_BASE=TRUE
PP1V0_S5_FW_AVDD
C4281
1UF
10%
6.3V
2 CERM
402
C4230
1UF
10%
6.3V
2 CERM
402
33 3
PCIE_FW_D2R_N
33 3
PCIE_FW_D2R_P
TP_PCIE_FW_D2R_N
19
TP_PCIE_FW_D2R_P
19
MAKE_BASE=TRUE
MAKE_BASE=TRUE
C4231
1UF
10%
6.3V
2 CERM
402
SYNC_DATE=10/10/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
42
OF
33
118
R4300
1
=PP12V_S5_FW
12 VOLTS
7 WATTS MAX PER PORT
CRITICAL
FW_PORTS_VP
MIN_LINE_WIDTH=1.7MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=33V
MIN_LINE_WIDTH=1.7MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=33V
1.3
0.01UF
36
1
SM
1
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.08MM
C4310
0.01UF
C4350
68 36
FW_PORT0_TPB_N
68 36
FW_PORT0_TPB_P
56.2
1%
1/16W
MF-LF
2 402
R43601
68 36
FW_PORT0_TPA_N
68 36
FW_PORT0_TPA_P
R4361
56.2
56.2
1%
1/16W
MF-LF
2 402
36
FW_P0_TPA_P
FW_P0_TPA_N
FW_P0_TPB_P
FW_P0_TPB_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
FW_PORT0_TPA_P
FW_PORT0_TPA_N
FW_PORT0_TPB_P
FW_PORT0_TPB_N
a
n
i
PP3V3_FW_ESD
36 68
DP4311
36 68
DP4311
BAV99DW-X-F
36 68
33
33
FW_P1_TPA_P
FW_P1_TPA_N
FW_P1_TPB_P
FW_P1_TPB_N
MAKE_BASE=TRUE
MAKE_BASE=TRUE
MAKE_BASE=TRUE
FW_PORT1_TPA_P
FW_PORT1_TPA_N
FW_PORT1_TPB_P
FW_PORT1_TPB_N
C4312
36 68
36 68
56.2
1%
1/16W
MF-LF
402 2
R4363
56.2
1%
1/16W
MF-LF
2 402
R4353
R43521
56.2
56.2
1%
1/16W
MF-LF
2 402
1%
1/16W
MF-LF
402 2
36
PP3V3_FW_ESD
DP4320
e
r
0.01UF
10%
50V
X7R 2
402
FW_P0_TPA_C
FW_P1_TPA_C
1
R4354
4.99K C4364 1
1%
C4354 1
220PF
1/16W
MF-LF
2 402
5%
25V
CERM 2
402
220PF
5%
25V
CERM 2
402
R4364
4.99K
1%
1/16W
MF-LF
2 402
68 36
68 36
FW_P2_TPBIAS
NC_FW_PORT2_TPBIAS
MAKE_BASE=TRUE
NO_TEST=TRUE
33
FW_P2_TPA_P
NC_FW_PORT2_TPA_P
MAKE_BASE=TRUE
NO_TEST=TRUE
33
FW_P2_TPA_N
NC_FW_PORT2_TPA_N
MAKE_BASE=TRUE
NO_TEST=TRUE
33
FW_P2_TPB_P
NC_FW_PORT2_TPB_P
MAKE_BASE=TRUE
NO_TEST=TRUE
33
FW_P2_TPB_N
NC_FW_PORT2_TPB_N
MAKE_BASE=TRUE
NO_TEST=TRUE
ESD Rail
=PP3V3_S5_FW
332
1%
1/16W
MF-LF
402
35 33 2
36
68 36
36
FW_PORT1_TPA_N
[ LATE VG NOTES ]
CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V
IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A .5V DROP
CRITICAL
10
1
9
2
8
7
6
3
5
4
TPBTPB<R>
TPB+
VP
NC
VG
TPATPA<R>
TPA+
11
13
514-0438
R43351
1M
1%
1/16W
MF-LF
402 2
C4335
0.1UF
10%
50V
2 X7R
603-1
FW_PORT1_VP
MIN_LINE_WIDTH=1.7MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=33V
SM
C4301
0.01UF
10%
2 50V
X7R
603-1
0.01UF
SOT-363
5
10%
50V
X7R 2
402
GND_CHASSIS_FIREWIRE
PORT 1
1394A
4 36
CRITICAL
FL4300
120-OHM
CRITICAL
L701-SM
J4301
SYM_VER-1
1394A-M72
FW_PORT1_TPA_FL_P
F-ANG-TH
6
1
TPA+
FW_PORT1_TPA_FL_N
5
CRITICAL
FL4310
120-OHM
TPA-
TPB+
L701-SM
SYM_VER-1
FW_PORT1_TPB_P
514-0398
3
3
FW_PORT1_TPB_FL_P
FW_PORT1_TPB_FL_N
TPB-
VP
VGND
7
FW_PORT1_TPB_N
PP3V3_FW_ESD
DP4321
DP4321
BAV99DW-X-F
BAV99DW-X-F
SOT-363
2
0.01UF
C4323
0.01UF
10%
50V 2
X7R
402
3
1
4
10%
50V 2
X7R
402
FIREWIRE CONNECTORS
SYNC_MASTER=DOUG
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
TABLE_ALT_ITEM
155S0232
155S0289
SYNC_DATE=10/10/2006
TABLE_ALT_HEAD
FL4300,FL4310
ORIGINAL TOKO CHOKE
D4390
SOT23
MMBZ5227B
DRAWING NUMBER
SHT
NONE
REV.
051-7229
D
SCALE
4 36
SOT-363
5
6
C4322 1
GND_CHASSIS_FIREWIRE
SIZE
4 36
BAV99DW-X-F
C4321
L4301
12
GND_CHASSIS_FIREWIRE
CRITICAL
F-ANG-TH1
14
10%
50V
CERM 2
402
FERR-250-OHM
CRITICAL
J4300
1394B-M72
0.001UF
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.38 mm
MIN_NECK_WIDTH=0.25 mm
PP3V3_FW_ESD
R4390
68 36
FW_PORT1_TPA_P
SOT-363
2
10%
50V
X7R 2
402
DP4320
BAV99DW-X-F
C4320 1
C4313 1
m
il
36 68
C4332
PORT 0
1394B
15
NOSTUFF
0.01UF
10%
50V
X7R 2
402
MAKE_BASE=TRUE
R43621
0.01UF
36 68
FW_PORT0_TPA_R
SOT-363
5
4 36
BAV99DW-X-F
SOT-363
2
36 68
MAKE_BASE=TRUE
33
R4351
1%
1/16W
MF-LF
402 2
33
10%
50V
X7R 2
402
10%
2 6.3V
CERM-X5R
402
1%
1/16W
MF-LF
402 2
33
10%
50V
X7R 2
402
C4360
10%
2 6.3V
CERM-X5R
402
33
0.01UF
MIN_LINE_WIDTH=1.7MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=33V
0.33UF
56.2
SOT-363
5
C4311 1
0.33UF
R43501
DP4310
BAV99DW-X-F
SOT-363
2
y
r
GND_CHASSIS_FIREWIRE
BAV99DW-X-F
DP4310
FW_PORT1_VP_F
0.75AMP-30V
MIN_LINE_WIDTH=0.1MM
MIN_NECK_WIDTH=0.08MM
33
PP3V3_FW_ESD "Snapback"
CRITICAL
FW_P1_TPBIAS
VOLTAGE=1.86V
MIN_LINE_WIDTH=1.7MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=33V
C4300
10%
50V
2 X7R
603-1
VOLTAGE=1.86V
33
F4310
FW_P0_TPBIAS
FW_PORT0_VP
SM
20% CRITICAL
1W
FF
2512
Termination
MIN_LINE_WIDTH=1.7MM
MIN_NECK_WIDTH=0.25MM
VOLTAGE=33V
SM
L4300
FERR-250-OHM
33
R4301
33
FW_PORT0_VP_F
0.75AMP-30V
NOSTUFF FW_PORTS_VP_R
2
5%
1/8W
MF-LF
805
33
CRITICAL
F4300
R4302
CRS08
CRITICAL
20%
1W
FF
2512
DE4300
SM
2
1.3
43
OF
33
118
CRITICAL
SDF4400
STDOFF-3.0OD4.0H-1.35-2.4-TH
1
y
r
=PP5V_S0_PATA
=PP3V3_S0_PATA
a
n
i
R4453
CRITICAL
1K
J4401
804PVS-0502S5RG
1
R4403
NC
2
ODD_RST_5VTOL_L
103 23
103 23
103 23
103 23
103 23
103 23
103 23
103 23
(UATA_STOP)
23
103
IDE_PDD<7>
IDE_PDD<6>
IDE_PDD<5>
IDE_PDD<4>
IDE_PDD<3>
IDE_PDD<2>
IDE_PDD<1>
IDE_PDD<0>
IDE_PDIOW_L
IDE_PDA<1>
23 IDE_PDA<0>
23 IDE_PDCS1_L
103
IDE_DASP_L
103 23
103
NO STUFF
(UATA_CS0*)
10pF
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
NC
NC
Obsolete
IDE_PDD<8>
IDE_PDD<9>
IDE_PDD<10>
IDE_PDD<11>
IDE_PDD<12>
IDE_PDD<13>
IDE_PDD<14>
IDE_PDD<15>
IDE_PDIOR_L
m
il
IDE_PDIORDY
IDE_IRQ14
23 7
103
103 23
C4404 1
51
4.7K
Per ATA Spec
5%
1/16W
MF-LF
2 402
(UATA_DSTROBE)
M-ST-SM
R4451
100K
103 24
5%
50V
CERM 2
402
45
NC
IDE_PDA<2>
IDE_PDCS3_L
46
47
48
NC 49
50
IDE_CSEL
IDE_PDDACK_L
IDE_IOCS16_PU
NC
C4405
0.1uF
20%
103 23
e
r
IDE_PDDREQ
44 6
=PP5V_S0_PATA
DEVELOPMENT 1
R4457
499
402
IDE_DASP_L_DS
7 23 103
23 103
23 103
23 103
23 103
23 103
23 103
(UATA_HSTROBE)
7 23
103
23 103
23 103
23
103
(UATA_CS1*)
C4406
10UF
20%
2 10V
X5R
805
516S0583
R4458 1R4459
0
6.2K
5%
1/16W
MF-LF
2 402
LED4400
52
DEVELOPMENT
1% 1/16W
402 MF-LF
2 10V
CERM
23 103
5%
1/16W
MF-LF
2 402
PER ATA7 SPEC
GREEN-3.6MCD
2.0X1.25MM-SM
"IDE ACTIVE"
CRITICAL
SDF4401
STDOFF-3.0OD4.0H-1.35-2.4-TH
1
PATA Connector
SYNC_MASTER=DAVE_MASTER
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
44
OF
33
118
SATA Port A
y
r
CRITICAL
J4510
EP00-081-91
C4510
M-ST-SM
1
2
10%
0.0047uF
65
65
C4511
SATA_A_R2D_P
SATA_A_R2D_N
25V
CERM
0.0047uF
SATA_A_R2D_C_P
IN
18 65
SATA_A_R2D_C_N
IN
18 65
402
10%
25V
CERM
402
10%
25V
CERM
402
4
5
65
65
SATA_A_D2R_C_N
SATA_A_D2R_C_P
C4515
0.0047uF
C4516
0.0047uF
518S0251
10%
25V
CERM
SATA_A_D2R_N
OUT
3 18 65
SATA_A_D2R_P
OUT
3 18 65
TP_SATA_B_R2D_P
MAKE_BASE=TRUE
TP_SATA_B_R2D_N
MAKE_BASE=TRUE
65 18
SATA_B_D2R_P
65 18
SATA_B_D2R_N
65 18
65 18
18 65
SATA_C_R2D_C_P
18 65
SATA_C_R2D_C_N
18 65
m
il
TP_SATA_C_D2R_P
MAKE_BASE=TRUE
TP_SATA_C_D2R_N
MAKE_BASE=TRUE
SATA_C_D2R_N
DEVELOPMENT
R4599 1
330
5%
1/10W
MF-LF
603
SB_SATALED_R_L
DEVELOPMENT
DS4599
GREEN-3.6MCD
2.0X1.25MM-SM
SILK_PART=SATA ACTIVE
SB_SATALED_L
TP_SB_SATALED_L
18
MAKE_BASE=TRUE
e
r
SATA_C_D2R_P
18 65
SATA_B_R2D_C_N
TP_SATA_B_D2R_P
MAKE_BASE=TRUE
TP_SATA_B_D2R_N
MAKE_BASE=TRUE
TP_SATA_C_R2D_P
MAKE_BASE=TRUE
TP_SATA_C_R2D_N
MAKE_BASE=TRUE
SATA_B_R2D_C_P
=PP3V3_S0_SATALED
a
n
i
402
18
18
SATA_RBIAS_P
SATA_RBIAS_N
65
SATA_RBIAS
MAKE_BASE=TRUE
1
R4590
24.9
1%
1/16W
MF-LF
402
SATA Connectors
SYNC_MASTER=DOUG
SYNC_DATE=10/10/2006
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7229
33
OF
45
118
CRITICAL
L4610
DEVELOPMENT
TPS2068
IN2
USB_EXTC_OC_L
EN*
10K
20%
10V
2 CERM
402
OC*
C4605
20%
10V
2 CERM
402
9
51 50 49
USB_PWR_ENA_L
103 24
103 24
SMC_RX_L
SMC_TX_L
12
11
USB_EXTC_P
USB_EXTC_N
10
9
VDD
THRM_PAD
13
Q4600
3
4
108
USB_DEBUGPRT_EN_L
SEL=0: CHOOSE SMC
SEL=1: CHOOSE USB
=PP5V_S5_USB
24
USB_EXTA_OC_L
IN
OUT1
24
PP5V_USB2_PORT1
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
PP5V_USB2_PORT1_F
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
SM
GND TPAD
9
1
C4601
0.1UF
20%
10V
2 CERM
402
C4602
0.1UF
NOSTUFF
CRITICAL
C4600
150UF
C4603
0.1UF
20%
10V
2 CERM
402
20%
10V
2 CERM
402
C4623 1
m
il
CRITICAL
0.01uF
J4620
20%
16V
CERM 2
402
20%
2 6.3V
POLY
CASE-D2-LF
CRITICAL
L701-SM
SYM_VER-1
USB_EXTB_N
108
USB_EXTB_P
108
VDD
DD+
GND
USB_PORT1_N
F-ANG-TH
5
6
L4622
120-OHM
103 24
USB-M72
USB_PORT1_P
VBUS
DD+
GND
2
3
4
D4601
PORT 1
USB_C_MUXED_P
J4610
108
108
USB-M72
F-ANG-TH
5
6
USB_PORT2_N
VDD
DD+
GND
USB_PORT2_P
CRITICAL
VBUS
DD+
GND
2
3
4
D4600
49
a
n
i
FERR-250-OHM
OUT2 6
EN1*
5 OC2*
4
EN2*
USB_EXTB_OC_L
L4620
MSOP
5%
1/16W
MF-LF
402
CRITICAL
OC1*
5%
1/16W
MF-LF
402
R4652
CRITICAL
U4600
6
R4651
PRODUCTION
TPS2060
PRODUCTION
SIGNAL_MODEL=USB_MUX
USB_C_MUXED_N
SOT23-LF
y
r
SYM_VER-1
108
2N7002
PM_S4_STATE_L
CRITICAL
20%
16V
CERM 2
402
L701-SM
GND
0.01uF
L4612
120-OHM
U4650
C4613
CRITICAL
0I0
Y0
1I0 PI3USB10 Y1
TDFN
0I1
SEL
CRITICAL
1I1
3
D
5%
1/16W
MF-LF
2 402
DEVELOPMENT
51 50 49
10K
0.1UF
OUT3 8
GND TPAD
5%
1/16W
MF-LF
2 402
R4650
7
5
1
24
C4604 1R4600
0.1UF
20%
2 10V
CERM
402
OUT2 7
DEVELOPMENT
C4650
0.1UF
MSOP
8
2
OUT1 6
IN1
PP5V_USB2_PORT2_F
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
=PP3V3_S5_SMCUSBMUX
U4601
2
=PP5V_S5_USB
2
SM
PORT 2
PP5V_USB2_PORT2
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
CRITICAL
FERR-250-OHM
514-0400
RCLAMP0502B
SC-75
GND_CHASSIS_USB 9 46
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
VOLTAGE=0V
103 24
USB_EXTD_N
TP_USB_EXTD_N
MAKE_BASE=TRUE
SB HAS INTERNAL 15K PULL-DOWNS
USB_EXTD_P
TP_USB_EXTD_P
MAKE_BASE=TRUE
e
r
CRITICAL
L4630
FERR-250-OHM
1
PP5V_USB2_PORT0
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
103 24
USB_EXTA_N
SM
USB_EXTA_P
GND_CHASSIS_USB
SC-75
C4633 1
CRITICAL
0.01uF
J4630
20%
16V
CERM 2
402
USB-M72
F-ANG-TH
5
L4632
120-OHM
L701-SM
SYM_VER-1
108
108
PP5V_USB2_PORT0_F
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
CRITICAL
9 46
RCLAMP0502B
USB_PORT0_N
VDD
DD+
GND
USB_PORT0_P
D4602
1
1
2
3
4
VBUS
DD+
GND
7
8
PORT 0
514-0400
514-0400
GND_CHASSIS_USB
9 46
TABLE_ALT_HEAD
PART NUMBER
ALTERNATE FOR
PART NUMBER
155S0232
155S0289
BOM OPTION
REF DES
COMMENTS:
ALL
SYNC_DATE=12/11/2006
RCLAMP0502B
SC-75
TABLE_ALT_ITEM
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
46
OF
33
118
CRITICAL
L4700
FERR-250-OHM
=PP5V_S3_BNDI
SDF4720
SM
STDOFF-4OD4.5H-1.35-TH
PP5V_S3_BNDI
VOLTAGE=5V
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.2MM
C4700
=PP3V3_S3_BT
CRITICAL
10UF
C4720
10UF
C4701
y
r
1
47
20%
6.3V
2 CERM
805-1
1
C4721
0.1UF
20%
6.3V
2 CERM
805-1
20%
10V
2 CERM
402
20%
10V
CERM 2
402
103 24 7
103 24 7
USB_BT_N
USB_BT_P
a
n
i
LAYOUT NOTE:
PLACE C4700, C4701 & L4700
NEAR J4700 PINS 4 AND 5 IN THE
ORDER LISTED, AND NOT ON
BOTH SIDES OF THE PIN.
m
il
CAMERA CONNECTOR
R4701
2
402
103 24 7
L4701
USB_CAMERA_P
e
r
CRITICAL
120-OHM
L701-SM
USB_CAMERA_L_P
108 USB_CAMERA_L_N
108
NOSTUFF
4
3
SYM_VER-2
103 24 7
47
USB_CAMERA_N
R4702
1
402
PP5V_S3_BNDI
P
R4710
1
402
103 24 7
USB_IR_N
L4710
CRITICAL
120-OHM
L701-SM
NOSTUFF
103 24 7
USB_IR_P
SYM_VER-2
R4711
1
2
4
10
516S0257
CRITICAL
SDF4721
STDOFF-4OD4.5H-1.35-TH
SDF4721_1
R4720
0
5%
1/16W
MF-LF
2 402
R4721
0
5%
1/16W
MF-LF
2 402
USB_TPAD_N
103 24
USB_TPAD_P
TP_USB_TPAD_N
MAKE_BASE=TRUE
TP_USB_TPAD_P
MAKE_BASE=TRUE
SB HAS INTERNAL 15K PULL-DOWNS
CRITICAL
J4700
53398-0576
M-ST-SM
6
103 24
USB_EXCARD_N
103 24
USB_EXCARD_P
TP_USB_EXCARD_N
MAKE_BASE=TRUE
TP_USB_EXCARD_P
MAKE_BASE=TRUE
SB HAS INTERNAL 15K PULL-DOWNS
1
2
3
4
5
518S0316
USB_IR_L_N
USB_IR_L_P
47
402
SDF4720_1
J4720
QT800101-1210S-8F
F-ST-SM
0.1UF
CRITICAL
CHASSIS_GND_BNDI
CHASSIS_GND_BNDI
SYNC_MASTER=M78_MLB
MAKE_BASE=TRUE
SYNC_DATE=12/15/2006
DRAWING NUMBER
D
SCALE
SHT
NONE
REV.
051-7229
33
OF
47
118
50
50 6
PP3V3_S5_AVREF_SMC
=PP3V3_S5_SMC
D
C4902
22UF
20%
6.3V
CERM
805
OMIT
BI
51 23 7
BI
51 23 7
BI
51 23 7
IN
28 7
IN
105 30 7
51 25 7
85
50
52
50
51 50 49 46 7
IN
BI
SMC_GFX_THROTTLE_L
SMC_SYS_LED
SMB_MGMT_DATA
BI
SMC_P43
50
SMC_P44
50
SMC_P45
50
SMC_P46
50
SMC_SYS_KBDLED
OUT
D15
P71/AN1
P72/AN2
P21
P22
R13
P13
P23
P24
P73/AN3
P74/AN4
R14
E14
E15
P25
P75/AN5
R15
E13
P26
P27
P76/AN6
P77/AN7
N13
E12
F14
P14
P15
D9
P30/LAD0
P80/PME*
C7
C9
P31/LAD1
P81/GA20
A7
A9
P32/LAD2
P33/LAD3
P82/CLKRUN*
P83/LPCPD*
B7
B9
D8
P34/LFRAME*
P84/IRQ3*/TXD1
C6
P85/IRQ4*/RXD1
P86/IRQ5*/SCK1/SCL1
A6
A8
P35/LRESET*
P36/LCLK
D7
P37/SERIRQ
P90/IRQ2*
K4
C8
B6
A5
P40/TMIO
P41/TMO0
P91/IRQ1*
P92/IRQ0*
J2
B5
D5
P42/SDA1
P93/IRQ12*
J3
C3
P94/IRQ13*
P95/IRQ14*
J4
B1
P43/TMI1/EXSCK1
P44/TMO1
C2
P45
P96/EXCL
H1
D3
P97/IRQ15*/SDA0
G2
C1
P46/PWX0/PWM0
P47/PWX1/PWM1
G1
P50
G4
P51
P52/SCL0
OUT
IN
BI
SMC_TX_L
SMC_RX_L
SMB_0_S0_CLK
(OC)
F2
(OC)
SMC_WAKE_SCI_L
SMC_P81
PM_CLKRUN_L
PM_SUS_STAT_L
SMC_TX_L
SMC_RX_L
SMB_MGMT_CLK
(OC)
SMC_ONOFF_L
SMC_BC_ACOK
SMC_BS_ALRT_L
PM_SLP_S3_L_SMC
PM_S4_STATE_L_SMC
PM_SLP_S5_L
SMC_SUS_CLK
SMB_0_S0_DATA
D6
OUT
(OC)
SMC_CPU_ISENSE
SMC_CPU_VSENSE
SMC_GPU_ISENSE
SMC_GPU_VSENSE
SMC_DCIN_ISENSE
SMC_PBUS_VSENSE
SMC_BATT_ISENSE
SMC_NB_1V25_ISENSE
J1
H2
(DEBUG_SW_1)
(DEBUG_SW_2)
28 25 7
46
31 16
32 16
50
25
(DEBUG_SW_3)
OUT
50
IN
OUT
50
IN
50
OUT
50
IN
85
IN
56
OUT
56
OUT
57
OUT
50
OUT
56
IN
56
IN
57
IN
50
IN
108 50
IN
108 50
IN
108 50
IN
50
IN
50
IN
50
IN
50
IN
58
IN
PA0/KIN8*/PA2DC
P3
PA1/KIN9*/PA2DD
PA2/KIN10*/PS2AC
R2
N3
R1
SMC_PB0
SMC_RUNTIME_SCI_L
SMC_ODD_DETECT
ISENSE_CAL_EN
SMC_EXCARD_CP
SMC_EXCARD_PWR_EN
SMC_EXCARD_OC_L
SMC_GFX_OVERTEMP_L
U4900
SMC_H8S2116
BGA
(2 OF 4)
PA3/KIN11*/PS2AD
PA4/KIN12*/PS2BC
N2
PA5/KIN13*/PS2BD
M4
PA6/KIN14*/PS2CC
PA7/KIN15*/PS2CD
N1
50
25
53 50
(OC)
(OC)
(OC)
(OC)
(OC)
(OC)
R3
PE0
M3
PE1*/ETCK
PE2*/ETDI
M2
PE3*/ETDO
PE4*/ETMS
L4
PF0/IRQ8*/PWM2
M7
PF1/IRQ9*/PWM3
P6
L2
B10
PB0/LSMI*
PF2/IRQ10*/TMOY
PF3/IRQ11*/TMOX
A10
PB1/LSCI
PF4/PWM4
M6
D10
PB2
PB3
PF5/PWM5
PF6/PWM6
R5
A11
B11
PB4
PF7/PWM7
N5
C11
PB5
PB6
PG0/EXIRQ8*/TMIX
PG1/EXIRQ9*/TMIY
P9
A12
D11
PB7
PG2/EXIRQ10*/SDA2
N9
G14
SMS_X_AXIS
SMS_Y_AXIS
SMS_Z_AXIS
SMC_ANALOG_ID
SMC_NB_CORE_ISENSE
SMC_NB_1V8_ISENSE
ALS_LEFT
ALS_RIGHT
N6
P5
R9
PC0/TIOCA0/WUE8*
PC1/TIOCB0/WUE9*
PG3/EXIRQ11*/SCL2
PG4/EXIRQ12*/EXSDAA
P8
G15
G13
PC2/TIOCC0/TCLKA/WUE10*
PG5/EXIRQ13*/EXSCLA
M8
G12
PG6/EXIRQ14*/EXSDAB
PG7/EXIRQ15*/EXSCLB
P7
H14
PC3/TIOCD0/TCLKB/WUE11*
PC4/TIOCA1/WUE12*
H15
PC5/TIOCB1/TCLKC/WUE13*
PH0/EXIRQ6*
E1
H13
PH1/EXIRQ7*
F3
H12
PC6/TIOCA2/WUE14*
PC7/TIOCB2/TCLKD/WUE15*
PD0/AN8
PH2/FWE
PH3/EXEXCL
K2
M11
P11
PH4
PH5
D4
R11
PD1/AN9
PD2/AN10
N11
PD3/AN11
P10
R10
PD4/AN12
PD5/AN13
N10
PD6/AN14
M10
PD7/AN15
SMC_PF0
SMC_PF1
SMC_LID
SMC_PF3
SMC_BATT_ISET
SMC_BATT_VSET
SMC_SYS_ISET
SMC_SYS_VSET
R8
R7
C4
B3
(OC)
(OC)
(OC)
(OC)
(OC)
(OC)
SMC_PG0
=SMC_SMS_INT
SMB_BSA_DATA
SMB_BSA_CLK
SMB_A_S3_DATA
SMB_A_S3_CLK
SMB_B_S0_DATA
SMB_B_S0_CLK
SMC_PROCHOT
SMC_THRMTRIP
SMC_FWE
ALS_GAIN
SMC_PH4
SMS_ONOFF_L
IN
53
IN
53
IN
53
IN
50
IN
50
IN
50
IN
50
OUT
OUT
IN
y
r
a
n
i
51 50 7
50
13 25
7 25 51
7 25 50 51
7 46 49 50 51
IN
7 46 49 50 51
52
IN
50
IN
50
IN
50
R4950
1
100
PM_SLP_S3_L
5%
1/16W
MF-LF
402
R4951
100
PM_S4_STATE_L
m
il
1
IN
25 50
IN
50
BI
IN
50
OUT
BI
e
r
M1
R6
SMC_FAN_0_CTL
SMC_FAN_1_CTL
SMC_FAN_2_CTL
SMC_FAN_3_CTL
SMC_FAN_0_TACH
SMC_FAN_1_TACH
SMC_FAN_2_TACH
SMC_FAN_3_TACH
SMC_CASE_OPEN
SMC_TCK
SMC_TDI
SMC_TDO
SMC_TMS
53
50
OMIT
SMC_PA0
50
SMC_PA1
50
PM_SYSRST_L
OUT
USB_DEBUGPRT_EN_L
OUT
PM_EXTTS_L<0>
BI
PM_EXTTS_L<1>
BI
SYS_ONEWIRE
BI
PM_BATLOW_L
OUT
IN
5%
1/16W
MF-LF
402
52
IN
50
IN
7 50 51
IN
7 50 51
OUT
7 50 51
IN
7 50 51
IN
IN
SMC_RESET_L
E3
RES*
SMC_XTAL
SMC_EXTAL
A2
XTAL
B2
EXTAL
6 7 25 70 75 78
7 25 46 75 78
OMIT
M15
0.47UF
10%
6.3V
CERM-X5R
402
AVREF
N12
20%
10V
CERM
402
F1
P70/AN0
0.1UF
M14
P20
50
AVREF
D13
IN
50
A1
J13
J12
J15
P67/IRQ7*/KIN7*
C4907
C4920
P1
P17
50
VCC
VCL
C15
IN
PP3V3_S5_SMC_AVCC
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
VOLTAGE=3.3V
VCC
D12
5%
1/16W
MF-LF
402
50
P2
K14
4.7
N15
K13
P65/KIN5*
P66/IRQ6*/KIN6*
OUT
51 50 49 46 7
52
P64/KIN4*
P15
P16
50
R4909 1
U4900
SMC_H8S2116
BGA
(3 OF 4)
MD1
E2
MD2
K1
NMI
F4
ETRST*
L1
P12
AVSS
R12
VSS
R4901
10K
10K
5%
1/16W
MF-LF
402 2
5%
1/16W
MF-LF
2 402
SMC_MD1
IN
7 51
SMC_NMI
IN
7 51
SMC_TRST_L
IN
7 51
SMC_KBC_MDE
D2
BI
51 23 7
P14
C14
SMC_VCL
R4999
50
B4
51 23 7
B15
D14
LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
LPC_FRAME_L
SMC_LRESET_L
PCI_CLK33M_SMC
INT_SERIRQ
K12
A4
50
L15
50
A13
50
P62/KIN2*
P63/KIN3*
50
OUT
B13
50
(1 OF 4)
OUT
F13
25
BGA
P12
P13
SMC_PM_G2_EN
SMC_ADAPTER_EN
SMC_P62
SMC_P63
SMC_P64
PM_LAN_PWRGD
SMC_PROCHOT_3_3_L
SMC_P67
L14
20%
10V
CERM
402
F12
71 7
B14
L13
VCC
VCC
25
A15
P60/KIN0*
P61/KIN1*
0.1UF
20%
10V
CERM
402
R4
70
SMC_H8S2116
0.1UF
20%
10V
CERM
402
C4906
N14
SMC_P20
SMC_P21
50
SMC_P22
50
SMC_P23
50
SMC_BATT_TRICKLE_EN_L
OUT
SMC_BATT_CHG_EN
OUT
SMC_P26
50
SMC_P27
50
84 70 50 7
U4900
P10
P11
0.1UF
20%
10V
CERM
402
AVCC
C13
C4905
AVCC
PM_LAN_ENABLE
SMC_RSTGATE_L
ALL_SYS_PWRGD
IN
RSMRST_PWRGD
IN
SMC_P14
50
PM_RSMRST_L
OUT
IMVP_VR_ON
OUT
PM_PWRBTN_L
OUT
B12
OUT
0.1UF
C4904
P4
OUT
50
D1
25
C4903
R4902
R4998
10K
10K
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
2 402
R4903
0
5%
1/16W
MF-LF
2 402
XW4900
SM
1
GND_SMC_AVSS
50 53 58
50
50
IN
50
OUT
50
OUT
50
OUT
50
OUT
50
IN
50
50
50
BI
52
BI
52
BI
52
BI
52
BI
52
BI
OUT
NOTE: SMS Interrupt can be active high or low, rename net accordingly.
If SMS interrupt is not used, pull up to SMC rail.
52
50
OUT
50
IN
50
OUT
50
OUT
50
OMIT
U4900
50
SMC_H8S2116
BGA
SMC
(4 OF 4)
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC0
NC12
F15
NC1
NC2
NC13
NC14
A14
K3
L3
NC3
NC15
C10
G3
H3
N4
M5
N7
M12
C12
NC4
NC5
NC16
NC17
C5
NC6
NC7
NC18
NC19
B8
A3
E4
M13
NC8
NC20
H4
L12
NC9
NC10
NC21
NC22
M9
K15
J14
NC11
N8
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
SYNC_MASTER=T9_MLB_NOME
SYNC_DATE=12/15/2006
DRAWING NUMBER
SHT
NONE
REV.
051-7229
D
SCALE
NO STUFF
1
49
OF
33
118
SMC_BATT_ISET
49
SMC_SYS_ISET
49
SMC_BATT_VSET
49
SMC_SYS_VSET
NO_TEST=TRUE
NC_SMC_SYS_ISET
1
2
0.1uF
20%
10V
CERM
402
DEVELOPMENT
S5000
SPST
1K
VDD
U5000
RN5VD30A-F
SMC_MANUAL_RST_L
NC
C5001
5%
1/16W
MF-LF
402
49
49
10%
16V
CERM
402
SMC_BATT_TRICKLE_EN_L
OUT
7 49 51
108 49
SMS_X_AXIS
108 49
SMS_Y_AXIS
108 49
SMS_Z_AXIS
MAKE_BASE=TRUE
49
ALS_GAIN
TO CPU
MAKE_BASE=TRUE
SILK_PART=SMC RESET
49
ALS_LEFT
49
SMC_P14
49
SMC_P20
R5071
TP_ALS_LEFT
MAKE_BASE=TRUE
TP_SMC_P14
MAKE_BASE=TRUE
100 10
CPU_PROCHOT_L
BI
TP_SMC_P20
3.3K
SMC_P21
49
SMC_P22
49
SMC_P23
M-ST-SM
3
POWER_BUTTON_L
20.000M
SM-4
49
a
n
i
TP_SMC_P27
SMC_P43
TP_SMC_P43
MAKE_BASE=TRUE
SMC_P44
TP_SMC_P44
SMC_ONOFF_L OUT
2
5%
1/16W
MF-LF
402
S5010
SMC_P62
TP_SMC_P45
100 23 16 10
TP_SMC_P62
MAKE_BASE=TRUE
49 50
49
SMC_P63
TP_SMC_P63
MAKE_BASE=TRUE
C5010
SPST
49
SMC_P64
TP_SMC_P64
MAKE_BASE=TRUE
0.1UF
SM-LF
1
SMC_P45
49
MAKE_BASE=TRUE
1K
1
5%
50V
CERM
402
49
R5010
CRITICAL
DEVELOPMENT
TP_SMC_P26
MAKE_BASE=TRUE
22PF
SMC_EXTAL
SMC_P27
49
C5021
49
49
518S0327
Y5020
SMC_P26
MAKE_BASE=TRUE
5%
50V
CERM
402
CRITICAL
49
MAKE_BASE=TRUE
22PF
SMC_XTAL
TP_SMC_P23
MAKE_BASE=TRUE
53398-0276
49
TP_SMC_P22
MAKE_BASE=TRUE
J5010
C5020
TP_SMC_P21
MAKE_BASE=TRUE
SILK_PART=PWR BTN
49
20%
10V
CERM
402
49
SMC_P81
TP_SMC_P81
MAKE_BASE=TRUE
49
SMC_PF0
TP_SMC_PF0
MAKE_BASE=TRUE
49
SMC_PF1
49
SMC_FAN_3_CTL
TP_SMC_PF1
MAKE_BASE=TRUE
49
SMC_FAN_3_TACH
49
SMC_PM_G2_EN
TP_SMC_FAN_3_TACH
MAKE_BASE=TRUE
SILK_PART=SYS POWER
m
il
49
SMC_ADAPTER_EN
49
SMC_SYS_KBDLED
VR5065
REF3133
=PPVIN_S5_SMCVREF
PP3V3_S5_AVREF_SMC
SOT23-3
1
IN
OUT
C5065
C5066
0.47UF
10uF
10%
6.3V
CERM-X5R
402
20%
6.3V
X5R
603
PART NUMBER
ALTERNATE FOR
PART NUMBER
BOM OPTION
REF DES
COMMENTS:
TABLE_ALT_ITEM
353S1381
353S1278
ALL
Intersil ISL60002-33
49 53 58
MIN_LINE_WIDTH=0.4 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=0V
PP12V_S3
R5051 1
649
10%
50V
2 CERM
402
SYS_LED_IREF
1
Q5050
MMDT3906XF
SOT-363
2
R5052
SYS_LED_EN
3
Q5052
1.54K1
2
SYS_LED_BIAS
1%
1/16W
MF-LF
402
IN
SMC_SYS_LED
1%
1/16W
MF-LF
2 402
49
MMDT3906XF
SOT-363
5
TP_SMC_P46
SMC_DCIN_ISENSE
SMC_PBUS_VSENSE
SMC_NB_1V25_ISENSE
SYS_LED_ANODE_CONN
5%
1/16W
MF-LF
402
ACDC_TEMP
SUS_CLK_SB
25
MAKE_BASE=TRUE
ALL_SYS_PWRGD
7 49 70 84
MAKE_BASE=TRUE
50 49 6
50 49
49
49
51 49 7
51 49 7
51 49 7
51 49 7
50
49
49
50
49
UNUSED_SMC_SENSE
50
49
49
UNUSED_SMC_SENSE
50
49
49
49
49
49
49
53398-0276
DEVELOPMENT
CRITICAL
6
M-ST-SM
3
L5050
=PP5V_S3_SYSLED
49
50
50
3.8X3.8X1.5MM
SYS_LED_ANODE_CONN
SYS_LED_RETURN_CONN
DEVELOPMENT
C5051
SMC_ONOFF_L
SMC_LID
SMC_FWE
SMC_TX_L
SMC_RX_L
SYS_ONEWIRE
SMC_BS_ALRT_L
SMC_TMS
SMC_TDO
SMC_TDI
SMC_TCK
SMC_EXCARD_OC_L
SMC_PF3
SMC_PH4
SMC_BC_ACOK
SMC_ODD_DETECT
SMC_PA0
SMC_PA1
SMC_PB0
=SMC_SMS_INT
SMC_SMS_INT
MAKE_BASE=TRUE
SMC_P67
SMC_PG0
R5032
R5033
R5034
R5035
R5036
R5037
R5038
R5039
R5040
R5041
R5042
R5043
R5080
R5082
R5047
R5087
R5096
R5090
R5091
R5092
R5093
R5094
10K
100K
10K
10K
100K
2.0K
100K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
1
VDD
U5050
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
LLP
3 CNTRL
VOUT 8
SMC_SYS_LED
50
SYS_LGP_ANODE
49 25
NC
6 NC
FB 4
THRML_PAD 9
10K
5%
1/16W
MF-LF
402
PGND
2
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
NO STUFF
R5056
1
SMC Support
SYS_LED_ANODE_CONN
SYS_LGP_RETURN
C5052
0.22UF
AGND
20%
25V
2 X5R
R5059
20
1%
1/16W
MF-LF
2 402
SYNC_MASTER=DAVE_MASTER
5%
1/16W
MF-LF
402
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
NC DEVELOPMENT
1
1DEVELOPMENT
50
SYNC_DATE=N/A
NO STUFF
THE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
PROPERTY OF APPLE COMPUTER, INC. THE POSSESSOR
AGREES TO THE FOLLOWING
R5055
1
SYS_LED_RETURN_CONN
50
5%
1/16W
MF-LF
402
DRAWING NUMBER
SHT
NONE
REV.
051-7229
D
SCALE
NO STUFF
CRITICAL
603
5%
SW
DEVELOPMENT
R5058
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
10K
10K
10K
100K
100K
100K
SIZE
=PP3V3_S5_SMC
CRITICAL
518S0327
1UF
10%
6.3V
CERM
402
51 49 25 7
R5086
R5046
R5048
R5083
R5084
R5088
UNUSED_SMC_SENSE
SMC_CASE_OPEN
SMC_EXCARD_CP
PM_SUS_STAT_L
PM_SLP_S5_L
ISENSE_CAL_EN
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
53 49
SYSLED_SW
50
50
49
22UH
49
J5050
DEVELOPMENT1
SYS_LED_RETURN_CONN
IN
MAKE_BASE=TRUE
49
MM3120
SILK_PART=SIL
R5057
0
MAKE_BASE=TRUE
50 49
SMC_THRMTRIP
49
SOT-363
MAKE_BASE=TRUE
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
5%
1/16W
MF-LF
402
IN
2N7002DW-X-F
49
UNUSED_SMC_SENSE
49
SMC_PROCHOT
Q5095
51 49 46 7
UNUSED_SMC_SENSE
SMC_BATT_ISENSE
FROM SMC
51 49 46 7
NO_TEST=TRUE
NC_SMC_NB_CORE_ISENSE
SMC_NB_CORE_ISENSE
R5053
0
SOT-363
PM_LAN_PWRGD
49
NO_TEST=TRUE
NC_SMC_NB_1V8_ISENSE
SMC_NB_1V8_ISENSE
49
2N7002DW-X-F
MAKE_BASE=TRUE
MAKE_BASE=TRUE
49
MMDT3904XF
Q5095
TP_SMS_ONOFF_L
SYS_LED_ILIM
SMC_SUS_CLK
MAKE_BASE=TRUE
49
SOT-363-LF
SOT-363-LF
MAKE_BASE=TRUE
Q5050 VBE2
4
SYS_LED_ANODE
SOT23-LF
107
MIN_LINE_WIDTH=0.3MM
MIN_NECK_WIDTH=0.2MM
2N7002
50 49
C5050
0.001UF
1%
1/16W
MF-LF
402 2
P
1
R5050
49
MMDT3904XF
4
Q5077
CPU_PROCHOT_L_R
TP_SMC_RSTGATE_L
SMC_P46
Q5077
UNUSED SENSORS
e
r
GND_SMC_AVSS
ILED = 20 MA
IREF = 5 MA @ 12V
VBASE = VFMAX LED = 4V*2 = 8
BETA APPROX 150
VBESAT APPROX 0.75 V
SMS_ONOFF_L
49
OUT
3
5
TP_SMC_EXCARD_PWR_EN
MAKE_BASE=TRUE
TABLE_ALT_HEAD
49
49
0.01UF
2
SMC_RSTGATE_L
MAKE_BASE=TRUE
C5067
10%
16V
CERM
402
SMC_EXCARD_PWR_EN
49
MAKE_BASE=TRUE
GND
3
49
MAKE_BASE=TRUE
49
MIN_LINE_WIDTH=0.4 mm
MIN_NECK_WIDTH=0.2 mm
VOLTAGE=3.3V
TP_SMC_SYS_KBDLED
MAKE_BASE=TRUE
SMC_ANALOG_ID
49
TP_SMC_ADAPTER_EN
MAKE_BASE=TRUE
CRITICAL
PM_THRMTRIP_L
OUT
49
TP_SMC_PM_G2_EN
MAKE_BASE=TRUE
TO SMC
SMC_PROCHOT_3_3_L
TP_SMC_FAN_3_CTL
MAKE_BASE=TRUE
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
MAKE_BASE=TRUE
POWER BUTTON
5%
1/16W
MF-LF
402
y
r
NO_TEST=TRUE
NC_ALS_GAIN
R5070
CPU_PROCHOT_BUF
NO_TEST=TRUE
NC_SMS_Z_AXIS
3.3K
NO_TEST=TRUE
NC_SMS_Y_AXIS
MAKE_BASE=TRUE
CRITICAL
NO_TEST=TRUE
NC_SMS_X_AXIS
R5078
470
NO_TEST=TRUE
NC_SMC_BATT_CHG_EN
SMC_BATT_CHG_EN
MAKE_BASE=TRUE
3
=PP1V05_S0_CPU
NO_TEST=TRUE
NC_SMC_BATT_TRICKLE_EN_L
MAKE_BASE=TRUE
SMC_RESET_L
13 12 11 10 6
MAKE_BASE=TRUE
GND
0.01UF
3
OUT
CD
NC
NO_TEST=TRUE
NC_SMC_SYS_VSET
MAKE_BASE=TRUE
SOT23-5A
SM-LF
1
NO_TEST=TRUE
NC_SMC_BATT_VSET
MAKE_BASE=TRUE
R5000
=PP3V3_S0_SMC_LS
MAKE_BASE=TRUE
C5000
NO_TEST=TRUE
NC_SMC_BATT_ISET
MAKE_BASE=TRUE
=PP3V3_S5_SMC
50 49 6
50
OF
33
118
a
n
i
FWH_INIT_L Generation
LPC+ Connector
6
=PP3V3_S0_LPCPLUS
LPCPLUS
CRITICAL
LPCPLUS
7 6
7 6
=PP3V3_S5_LPCPLUS
=PP5V_S0_LPCPLUS
49 23 7
BI
49 23 7
BI
49 23 7
IN
49 25 7
OUT
24 7
OUT
50 49 7
OUT
28 7
IN
49 7
OUT
50 49 7
49 7
50 49 46 7
IN
OUT
IN
LPC_AD<0>
LPC_AD<1>
LPC_FRAME_L
PM_CLKRUN_L
BOOT_LPC_SPI_L
SMC_TMS
DEBUG_RESET_L
SMC_TRST_L
SMC_TDO
SMC_MD1
SMC_TX_L
J5100
SM1
2
10
11
12
13
FWH_INIT_L
PCI_CLK33M_LPCPLUS
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
IN
7 30 105
LPCPLUS
m
il
14
15
LPCPLUS
R5192
330
F-ST-5047
1
LPC_AD<2>
LPC_AD<3>
INT_SERIRQ
PM_SUS_STAT_L
SMC_TDI
SMC_TCK
SMC_RESET_L
SMC_NMI
SMC_RX_L
LINDACARD_GPIO
BI
BI
BI
IN
7 23 49
7 49 50
OUT
7 49 50
OUT
7 49 50
OUT
7 49
OUT
7 46 49 50
OUT
7 25
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
CPU_INIT_LS3V3
SOT-363-LF
7 25 49 50
OUT
1.3K
MMDT3904XF
7 25 49
R5191
Q5190
7 23 49
y
r
LPCPLUS
Q5190
MMDT3904XF
SOT-363-LF
CPU_INIT_R_L
LPCPLUS
R5190
1
330
CPU_INIT_L
IN
7 10 23 100
5%
1/16W
MF-LF
402
e
r
516S0416
SYNC_DATE=05/07/2007
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
51
OF
33
118
=PP3V3_S0_SMBUS_SB
R5200 1
ICH8-M
U2300
(MASTER)
103 25
SMB_CLK
103 25
SMB_DATA
R5201
4.7K
4.7K
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
SMBUS_SB_SCL
Clock Chip
SMC
CY28545-5: U2900
(Write: 0xD2 Read: 0xD3)
U4900
(MASTER)
=PP3V3_S0_SMBUS_SMC_0_S0
R5250 1
=SMBUS_CK505_SCL
29
49
SMB_0_S0_CLK
106
=SMBUS_CK505_SDA
29
49
SMB_0_S0_DATA
106
MAKE_BASE=TRUE
R5251
4.7K
4.7K
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
SMBUS_SMC_0_S0_SCL
MXM TEMP
SMC
U4900
(MASTER)
=SMB_GPU_THRM_SCL
85
49
SMB_A_S3_CLK
=SMB_GPU_THRM_SDA
85
49
SMB_A_S3_DATA
=PP3V3_S5_SMBUS_SMC_A_S5
R5270 1
5%
1/16W
MF-LF
402
MAKE_BASE=TRUE
SMBUS_SMC_0_S0_SDA
SO-DIMM "A"
31
31
=SMB_AMB_TEMP_SCL
55
=SMB_AMB_TEMP_SDA
55
a
n
i
LCD TEMP
LM75, J5600
(WRITE: 0X94 READ: 0X95)
32
=SMB_LCD_TEMP_SCL
55
=SMB_LCD_TEMP_SDA
55
32
SMC
U4900
(MASTER)
=PP3V3_S0_SMBUS_SMC_B_S0
R5260 1
SMC
4.7K
U4900
(MASTER)
49
5%
1/16W
MF-LF
402 2
R5261
106
SMB_B_S0_DATA
106
SMBUS_SMC_B_S0_SCL
SMBUS_SMC_B_S0_SDA
MAKE_BASE=TRUE
HDD
ODD
CPU
GPU
e
r
SMB_BSA_DATA
R5280 1
100K
5%
1/16W
MF-LF
402
106
R5281
100K
5%
1/16W
MF-LF
402
SMBUS_SMC_BSA_SDA
MAKE_BASE=TRUE
55
=SMB_CPU_THRM_SDA
55
=SMB_REMOTE_TEMP_SCL
R5290 1
SMC
5%
1/16W
MF-LF
402
49
SMB_MGMT_CLK
106
49
SMB_MGMT_DATA
106
R5291
100K
5%
1/16W
MF-LF
402
SMBUS_SMC_MGMT_SCL
MAKE_BASE=TRUE
55
=SMB_REMOTE_TEMP_SDA
100K
U4900
(MASTER?)
TEMP
TEMP
HEATSINK
HEATSINK
=PP3V3_S0_SMBUS_SMC_MGMT
SMBUS_SMC_MGMT_SDA
MAKE_BASE=TRUE
55
=SMBUS_MINI_SCL
34
=SMBUS_MINI_SDA
34
=PP3V3_S5_SMBUS_SB_ME
R5230
ICH8-M
100K
U2300
(MASTER)
103 25
SMB_ME_CLK
103 25
SMB_ME_DATA
5%
1/16W
MF-LF
402 2
R5231
SMBUS_SMC_BSA_SCL
MAKE_BASE=TRUE
106
=SMB_CPU_THRM_SCL
REMOTE TEMPS
SMB_BSA_CLK
49
EMC1043-5: U5570
(Write: 0x98 Read: 0x99)
5%
1/16W
MF-LF
2 402
MAKE_BASE=TRUE
49
49
=PP3V3_S5_SMBUS_SMC_BSA
CPU Temp
4.7K
m
il
SMB_B_S0_CLK
5%
1/16W
MF-LF
402
y
r
LM75, J5500
(WRITE: 0X96 READ: 0X97)
SO-DIMM "B"
=I2C_DIMMB_SDA
SMBUS_SMC_A_S5_SDA
AMBIENT INTAKE
J3200
(Write: 0xA4 Read: 0xA5)
=I2C_DIMMB_SCL
MAKE_BASE=TRUE
J3100
(Write: 0xA0 Read: 0xA1)
=I2C_DIMMA_SDA
100K
SMBUS_SMC_A_S5_SCL
MAKE_BASE=TRUE
=I2C_DIMMA_SCL
R5271
MAKE_BASE=TRUE
MAKE_BASE=TRUE
SMBUS_SB_SDA
100K
SMBUS CONNECTIONS
SYNC_MASTER=DAVE_MASTER
SYNC_DATE=N/A
100K
5%
1/16W
MF-LF
2 402
SMBUS_SB_ME_SCL
MAKE_BASE=TRUE
SIZE
SMBUS_SB_ME_SDA
MAKE_BASE=TRUE
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
52
OF
33
118
XW5309
=PPVCORE_S0_CPU
CPUVSENSE_IN
4.53K
84 53
1%
1/16W
MF-LF
402
SMC_CPU_VSENSE
PPV_S0_MXM_PWRSRC
49
OUT
MXM_PWR_SENSE
R5353
C5309
6.04K
0.22UF
SCALE
20%
6.3V
X5R
402
.0129 V/COUNT
49 50 53 58
1%
1/16W
MF-LF
2 402
COUNT
4 V/V
GND_SMC_AVSS
R5355
MXM_PWR_SENSE
1
R5354
2.0K
4.53K2
SMC_GPU_VSENSE 49
1%
1/16W
MF-LF
402
MXM_PWR_SENSE
1
0.22UF
4.53K
1%
1/16W
MF-LF
402
SMC_CPU_ISENSE
R5350
C5370
0.0252
=PPV_S0_MXM_PWRSRC
1%
MXM_PWR_SENSE
20%
6.3V
X5R
402
1W
MF
2512-1
MXM_PWR_SENSE
GND_SMC_AVSS
PPV_S0_MXM_PWRSRC
CRITICAL
49
0.22UF
2
OUT
U5350
ZXCT1010
4 VIN
53 84
CRITICAL
49 50 53 58
1 NC
XW5350
SM
LOAD 5
GND
2
MXM_PWRSRC_SENSE
MXM_SENSE_I_R
OMIT
R5351
m
il
=PP12V_S0_CPU
DEVELOPMENT
53 12 11 6
R5339
CRITICAL
=PPVCORE_S0_CPU
ISENSE_CAL_EN_LS12V
DEVELOPMENT
10K
5%
1/16W
MF-LF
2 402
ISENSE_CAL_EN_L
MIN_LINE_WIDTH=0.20 MM
MIN_NECK_WIDTH=0.20 MM
1.00
1DEVELOPMENT
1%
1/4W
MF-LF
1206 2
R5342
470K
SOT-23
G
DEVELOPMENT
5%
1/16W
MF-LF
2 402
CPUVCORE_ISENSE_CAL
R5341
10K
MIN_LINE_WIDTH=0.50 mm
MIN_NECK_WIDTH=0.20 mm
DEVELOPMENT
CRITICAL
5%
1/16W
MF-LF
2 402
Q5341
ISENSE_CAL_EN_L_R
FDC796N
SUPERSOT-6
1 2
3 DEVELOPMENT
Q5339
2N7002
50 49
ISENSE_CAL_EN
DEVELOPMENT 1
R5340
SOT23-LF
S
2
100K
5%
1/16W
MF-LF
402 2
SCALE
3 5
COUNT
.005309969 A/COUNT
1.6461 A/V
e
r
DEVELOPMENT
Q7640
NTR4101P
R53431
PART#
114S0264
114S0254
QTY
1
1
DESCRIPTION
RES,3.01K,1%,402
RES,2.43K,1%,402
=PP3V3_S0_SMC
3.01K
1%
1/16W
MF-LF
2 402
NOSTUFF
D5350
BAS16-75V-0.25A
SOT23-5
IOUT 3
OMIT
72 71 6
49 50 53 58
R5370
1
GND_SMC_AVSS
a
n
i
C5359
20%
6.3V
2 X5R
402
1%
1/16W
MF-LF
2 402
IN
y
r
MXM_PWR_SENSE
SMC_MXM_VSENSE_R
71
R5309
SM
MXM_PWR_SENSE 1
SOT23-LF
TO SMC
R5352
4.53K2
SMC_GPU_ISENSE 49
1%
1/16W
MF-LF
402
MXM_PWR_SENSE
1
C5358
0.22UF
20%
2 6.3V
X5R
402
GND_SMC_AVSS
49 50 53 58
SCALE
1.3289 A/V
COUNT
.004286786 A/COUNT
TABLE_5_HEAD
REFERENCE DESIGNATOR(S)
BOM OPTION
TABLE_5_ITEM
R5351
20_INCH_LCD
TABLE_5_ITEM
R5351
24_INCH_LCD
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
53
OF
33
118
55 6
CRITICAL
CRITICAL
J5500
CPU_TDIODE
J5560
53398-05
M-ST-SM
6
M-ST-SM
6
55 6
R5570
=PP3V3_S0_TSENS
47
1
PP3V3_S0_CPUTHMSNS_R
MIN_LINE_WIDTH=0.25 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=3.3V
5%
1/16W
MF-LF
402
CPU_TDIODE
CPU_TDIODE
VDD
2
52
52
=SMB_AMB_TEMP_SDA
=SMB_AMB_TEMP_SCL
C5500
4
5
I2C ADDR:0X96(1001011)
52
1UF
52
10%
6.3V
CERM 2
402
108 10
I2C ADDR:0X94(1001100)
1
y
r
=PP3V3_S0_TSENS
53398-05
C5660
=SMB_LCD_TEMP_SDA
=SMB_LCD_TEMP_SCL
U5570
C5580
108 10
DP1
DN1
CPU_THERMD_N
OUT
MSOP
20
20%
10V
CERM
402
20
20
a
n
i
470PF
10%
50V
CERM
402
C5570
0.1uF
EMC1043-5
CPU_TDIODE
10%
6.3V
CERM 2
402
CPU_THERMD_P
OUT
1UF
DP2
DN2
SMCLK
SMDATA
=SMB_CPU_THRM_SCL
=SMB_CPU_THRM_SDA
CRITICAL
GND
518S0407
=PP3V3_S0_TSENS
518S0407
m
il
BI
52
BI
52
20
=NB_TDB_FORCE
=NB_TDB_SENSE
=NB_TDE_FORCE
=NB_TDE_SENSE
SILK_PART=ODD TEMP
J5550
53780-0371
J5551
M-RT-SM
4
B
108 55
SM-2MT-BLK-LF
3
HDD_THRMD_P
108 55
2
108 55
HDD_THRMD_N
C5550
100PF
5%
50V
CERM
402
ODD_THRMD_P
C5551
100PF
5%
50V
CERM
402
108 55
ODD_THRMD_N
CRITICAL
518S0370
CRITICAL
518S0247
SILK_PART=CPU HSK
J5510
53398-0276
M-ST-SM
3
108 55
CPU_HSK_THRMD_P
108 55
2
108 55
CPU_HSK_THRMD_N
C5510
100PF
5%
50V
CERM
402
CRITICAL
518S0327
108 55
C5502
20%
6.3V
CERM
805-1
108 55
HDD_THRMD_P
ODD_THRMD_P
CPU_HSK_THRMD_P
GPU_HSK_THRMD_P
108 55
HDD_THRMD_N
108 55
108 55
108 55
J5511
GPU_HSK_THRMD_N
100PF
5%
50V
CERM
402
20%
10V
CERM
402
108 55
ODD_THRMD_N
108 55
CPU_HSK_THRMD_N
100K
100PF
5%
50V
CERM
402
R5510
100K
5%
1/16W
MF-LF
402 2
5 DM
NC
U5500
LLP
GND
XW5502
SM
1
GPU_HSK_THRMD_N
R5500
TCRIT1 10
TCRIT2 11
TCRIT3 14
0
5%
1/16W
MF-LF
2 402
=SMB_REMOTE_TEMP_SDA
=SMB_REMOTE_TEMP_SCL
THRML
52
A0 9
REMOTE_TEMP_ADDR
PAD
1
R5501
OMIT
0
5%
1/16W
MF-LF
2 402
OMIT
2
Thermal Sensors
CRITICAL
518S0403
SYNC_MASTER=DAVE_MASTER
SYNC_DATE=N/A
52
U5500_TCRIT1
U5500_TCRIT2
U5500_TCRIT3
XW5503
108 55
100K
1NOSTUFF
SMBDAT 12
SMBCLK 13
SM
R5511
CRITICAL
1 NC
5%
1/16W
MF-LF
2 402
V+
7 D1+
6 D2+
4 D3+
3 D4+
REMOTE_THRMD_M
OMIT
5%
1/16W
MF-LF
402 2
OMIT
2
SM
GPU_HSK_THRMD_P
C5511
R55121
C5503
0.1UF
XW5501
M-RT-SM
3
C5501
XW5500
SM
SILK_PART=GPU HSK
53261-0227
10UF
e
r
SILK_PART=HDD TEMP
=PP3V3_S0_TSENS
LM95214
55 6
15
PPMCH_CORE_S0
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
55
OF
33
118
FAN 0
57 56 6
57 56 6
=PP12V_S0_FAN
=PP3V3_S5_FAN
1
1.5K
R5606
1.5K
5%
1/4W
MF-LF
2 1206
10K
5%
1/16W
MF-LF
2 402
R56031
R5602
5%
1/8W
MF-LF
805 2
CRITICAL
5
F0_VOLTAGE8R5
3.9K
F0_GATESLOWDN
Q5600
5%
1/8W
MF-LF
805
1206A-03-LF
CRITICAL
6
7
8
1
2
3
C5601
J5600
0.47UF
SMC_FAN_0_CTL
HS8804F-B
10%
2 16V
X7R
805
Q5602
M-RT-SM
5
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.5MM
2N7002
2
2
57 56 6
D5600
SOT23
47K
FAN_TACH0
5%
1/16W
MF-LF
402
NOTE:
m
il
FAN 1
57 56 6
57 56 6
=PP12V_S0_FAN
=PP3V3_S5_FAN
1
R5611
10K
5%
R5610
1.5K
1/16W
MF-LF
2 402
Q5605
2N7002
R5601
10K
5%
1/16W
MF-LF
2 402
R5698
1
47K
FAN_TACH1
5%
1/16W
MF-LF
402
SOT23-LF
=PP3V3_S0_FAN
1
SMC_FAN_1_TACH
R5609
3.9K
5%
1/8W
MF-LF
805 2
e
r
CRITICAL
5
F1_GATESLOWDN
HD FAN
Q5603
NTHS5443T1
1206A-03-LF
CRITICAL
0.47UF
10%
2 16V
X7R
805
D5601
MMBD914XXG
HS8804F-B
M-RT-SM
5
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
1
FAN_1_PWR
2
3
CRITICAL
1
C5605
100UF
MOTOR CONTROL
TACH
GND
12V DC
20%
2 16V
ELEC
6.3X5.5SM1
1 SOT23
J5601
C5603
6
7
8
1
2
3
57 56 6
1.5K
5%
1/8W
MF-LF
805
SMC_FAN_1_CTL
49
R56071
5%
1/4W
MF-LF
2 1206
F1_VOLTAGE8R5
49
MOTOR CONTROL
TACH
GND
12V DC
518S0406
5%
1/16W
MF-LF
2 402
C5602
20%
2 16V
ELEC
6.3X5.5SM1
R5600
10K
R5699
100UF
MMBD914XXG
SMC_FAN_0_TACH
CRITICAL
a
n
i
=PP3V3_S0_FAN
1
49
FAN_0_PWR
SOT23-LF
y
r
NTHS5443T1
1
49
ODD FAN
R5605
518S0406
HD AND OD FAN
SYNC_MASTER=DAVE_MASTER
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
56
OF
33
118
FAN 2
56 6
=PP12V_S0_FAN
D
56 6
=PP3V3_S5_FAN
y
r
R5705
1.5K
5%
1/16W
MF-LF
2 402
49
R57011
R5704
10K
1.5K
5%
1/4W
MF-LF
2 1206
5%
1/8W
MF-LF
805 2
SMC_FAN_2_CTL
CRITICAL
5
R5703
F2_VOLTAGE8R5
3.9K
CPU FAN
F2_GATESLOWDN
1206A-03-LF
NTHS5443T1
5%
1/8W
MF-LF
805
Q5700
CRITICAL
1
2
3
10%
16V
2 X7R
805
Q5702
2N7002
a
n
i
0.47UF
3
D
C5701
MIN_LINE_WIDTH=0.5MM
MIN_NECK_WIDTH=0.25MM
FAN_2_PWR
SOT23-LF
CRITICAL
D5700
56 6
=PP3V3_S0_FAN
MMBD914XXG
SOT23
R5700
10K
5%
1/16W
MF-LF
2 402
FAN_TACH2
R5797
49
SMC_FAN_2_TACH
47K
6
7
8
C5702
100UF
20%
2 16V
ELEC
6.3X5.5SM1
J5700
85205-0401-BLK-ST-SM
5
MOTOR CONTROL
TACH
GND
12V DC
2
3
4
518S0191
m
il
5%
1/16W
MF-LF
402
e
r
CPU FAN
SYNC_MASTER=DAVE_MASTER
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
57
OF
33
118
D
=PP5V_S3_ALS
=PP5V_S3_BNDI
1
y
r
6 47
C5881
1UF
CRITICAL
J5880
10%
6.3V
CERM
402
88243-0701-BK
M-ST-SM
8
a
n
i
ALS_RIGHT
OUT
49
3
4
5
USB_IR_L_N 47
USB_IR_L_P 47
108
108
C5880
6.3V
CERM-X5R
402
GND_SMC_AVSS
49 50 53
518S0501
m
il
e
r
ALS Support
SYNC_MASTER=DAVE_MASTER
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
58
OF
33
118
y
r
a
n
i
C
6
=PP3V3_S5_ROM
R6100
3.3K
PLACEMENT_NOTE=Place R6190 within 12.7mm of U2300
PLACEMENT_NOTE=Place R6191 within 12.7mm of U2300
103 24
IN
IN
SPI_SCLK_R
2
5%
1/16W
MF-LF
402
SPI_CE_R_L<0>
C6100
0.1UF
CRITICAL
2
VDD
U6100
20%
10V
CERM
402
m
il
SOI
15
1
5%
1/16W
MF-LF
2 402
16MBIT
R6190
103 24
R6101
3.3K
5%
1/16W
MF-LF
402 2
103 7
SPI_SCLK
SI
SCK
103
SPI_CE_L<0>
5%
1/16W
MF-LF
402
SPI_WP_L
SPI_HOLD_L
CE*
WP*
HOLD*
OMIT
SO
R6193
15
SPI_A_SI_R
SST25VF016B
R6191
15
SPI_A_SO_R
VSS
4
R6114
15
5%
1/16W
MF-LF
402
SPI_SI_R
SPI_SO
IN
OUT
24 103
7 24 103
5%
1/16W
MF-LF
402
e
r
SPI BootROM
SYNC_MASTER=T9_MLB_NOME
SYNC_DATE=05/07/2007
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
61
OF
33
118
SB: PM_SLP_S3_L
SB: PM_S4_STATE_L
12V_S5 SUPPLIED BY AC/DC MAX RAMP TIME < 50MS MAX RAMP RATE 10V/MS
12V_S5
y
r
VREGS: ALL_SYS_PWRGD
99 MS
SMC: IMVP_VR_ON
3V3_S5 SWITCHER SOURCED AND ENABLED FROM 5V_S5
3V3_S5
IMVP: VR_PWRGD_CLKEN
3 MS
IMVP: VR_PWRGOOD_DELAY
a
n
i
SMC STARTS
COUNT
IMVP6 ON
PM_SB_PWROK
NB_PWROK
CLKEN SENT TO SB
m
il
1V8_S3
SB SAYS
SUSPEND SOON
SB: PM_SUS_STAT#
SB: PM_SLP_S3_L
12V_S0 SUPPLIED BY AC/DC
12V_S0
3V3_S0 FET GATED BY PM_SLP_S3_L; RC SOFT TURN-ON CIRCUIT; SLOWER THAN 5V_S0
3V3_S0
VREGS: ALL_SYS_PWR_GD
SMC: IMVP_VR_ON
SLEEP OR SHUTDOWN
SB: PM_SLP_S3_L
SB: PM_S4_STATE_L
e
r
IMVP6: VR_PWRGOOD_DELAY
SB: CPUPWRGD
CRESTLINE AND ICH8 SWITCHERS ENABLED BY PGOOD_3V3_S0 AND HAVE VARIABLE RCS
1V5_S0/1V25_S0/1V05_S0/MCH_CORE_SO
NOTE: NO SEQUENCING REQUIREMENTS FOR 0.9V, 1.25V, 1.8V, 2.5V, AND 12V
SMC: SB_PWROK
SYNC_MASTER=MARK
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
69
OF
33
118
PGOOD Comparators
78 76 7 6
C7010
PP5V_S5
20%
16V
CERM
603
R7010 1
2.21K
R7000
78 77 70 13 7 6
PP3V3_S0
1%
1/16W
MF-LF
402
R70181
R7013
7.5K
1%
1/16W
MF-LF
402
75
1.62K
76
100K 2
5%
1/16W
MF-LF
402
1.43K
V+
U7010
LM339A
3.92K
R7003
715
PP0V9_S0
1%
1/16W
MF-LF
402
5VS5_2V80_REF
3V3S0_COMP_REF
5VS5_1V53_REF
1V8S0_COMP_REF
5VS5_4V24_REF1
5VS0_COMP_REF
5VS5_0V76_REF
0V9S0_COMP_REF
R7011
R7014
1K
1%
1/16W
MF-LF
402
R7019
10K
R7021
1K
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
NOSTUFF
NOSTUFF
C7000
C7002
C7001
20%
10V
CERM
402
1%
1/16W
MF-LF
402
5
6
7
8
9
10
11
NOSTUFF 0.1uF
0.1uF
10K
0.1uF
20%
10V
CERM
402
SOI-LF
-1
+1
-2
+2
-3
+3
-4
+4
OUT1
OUT2
OUT3
OUT4
GND
NOSTUFF
R7006 R7007
R7008
100K
100K
100K
100K
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
R7005
1%
1/16W
MF-LF
402
75 7 6
CRITICAL
R7002
PP5V_S0
PGOOD_3V3_S3
IN
1%
1/16W
MF-LF
402
100K 2
2.74K
1%
1/16W
MF-LF
402
94 78 74 73 72 71 7 6
PP3V3_S3
5%
1/16W
MF-LF
402
R7081
R7001
PP1V8_S0
R7020
1%
1/16W
MF-LF
402
78 7 6
PGOOD_1V8_S3
IN
5.62K
1%
1/16W
MF-LF
402
78 76 75 7 6
R7080
0.1UF
78 77 76 70 7 6
PP5V_S3
78 76 75 7 6
PP12V_S5
PGOOD_3V3_S0
14
13
78 77 70 13 7 6
OUT
OUT
PGOOD_5V_S0
OUT
70
PGOOD_0V9_S0
OUT
70
IN
PGOOD_0V9_S0
PGOOD_5V_S0
0.1uF
70
IN
77 75 70 7 6
77
IN
100
5%
1/16W
MF-LF
402
PGOOD_1V8_S0
R7032
1
NVIDIA
R7070
5%
1/16W
MF-LF
402
R7040
77 70
IN
PGOOD_3V3_S0
R7065
R7066
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
100K
PGOOD_CR_S0
5%
1/16W
MF-LF
402
SSM6N15FE
PGOOD_12V_S0
10%
16V
2 CERM
402
S 1
74
73
RUNSS_GATE_D_L
70
5%
1/16W
MF-LF
402
C7062
0.01UF
SOT563
IN
74
e
r
R7063
R7064
51K
5%
1/16W
MF-LF
402
680
5%
1V25S0_RUNSS_BUF
Q7006
1V25S0_RUNSS
SSM6N15FE
C7061
0.01UF
10%
16V
2 CERM
402
S 4
RUNSS_GATE_D_L
70
1/16W
MF-LF
402
D 3
SOT563
73
OUT
IN
IN
IN
IN
10K
5%
78 77 76 70 7 6
PP5V_S5
1/16W
MF-LF
402
R7060
470K
5%
1/16W
MF-LF
2 402
70
CRITICAL
D 6
Q7006
Q7007
1/16W
MF-LF
402
1V5S0_RUNSS
D 3
ALL_SYS_PWRGD
OUT
7 49 50 84
OUT
7 25 28
71 22 16 7
IN
VR_PWRGOOD_DELAY
5
1
MC74VHC1G08
SOT23-5-LF
U7056
PM_SB_PWROK
PGOOD_MCH_CORE_S0
PGOOD_1V05_S0
100
77
IN
100
5%
1/16W
MF-LF
402
R7037
R7038
5%
1/16W
MF-LF
402
100
IMVP_PGD_IN
5%
1/16W
MF-LF
402
CR_E
R7036
PGOOD_1V25_S0
PGOOD_1V5_S0
R7035
100
5%
1/16W
MF-LF
402
77 75 70 7 6
PP3V3_S5
R70921
10K
5%
1/16W
MF-LF
402
PGOOD_3V3_S5
OUT
49
NOSTUFF
1
C7090
220PF
5%
25V
2 CERM
402
OUT
73
C7060
0.01UF
10%
16V
2 CERM
402
SOT563
1K
5%
SSM6N15FE
5
SOT23-5-LF
R7062
1V5S0_RUNSS_BUF
CRITICAL
MC74VHC1G08
U7052
PP3V3_S0
5%
1/16W
MF-LF
402
74
20%
10V
CERM
402
5.1K
OUT
73 74
m
il
D 6
Q7007
R70391
1V05S0_RUNSS
R7041
76
78 77 70 13 7 6
330
1V05S0_RUNSS_BUF
5.1K
PGOOD_2V5_S0
100
100
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
PP3V3_S5
PGOOD_S0_OUT1
a
n
i
R7031
70
100
0.1uF
20%
10V
CERM
402
(MC74VHC1G08 HAS
100NS/V MAX SLEW RATE)
(10PF MAX CIN)
5%
1/16W
MF-LF
402
R7033
(HYSTERESIS)
(R7000: 16.5K; R7001: 17.4K; R7002: 24.9K; R7003: 8.25K)
(R7010: 21.5K; R7013: 7.15K; R7018: 52.3K; R7020: 1.37K)
R7030
70
C7056
0.1uF
5.1K
5%
1/16W
MF-LF
402
PP3V3_S5
C7052
R7034
70
20%
10V
CERM
402
77 75 70 7 6
C7003
20%
10V
CERM
402
PP3V3_S0
70 77
PGOOD_1V8_S0
12
y
r
PWROK Sequencing
S 4
SYNC_MASTER=MARK
RUNSS_GATE_D_L
SYNC_DATE=N/A
SSM6N15FE
SOT563
78 75 49 25 7 6
IN
S 1
PM_SLP_S3_L
SIZE
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
70
OF
33
118
R7120
72 53 6
=PP12V_S0_CPU
10
C7109
PPVIN_S5_IMVP6_VIN
C7196
20%
16V
POLY
TH
0.1UF
10%
16V
X5R
402
C7150
C7156
10UF
10UF
10%
25V
X5R
1206-1
10%
25V
X5R
1206-1
10%
25V
X5R
1206-1
U7101
PP5V_S0_IMVP6_VDD
C7126
10%
25V
X5R
603-1
R7121
10
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=3.3V
R7119
C7130
499
(IMVP6_NTC)
CRITICAL
R7126
C7110
470K
0.1uF
100 12
IN
100 12
IN
100 12
IN
100 12
IN
100 12
IN
100 12
IN
100 12
IN
23 16 10
100
0.01uF
402
10%
16V
CERM
402
LGATE 4
28
2.0K
2
2
IMVP6_VID<6>
IMVP6_VID<5>
IMVP6_VID<4>
IMVP6_VID<3>
IMVP6_VID<2>
IMVP6_VID<1>
IMVP6_VID<0>
CPU_DPRSTP_L
100 IMVP_DPRSLPVR
IMVP6_PSI_L
IN
IN
R7127
49 7
4.02K
1
1
1%
1/16W
MF-LF
402
R7108
70 22 16 7
VR_PWRGD_CLKEN_L
IMVP_VR_ON
VR_PWRGOOD_DELAY
IMVP6_VR_TT_L
IMVP6_NTC
OUT
IN
OUT
147K
0.015UF
2
2
1%
1/16W
MF-LF
402
71
71
71
VIN
VDD
71
10%
50V
CERM
402
71
71
VID6
U7100
33
VID5
QFN
32
VID4
31
VID3
30
VID2
29
VID1
28
VID0
FCCM 24
IMVP6_PMON
OUT
53
IMVP6_FCCM
OUT
71 72
PWM1 27
36
DPRSLPVR
PWM2 26
PSI*
PWM3 25
39
3V3
38
CLK_EN*
35
VR_ON
40
PGOOD
ISEN1 23
ISEN2 22
71
6 FCCM
OUT
VSUM 17
OCSET 7
SOFT
71
VO 16
RBIAS
11
COMP
VW
71
19
390pF
10%
50V
CERM
402
10%
50V
CERM
402
IMVP6_COMP_RC
(IMVP6_VW)
R7114 1
C7107
180K
5%
1/16W
MF-LF
402
5%
50V
CERM
402
P
R7110
6.98K
47PF
(IMVP6_COMP)
PART NUMBER
QTY
DESCRIPTION
REFERENCE DES
114S0333
RES,MTL FILM,1/16W,15.8K,1,0402,SM,LF
R7116
114S0327
RES,MTL FILM,1/16W,13.7K,1,0402,SM,LF
R7116
71
72 71
72 71
71
71
71
71
71
71
71
71
72 71
IMVP6_OCSET
IMVP6_VSUM
IMVP6_VO
IMVP6_DROOP
IMVP6_DFB
IMVP6_SOFT
IMVP6_RBIAS
IMVP6_VDIFF
IMVP6_FB
IMVP6_COMP
IMVP6_VW
IMVP6_FCCM
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
CRITICAL
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
108 71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
72 71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.20 MM
I864
71
IMVP6_BOOT2
UGATE 8
71
IMVP6_UGATE2
71
10%
16V
CERM
402
PAD
IMVP6_PWM1
IMVP6_PHASE1
IMVP6_BOOT1
IMVP6_UGATE1
IMVP6_LGATE1
IMVP6_ISEN1
IMVP6_FET_RC1
IMVP6_VSUM1
IMVP6_VO1
IMVP6_BOOT1_RC
71 72
OUT
71 72
OUT
71
NOSTUFF
C7116
10%
50V
CERM
402
C7129
NOSTUFF
71
1 2 3
10%
50V
CERM
402
R7100
10K
C7112
R7104 1
R7141 1
10K
5%
1/16W
MF-LF
402
1%
1/10W
MF-LF
603
C7103
0.22UF
1
1%
1/16W
MF-LF
402
0.0047UF
10%
25V
CERM
402
IMVP6_VO1
NOSTUFF
IMVP6_VSUM1
NTMFS4108N
0.0022UF
10%
50V
CERM
402
71
Q7104
C7190
0.0022UF
NOSTUFF
CRITICAL
NOSTUFF
C7100
10%
10V
CERM
402
R7101
3.65K
1%
1/10W
MF-LF
2 603
71 72
1%
1/16W
MF-LF
402
10%
16V
X5R
402
1%
1/16W
MF-LF
402
CRITICAL
OMIT
Q7103
NTMFS4108N
OMIT
XW7102
SM
XW7101
SMB
5%
1/4W
MF-LF
1206
DCR=0.84 MOHM
OMIT
D7101
2
HM56-11120-TH
CRITICAL
R7102
1.0
CRITICAL
SM
B340LBXF
1
71
71
D
1 2 3
IMVP6_FET_RC2
71
C7102
NOSTUFF
1
IMVP6_VO2
0.0022UF
10%
50V
CERM
402
10%
50V
CERM
402
Q7105
NTMFS4108N
R7105
10K
C7111
C7192
0.0022UF
R7107
5%
1/16W
MF-LF
402
MLP5X6-LFPAK-DFN
NOSTUFF
IMVP6_VSUM2
NOSTUFF
CRITICAL
1%
1/16W
MF-LF
402
0.0047UF
10%
25V
CERM
402
1 2 3
C7104
0.22UF
1
10%
10V
CERM
402
R7106
3.65K
R7131
1%
1/10W
MF-LF
2 603
10KOHM-5%
0.33uF
10%
6.3V
CERM-X5R
402
0.36UH-25A
1
MLP5X6-LFPAK-DFN
IMVP6_VO_R
C7128
10K
1%
1/10W
MF-LF
603
L7101
(IMVP6_PHASE2)
2.61K
1%
1/16W
MF-LF
402
R7140 1
CRITICAL
1 2 3
R7130 1
R7115
NOSTUFF
MLP5X6-LFPAK
R7116
11K
0.033UF
FDMS8690-RJK0305DPB
(IMVP6_VO)
C7134
Q7102
1%
1/16W
MF-LF
2 402
5%
50V
CERM
402
CRITICAL
13.7K
180pF
OMIT
0603-LF
2
(IMVP6_ISEN2)
LAYOUT NOTE:
PLACE CLOSE TO L7100
(IMVP6_VSUM)
(IMVP6_VO)
R7122
IMVP6_VSEN_P
100
0
5%
1/16W
MF-LF
402
IMVP6_VSEN_N
100
10%
16V
CERM
402
IN
11 100
IN
11 100
CPU_VCCSENSE_N
10%
16V
CERM
402
DPRSLPVR
DPRSTP*
PSI*
Operation
Mode
3/2-PHASE
CCM
2/1-PHASE
CCM
1
1
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.23 MM
MIN_LINE_WIDTH=1.5 MM
MIN_NECK_WIDTH=0.25 MM
108 71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
71
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM
71
I849
71
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.23 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
71
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
I865
71
R7123
5%
1/16W
MF-LF
402
C7132
0.01uF
CPU_VCCSENSE_P
NOSTUFF
C7133
0.01uF
OMIT
R7118
20%
6.3V
X5R
402
SM
1
0.001uF
1K
0.22UF
XW7100
(IMVP6_ISEN1)
IMVP6_LGATE2
THRML
LOW_TDP
OMIT
20%
25V
X5R
603
SM
2
SM
B340LBXF
IMVP6_FET_RC1
OUT
5.76K
HIGH_TDP
72
BOM OPTION
C7121
0.22UF
IMVP6_PHASE2
SIGNAL_MODEL=EMPTY
1%
1/16W
MF-LF
402
TO SUPPORT LOW TDP MEROM AND HIGH TDP MEROM ON SAME BOARD:
- 35W TDP: 55A CONTINUOUS CURRENT
SET R7116 TO 13.7K; OC TRIP POINT OF 65.2A
- 55W TDP: 64A CONTINUOUS CURRENT
SET R7116 TO 15.8K; OC TRIP POINT OF 75.2A
BOOT 1
71
XW7104
XW7103
MLP5X6-LFPAK-DFN
C7127
m
il
e
r
TPAD
MIN_LINE_WIDTH=0.50 MM
MIN_NECK_WIDTH=0.20 MM
VOLTAGE=0V
C7113
5%
1/16W
MF-LF
402
603
1%
1/16W
MF-LF
402
C7131
OMIT
OUT
RTN 13
DCR=0.84 MOHM
OMIT
SMB
5%
1/4W
MF-LF
1206
a
n
i
1
72
IMVP6_DFB
VSEN 12
VSS
2
71
IMVP6_BOOT2_RC
C7136
4.7uF
1
R7143
20%
2 6.3V
CERM
OMIT
GND_IMVP6_SGND
C7114
R7117
FB
NTMFS4108N
5
IMVP6_VSUM
IMVP6_OCSET
IMVP6_VO
IMVP6_DROOP
VDIFF
10
R7109
330PF
2
IMVP6_ISEN1
IMVP6_ISEN2
IMVP6_ISEN3
NTC
DROOP 14
1%
1/16W
MF-LF
402
Q7101
D7100
1.0
CRITICAL
CRITICAL
R7103
MLP5X6-LFPAK-DFN
LGATE 4
IMVP6_PWM3
ISEN3 21
IMVP6_FB
IMVP6_COMP
IMVP6_VW
IMVP6_LGATE1
4
PHASE 7
VR_TT*
(IMVP6_FB)
OMIT
1
71
IN
(GND_IMVP6_SGND)
IMVP6_VDIFF
6 7 72
0.36UH-25A
HM56-11120-TH
CRITICAL
2 PWM
IMVP6_PWM2
y
r
L7100
1 2 3
IMVP6_PHASE1
U7102
(IMVP6_FCCM)
DPRSTP*
IMVP6_RBIAS
IMVP6_UGATE1
QFN
37
1.82K
1%
1/16W
MF-LF
402 2
71
ISL6208
71
41
(IMVP6_PHASE1)
VCC
0.01uF
604
PPVCORE_CPU
CRITICAL
1 2 3
PMON 2
IMVP6_VDIFF_RC
R7111 1
MLP5X6-LFPAK
IMVP6_BOOT1
71
34
(GND_IMVP6_SGND)
IMVP6_SOFT
C7106
680PF
10%
25V
X5R
1206-1
FDMS8690-RJK0305DPB
20%
25V
X5R
603
DFB 15
1
5%
1/16W
MF-LF
402
(300KHZ)
CRITICAL
IMVP6_NTC_R
28
10UF
10%
25V
X5R
1206-1
0.22UF
PAD
GND
C7108
10UF
10%
25V
X5R
1206-1
Q7100
C7115
THRML
GND
5%
1/16W
MF-LF
402
LAYOUT NOTE:
PLACE R7108 CLOSE TO RBIAS PIN
C7101
10UF
CRITICAL
R7197
71
PHASE 7
LAYOUT NOTE:
UGATE 8
6 FCCM
(IMVP6_FCCM)
1%
1/16W
MF-LF
402
6.3V
CERM
603
BOOT 1
1%
1/16W
MF-LF
402
10%
16V
X5R
402
1%
1/16W
MF-LF
402
20
R7199
2 PWM
IMVP6_PWM1
PP3V3_S0_IMVP6_3V3
499
PM_DPRSLPVR
71
ISL6260CCRZ
10%
16V
X7R
402
C7135
4.7uF
R71421
20%
QFN
1UF
=PP3V3_S0_IMVP
C7105
20%
16V
POLY
TH
1%
1/16W
MF-LF
402
ISL6208
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=5V
18
10
VCC
R7112
1
C7155
470UF
C7154
IMVP6_BOOT1_RC
71
IN
PP5V_S0
100 25 16
C7152
10UF
CRITICAL
CRITICAL
470UF
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.2 MM
VOLTAGE=12V
1%
1/16W
MF-LF
402
72 70 7 6
94 78 74 73
IMVP6_PWM2
IMVP6_PHASE2
IMVP6_BOOT2
IMVP6_UGATE2
IMVP6_LGATE2
IMVP6_ISEN2
IMVP6_FET_RC2
IMVP6_VSUM2
IMVP6_VO2
IMVP6_BOOT2_RC
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.23 MM
MIN_LINE_WIDTH=1.5 MM
MIN_NECK_WIDTH=0.25 MM
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM
3/2-PHASE
2/1-PHASE
DCM
SYNC_DATE=N/A
DCM
I850
MIN_LINE_WIDTH=0.5 MM
MIN_NECK_WIDTH=0.25 MM
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.23 MM
SIZE
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
DRAWING NUMBER
SCALE
SHT
NONE
I866
REV.
051-7229
71
OF
33
118
D
71 53 6
y
r
=PP12V_S0_CPU
CRITICAL
94 78 74 73 71 70 7 6
PP5V_S0
C7254
C7255
470UF
1
20%
16V
POLY
TH
C7235
4.7uF
20%
6.3V
CERM
603
5
CRITICAL
VCC
R7250
U7201
ISL6208
QFN
72 71
71
IN
IMVP6_PWM3
2 PWM
IN
IMVP6_FCCM
6 FCCM
BOOT 1
72
IMVP6_BOOT3
UGATE 8
72
IMVP6_UGATE3
PHASE 7
0.22UF
72
IMVP6_BOOT3_RC
5%
1/16W
MF-LF
402
CRITICAL
C7215
2
Q7200
a
n
i
FDMS8690-RJK0305DPB
MLP5X6-LFPAK
20%
25V
X5R
603
THRML
PAD
R7203
NOSTUFF
CRITICAL
D
G
CRITICAL 2
NTMFS4108N
72
1 2 3
SM
B340LBXF
IMVP6_FET_RC3
NOSTUFF
NOSTUFF
1
0.0022UF
0.0022UF
10%
50V
CERM
402
10%
50V
CERM
402
C7212
R7200
1%
1/16W
MF-LF
402
0.0047UF
1 2 3
10%
25V
CERM
402
10K
6 7 71
SM
72
IMVP6_VO3
NOSTUFF
R7204
R7241
10K
5%
1/16W
MF-LF
402
1%
1/10W
MF-LF
603
CRITICAL
NTMFS4108N
PPVCORE_CPU
XW7204
2
Q7204
C7290
m
il
2
OMIT
IMVP6_VSUM3
72
MLP5X6-LFPAK-DFN
C7200
10%
25V
X5R
1206-1
XW7203
SMB
5%
1/4W
MF-LF
1206
MLP5X6-LFPAK-DFN
10UF
DCR=0.84 MOHM
OMIT
D7200
1.0
Q7201
GND
C7208
10%
25V
X5R
1206-1
L7200
IMVP6_LGATE3
10UF
0.36UH-25A
IMVP6_PHASE3
72
C7201
10%
25V
X5R
1206-1
CRITICAL
1 2 3
HM56-11120-TH
LGATE 4
10UF
C7203
IMVP6_ISEN1
IN
71
IN
71
IMVP6_ISEN3
IN
71 72
IMVP6_VSUM
OUT
0.22UF
1
IMVP6_VO
10%
10V
CERM
402
R7201
3.65K
1%
1/10W
MF-LF
2 603
71
e
r
72 71
108 72
72
72
72
72 71
72
72
72
72
IMVP6_PWM3
IMVP6_PHASE3
IMVP6_BOOT3
IMVP6_UGATE3
IMVP6_LGATE3
IMVP6_ISEN3
IMVP6_FET_RC3
IMVP6_VSUM3
IMVP6_VO3
IMVP6_BOOT3_RC
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.23 MM
I51
MIN_NECK_WIDTH=0.25 MM
I43
MIN_NECK_WIDTH=0.25 MM
I44
MIN_NECK_WIDTH=0.25 MM
I45
MIN_NECK_WIDTH=0.25 MM
I46
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.23 MM
I48
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
I47
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
I49
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
I50
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 MM
I57
MIN_LINE_WIDTH=1.5 MM
MIN_LINE_WIDTH=0.25 MM
MIN_LINE_WIDTH=0.5 MM
MIN_LINE_WIDTH=0.5 MM
SYNC_MASTER=MARK
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
72
OF
33
118
D
PP12V_S0
y
r
CR_E
CRITICAL
470UF
C7341
10UF
C7342
C7330
10UF
10%
2 25V
X5R
1206-1
20%
2 16V
POLY
TH
10%
2 25V
X5R
1206-1
603-1
CRITICAL
1
1 CRITICAL
SOT23
SOT23
CRITICAL
C7331
2 3 4 9
0.1UF
FDMS9620S
14
5%
1/16W
MF-LF
2 402
MLP
20%
2 25V
CERM
603
1V5REG_SOFT
12
1V5REG_BOOT
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V5REG_UGATE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
CRITICAL
L7300
1.5UH-12A
PP1V5_S0
(1.512V NOMINAL)
1
22UF
C7303
C7301
22UF
20%
6.3V
2 CERM
805
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V5REG_LGATE
U7300
R7306
5.11
1%
1/4W
MF-LF
2 1206
C7300
330UF
Q2
UGATE1
UGATE2 24 1V05REG_UGATE
PHASE1
PHASE2 25
ISEN1
70
LGATE2 27
LGATE1
PGND1
PGND2 26
10
VSEN1
VSEN2 19
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
PEAK=2.77A
AVE=2.45A
<RA>
C7302
0.0022UF
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R7301
15.0K
EN2 21
EN1
PG2/REF 16
PG1
OCSET2 18
OCSET1
0.01UF
10%
50V 2
X7R
402
<RB>
P
GND_PP1V5REG_SGND
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
2 1V05S0_RUNSS
IN
70 74
GND
108
10%
50V
CERM
402
CR_STD
R7384
10K
1%
1/16W
MF-LF
2 402
PEAK=3.43A
AVE=3.03A
CR_E
L7360
1.5UH-12A
10
SW
PP1V05_S0
6 7 34
73
CRITICAL
1
CR_E
R7356
C7390
330UF
5.11
CR_E
1%
1/4W
MF-LF
2 1206
CRITICAL
1
C7391
20%
2 2V
POLY
CASE-D2-SM
C7364
C7392
22UF
20%
2 2V
POLY
CASE-D2-SM
CR_E
CR_E
1
330UF
1V05REG_SNUBBER_R
1
1.05V NOMINAL
CR_E
MMD06EZ-SM
DCR=9 MOHM
20%
6.3V
2 CERM
805
1000pF
CR_E
1
C7393
22UF
20%
6.3V
2 CERM
805
10%
2 25V
X7R
402
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1.05V S0
M72/M78
POWER BUDGET
CRITICAL
1V05REG_SWITCHNODE
C7345
0.001UF
603
0.1UF
7 6 5
NOSTUFF
1V05S0_EN
OMIT
1%
1/16W
MF-LF
402 2
10%
2 25V
X5R
C7361
20%
25V
2 CERM
603
Q2
1.40K
(200MV HYSTERESIS)
5% 1/16W MF-LF 402
PGOOD_1V05_S0
OUT 70
(3MS NOISE FILTER)
1V05REG_OCSET
XW7300
C7332 1
1%
1/16W
MF-LF
2 402
VOLTAGE=0V
8
1V5S0_RUNSS
(200MV HYSTERESIS)
15
PGOOD_1V5_S0
OUT
(3MS NOISE FILTER)
11
1V5REG_OCSET
IN
e
r
10%
50V
2 CERM
402
10%
50V
CERM
402
R73711
C7360
1UF
10%
2 25V
X5R
1206-1
1V05REG_LGATE
10UF
CR_E
CR_E
SM
1%
1/16W
MF-LF
2 402
0.001UF
10.2K
TLM833
R7300
C7335
1
Q1
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
DDR 13
NOSTUFF
D7300
1.5V S0
M72/78
POWER BUDGET
CTLSH3-30M833
1000pF
NOSTUFF
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
m
il
70
C7324
10%
2 25V
X7R
402
MLP
ISEN2 22 1V05REG_ISEN
9 4 3 2
FDMS9620S
R7382
1%
1/16W
MF-LF
2 402
5 6 7
1V5REG_SNUBBER_R
20%
2 2V
POLY
CASE-D2-SM
Q7360
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
CR_E
1K
CR_E
5%
1/16W
MF-LF
2 402
BOOT2 23 1V05REG_BOOT
BOOT1
R7321
CRITICAL
20%
2 2V
POLY
CASE-D2-SM
CRITICAL
1
1V5REG_SWITCHNODE
1V5REG_ISEN
Q1
10
SW
DCR=9 MOHM
330UF
20%
6.3V
2 CERM
805
108
MMD06EZ-SM
CRITICAL
C7304
R7361
ISL6539
SOFT1 SSOP SOFT2 17 1V05REG_SOFT
7 6
VIN
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
CR_E
NOSTUFF
1
CR_E
R7390
3.32K
1%
1/16W
MF-LF
2 402
CR_E
2
R7331
Q7300
1V05REG_BOOT_R
VCC
CR_E
C7382
TLM833
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
(300KHZ)
CRITICAL
28
1V5REG_BOOT_R
D7374
D7301
20%
2 6.3V
CERM
603
D7373
4.7UF
CR_E
BAT54E3
a
n
i
BAT54E3
CTLSH3-30M833
C7310
10%
2 25V
X5R
1206-1
10%
2 25V
X5R
PP5V_S0
1
CR_E
C7381
10UF
1UF
20
9
94 78 74 72 71 70 7 6
C7340
76 74 7 6
<RA>
C7370
0.0022UF
10%
50V
2 CERM
402
CR_E
R73831
R7323
100K
1%
1/16W
MF-LF
2 402
100K
1V05REG_VSEN
1%
1/16W
MF-LF
402 2
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
CR_E
1
CR_E
1
R7391
C7372
19.6K
1%
1/16W
MF-LF
2 402
0.01UF
10%
2 50V
X7R
402
<RB>
R7310
73 34 7 6
PP1V05_S0
PPMCH_CORE_S0
6 7 55 74
0
CR_STD
5%
1/4W
MF-LF
1206
R7311
1
0
CR_STD
R7312
1
5%
1/4W
MF-LF
1206
0
CR_STD
5%
1/4W
MF-LF
1206
R7313
1
SYNC_MASTER=MARK
2
SYNC_DATE=N/A
0
5%
1/4W
MF-LF
1206
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
73
OF
33
118
D
PP12V_S0
CRITICAL
1
C7441
10UF
C7430
10UF
10%
2 25V
X5R
1206-1
20%
2 16V
POLY
TH
C7442
10%
2 25V
X5R
1206-1
10%
603-1
CRITICAL
BAT54E3
SOT23
D7401
0.1UF
FDMS9620S
MLP
20%
2 25V
CERM
603
1V25REG_SOFT
12
1V25REG_BOOT
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V25REG_UGATE
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
CRITICAL
L7400
1.5UH-12A
1
PP1V25_S0
1
22UF
C7403
C7401
22UF
20%
6.3V
2 CERM
805
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1V25REG_LGATE
MCH_CORES0_SOFT
BOOT2 23
MCH_CORES0_BOOT
BOOT1
UGATE1
UGATE2 24
PHASE1
25
ISEN1
PHASE2
LGATE1
PGND1
PGND2 26
R7406
5.11
10
VSEN1
VSEN2 19
1%
1/4W
MF-LF
2 1206
C7400
330UF
Q2
909
1%
1/16W
MF-LF
2 402
5 6 7
1V25REG_SNUBBER_R
20%
2 2V
POLY
CASE-D2-SM
R7421
70
C7424
LGATE2 27
<RA>
C7402
0.0022UF
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R7401
8.45K
PG1
PG2/REF 16
OCSET2 18
OCSET1
0.01UF
10%
50V 2
X7R
402
<RB>
P
GND_PP1V25REG_SGND
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
108
GND
OMIT
IN
OUT
NOSTUFF
C7445
0.001UF
10%
50V
CERM
402
PPMCH_CORE_S0
(1.06V NOMINAL)
1
R7456
C7490
20%
2 2.5V
POLY
TH
1%
1/4W
MF-LF
2 1206
CRITICAL
1
20%
6.3V
2 CERM
805
1
C7491
20%
6.3V
2 CERM
805
20%
2 2.5V
POLY
TH
C7464
1000pF
C7493
22UF
680UF
MCH_CORES0_SNUBBER_R
2 3
C7492
22UF
680UF
5.11
MICROFET3X3
6 7 55 73
CRITICAL
FDM6296
CR_E:
PEAK=10.3A
AVE=6.31A
DCR=5.5 MOHM
70
MCH CORE S0
M72/M78
POWER BUDGET
CR_STD:
PEAK=10.1A
AVE=7.12A
IHLP5050-MMD12CE-SM
CRITICAL
70 73
603-1
L7460
MCH_CORES0_LGATE 4
10%
1.5UH-19A-5.5MOHM
Q7461
1V05S0_RUNSS
(200MV HYSTERESIS)
PGOOD_MCH_CORE_S0
(3MS NOISE FILTER)
MCH_CORES0_OCSET
1UF
CRITICAL
MCH_CORES0_SWITCHNODE
C7460
2 25V
X5R
C7461
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
1%
1/16W
MF-LF
402
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
XW7400
SM
C7432 1
1%
1/16W
MF-LF
2 402
VOLTAGE=0V
EN2 21
e
r
10%
50V
2 CERM
402
10%
50V
CERM
402
1%
1/16W
MF-LF
2 402
PEAK=2.54A
AVE=2.01A
0.001UF
3.32K
R7400
C7435
NOSTUFF
TLM833
1.25V S0
M72/78
POWER BUDGET
EN1
3.57K2
1
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
DDR 13
NOSTUFF
D7400
10%
2 25V
X7R
402
CTLSH3-30M833
1000pF
8
1V25S0_RUNSS
(200MV HYSTERESIS)
15
PGOOD_1V25_S0
OUT
(3MS NOISE FILTER)
11
1V25REG_OCSET
IN
R7471
MCH_CORES0_ISEN
10UF
20%
2 25V
CERM
603
MICROFET3X3
C7482
10%
2 25V
X5R
1206-1
0.1UF
FDM6296
10UF
CRITICAL
Q7460
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
m
il
70
MCH_CORES0_UGATE
ISEN2 22
5%
1/16W
MF-LF
2 402
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
20%
2 2V
POLY
CASE-D2-SM
CRITICAL
1
1V25REG_SWITCHNODE
DCR=9 MOHM
330UF
20%
6.3V
2 CERM
805
108
MMD06EZ-SM
CRITICAL
C7404
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
R7461
ISL6539
SOFT1 SSOP SOFT2 17
Q1
10
SW
U7400
20
9
1.25V NOMINAL
1V25REG_ISEN
VIN
10%
2 25V
X7R
402
NOSTUFF
1
R7490
3.48K
1%
1/16W
MF-LF
2 402
<RA>
2
C7431
2 3 4 9
14
5%
1/16W
MF-LF
2 402
C7481
TLM833
R7431
Q7400
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
VCC
CRITICAL
MCH_CORES0_BOOT_R
D7473
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
D7474
(300KHZ)
CRITICAL
28
1V25REG_BOOT_R
a
n
i
SOT23
20%
2 6.3V
CERM
603
CRITICAL
BAT54E3
4.7UF
CTLSH3-30M833
C7410
10%
2 25V
X5R
1206-1
20%
2 16V
POLY
TH
2 25V
X5R
PP5V_S0
1
7 6
C7480
470UF
1UF
470UF
94 78 73 72 71 70 7 6
y
r
CRITICAL
C7440
76 73 7 6
C7470
0.0047UF
10%
25V
2 CERM
402
R74831
R7423
100K
1%
1/16W
MF-LF
2 402
100K
MCH_CORES0_VSEN
1%
1/16W
MF-LF
402 2
MIN_LINE_WIDTH=0.6MM
MIN_NECK_WIDTH=0.25MM
OMIT
1
R7491
C7472
19.6K
1%
1/16W
MF-LF
2 402
0.01UF
10%
2 50V
X7R
402
<RB>
PART NUMBER
QTY
DESCRIPTION
REFERENCE DES
114S0342
RES,MTL FILM,1/16W,19.6K,1,0402,SMD,LF
R7491
CRITICAL
BOM OPTION
CR_STD
114S0309
RES,MTL FILM,1/16W,8.66K,1,0402,SMD,LF
R7491
CR_E
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
74
OF
33
118
CRITICAL
C7532
470UF
20%
2 16V
POLY
TH
49 46 25 7
78
IN
70 7 6
78 76
U7501
SC70
4
NC
10K
5%
1/16W
MF-LF
402
402
74LVC1G07
C7501
10%
16V
X5R
603
GND_PP1V8REG_SGND
1 VIN
7 FSET
1V8S3_FCCM
PGOOD_1V8_S3
UG 14
QFN
BOOT 13
108 15
PHASE
ISEN 9
R7505
0
R7508
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
90.9K
5%
1/16W
MF-LF
2 402
LG 11
6 FB
1V8S3_FB
R7500
1V8S3_BOOT
1V8S3_PHASE
1V8S3_ISEN
PGND 10
1 2 3
0.1UF
R7510
1%
1/16W
MF-LF
402
THRML
PAD
C7506
10%
16V
CERM
0.01UF
402
R7506
57.6K
1%
1/16W
MF-LF
2 402
C7508
C7507
5%
50V
CERM
4700PF
603
C7510
CRITICAL
Q7521
10%
50V
CERM
XW7500
MLP5X6-LFPAK-DFN
402
1 2 3
402
75
e
r
R7551
=PP1V8_S3_MEMVTT
220
5%
1/16W
MF-LF
402
P
C7551
10UF
20%
6.3V
CERM
805-1
5.11
1%
1/4W
MF-LF
2 1206
1V8S3_SNUBBER_R
NOSTUFF
1
C7559
C7564
10%
2 25V
X7R
402
78 75 7 6
78 70 49 25 7 6
22UF
20%
2 6.3V
CERM
805
C7543
330UF
20%
2V 2
POLY
CASE-D2-SM
C7541
22UF
20%
2 6.3V
CERM
805
CRITICAL
CRITICAL
C7542
C7544 1
20%
2 2V
POLY
CASE-D2-SM
20%
2V 2
POLY
CASE-D2-SM
330UF
R7501
0
CRITICAL
<Ra>
5%
1/16W
MF-LF
402
NOSTUFF
R7521
4.02K
PP1V8_S3_R
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
6 7 75 78
NOSTUFF
1%
1/16W
MF-LF
402
C7503
0.0047uF
330UF
10%
25V
CERM
402
<Rb>
1
R7522
2.0K
1%
1/16W
MF-LF
402
PP1V8_S3
C7595
C7596
C7597
C7598
C7599
10%
50V
X7R
402
10%
50V
X7R
402
10%
50V
X7R
402
10%
50V
X7R
402
10%
50V
X7R
402
0.01UF
0.01UF
0.01UF
0.01UF
B
C7590
C7591
C7592
C7593
C7594
0.01UF
0.01UF
0.01UF
0.01UF
0.01UF
C7585
C7586
C7587
C7588
C7589
0.01UF
0.01UF
0.01UF
0.01UF
0.01UF
10%
50V
X7R
402
2.2UF
10%
50V
X7R
402
10%
50V
X7R
402
10%
50V
X7R
402
10%
50V
X7R
402
CRITICAL
VDDQ
C7540
PP1V8_S3
1
10%
6.3V
CERM
402
0.01UF
C7550
VOLTAGE=1.8V
MIN_LINE_WIDTH=0.25 MM
MIN_NECK_WIDTH=0.25 mm
VCC
U7550
BD3533FVM
MSOP-8
IN
PM_SLP_S3_L
VTT_IN
EN
0.1UF
20%
10V
CERM
402
R7556
1uF
U7550_VDDQ
10%
6.3V
CERM1
603
C7553
NOSTUFF
1
m
il
GND_PP1V8REG_SGND
VOLTAGE=0V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
NOSTUFF
DCR=5.5 MOHM
1000pF
NTMFS4108N
0.001uF
SM
22PF
10%
50V
CERM
NOSTUFF
OMIT
1
IHLP5050-MMD12CE-SM
3.92K
1V8S3_LG
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
1V8S3_COMP_R
a
n
i
1
17
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
L7580
1.5UH-19A-5.5MOHM
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
CRITICAL
10%
25V
X5R
402
8 VO
1%
1/16W
MF-LF
2 402
C7509
5%
1/16W
MF-LF
402
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
PEAK=13.6A
AVE=5.17A
FDMS8690-RJK0305DPB
2 1V8S3_BOOT_RC 1
2.2
1V8S3_UG
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
5 COMP
1V8S3_COMP
y
r
Q7520
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
U7500
4 EN
3 FCCM
16 PGOOD
MLP5X6-LFPAK
ISL6269
CRITICAL
D
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
CRITICAL
1V8S3_FSET
OUT
20%
6.3V
CERM1
603
VCC
PVCC
75
(NC)
70
12
5%
1/16W
MF-LF
402
1.8V S3
M72/M78
POWER BUDGET
C7500
2.2UF
20%
6.3V
CERM1
603
(OPEN DRAIN)
R7507
2.2UF
NOSTUFF
C7502
1uF
1V8S3_VCC
PP3V3_S3
R7539
5%
1/16W
MF-LF
CRITICAL
20%
10V
CERM
402
PM_S4_STATE_L
R7504
0
0.1uF
1
10%
16V
X5R
603
C7560
10%
25V
2 X5R
1206-1
NOSTUFF
1uF
10UF
PP5V_S3
PP3V3_S5
C7531
C7534 1
TLM833
77 70 7 6
10%
25V
2 X5R
1206-1
20%
2 16V
POLY
TH
78 76 70 7 6
C7533
10UF
470UF
D7520
C7530
CTLSH3-30M833
78 76 50 7
VREF
VTTS
C7552
VTT
10UF
MEMVTT_VREF
20%
6.3V
CERM
805-1
GND
10%
50V
X7R
402
10%
50V
X7R
402
10%
50V
X7R
402
10%
50V
X7R
402
10%
50V
X7R
402
6 7 70
CRITICAL
C7555
150UF
20%
6.3V
POLY
CASE-C3
SYNC_MASTER=MARK
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
75
OF
33
118
10K
R7618
1%
1/16W
MF-LF
402
100K
1%
1/16W
MF-LF
402
CRITICAL
8
LM393A
5VS5_4V29_REF
V+
R7617
12VS0_6V0_REF
R76131
1%
1/16W
MF-LF
402
10K
PGOOD_12V_S0 OUT
70
GND
12VS0_COMP_REF
1%
1/16W
MF-LF
402
R7614
10K
SOI-1-LF
7
U7601
4.99K
y
r
1%
1/16W
MF-LF
402
PP12V_S5
C7608
CRITICAL
C7641
10UF
10%
2 25V
X5R
1206-1
C7642
150UF
10UF
10%
2 25V
X5R
1206-1
3V3S3_SNS_N
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
PP5VREG_INTVCC
76
C7624
10%
16V
X5R
402
MLP
C7622
5%
1/16W
MF-LF
402
5%
50V
CERM
402
CRITICAL
a
n
i
1.5UH-12A
1
PP3V3_S3
CRITICAL
C7651 1
330UF-0.009OHM
20%
6.3V 2
POLY
CASE-D3L
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
NOSTUFF
NOSTUFF
5 6 7
SW1
22
3V3S3_BG
R7627 1
63.4K
180PF
1%
1/16W
MF-LF
2 402
3.3V S3
M72/78
POWER BUDGET
5%
50V
CERM
402
10%
50V
CERM
402
PEAK=6.06A
AVE=3.06A
R7628
1%
1/16W
MF-LF
2 402
0.001uF
10%
50V
CERM
402
GND_PP5VREG_SGND
VOLTAGE=0V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
P
76
78 76 70 7 6
78 77 76 70 7 6
PP12V_S5
PP5V_S5
C7612
0.1UF
R7631 1
20%
16V
CERM
603
11.8K
1%
1/16W
MF-LF
402
1%
1/16W
MF-LF
402
PP5V_S3
5VS3_COMP_REF
SOI-1-LF
1
U7601
5VS5_4V24_REF2
R7630
NC4 32
NC
PGOOD_3V3_S3
1
Q7660
FDMS8690-RJK0305DPB
CRITICAL
C7689
L7680
3.0UH-14.0A
HM56-11123-TH
1
PP5V_S5
C7670
20.0K
1%
1/16W
MF-LF
0.1uF
10%
16V
X5R
402
2 402
C7691
330UF-0.009OHM
20%
2 6.3V
CERM
805
20%
2 6.3V
POLY
CASE-D3L
CRITICAL
C7693 1
1 2 3
C7669
20%
6.3V 2
POLY
CASE-D3L
R7667
180PF
2
NOSTUFF
1%
1/16W
MF-LF
402
<Rb>
1
C7666
100PF
5%
2 50V
CERM
402
C7668
0.001UF
10%
50V
CERM
402
R7668
20.0K
1%
1/16W
MF-LF
2 402
XW7600
SM
100K
5%
1/16W
MF-LF
2 402
5V1V8REG_SKIP
1
Q7603
2N7002
C7602
1uF
C7630
10%
2 6.3V
CERM
402
0.1uF
SOT23-LF
GND
10%
16V
X5R
402
C7601
4.7UF
20%
6.3V
CERM
603
R7606
5%
1/16W
MF-LF
2 402
R7607
0
5%
1/16W
MF-LF
2 402
76
VOLTAGE=5V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
5V S5 / 3.3V S3 SUPPLIES
1%
1/16W
MF-LF
402
C7607
SYNC_DATE=N/A
76
C7604
R7604
1%
1/16W
MF-LF
402
10%
2 16V
CERM
402
5.62K
0.01uF
10%
16V
2 CERM
402
SYNC_MASTER=MARK
P5VREG_FSEL
76
5V1V8REG_CONT
R7603
30.1K
P5VREG_FCB
0.01uF
DRAWING NUMBER
SHT
NONE
REV.
051-7229
D
SCALE
105K
5%
50V
CERM
402
330UF-0.009OHM
<Ra>
OMIT
1
20%
10V
CERM
402
C7692
20%
2 6.3V
POLY
CASE-D3L
(HYSTERESIS)
(R7631: 71.5K; R7630: 40.2K; 300MV HYSTERESIS)
CRITICAL
1
330UF-0.009OHM
R7665
C7690
22UF
6 7 70 76 77 78
(5.0V NOMINAL)
CRITICAL
1
5VS5_ITH_R
5%
25V
CERM
402
DCR=8.61 MOHM
10%
50V
CERM
402
M72 PEAK=12.0A
M72 AVE=6.83A
M78 PEAK=8.91A
M78 AVE=5.33A
MLP5X6-LFPAK
5 MLP5X6-LFPAK-DFN
C7665
220PF
NC
NC
NC
NC
5%
1/16W
MF-LF
402
PGOOD_5V_S3_L 1
CRITICAL
NTMFS4108N
0.001UF
70
C
5V S5
M72/M78
POWER BUDGET
NOSTUFF
OUT
CRITICAL
10%
50V
CERM
402
10%
16V
X5R
402
1%
1/16W
MF-LF
402
Q7661
C7661
0.1UF
6.98K
0.0022UF
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
0.1uF
2
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
C7632
R7666
1 2 3
10%
16V
X5R
402
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
76
1%
1/16W
MF-LF
402
2
0.1uF
C7613
86.6K
1%
1/16W
MF-LF
402
(REPEATED FOR
EASE OF ROUTING)
NOSTUFF
1uF
C7664
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
R7669
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
7.68K
5VS5_ITH
INTVCC 20
NC1 10
NC2 16
NC3 29
5VS5_VOSNS
PGOOD 27
C7605
R7692
LM393A
RUN_SS2 13
21 EXTVCC
V+
5%
1/16W
MF-LF
402
P5VREG_FSEL
3_3VOUT 7
10%
6.3V
CERM
402
5VS5_SW
5VS5_BG
ITH2 8
4 FCB
PP5VREG_INTVCC
R7612
47K
100K
R7602
75 70 7 6
78
R7601
2
R7625
108
BG2 18
VOSENSE2
ITH1
28 RUN_SS1
PP5V_S5
1%
1/16W
MF-LF
2 402
C7628
20.0K
76 70 7 6
78 77
10K
NOSTUFF
SENSE1-
1 VOSENSE1
3V3S3_ITH_R
<Rd>
76
15
5VS5_BOOST
5%
1/16W
MF-LF
402
R7664 1
5%
50V
CERM
402
1%
1/16W
MF-LF
402
5VS5_BOOST_R
22PF
12
SENSE2+
11
SENSE2-
3V3S3_ITH
P5VREG_FCB
17
C7662
5VS5_TG
PLLFLTR 2
3V3S3_VOSNS
e
r
0.001uF
5%
2 25V
CERM
402
C7629
QFN
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
C7625
220PF
SW2
LTC3728LXC
BG1
C7626
5%
1/16W
MF-LF
2 402
BOOST2
U7600
3 PLLIN
TP_PP5VREG_PLLIN
(INTERNAL PULLDOWN)
3V3S3_RUNSS
SPARE
25
31
10%
50V
CERM
402
<Rc>
BOOST1
3V3S3_SW
30 SENSE1+
D7664
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
1M
m
il
24
0.001UF
R7670
TG2 14
TG1
3V3S3_BOOST
C7621
Q2
20%
6.3V
CERM
805
22UF
C7650
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
TLM833
20%
2 6.3V
POLY
CASE-D3L
330UF-0.009OHM
D7600
C7652
108
DCR=9 MOHM
CTLSH3-30M833
MMD06EZ-SM
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
Q1
10
SW
(3.34V NOMINAL)
CRITICAL
26
3V3S3_TG
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
L7620
VIN
CRITICAL
78 75 70 7 6
10%
2 16V
X5R
603
22PF
PGND
FDMS9620S
R7624
0.1uF
C7600
1uF
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
CRITICAL
Q7620
2 3 4 9
3V3S3_BOOST_R
19
CRITICAL
2
2
76
CMDSH-3
SOD-323
23
1%
1/16W
MF-LF
402
SOD-323
THRML_PAD
10%
16V
X5R
402
CMDSH-3
SGND
10%
25V
2 X5R
1206-1
PP5VREG_INTVCC
VOLTAGE=12V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
D7624
R7626
3.92K
0.1uF
10UF
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
33
C7631
10%
16V
X5R
402
5VS5_SNS_P
PPVIN_S5_5VS5_R
CRITICAL
10UF
R7661
3.65K
0.1UF
C7680
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
47.5K
1%
1/16W
MF-LF
402
2
1
5VS5_SNS_N
1%
1/16W
MF-LF
2 402
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.25 mm
R7629
R7600
10
3V3S3_SNS_P
C7681
10%
25V
2 X5R
1206-1
20%
2 16V
ELEC
SM-1
10%
2 25V
X5R
1206-1
10%
16V
X5R
402
C7682
10UF
10%
2 25V
X5R
1206-1
0.1uF
1%
1/16W
MF-LF
402
C7640
TLM833
10UF
R7621 C7609
3.65K
C7643
D7601
CRITICAL
78 76 70 7 6
CTLSH3-30M833
PP12V_S3
1%
1/16W
MF-LF
402
R7616
1.65K
R7615
78 75 50 7
PP12V_S0
PP5V_S5
74 73 7 6
78 77 76 70 7 6
76
OF
33
118
850KHZ
CRITICAL
PEAK=0.48A
AVE=0.41A
U7710
CRITICAL
TPS62050
(ENABLED WHEN 5V_S5 REACHES 4.052V)
(FOR POWER DOWN SEQUENCING)
(ENABLED AT 1.3V) 1R7711
21.5K
6 LBI
PG 4
7 SYNC
5 FB
P5VS5_EN
22UF
20%
6.3V
CERM
805
SW 9
108
10UH-3.5A
1
P3V3S5_SW
2
IHLP
PGOOD_3V3_S5
LBO 2
3 GND
C7710
1%
1/16W
MF-LF
402
8 EN
PP3V3_S5
6 7 70 75
y
r
(3.31V NOMINAL)
DCR=71.2 MOHM
70
OUT
<Ra>
R7712
C7712
511K
6.8PF
+/-0.25PF%
50V
CERM
402
R7710
10K
L7710
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
SWITCH_NODE=TRUE
10 PGND
MSOP
1 VIN
PP5V_S5
2
2
1%
1/16W
MF-LF
402
C7715
22UF
P3V3S5_FB
1%
1/16W
MF-LF
402
<Rb>
R7713
20%
6.3V
CERM
805
a
n
i
90.9K
1%
1/16W
MF-LF
402
2.5V S0 RAIL
78 70 13 7 6
PP3V3_S0
NVIDIA
NVIDIA
C7700
22UF
20%
6.3V
X5R
805
R7700
PPVIN_S0_P2V5S0_SVIN
VOLTAGE=3.3V
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
5%
1/16W
MF-LF
402
NVIDIA
1
C7701
0.1uF
70
IN
10%
16V
X5R
402
5%
1/16W
MF-LF
402
m
il
NVIDIA
R7702
AVINPVIN
PGOOD_3V3_S0
P2V5S0_EN
5%
1/16W
MF-LF
402
EN
NVIDIA
(1.5 MHZ)
CRITICAL
OVT
MODE
SW
U7750
TPS62510
BQA
FB
PG
State
Run (S0/M0)
Sleep (S3/M1)
OUT
SMC_PM_G2_ENABLE
N/A
On
1
1
PM_S4_STATE_L
1
1
PP2V5_S0
SM-MSS5131
NVIDIA
C7702
10pF
5%
50V
CERM
402
6 7
(2.50V NOMINAL)
(120US DELAY FROM EN)
(750 US RAMP TIME)
NVIDIA
<Ra>
R7703
634K
1%
1/16W
MF-LF
2 402
NVIDIA
1
<Rb>
R7704
20%
6.3V
20%
6.3V
NVIDIA
805
200K
C7706
22UF
1%
1/16W
MF-LF
402
C7707
22UF
2 X5R
NVIDIA
1
C7705
22UF
NVIDIA
20%
2 6.3V
X5R
805
2 X5R
NVIDIA
805
R7705
1K
1%
1/16W
MF-LF
402
PM_SLP_S3_L
PM_SLP_S4_L
PM_SLP_M_L
SYNC_MASTER=MARK
On
Off
Soft-Off (S5/M-Off)
Off
SYNC_DATE=N/A
Sleep (S3/M-Off)
Soft-Off (S5/M1)
L7700
2.2uH-1.9A-23M-OHM
11
e
r
PGOOD_2V5_S0
Manageability
70
P2V5S0_VFB
PEAK=0.50A
AVE=0.17A
NVIDIA
CRITICAL
1
108 P2V5S0_SW
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
2.5V S0
M72/M78
POWER BUDGET
NOSTUFF
R7701
10
3.3V S5
M72/M78
POWER BUDGET
3.3V S5 RAIL
78 76 70 7 6
N/A
0
SIZE
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
77
OF
33
118
7
CRITICAL
Q7810
5V S3 FET
IRF7410PBF
PP5V_S3
SO-8
PP5V_S5
6 7 70 75 76
78 77 76 70 7 6
PP5V_S0
SO-8
PP5V_S5
C7811
10%
10V
X5R
402
P5VS3_EN_L
10%
10V
X5R
402
2
P5VS3_SS
P5VS0_EN_L
10%
16V
CERM
402
49 46 25 7
78 75
IN
PM_S4_STATE_L
G
S
2
4
P5VS0_SS
NOSTUFF
SOT23
D7810
78 75 70 49 25 7 6
PM_SLP_S3_L
5%
1/16W
MF-LF
402
10%
16V
X7R
805
IN
SOD-123
D3
D2
D1
S1
7 50 75 76
C7891
0.018UF
GATE
2
10%
16V
X7R
402
GATE_12V_S3
10%
16V
CERM
402
y
r
GATE_12V_S3_R
R7894
R7892
19.6K
R7893 1
10K
BSS138
PP12V_S3
MAKE_BASE=TRUE
VOLTAGE=12V
MIN_LINE_WIDTH=0.6 mm
MIN_NECK_WIDTH=0.2 mm
NET_SPACING_TYPE=PWR
MAX_NECK_LENGTH=3 MM
D4
S3
S2
0.47UF
10K
0.01UF
C7890
R7891 1
C7800
Q7801
BSS138
SOI
=PP12V_S5_FET
Q7811
FDS4465
1%
1/16W
MF-LF
402
147K
R7801
0.01UF
5%
1/16W
MF-LF
402
5%
1/16W
MF-LF
402
C7810
0.15UF
10K
2
4
C7801
R7800 1
R7811
100K
0.15UF
10K
5%
1/16W
MF-LF
402
Q7890
12V S3 FET
R7810 1
CRITICAL
6 7 70 71 72 73 74 94
CRITICAL
Q7800
5V S0 FET
IRF7410PBF
78 77 76 70 7 6
5%
1/16W
MF-LF
402
SOT23
5.1K
5%
1/8W
MF-LF
805
1%
1/16W
MF-LF
402
D7890
P12V_S3_EN_L
B0530WXF
SOD-123
B0530WXF
a
n
i
78 75 49 46 25 7
CRITICAL
Q7850
3.3V S0 FET
IRF7410PBF
PP3V3_S0
SO-8
PP3V3_S3
76 75 70 7 6
C7851
R7850 1
5%
1/16W
MF-LF
402
10%
16V
X5R
402
2
G
2
4
332K
1
BSS138
SOT23
R7870
PP5V_S5
e
r
1.8V S0 FET
75 7 6
5%
1/16W
MF-LF
402
PP1V8_S3
NOSTUFF
C7899
0.1UF
NOSTUFF
R7871
76 70 7 6
PP12V_S5
P1V8S0_GDRV
5%
1/16W
MF-LF
402
0.1UF
1
69.8K
Q7896
2N7002
PM_SLP_S3_L
SOT23-LF
S
2
P
1
499
15.0K
Q7895
FDS8870
78 77 76 70 7 6
P12V_S3_DRAIN
PP5V_S5
R7889
10K
5%
1/16W
MF-LF
402
R7888
0
2N7002DW-X-F
PM_S4_STATE_INV
5%
1/16W
MF-LF
402
SOT-363
S
4
6
D
NOSTUFF
Q7892
Q7892
2N7002DW-X-F
SOT-363
S
1
SO-8
1%
1/16W
MF-LF
402
SOT23
7 8
R7898
1%
1/16W
MF-LF
402
IN
P1V8S0_SS
CRITICAL
R7896
P1V8S0_EN_L
78 75 70 49 25 7 6
P1V8S0_SS_RC
10%
25V
X5R
402
R7895 1
1%
1/16W
MF-LF
402
10K
1%
1/16W
MF-LF
402
C7895
10%
25V
X5R
402
R7897
m
il
Q7851
78 77 76 70 7 6
BSS138
10%
16V
CERM
402
PM_SLP_S3_L
Q7891
0.01UF
P3V3S0_SS
1%
1/16W
MF-LF
402
PM_S4_STATE_L
C7850
R7851
P3V3S0_EN_L
0.033UF
10K
IN
6 7 13 70 77
78 75 70 49 25 7 6
IN
1 2
PP1V8_S0
6 7 70
Q7897
IRF7410
IRF7413
FDS4435
IRF7406
IRF6402
SI2302
BSS138
SOT23
C7896
0.068UF
10%
10V
CERM
402
13A
9.6A
8.8A
5.8A
3.7A
1.6A
Rds(on)
7mOHM
18mOHM
35mOHM
70mOHM
65mOHM
115mOHM
Vgs +/8V
20V
25V
20V
12V
8V
P1V8S0_EN_L_RC
S3 & S0 FETs
SYNC_MASTER=MARK
SYNC_DATE=N/A
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
78
OF
33
118
Page Notes
Power aliases required by this page:
- =PP12V_S0_MXM
- =PP5V_S0_MXM
- =PP1V8_S0_MXM
Signal aliases required by this page:
(NONE)
y
r
E1
1.5 A
0.5 A
0.5 A
3.5 A
UP TO 4 A
E2
3V3
5V
2V5
1V8
PWR (12V)
E2
=PP1V8_S0_MXM
2
4
6
8
10
12
14
16
18
20
22
24
C8401
22UF
20%
2 6.3V
X5R
805
6
=PP5V_S0_MXM
70 50 49 7
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
101 15
ALL_SYS_PWRGD
101 15
PEG_R2D_C_P<0>
PEG_R2D_C_N<0>
C8420
C8421
0.1uF
0.1uF
16V X5R
10% 402
1
2
1
PEG_R2D_P<15>
101 PEG_R2D_N<15>
101
PEG_R2D_C_P<1>
PEG_R2D_C_N<1>
C8422
C8423
0.1uF
0.1uF
PEG_R2D_C_P<2>
PEG_R2D_C_N<2>
C8424
C8425
0.1uF
0.1uF
PEG_R2D_C_P<3>
PEG_R2D_C_N<3>
C8426
C8427
0.1uF
101
101
PEG_R2D_C_N<4>
PEG_R2D_C_P<4>
C8428
C8429
0.1uF
101
101
PEG_R2D_C_P<5>
PEG_R2D_C_N<5>
PEG_R2D_C_P<6>
PEG_R2D_C_N<6>
PEG_R2D_C_N<7>
PEG_R2D_C_P<7>
C8430
C8431
C8432
C8433
C8434
C8435
0.1uF
0.1uF
PEG_R2D_P<14>
101 PEG_R2D_N<14>
101
PEG_R2D_P<13>
101 PEG_R2D_N<13>
101
0.1uF
101
0.1uF
101
0.1uF
101
0.1uF
101
0.1uF
0.1uF
0.1uF
101
0.1uF
101
PEG_R2D_C_P<9>
PEG_R2D_C_N<9>
C8438
C8439
0.1uF
101
0.1uF
101
PEG_R2D_C_P<10>
PEG_R2D_C_N<10>
C8440
C8441
0.1uF
0.1uF
101
101
PEG_R2D_C_P<12>
PEG_R2D_C_N<12>
PEG_R2D_C_P<13>
PEG_R2D_C_N<13>
PEG_R2D_C_N<14>
PEG_R2D_C_P<14>
PEG_R2D_C_P<15>
PEG_R2D_C_N<15>
C8444
C8445
C8446
C8447
C8448
C8449
C8450
C8451
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
0.1uF
101
101
101
101
PEG_R2D_P<7>
PEG_R2D_N<7>
PEG_R2D_P<6>
PEG_R2D_N<6>
PEG_R2D_P<5>
PEG_R2D_N<5>
PEG_R2D_P<4>
PEG_R2D_N<4>
PEG_R2D_P<3>
PEG_R2D_N<3>
PEG_R2D_P<2>
101 PEG_R2D_N<2>
101
PEG_R2D_N<1>
101 PEG_R2D_P<1>
101
101
101
1V8RUN0 (1 OF 2)
1V8RUN1
CRITICAL
1V8RUN2
1V8RUN3
1V8RUN4
1V8RUN5
1V8RUN6
RUNPWROK
5VRUN
GND20
GND21
GND22
KEY
PRSNT2_L
PEX_TX15_L
PEX_TX15
GND23
PEX_TX14_L
PEX_TX14
GND24
PEX_TX13_L
PEX_TX13
GND25
PEX_TX12_L
PEX_TX12
GND26
PEX_TX11_L
PEX_TX11
GND27
PEX_TX10_L
PEX_TX10
GND28
PEX_TX9_L
PEX_TX9
GND29
PEX_TX8_L
PEX_TX8
GND30
PEX_TX7_L
PEX_TX7
GND31
PEX_TX6_L
PEX_TX6
GND32
PEX_TX5_L
PEX_TX5
GND33
PEX_TX4_L
PEX_TX4
GND34
PEX_TX3_L
PEX_TX3
GND35
PEX_TX2_L
PEX_TX2
GND36
PEX_TX1_L
PEX_TX1
GND37
PEX_TX0_L
PEX_TX0
PWR_SRC0
PWR_SRC1
PWR_SRC2
PWR_SRC3
PWR_SRC4
PWR_SRC5
PWR_SRC6
PWR_SRC7
GND0
GND1
GND2
GND3
PEX_RX15_L
PEX_RX15
GND4
PEX_RX14_L
PEX_RX14
GND5
PEX_RX13_L
PEX_RX13
GND6
PEX_RX12_L
PEX_RX12
GND7
PEX_RX11_L
PEX_RX11
GND8
PEX_RX10_L
PEX_RX10
GND9
PEX_RX9_L
PEX_RX9
GND10
PEX_RX8_L
PEX_RX8
GND11
PEX_RX7_L
PEX_RX7
GND12
PEX_RX6_L
PEX_RX6
GND13
PEX_RX5_L
PEX_RX5
GND14
PEX_RX4_L
PEX_RX4
GND15
PEX_RX3_L
PEX_RX3
GND16
PEX_RX2_L
PEX_RX2
GND17
PEX_RX1_L
PEX_RX1
GND18
PEX_RX0_L
PEX_RX0
GND19
PPV_S0_MXM_PWRSRC
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
PEG_R2D_P<0>
PEG_R2D_N<0>
53
VOLTAGE=12V
MIN_LINE_WIDTH=0.60MM
MIN_NECK_WIDTH=0.25MM
1
3
5
7
9
11
13
15
17
19
21
23
C8400
22UF
20%
2 35V
ELEC
SM-LF
PEG_D2R_N<0>
PEG_D2R_P<0>
PEG_D2R_N<1>
PEG_D2R_P<1>
15 101
15 101
15 101
m
il
PEG_D2R_N<2>
PEG_D2R_P<2>
PEG_D2R_P<3>
PEG_D2R_N<3>
PEG_D2R_P<4>
PEG_D2R_N<4>
PEG_D2R_P<5>
PEG_D2R_N<5>
e
r
PEG_R2D_P<9>
PEG_R2D_N<9>
PEG_R2D_P<10>
PEG_R2D_N<10>
PEG_R2D_N<8>
101 PEG_R2D_P<8>
C8436
C8437
C8442
C8443
PEG_R2D_N<11>
PEG_R2D_P<11>
101
PEG_R2D_C_P<8>
PEG_R2D_C_N<8>
PEG_R2D_C_P<11>
PEG_R2D_C_N<11>
PEG_R2D_P<12>
PEG_R2D_N<12>
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
a
n
i
E1
J8400
AS0B52X-S43E-XF
F-RT-SM
PEG_D2R_P<6>
PEG_D2R_N<6>
PEG_D2R_P<7>
PEG_D2R_N<7>
PEG_D2R_P<8>
PEG_D2R_N<8>
PEG_D2R_P<9>
PEG_D2R_N<9>
15 101
15 101
15 101
15 101
15 101
15 101
15 101
15 101
15 101
15 101
15 101
7 15 101
7 15 101
15 101
15 101
15 101
15 101
PEG_D2R_P<10> 15
PEG_D2R_N<10> 15
PEG_D2R_P<11> 15
PEG_D2R_N<11> 15
PEG_D2R_P<12> 15
PEG_D2R_N<12> 15
PEG_D2R_P<13> 15
PEG_D2R_N<13> 15
PEG_D2R_P<14> 15
PEG_D2R_N<14> 15
PEG_D2R_P<15> 15
PEG_D2R_N<15> 15
101
101
101
101
101
101
101
101
101
101
101
101
SYNC_MASTER=M78_MLB
SYNC_DATE=11/01/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
84
OF
33
118
Page Notes
Power aliases required by this page:
- =PP3V3_S0_MXM
- =PP2V5_S0_MXM
=PP3V3_S0_MXM
y
r
6 85
MXM_ROM
3V3
5V
2V5
1V8
PWR (12V)
1.5 A
0.5 A
0.5 A
3.5 A
UP TO 4 A
R85701
4.95 W
2.5 W
1.25 W
6.3 W
PLATFORM DEPENDENT
a
n
i
6 85
R8501
100K
=PP3V3_S0_MXM
NOSTUFF 1
AS0B52X-S43E-XF
100K
5%
1/16W
MF-LF
402 2
105 30
105 30
GPU_CLK100M_PCIE_N
GPU_CLK100M_PCIE_P
CK505_CLKREQ1_L
28
PEG_RESET_L
R8502
85 6
=PP3V3_S0_MXM
100K
5%
1/16W
49
52
52
=SMB_GPU_THRM_SDA
=SMB_GPU_THRM_SCL
SMC_GFX_OVERTEMP_L
108 91
108 91
94
EXT. DVI/VGA
94
49
GPU_H2SYNC
GPU_V2SYNC
GPU_DDC_A_CLK
GPU_DDC_A_DATA
SMC_GFX_THROTTLE_L
10K
94
108 94
108 94
108 94
108 94
108 94
108 94
108 94
108 94
5%
1/16W
MF-LF
2 402
J8400
R8500
30 29
2
1
MXM_ROM_WP
=PP3V3_S0_MXM
I2C ADDRESS: AC
3
0
5%
1/16W
MF-LF
402 2
1
85 6
C8570
0.1UF
GPU_HPD
TMDS_CLK_N
TMDS_CLK_P
TMDS_DATA_N<2>
TMDS_DATA_P<2>
TMDS_DATA_N<1>
TMDS_DATA_P<1>
TMDS_DATA_N<0>
TMDS_DATA_P<0>
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
PD ON MXM
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
205
207
209
211
213
215
217
219
221
223
225
227
229
231
233
235
237
239
241
F-RT-SM
PEX_REFCLK_L
(2 OF 2)
PRSNT1_L
PEX_REFCLK
TV_C_HDTV_PR
CLK_REQ_L
GND46
PEX_RST_L
TV_Y_HDTV_Y_TV_CVBS
RSVD0
GND47
RSVD1
TV_CVBS_HDTV_PB
SMB_DAT
GND48
VGA_RED
SMB_CLK
THERM_L
GND49
VGA_HSYNC
VGA_GRN
GND50
VGA_VSYNC
DDCA_CLK
VGA_BLU
GND51
DDCA_DAT
LVDS_UCLK_L
IGP0
LVDS_UCLK
IGP1
GND52
IGP2
RSVD2
LVDS_UTX3_L
RSVD3
LVDS_UTX3
GND53
AC_BATT_L
LVDS_UTX2_L
IGP3
LVDS_UTX2
IGP4
GND54
IGP5
LVDS_UTX1_L
IGP6
LVDS_UTX1
IGP7
GND55
IGP8
LVDS_UTX0_L
IGP9
IGP10
LVDS_UTX0
GND38
GND56
IGP_DVI_B_CLK_L
LVDS_LCLK_L
IGP_DVI_B_CLK
LVDS_LCLK
DVI_B_HPD_GND
GND57
LVDS_LTX3_L
RSVD4
RSVD5
LVDS_LTX3
GND58
GND39
IGP_DVI_B_TX2_L
LVDS_LTX2_L
IGP_DVI_B_TX2
LVDS_LTX2
GND40
GND59
IGP_DVI_B_TX1_L
LVDS_LTX1_L
IGP_DVI_B_TX1
LVDS_LTX1
GND41
GND60
IGP_DVI_B_TX0_L
LVDS_LTX0_L
IGP_DVI_B_TX0
LVDS_LTX0
DVI_A_HPD
GND61
DDCC_DAT
DVI_A_CLK_L
DVI_A_CLK
DDCC_CLK
GND42
LVDS_PPEN
DVI_A_TX2_L
LVDS_BL_BRGHT
DVI_A_TX2
LVDS_BLEN
DDCB_DAT
GND43
DVI_A_TX1_L
DDCB_CLK
DVI_A_TX1
2V5RUN
GND44
GND62
3V3RUN0
DVI_A_TX0_L
DVI_A_TX0
3V3RUN1
GND45
3V3RUN2
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
206
208
210
212
214
216
218
220
222
224
226
228
230
232
234
236
238
240
242
91 108
GPU_RED 91
108
GPU_GRN 91
108
m
il
GPU_BLU 91
LVDS_U_CLK_N
LVDS_U_CLK_P
90 108
LVDS_U_DATA_N<1>
LVDS_U_DATA_P<1>
LVDS_U_DATA_N<0>
LVDS_U_DATA_P<0>
LVDS_L_CLK_N
LVDS_L_CLK_P
108
90 108
LVDS_U_DATA_N<3>
LVDS_U_DATA_P<3>
MXM_PIN170
LVDS_U_DATA_N<2>
LVDS_U_DATA_P<2>
e
r
108
90 108
90 108
90 108
90 108
90 108
90 108
20%
10V
2 CERM
402
VCC
A2
A1
A0
U8570
WP
SO8
OMIT
SDA
GPU_DDC_C_DATA
85 90
SCL 6
M24C02-WMN6
GPU_DDC_C_CLK
85 90
VSS
4
R8505
1
5%
1/16W
MF-LF
402
90 108
90 108
90 108
90 108
LVDS_L_DATA_N<3>
LVDS_L_DATA_P<3>
LVDS_L_DATA_N<2>
LVDS_L_DATA_P<2>
LVDS_L_DATA_N<1>
LVDS_L_DATA_P<1>
LVDS_L_DATA_N<0>
LVDS_L_DATA_P<0>
90 108
90 108
90 108
90 108
90 108
90 108
90 108
90 108
24_INCH_LCD
GPU_DDC_C_DATA 85 90
TO INTERNAL PANEL
GPU_DDC_C_CLK 85 90
0 2
1
GPU_DIGON 90
5%
GPU_VARY_BL 90 PWM
1/16W
MF-LF
GPU_ENABLE_BL
402
TP_GPU_DDC_B_DATA
TP_GPU_DDC_B_CLK UNCONNECTED. USE DDC_A FOR EXT. TMDS
R8503
INV_EN_BL_OR_PANEL_ID
6 28
=PP2V5_S0_MXM
=PP3V3_S0_MXM
6 85
MXM I/O
1
C8500
SYNC_MASTER=M78_MLB
22uF
SYNC_DATE=11/01/2006
20%
6.3V
2 X5R
805
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
85
OF
33
118
Page Notes
I20
94 91 6
=PP3V3_S0_VIDEO
=PP3V3_DDC_LCD
90
y
r
24_INCH_LCD
R9002
6
=PPV_S0_LCD_24INCH
a
n
i
5%
1/8W
MF-LF
805
INVERTER INTERFACE
20_INCH_LCD
R9003
6
=PPV_S0_LCD_20INCH
NOSTUFF
5%
1/8W
MF-LF
805
R9090
0
PPV_S0_LCD
VOLTAGE=12V
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
5%
1/8W
MF-LF
805
C9000
0.1UF
R9000 1
100K
5%
1/16W
MF-LF
402 2
10%
50V
X7R
603-1
LCD_PWREN_L_RC
R9001
1
LCD_PWREN_DIV
29.4K
L9000
G
1%
1/16W
MF-LF
402
OMIT
R9099 1
VOLTAGE=12V
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
FERR-250-OHM
S
PPV_LCD_SW
VOLTAGE=12V
MIN_LINE_WIDTH=0.5 mm
MIN_NECK_WIDTH=0.25 mm
5
2
C9020
5%
1/16W
MF-LF
402 2
PPV_LCD_CONN
6 90
SM
TSOP-LF D
SI3443DV
100K
Q9000
C9001
10UF
0.001uF
10%
16V
X5R-CERM
1210
20%
50V
CERM
402
m
il
LCD_PWREN_L
TABLE_5_HEAD
3
D
PART#
Q9001
2N7002
85
GPU_DIGON
QTY
DESCRIPTION
REFERENCE DESIGNATOR(S)
CRITICAL
BOM OPTION
TABLE_5_ITEM
116S0114
RES,100K,5%,0402
R9099
24_INCH_LCD
116S0004
RES,0,5%,0402
R9099
20_INCH_LCD
SOT23-LF
TABLE_5_ITEM
S
2
R90701
100K
5%
1/16W
MF-LF
402 2
e
r
CRITICAL
SDF9000
STDOFF-3MMOD4.6MMH-1.35-TH
1
516S0241
CRITICAL
J9002
53307-3052
F-ST-SM
108 85
108 85
108 85
108 85
108 85
108 85
108 85
108 85
108 85
90
90 6
=PP3V3_DDC_LCD
108 85
85
PPV_LCD_CONN
LVDS_U_DATA_N<0>
LVDS_U_DATA_N<1>
LVDS_U_DATA_N<2>
LVDS_U_CLK_P
LVDS_U_DATA_P<3>
LVDS_L_DATA_P<0>
LVDS_L_DATA_N<1>
LVDS_L_DATA_P<2>
LVDS_L_CLK_P
LVDS_L_DATA_P<3>
GPU_DDC_C_CLK
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
P
LVDS_U_DATA_P<0> 85 108
LVDS_U_DATA_P<1> 85 108
LVDS_U_DATA_P<2> 85 108
LVDS_U_CLK_N 85 108
LVDS_U_DATA_N<3> 85 108
LVDS_L_DATA_N<0> 85 108
LVDS_L_DATA_P<1> 85 108
LVDS_L_DATA_N<2> 85 108
LVDS_L_CLK_N 85 108
LVDS_L_DATA_N<3> 85 108
GPU_DDC_C_DATA
PPV_LCD_CONN
85
R9075
47
1
GPU_VARY_BL
C9010
0.001uF
20%
50V
CERM
402
CRITICAL
R9074
LCD_PWM
10K
5%
1/16W
MF-LF
402 2
6 90
85
SYNC_DATE=11/01/2006
SDF9001
STDOFF-3MMOD4.6MMH-1.35-TH
5%
1/16W
MF-LF
402
NOSTUFF
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
90
OF
33
118
y
r
a
n
i
m
il
94 91 90 6
ANALOG FILTERING
=PP3V3_S0_VIDEO
C9130
16
B
108 85
108 85
108 85
108 85
108 85
GPU_TV_Y
GPU_GRN
GPU_TV_COMP
GPU_BLU
VCC
2 S1A
3 S2AU9130
SOP
5 S1B
6 S2B
11 S1C
10 S2C
e
r
27NH-200MA
20%
2 6.3V
CERM
805-1
R9142
108
DB 7
108
1%
1/16W
MF-LF
2 402
VIDEO_MUX_RED
5%
50V
CERM
402
L9141
27NH-200MA
1
VIDEO_MUX_GRN
0402
DC 9
108
VIDEO_MUX_BLU
R9141
150
CRITICAL
DD 12 NC
NC 14 S1D
SB_CRT_TVOUT_MUX_L
NC 13 S2D
IN 1
EN_L 15
GND
P
2
25
1%
1/16W
MF-LF
402
1 NOSTUFF
C9144
10PF
5%
2 50V
CERM
150
VIDEO_MUX_SEL
OUT
PART#
353S1700
CRT
TV
QTY
1
VGA_RED
0.1UF
20%
2 10V
CERM
U9160
402
5
2
GPU_V2SYNC
L9160
74LVC1G125LF
4
94 108
R9160
GPU_VSYNC_BUF 1
33
2 VGA_VSYNC_R
27NH-200MA
1
VGA_VSYNC 94
108
0402
5%
1/16W
MF-LF
402
1 SOT23-5
94 108
94 91 90 6
=PP3V3_S0_VIDEO
C9141
10PF
5%
50V
CERM
402
C9161
0.1UF
20%
2 10V
CERM
U9161
402
VGA_BLU
5
94 108
108 85
GPU_H2SYNC
C9140
4
3
L9161
74LVC1G125LF
R9161
GPU_HSYNC_BUF 1
402
33
5%
1/16W
MF-LF
402
1 SOT23-5
10PF
5%
DESCRIPTION
C9160
5%
50V
CERM
402
VGA_GRN
10PF
2 50V
CERM
C9142
0402
1 NOSTUFF
C9143
=PP3V3_S0_VIDEO
10PF
27NH-200MA
1
R9140
108 85
L9140
402
1%
1/16W
MF-LF
2 402
NOSTUFF
C9145
10PF
150
DA 4
0402
OMIT
TS3V330
108 85
GPU_TV_C
GPU_RED
L9142
C9131
10uF
0.1UF
20%
10V
CERM
402
6 90 91 94
5%
50V
CERM
402
2 VGA_HSYNC_R
27NH-200MA
1
VGA_HSYNC 94
108
0402
C9162
2 CERM
10PF
5%
50V
CERM
402
C9163
10PF
5%
50V
402
TABLE_5_HEAD
REFERENCE DESIGNATOR(S)
CRITICAL
U9130
CRITICAL
BOM OPTION
TABLE_5_ITEM
SYNC_MASTER=M78_MLB
SYNC_DATE=11/01/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
91
OF
33
118
8
TMDS TERMINATION, IF ANY,
IS ON MXM CARD
7
PLACE FILTER CLOSE
TO MINI-DVI CONNECTOR
R9400
TMDS_DATA_N<0>
90-OHM-200MA
CRITICAL
02
78 74 73 72 71 70 7 6
TMDS_CONN_DN<0>
PP5V_S0
B0530WXF
94 108
L9410
F9410
D9410
SOD-123
CRITICAL
SYM_VER-1
L9400
DVI INTERFACE
NOSTUFF
108 85
PP5V_S0_DDC_DIODE
VOLTAGE=5V
MIN_LINE_WIDTH=0.38 mm
MIN_NECK_WIDTH=0.25 mm
2 PP5V_S0_DDC_FUSE
805
PP5V_S0_DDC 94
400-OHM-EMI
0.10A-15V
VOLTAGE=5V
MIN_LINE_WIDTH=0.38 mm
MIN_NECK_WIDTH=0.25 mm
VOLTAGE=5V
MIN_LINE_WIDTH=0.38 mm
MIN_NECK_WIDTH=0.25 mm
SM-1
SM
94
2
NOSTUFF
R9402
108 85
TMDS_DATA_P<0>
TMDS_CONN_DP<0>
PP5V_S0_DDC
3V LEVEL SHIFTERS
94 108
108 85
TMDS_DATA_N<1>
L9401
SM
R9405
108 85
TMDS_DATA_P<1>
F-ST-SM
TMDS_CONN_DN<1>
TMDS_CONN_DP<1>
94 108
DVI_HPD_UF
94
DVI_DDC_CLK_UF
DVI_DDC_DATA_UF
94
94 108
94
0
2
NOSTUFF
R9404
1
TMDS_DATA_N<2>
L9402
90-OHM-200MA
VGA_BLU
VGA_HSYNC
108 91
25
17
26
18
10
27
19
11
28
20
12
29
TMDS_CONN_DP<2>
TMDS_CONN_DN<2>
VGA_GRN
VGA_VSYNC
108 91
TMDS_CONN_DN<2>
108 91
30
22
14
31
94 108
TMDS_CONN_DP<1>
TMDS_DATA_P<2>
TMDS_CONN_DP<2>
94 108
VGA_RED
108 91
24
16
94 108
94 108
94 108
TMDS_CONN_CLKP
TMDS_CONN_CLKN
34
108 85
94 108
TMDS_CONN_DN<0>
0
33
R9409
94 108
94
94
DVI_DDC_DATA_UF
DVI_HPD_UF
94 108
C9410
0.01uF
C
R9408
108 85
TMDS_CLK_N
L9403
SM
=GND_CHASSIS_DVI
4
TMDS_CONN_CLKN
94 108
TMDS_CONN_CLKP
94 108
R9415
TMDS_CLK_P
NOSTUFF
108 85
02
CRITICAL
SYM_VER-1
90-OHM-200MA
20%
50V
CERM
603
DVI_CHASSIS_33
DVI_CHASSIS_34
NOSTUFF
Q9411
DVI_DDC_CLK3 D
Q9411
S 4
GPU_DDC_A_CLK
1
R9413
100
85
R9421
4.7K
2N7002DW-X-F
SOT-363
R9420
5%
1/16W
MF-LF
2 402
5%
1/16W
MF-LF
402
C9411
SOT-363
R9411
5%
50V
CERM
402
4.7K
5
2N7002DW-X-F
94 108
TMDS_CONN_DP<0>
15
8
5%
1/16W
MF-LF
2 402
100
DVI_DDC_CLK_UF
a
n
i
TMDS_CONN_DN<1>
SM
32
94
94 108
4.7K
100pF
13
02
CRITICAL
SYM_VER-1
2
NOSTUFF
R9412
y
r
MINI-DVI-M72
108 91
108 85
5%
1/16W
MF-LF
402
J9410
1
3
NOSTUFF
R9410
CRITICAL
02
CRITICAL
SYM_VER-1
90-OHM-200MA
4.7K
NOSTUFF
R9403
=PP3V3_S0_VIDEO
91 90 6
02
6 D
DVI_DDC_DATA
5%
1/16W
MF-LF
402
S 1
GPU_DDC_A_DATA
85
5%
1/16W
MF-LF
402
C9413
100pF
5%
50V
CERM
402
R9414
GPU_HPD
5%
1/16W
MF-LF
402
D9400
CASE425
NOSTUFF
R9422
100K
C9414
0.0047UF
10%
25V
CERM
402
5%
1/16W
MF-LF
402
85
NOSTUFF
MMSZ4681XXG
m
il
0
2
e
r
SYNC_DATE=11/01/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
94
OF
33
118
CRITICAL
CRITICAL
SDF9800
SDF9801
STDOFF-4.0OD3.5H-1.35-TH
STDOFF-4.0OD3.5H-1.35-TH
y
r
APN 518S0502
CRITICAL
J9800
52893-2098
F-RT-SM
21
GND_AUDIO_SPKRAMP
C9800
10%
25V
X7R 2
805
5
6
7
=PP5V_S0_AUDIO
=PP3V3_S0_AUDIO
=PP12V_S0_AUDIO_SPKRAMP
9
98 6
=PP5V_S0_AUDIO
103 23
HDA_SDIN0
103 23
HDA_SDOUT
a
n
i
1UF
NOSTUFF
10
C9801
11
0.1UF
NOSTUFF
1
20%
10V
CERM 2
402
12
13
C9802
0.1UF
20%
2 10V
CERM
402
14
15
103 23
103 23
103 23
98 6
16
HDA_BIT_CLK
HDA_RST_L
HDA_SYNC
=PP3V3_S0_AUDIO
17
18
19
20
22
6 98
6 98
m
il
CRITICAL
CRITICAL
SDF9803
SDF9804
STDOFF-4.0OD3.5H-1.35-TH STDOFF-4.0OD3.5H-1.35-TH
1
e
r
SYNC_DATE=4/23/2007
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
98
OF
33
118
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
FSB_DSTB_55S
=1:1_DIFFPAIR
=55_OHM_SE
=55_OHM_SE
=55_OHM_SE
=1:1_DIFFPAIR
=1:1_DIFFPAIR
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON_PP
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON_PP
FSB_55S
FSB_COMMON
FSB_COMMON_PP
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON_PP
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON_PP
FSB_55S
FSB_COMMON
PHYSICAL_RULE_SET
TABLE_PHYSICAL_ASSIGNMENT_ITEM
FSB_55S
55_OHM_SE
FSB_COMMON_PP
FSB_55S
FSB_COMMON
FSB_COMMON_2PP
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_COMMON
FSB_55S
FSB_COMMON
FSB_CPURST_L
FSB_55S
FSB_COMMON
FSB_DATA_GROUP0
FSB_55S
FSB_DATA
FSB_DATA_GROUP0_PP
FSB_55S
FSB_DATA
FSB_DATA_GROUP0_PP
FSB_55S
FSB_DATA
FSB_DSTB0
FSB_DSTB_55S
FSB_DSTB
FSB_DSTB_55S
FSB_DSTB
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
FSB_ADS_L
FSB_BNR_L
FSB_BPRI_L
FSB_BREQ0_L
FSB_DBSY_L
FSB_DEFER_L
FSB_DPWR_L
FSB_DRDY_L
FSB_HIT_L
FSB_HITM_L
FSB_LOCK_L
FSB_RS_L<2..0>
FSB_TRDY_L
FSB_CPURST_L
10 14
7 10 14
10 14
7 10 14
7 10 14
10 14
7 10 14
10 14
7 10 14
y
r
7 10 14
10 14
10 14
7 10 13 14
TABLE_SPACING_ASSIGNMENT_ITEM
FSB_ADDR
SPACING_0.2MM
TABLE_SPACING_ASSIGNMENT_ITEM
FSB_ADSTB
SPACING_0.3MM
TABLE_SPACING_ASSIGNMENT_ITEM
FSB_DATA
SPACING_0.2MM
TABLE_SPACING_ASSIGNMENT_ITEM
FSB_DSTB
SPACING_0.3MM
TABLE_SPACING_ASSIGNMENT_ITEM
FSB_COMMON
FSB_DATA
SPACING_0.2MM
FSB_DATA_GROUP1
FSB_55S
FSB_DATA_GROUP1_PP
FSB_55S
FSB_DATA
FSB_DATA_GROUP1_PP
FSB_55S
FSB_DATA
FSB_DSTB1
FSB_DSTB_55S
FSB_DSTB
FSB_DSTB_55S
FSB_DSTB
FSB_DATA_GROUP2
FSB_55S
FSB_DATA
FSB_DATA_GROUP2_PP
FSB_55S
FSB_DATA
FSB_DATA_GROUP2
FSB_55S
FSB_DATA
FSB_DATA_GROUP2_PP
FSB_55S
FSB_DATA
FSB_DSTB2
FSB_DSTB_55S
FSB_DSTB
FSB_DSTB_55S
FSB_DSTB
FSB_DATA_GROUP3
FSB_55S
FSB_DATA
FSB_DATA_GROUP3_PP
FSB_55S
FSB_DATA
FSB_DATA_GROUP3
FSB_55S
FSB_DATA
FSB_DATA_GROUP3_PP
FSB_55S
FSB_DATA
AREA_TYPE
PHYSICAL_RULE_SET
CPU_55S
55_OHM_SE
FSB_DSTB3
FSB_DSTB_55S
FSB_DSTB
FSB_DSTB_55S
FSB_DSTB
CPU_27P4S
27P4_OHM_SE
FSB_ADDR_GROUP0
FSB_55S
FSB_ADDR
FSB_ADDR_GROUP0
FSB_55S
FSB_ADDR
FSB_ADDR_GROUP0_PP
FSB_55S
FSB_ADDR
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
TABLE_SPACING_ASSIGNMENT_ITEM
CPU_2TO1
SPACING_0.2MM
CPU_COMP
SPACING_0.6MM
m
il
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
CPU_GTLREF
SPACING_0.6MM
TABLE_SPACING_ASSIGNMENT_ITEM
CPU_ITP
SPACING_0.2MM
CPU_VCCSENSE
SPACING_0.6MM
TABLE_SPACING_ASSIGNMENT_ITEM
e
r
FSB_D_L<31..17>
FSB_D_L<16>
FSB_DINV_L<1>
FSB_DSTB_L_P<1>
FSB_DSTB_L_N<1>
10 14
7 10 14
7 10 14
7 10 14
7 10 14
10 14
a
n
i
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
FSB_D_L<15..1>
FSB_D_L<0>
FSB_DINV_L<0>
FSB_DSTB_L_P<0>
FSB_DSTB_L_N<0>
7 10 14
FSB_ADDR_GROUP0_PP
FSB_55S
FSB_ADDR
FSB_ADSTB0
FSB_55S
FSB_ADSTB
FSB_ADDR_GROUP1
FSB_55S
FSB_ADDR
FSB_ADDR_GROUP1
FSB_55S
FSB_ADDR
FSB_ADDR_GROUP1_PP
FSB_55S
FSB_ADDR
FSB_ADSTB1
FSB_55S
FSB_ADSTB
CPU_IERR_L
CPU_55S
CPU_FERR_L
CPU_55S
CPU_PROCHOT_L
CPU_55S
CPU_PWRGD
CPU_55S
CPU_FROM_SB_PP
CPU_55S
CPU_FROM_SB_PP
CPU_55S
CPU_FROM_SB_PP
CPU_55S
CPU_2TO1
CPU_FROM_SB
CPU_55S
CPU_FROM_SB_PP
CPU_55S
CPU_INIT_L
CPU_55S
CPU_FROM_SB_PP
CPU_55S
CPU_FROM_SB_PP
CPU_55S
PM_THRMTRIP_L
CPU_55S
FSB_CPUSLP_L
CPU_55S
PM_DPRSLPVR
CPU_55S
CPU_2TO1
CPU_55S
CPU_2TO1
CPU_55S
CPU_2TO1
CPU_55S
CPU_2TO1
CPU_55S
CPU_2TO1
CPU_55S
CPU_2TO1
CPU_55S
CPU_2TO1
CPU_55S
CPU_2TO1
CPU_DPRSTP_L
CPU_55S
CPU_2TO1
CPU_GTLREF
CPU_55S
CPU_GTLREF
CPU_COMP
CPU_55S
CPU_COMP
CPU_COMP
CPU_27P4S
CPU_COMP
CPU_COMP
CPU_55S
CPU_COMP
CPU_COMP
CPU_27P4S
CPU_COMP
XDP_TDI
CPU_55S
CPU_ITP
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
CPU_2TO1
XDP_TDO
CPU_55S
CPU_ITP
XDP_TMS
CPU_55S
CPU_ITP
XDP_TCK
CPU_55S
CPU_ITP
XDP_TRST_L
CPU_55S
CPU_ITP
XDP_BPM_L
CPU_55S
CPU_ITP
XDP_BPM_L5
CPU_55S
CPU_ITP
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
(FSB_CPURST_L)
CPU_55S
CPU_ITP
CPU_55S
CPU_2TO1
CPU_55S
CPU_2TO1
CPU_VCCSENSE
CPU_27P4S
CPU_VCCSENSE
CPU_VCCSENSE
CPU_27P4S
CPU_VCCSENSE
CPU_27P4S
CPU_VCCSENSE
CPU_27P4S
CPU_VCCSENSE
FSB_D_L<47..42>
FSB_D_L<41>
FSB_D_L<40..32>
FSB_DINV_L<2>
FSB_DSTB_L_P<2>
FSB_DSTB_L_N<2>
FSB_D_L<63..60>
FSB_D_L<59>
FSB_D_L<58..48>
FSB_DINV_L<3>
FSB_DSTB_L_P<3>
FSB_DSTB_L_N<3>
FSB_A_L<16..7>
FSB_A_L<5..3>
FSB_A_L<6>
FSB_REQ_L<4..0>
FSB_ADSTB_L<0>
FSB_A_L<35..28>
FSB_A_L<26..17>
FSB_A_L<27>
FSB_ADSTB_L<1>
CPU_IERR_L
CPU_FERR_L
CPU_PROCHOT_L
CPU_PWRGD
CPU_INTR
CPU_NMI
CPU_A20M_L
CPU_DPSLP_L
CPU_IGNNE_L
CPU_INIT_L
CPU_SMI_L
CPU_STPCLK_L
PM_THRMTRIP_L
FSB_CPUSLP_L
PM_DPRSLPVR
IMVP_DPRSLPVR
CPU_BSEL<0>
NB_BSEL<0>
CPU_BSEL<1>
NB_BSEL<1>
CPU_BSEL<2>
NB_BSEL<2>
CPU_DPRSTP_L
CPU_GTLREF
CPU_COMP<3>
CPU_COMP<2>
CPU_COMP<1>
CPU_COMP<0>
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TCK
XDP_TRST_L
XDP_BPM_L<4..0>
XDP_BPM_L<5>
XDP_CLK_P
XDP_CLK_N
ITP_CPURST_L
CPU_VID<6..0>
IMVP6_VID<6..0>
CPU_VCCSENSE_P
CPU_VCCSENSE_N
IMVP6_VSEN_P
IMVP6_VSEN_N
7 10 14
7 10 14
7 10 14
7 10 14
10 14
7 10 14
10 14
7 10 14
7 10 14
7 10 14
10 14
7 10 14
10 14
7 10 14
7 10 14
7 10 14
10 14
10 14
7 10 14
7 10 14
7 10 14
10 14
10 14
7 10 14
7 10 14
10
10 23
10 50
7 10 13 23
7 10 23
7 10 23
7 10 23
10 23
7 10 23
7 10 23 51
7 10 23
7 10 23
10 16 23 50
10 14
16 25 71
71
10 30
13 16 30
10 30
13 16 30
10 30
13 16 30
10 16 23 71
10
10
10
10
10
10 13
10 13
10 13
10 13
CPU/FSB Constraints
10 13
10 13
SYNC_MASTER=T9_MLB
SYNC_DATE=09/27/2006
10 13
13 30 105
13 30 105
11 12
12 71
11 71
11 71
SIZE
71
71
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
100
OF
33
118
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
PHYSICAL
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
PEG_R2D
TABLE_PHYSICAL_ASSIGNMENT_ITEM
PCIE_100D
100_OHM_DIFF
100_OHM_DIFF
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
DMI_N2S
DMI_100D
DMI
DMI_N2S_PP
DMI_100D
DMI
DMI_100D
DMI
DMI_S2N
DMI_100D
DMI
DMI_S2N_PP
DMI_100D
DMI
DMI_100D
DMI
TABLE_SPACING_ASSIGNMENT_ITEM
PCIE
SPACING_0.5MM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
DMI_100D
TABLE_SPACING_ASSIGNMENT_ITEM
DMI
SPACING_0.5MM
PEG_D2R
PEG_D2R_PP
SPACING
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
PEG_D2R
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 7.2, 9.2 & 10.5
PEG_R2D_P<15..0>
PEG_R2D_N<15..0>
PEG_R2D_C_P<15..0>
PEG_R2D_C_N<15..0>
PEG_D2R_P<15..8>
PEG_D2R_N<15..8>
PEG_D2R_P<7>
PEG_D2R_N<7>
PEG_D2R_P<6..0>
PEG_D2R_N<6..0>
84
84
15 84
15 84
15 84
15 84
7 15 84
7 15 84
15 84
y
r
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
LVDS_100D
100_OHM_DIFF
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
LVDS
SPACING_0.5MM
CRT
SPACING_0.6MM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
CRT_55S
55_OHM_SE
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
CRT_50S
50_OHM_SE
TABLE_SPACING_ASSIGNMENT_ITEM
CRT
CRT
SPACING_0.5MM
DMI_N2S_P<3..1>
DMI_N2S_P<0>
DMI_N2S_N<3..0>
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TMDS_100D
100_OHM_DIFF
TVDAC
CRT_SYNC
SPACING_0.6MM
CRT_SYNC
SPACING_0.5MM
TMDS
SPACING_0.5MM
TABLE_SPACING_ASSIGNMENT_ITEM
C
LVDS signals are 100-ohm +/- 20% differential impedence.
CRT & TVDAC signal single-ended impedence varies by location:
- 37.5-ohm +/- 15% from GMCH to first termination resistor.
- 50-ohm +/- 15% from first to second termination resistor.
- 55-ohm +/- 15% from second termination resistor to connector.
CRT_HSYNC/CRT_VSYNC signals are 55-ohm +/- 15% single-ended impedence.
DMI_S2N_P<3..1>
DMI_S2N_P<0>
DMI_S2N_N<3..0>
16 24
7 16 24
7 16 24
16 24
7 16 24
7 16 24
a
n
i
TABLE_SPACING_ASSIGNMENT_ITEM
CRT_SYNC
15 84
m
il
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 8.1 - 8.3.
e
r
NB Constraints
SYNC_MASTER=T9_MLB
SYNC_DATE=09/27/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
101
OF
33
118
5
Memory Net Properties
NET_TYPE
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
TABLE_SPACING_ASSIGNMENT_ITEM
45_OHM_SE
MEM_CLK
*
*
55_OHM_SE
MEM_CMD
MEM_70D
MEM_CLK
MEM_70D
MEM_CLK
MEM_A_CNTL
MEM_45S
MEM_CTRL
MEM_A_CNTL
MEM_45S
MEM_CTRL
MEM_A_CNTL
MEM_45S
MEM_CTRL
MEM_A_CMD
MEM_55S
MEM_CMD
MEM_A_CMD
MEM_55S
MEM_CMD
MEM_A_CMD
MEM_55S
MEM_CMD
MEM_A_CMD
MEM_55S
MEM_CMD
MEM_A_CMD
MEM_55S
MEM_CMD
MEM_CLK_P<1..0>
MEM_CLK_N<1..0>
SPACING_0.15MM
MEM_CKE<1..0>
MEM_CS_L<1..0>
MEM_ODT<1..0>
TABLE_SPACING_ASSIGNMENT_ITEM
70_OHM_DIFF
MEM_CTRL
SPACING_0.6MM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
MEM_85D
MEM_A_CLK
MEM_B_CLK
16 31
SPACING
16 31
MEM_70D
MEM_CLK
MEM_70D
MEM_CLK
MEM_CLK_P<4..3>
MEM_CLK_N<4..3>
16 32
16 32
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
MEM_70D
PHYSICAL
SPACING
SPACING_0.6MM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
MEM_55S
PHYSICAL
SPACING_RULE_SET
TABLE_PHYSICAL_ASSIGNMENT_ITEM
MEM_45S
ELECTRICAL_CONSTRAINT_SET
TABLE_SPACING_ASSIGNMENT_ITEM
85_OHM_DIFF
MEM_DATA
MEM_DQS
SPACING_0.6MM
MEM_CLK
MEM_CLK
SPACING_0.4MM
MEM_A_A<14..0>
MEM_A_BS<2..0>
MEM_A_RAS_L
MEM_A_CAS_L
MEM_A_WE_L
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CLK
MEM_CTRL
MEM_B_CNTL
MEM_45S
MEM_CTRL
16 31 33
MEM_B_CNTL
MEM_45S
MEM_CTRL
16 31 33
MEM_B_CNTL
MEM_45S
MEM_CTRL
16 17 31 33
MEM_B_CMD
MEM_55S
MEM_CMD
17 31 33
MEM_B_CMD
MEM_55S
MEM_CMD
17 31 33
MEM_B_CMD
MEM_55S
MEM_CMD
17 31 33
MEM_B_CMD
MEM_55S
MEM_CMD
17 31 33
MEM_B_CMD
MEM_55S
MEM_CMD
MEM_B_DQ_BYTE0
MEM_55S
MEM_DATA
MEM_B_DQ_BYTE0_PP
MEM_55S
MEM_DATA
SPACING_0.4MM
MEM_B_DQ_BYTE0
MEM_55S
MEM_DATA
MEM_B_DQ_BYTE1_PP
MEM_55S
MEM_DATA
MEM_B_DQ_BYTE1
MEM_55S
MEM_DATA
17 31
MEM_B_DQ_BYTE2
MEM_55S
MEM_DATA
7 17 31
MEM_B_DQ_BYTE2_PP
MEM_55S
MEM_DATA
y
r
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CLK
MEM_CMD
SPACING_0.4MM
MEM_CLK
MEM_DATA
SPACING_0.4MM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CLK
MEM_DQS
SPACING_0.4MM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CTRL
MEM_CTRL
SPACING_0.2MM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CTRL
MEM_CMD
MEM_A_DQ_BYTE0
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE0_PP
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE1
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE1_PP
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE1
MEM_55S
MEM_DATA
MEM_A_DQ<6..0>
MEM_A_DQ<7>
MEM_A_DQ<13..8>
MEM_A_DQ<14>
MEM_A_DQ<15>
MEM_A_DQ<16>
MEM_A_DQ<23..17>
MEM_A_DQ<24>
MEM_A_DQ<25>
MEM_A_DQ<31..26>
MEM_A_DQ<38..32>
MEM_A_DQ<39>
MEM_A_DQ<46..40>
MEM_A_DQ<47>
MEM_A_DQ<53..48>
MEM_A_DQ<54>
MEM_A_DQ<55>
MEM_A_DQ<58..56>
MEM_A_DQ<59>
MEM_A_DQ<63..60>
SPACING_0.3MM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CTRL
MEM_DATA
SPACING_0.3MM
MEM_CTRL
MEM_DQS
SPACING_0.3MM
MEM_CMD
MEM_CMD
SPACING_0.15MM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE2
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE3
MEM_A_DQ_BYTE2_PP
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE3_PP
MEM_55S
MEM_DATA
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CMD
MEM_DATA
MEM_DQS
SPACING_0.3MM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_DATA
MEM_DATA
MEM_A_DQ_BYTE3
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE4
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE4_PP
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE5
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE5_PP
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE6
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE6_PP
MEM_55S
MEM_DATA
SPACING_0.15MM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_DATA
MEM_DQS
SPACING_0.3MM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_DQS
MEM_DQS
SPACING_0.3MM
MEM_A_DQ_BYTE6
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE7
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE7_PP
MEM_55S
MEM_DATA
MEM_A_DQ_BYTE7
MEM_55S
MEM_DATA
MEM_A_DM0
MEM_55S
MEM_DATA
MEM_A_DM1
MEM_55S
MEM_DATA
MEM_A_DM2
MEM_55S
MEM_DATA
MEM_A_DM3
MEM_55S
MEM_DATA
MEM_A_DM4
MEM_55S
MEM_DATA
MEM_A_DM5
MEM_55S
MEM_DATA
MEM_DATA
MEM_A_DQS0
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_A_DQS3
MEM_A_DQS4
e
r
MEM_DATA
MEM_55S
MEM_A_DQS2
MEM_55S
MEM_A_DM7
MEM_A_DQS1
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Section 6.2
MEM_A_DM<0>
MEM_A_DM<1>
MEM_A_DM<2>
MEM_A_DM<3>
MEM_A_DM<4>
MEM_A_DM<5>
MEM_A_DM<6>
MEM_A_DM<7>
m
il
MEM_A_DM6
MEM_A_DQS5
MEM_A_DQS6
MEM_A_DQS7
17 31
7 17 31
17 31
MEM_55S
MEM_DATA
17 31
MEM_B_DQ_BYTE3_PP
MEM_55S
MEM_DATA
17 31
MEM_B_DQ_BYTE3
MEM_B_DQ_BYTE3
MEM_55S
MEM_DATA
7 17 31
MEM_B_DQ_BYTE4
MEM_55S
MEM_DATA
17 31
MEM_B_DQ_BYTE4_PP
MEM_55S
MEM_DATA
17 31
MEM_B_DQ_BYTE4
MEM_55S
MEM_DATA
7 17 31
MEM_B_DQ_BYTE5
MEM_55S
MEM_DATA
17 31
MEM_B_DQ_BYTE5_PP
MEM_55S
MEM_DATA
7 17 31
MEM_B_DQ_BYTE5
MEM_55S
MEM_DATA
17 31
MEM_B_DQ_BYTE6_PP
MEM_55S
MEM_DATA
7 17 31
MEM_B_DQ_BYTE6
MEM_55S
MEM_DATA
17 31
MEM_B_DQ_BYTE7
MEM_55S
MEM_DATA
7 17 31
MEM_B_DQ_BYTE7_PP
MEM_55S
MEM_DATA
17 31
MEM_B_DQ_BYTE7
MEM_55S
MEM_DATA
MEM_B_DM0
MEM_55S
MEM_DATA
MEM_B_DM1
MEM_55S
MEM_DATA
MEM_B_DM2
MEM_55S
MEM_DATA
MEM_B_DM3
MEM_55S
MEM_DATA
MEM_B_DM4
MEM_55S
MEM_DATA
MEM_B_DM5
MEM_55S
MEM_DATA
MEM_B_DM6
MEM_55S
MEM_DATA
MEM_B_DM7
MEM_55S
MEM_DATA
MEM_B_DQS0
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
MEM_85D
MEM_DQS
7 17 31
a
n
i
SPACING_0.3MM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CMD
MEM_CKE<4..3>
MEM_CS_L<3..2>
MEM_ODT<3..2>
16 32 33
16 32 33
16 32 33
SPACING_0.6MM
TABLE_SPACING_ASSIGNMENT_ITEM
16 31 33
MEM_A_DQS_P<0>
MEM_A_DQS_N<0>
MEM_A_DQS_P<1>
MEM_A_DQS_N<1>
MEM_A_DQS_P<2>
MEM_A_DQS_N<2>
MEM_A_DQS_P<3>
MEM_A_DQS_N<3>
MEM_A_DQS_P<4>
MEM_A_DQS_N<4>
MEM_A_DQS_P<5>
MEM_A_DQS_N<5>
MEM_A_DQS_P<6>
MEM_A_DQS_N<6>
MEM_A_DQS_P<7>
MEM_A_DQS_N<7>
17 31
17 31
17 31
17 31
17 31
17 31
17 31
17 31
MEM_B_A<14..0>
MEM_B_BS<2..0>
MEM_B_RAS_L
MEM_B_CAS_L
MEM_B_WE_L
16 17 32 33
17 32 33
17 32 33
17 32 33
17 32 33
MEM_B_DQ<5..0>
MEM_B_DQ<6>
MEM_B_DQ<7>
MEM_B_DQ<8>
MEM_B_DQ<15..9>
17 32
7 17 32
17 32
7 17 32
17 32
MEM_B_DQ<22..16>
MEM_B_DQ<23>
17 32
7 17 32
MEM_B_DQ<24>
MEM_B_DQ<25>
MEM_B_DQ<31..26>
MEM_B_DQ<37..32>
MEM_B_DQ<38>
MEM_B_DQ<39>
MEM_B_DQ<43..40>
MEM_B_DQ<44>
MEM_B_DQ<47..45>
MEM_B_DQ<48>
MEM_B_DQ<55..49>
17 32
7 17 32
17 32
17 32
7 17 32
17 32
17 32
7 17 32
17 32
7 17 32
17 32
MEM_B_DQ<61..56>
MEM_B_DQ<62>
MEM_B_DQ<63>
17 32
7 17 32
17 32
MEM_B_DM<0>
MEM_B_DM<1>
MEM_B_DM<2>
MEM_B_DM<3>
MEM_B_DM<4>
MEM_B_DM<5>
MEM_B_DM<6>
MEM_B_DM<7>
17 32
17 32
17 32
17 32
17 32
17 32
17 32
17 32
17 31
7 17 31
7 17 31
MEM_B_DQS1
7 17 31
7 17 31
MEM_B_DQS2
7 17 31
7 17 31
MEM_B_DQS3
7 17 31
7 17 31
MEM_B_DQS4
7 17 31
7 17 31
MEM_B_DQS5
7 17 31
7 17 31
MEM_B_DQS6
7 17 31
7 17 31
MEM_B_DQS7
7 17 31
7 17 31
MEM_B_DQS_P<0>
MEM_B_DQS_N<0>
MEM_B_DQS_P<1>
MEM_B_DQS_N<1>
MEM_B_DQS_P<2>
MEM_B_DQS_N<2>
MEM_B_DQS_P<3>
MEM_B_DQS_N<3>
MEM_B_DQS_P<4>
MEM_B_DQS_N<4>
MEM_B_DQS_P<5>
MEM_B_DQS_N<5>
MEM_B_DQS_P<6>
MEM_B_DQS_N<6>
MEM_B_DQS_P<7>
MEM_B_DQS_N<7>
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
7 17 32
Memory Constraints
SYNC_MASTER=T9_MLB
SYNC_DATE=09/27/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
102
OF
33
118
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
IDE_55S
55_OHM_SE
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
IDE
SPACING_0.18MM
NET_TYPE
ELECTRICAL_CONSTRAINT_SET
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
SATA_55S
PHYSICAL
SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
55_OHM_SE
SATA
SPACING_0.5MM
IDE_PDD
IDE_55S
IDE
IDE_PDD_PP
IDE_55S
IDE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
SATA_100D
100_OHM_DIFF
D
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.7 & 10.9
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
HDA_55S
55_OHM_SE
IDE_PDD
IDE_55S
IDE
IDE_PDA
IDE_55S
IDE
IDE_PDCS
IDE_55S
IDE
IDE_PDCS
IDE_55S
IDE
IDE_CNTL
IDE_55S
IDE
IDE_PDIOR_L
IDE_55S
IDE
IDE_CNTL
IDE_55S
IDE
IDE_CNTL
IDE_55S
IDE
IDE_PDIORDY
IDE_55S
IDE
IDE_IRQ14
IDE_55S
IDE
IDE_RST_L
IDE_55S
IDE
SATA_A_R2D
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
HDA
SPACING_0.18MM
TABLE_SPACING_ASSIGNMENT_ITEM
SATA_A_D2R
TABLE_PHYSICAL_ASSIGNMENT_HEAD
PHYSICAL_RULE_SET
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
SATA_100D
SATA
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
USB_60S
SPACING_RULE_SET
TABLE_SPACING_ASSIGNMENT_ITEM
55_OHM_SE
USB
SPACING_0.5MM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
USB_90D
90_OHM_DIFF
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Section 10.13.2
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
SMB_55S
55_OHM_SE
SMB
55_OHM_SE
SATA_55S
HDA_BIT_CLK
HDA_55S
HDA
HDA_55S
HDA
HDA_55S
HDA
SPACING_RULE_SET
SPACING_0.3MM
HDA_SYNC
m
il
TABLE_SPACING_ASSIGNMENT_ITEM
SPI
SPACING_0.18MM
HDA_RST_L
HDA_SDIN0
HDA_SDOUT
USB_EXTA
USB_MINI
e
r
SATA_A_R2D_C_P
SATA_A_R2D_C_N
SATA_A_R2D_P
SATA_A_R2D_N
SATA_A_D2R_P
SATA_A_D2R_N
SATA_A_D2R_C_P
SATA_A_D2R_C_N
SATA_B_R2D_C_P
SATA_B_R2D_C_N
SATA_B_D2R_P
SATA_B_D2R_N
SATA_RBIAS
SATA_RBIAS
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
SPI_55S
7 23 44
23 44
23 44
23 44
23 44
23 44
7 23 44
23 44
23 44
y
r
7 23 44
23 44
24 44
23 45
23 45
45
45
7 23 45
7 23 45
45
a
n
i
23 44
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_PHYSICAL_ASSIGNMENT_ITEM
NET_PHYSICAL_TYPE
IDE_PDD<15..10>
IDE_PDD<9>
IDE_PDD<8..0>
IDE_PDA<2..0>
IDE_PDCS1_L
IDE_PDCS3_L
IDE_PDIOW_L
IDE_PDIOR_L
IDE_PDDACK_L
IDE_PDDREQ
IDE_PDIORDY
IDE_IRQ14
ODD_RST_5VTOL_L
USB_CAMERA
USB_BT
USB_IR
USB_EXTB
USB_EXTC
HDA_55S
HDA
HDA_55S
HDA
HDA_55S
HDA
HDA_55S
HDA
HDA_55S
HDA
HDA_55S
HDA
HDA_55S
HDA
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_RBIAS
USB_60S
SMB_SB_SCL
SMB_55S
SMB
SMB_SB_SDA
SMB_55S
SMB
SMB_SB_ME_SCL
SMB_55S
SMB
SMB_SB_ME_SDA
SMB_55S
SMB
SPI_SCLK
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_55S
SPI
SPI_SI
SPI_SO
SPI_CE_L0
SPI_CE_L1
45
23 45
23 45
23 45
23 45
45
HDA_BIT_CLK
HDA_BIT_CLK_R
HDA_SYNC
HDA_SYNC_R
HDA_RST_L
HDA_RST_L_R
HDA_SDIN0
HDA_SDIN_CODEC
HDA_SDOUT
HDA_SDOUT_R
USB_EXTA_P
USB_EXTA_N
USB_EXTA_MUXED_P
USB_EXTA_MUXED_N
USB_MINI_P
USB_MINI_N
USB_EXTD_P
USB_EXTD_N
USB_CAMERA_P
USB_CAMERA_N
USB_BT_P
USB_BT_N
USB_TPAD_P
USB_TPAD_N
USB_IR_P
USB_IR_N
USB_EXTB_P
USB_EXTB_N
USB_EXCARD_P
USB_EXCARD_N
USB_EXTC_P
USB_EXTC_N
USB_RBIAS
SMB_CLK
SMB_DATA
SMB_ME_CLK
SMB_ME_DATA
SPI_SCLK_R
SPI_SCLK
SPI_A_SCLK_R
SPI_B_SCLK_R
SPI_SI_R
SPI_SI
SPI_A_SI_R
SPI_B_SI_R
SPI_SO
SPI_A_SO_R
SPI_B_SO
SPI_B_SO_R
SPI_CE_R_L<0>
SPI_CE_L<0>
SPI_CE_R_L<1>
SPI_CE_L<1>
23 98
23
23 98
23
23 98
23
23 98
23 98
23
24 46
24 46
24 34
24 34
24 46
24 46
7 24 47
7 24 47
7 24 47
7 24 47
24 47
24 47
7 24 47
7 24 47
24 46
24 46
24 47
24 47
24 46
24 46
24
25 52
25 52
25 52
25 52
24 61
7 61
24 61
SB Constraints (1 of 2)
61
SYNC_MASTER=T9_MLB
7 24 61
7 61
SYNC_DATE=09/27/2006
24 61
7 61
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
103
OF
33
118
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
TABLE_PHYSICAL_ASSIGNMENT_ITEM
PCI_55S
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
55_OHM_SE
PCI
STANDARD
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
PCI_55S
PCI
INT_PIRQA_L
PCI_55S
PCI
INT_PIRQB_L
PCI_55S
PCI
INT_PIRQC_L
PCI_55S
PCI
INT_PIRQD_L
PCI_55S
PCI
INT_PIRQE_L
PCI_55S
PCI
INT_PIRQF_L
PCI_55S
PCI
PCIE_A_R2D
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.18.1 & 10.19
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
TABLE_PHYSICAL_ASSIGNMENT_ITEM
CLINK_55S
TABLE_SPACING_ASSIGNMENT_ITEM
CLINK
SPACING_0.18MM
CLINK_VREF
SPACING_0.3MM
55_OHM_SE
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
CLINK_12MIL
=STANDARD
0.3 MM
0.125 MM
=STANDARD
7.5 MM
=STANDARD
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.27.1.5-7, 10.29 & 10.30
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
ENET_100D
100_OHM_DIFF
TABLE_SPACING_ASSIGNMENT_ITEM
ENET_MDI
SPACING_0.5MM
TABLE_SPACING_ASSIGNMENT_ITEM
ENET_MDI
ENET_MDI_TERM
SPACING_0.2MM
PCIE_A_D2R
SOURCE: Based on Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.27.1.5-7, 10.29 & 10.30
PCIE_B_R2D
PCIE_B_D2R
PCIE_B_R2D
PCIE_B_D2R
m
il
GLAN_COMP
e
r
24 28
24 28
24 28
24 28
24 28
24 28
24
24
24
24
y
r
24 28
24
24
24
24
24
7 24
7 24
24
a
n
i
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_PHYSICAL_ASSIGNMENT_ITEM
PCI_AD<18..0>
PCI_AD<19>
PCI_AD<20>
PCI_AD<31..21>
PCI_PAR
PCI_C_BE_L<3..0>
PCI_IRDY_L
PCI_DEVSEL_L
PCI_PERR_L
PCI_LOCK_L
PCI_SERR_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
PCI_FW_REQ_L
PCI_FW_GNT_L
PCI_REQ1_L
PCI_GNT1_L
PCI_REQ2_L
PCI_GNT2_L
INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
INT_PIRQE_L
INT_PIRQF_L
PCIE_MINI_R2D_C_P
PCIE_MINI_R2D_C_N
PCIE_MINI_D2R_P
PCIE_MINI_D2R_N
PCIE_ENET_R2D_C_P
PCIE_ENET_R2D_C_N
PCIE_ENET_D2R_P
PCIE_ENET_D2R_N
PCIE_FW_R2D_C_P
PCIE_FW_R2D_C_N
PCIE_FW_D2R_P
PCIE_FW_D2R_N
GLAN_COMP
CLINK_55S
CLINK
CLINK_NB
CLINK_55S
CLINK
CLINK_NB_RESET_L
CLINK_55S
CLINK
NB_CLINK_VREF
CLINK_12MIL
CLINK_VREF
SB_CLINK_VREF0
CLINK_12MIL
CLINK_VREF
SB_CLINK_VREF1
CLINK_12MIL
CLINK_VREF
NB_CLINK_VREF
SB_CLINK_VREF0
SB_CLINK_VREF1
I149
PWR
PP1V9R2V5_ENET_PHY_AVDD
I150
PWR
PP1V9R2V5_S3_ENET_R
I147
ENET_MDI_TERM
I148
ENET_MDI_TERM
I145
ENET_MDI_TERM
I146
ENET_MDI_TERM
ENET_MDI0
ENET_MDI1
ENET_MDI2
ENET_MDI3
ENET_MDI_P<0>
ENET_MDI_N<0>
ENET_MDI_P<1>
ENET_MDI_N<1>
ENET_MDI_P<2>
ENET_MDI_N<2>
ENET_MDI_P<3>
ENET_MDI_N<3>
ENET_MDI1
ENET_MDI2
ENET_MDI3
24
24
24
24
24 34
24 34
7 24 34
7 24 34
24 37
24 37
7 24 37
7 24 37
40 42
40 42
7 40 42
7 40 42
23
CLINK_NB_CLK
CLINK_NB_DATA
CLINK_NB_RESET_L
CLINK_NB
ENET_MDI0
24
7 16 25
7 16 25
16 25
16
25
25
37 39
38
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
37
37
37
37
37 39
37 39
37 39
37 39
37 39
37 39
37 39
37 39
SB Constraints (2 of 2)
SYNC_MASTER=(MASTER)
SYNC_DATE=(10/02/2006)
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
104
OF
33
118
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
CLK_FSB_100D
100_OHM_DIFF
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
CLK_FSB
CLK_SPACING_0.6MM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_PHYSICAL_ASSIGNMENT_ITEM
CLK_PCIE_100D
100_OHM_DIFF
55_OHM_SE
PHYSICAL
SPACING
CK505_CPU
CLK_FSB_100D
CLK_FSB
CK505_CPU
CLK_FSB_100D
CLK_FSB
CK505_NB
CLK_FSB_100D
CLK_FSB
CK505_NB
CLK_FSB_100D
CLK_FSB
CK505_ITP
CLK_FSB_100D
CLK_FSB
CK505_ITP
CLK_FSB_100D
CLK_FSB
CK505_PCIF0
CLK_MED_55S
CLK_MED
CK505_PCIF1
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
CK505_PCI5
CLK_MED_55S
CLK_MED
(CPU_BSEL0)
(CPU_BSEL2)
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
TABLE_SPACING_ASSIGNMENT_ITEM
CLK_PCIE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
CLK_MED_55S
ELECTRICAL_CONSTRAINT_SET
CLK_SPACING_0.5MM
TABLE_SPACING_ASSIGNMENT_ITEM
CLK_MED
CLK_SPACING_0.5MM
CK505_PCI3
SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 14.1 - 14.6
CK505_SRC1
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
(CK505_CPU)
(CK505_CPU)
(CK505_NB)
(CK505_NB)
(CK505_ITP)
(CK505_ITP)
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
CLK_FSB_100D
CLK_FSB
(CK505_PCIF0)
(CK505_PCIF1)
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
(CK505_PCI2)
(CK505_PCI3)
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
CK505_SRC3
CK505_SRC4
CK505_SRC5
CK505_SRC6
CK505_SRC7
CK505_SRC8
m
il
e
r
CK505_PCIF0_CLK_ITPEN
CK505_PCIF1_CLK
CK505_PCI1_CLK
CK505_PCI2_CLK
CK505_PCI3_CLK
CK505_PCI4_CLK
CK505_PCI5_CLK_FCTSEL
CK505_48M_FSA
CK505_REF0_FSC
CK505_DOT96_27M_P
CK505_DOT96_27M_N
CK505_LVDS_P
CK505_LVDS_N
CK505_SRC1_P
CK505_SRC1_N
CK505_SRC2_P
CK505_SRC2_N
CK505_SRC3_P
CK505_SRC3_N
CK505_SRC4_P
CK505_SRC4_N
CK505_SRC5_P
CK505_SRC5_N
CK505_SRC6_P
CK505_SRC6_N
CK505_SRC7_P
CK505_SRC7_N
CK505_SRC8_P
CK505_SRC8_N
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
y
r
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
a
n
i
CLK_PCIE_100D
CK505_SRC2
CK505_CPU0_P
CK505_CPU0_N
CK505_CPU1_P
CK505_CPU1_N
CK505_CPU2_ITP_SRC10_P
CK505_CPU2_ITP_SRC10_N
FSB_CLK_CPU_P
FSB_CLK_CPU_N
FSB_CLK_NB_P
FSB_CLK_NB_N
XDP_CLK_P
XDP_CLK_N
PCI_CLK33M_LPCPLUS
PCI_CLK33M_SB
PCI_CLK33M_TPM
PCI_CLK33M_SMC
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
29 30
7 10 30
7 10 30
7 14 30
7 14 30
13 30 100
13 30 100
7 30 51
7 24 30
7 30 49
(CPU_BSEL0)
(CPU_BSEL2)
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
(CPU_BSEL0)
(CPU_BSEL2)
CLK_MED_55S
CLK_MED
CLK_MED_55S
CLK_MED
(CK505_SRC1)
(CK505_SRC1)
(CK505_SRC2)
(CK505_SRC2)
(CK505_SRC3)
(CK505_SRC3)
(CK505_SRC4)
(CK505_SRC4)
(CK505_SRC5)
(CK505_SRC5)
(CK505_SRC6)
(CK505_SRC6)
(CK505_SRC8)
(CK505_SRC8)
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
CLK_PCIE_100D
CLK_PCIE
SB_CLK48M_USBCTLR
SB_CLK14P3M_TIMER
CK505_FSA
CK505_FSC
7 25 30
7 25 30
30
30
GPU_CLK100M_PCIE_P
GPU_CLK100M_PCIE_N
SB_CLK100M_DMI_P
SB_CLK100M_DMI_N
PCIE_CLK100M_FW_P
PCIE_CLK100M_FW_N
SB_CLK100M_SATA_P
SB_CLK100M_SATA_N
NB_CLK100M_PCIE_P
NB_CLK100M_PCIE_N
PCIE_CLK100M_MINI_P
PCIE_CLK100M_MINI_N
PCIE_CLK100M_ENET_P
PCIE_CLK100M_ENET_N
30 85
30 85
7 24 30
7 24 30
7 30 40
7 30 40
7 23 30
7 23 30
7 16 30
7 16 30
30 34
30 34
7 30 37
7 30 37
Clock Constraints
SYNC_MASTER=T9_MLB
SYNC_DATE=09/27/2006
DRAWING NUMBER
SCALE
SHT
NONE
REV.
051-7229
105
OF
33
118
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
TABLE_PHYSICAL_ASSIGNMENT_ITEM
FW_110D
110_OHM_DIFF
FW_110D
BGA_P1MM
110_OHM_DIFF_ESCAPE
SPACING_RULE_SET
ELECTRICAL_CONSTRAINT_SET
PHYSICAL
SPACING
TABLE_SPACING_ASSIGNMENT_ITEM
FW_TP
SPACING_0.3MM
FW_0_TPA
TABLE_PHYSICAL_ASSIGNMENT_ITEM
FW_0_TPB
FW_1_TPA
FW_1_TPB
FW_110D
FW_TP
FW_110D
FW_TP
FW_110D
FW_TP
FW_110D
FW_TP
FW_110D
FW_TP
FW_110D
FW_TP
FW_110D
FW_TP
FW_110D
FW_TP
FW_110D
FW_TP
FW_110D
FW_TP
FW_110D
FW_TP
FW_110D
FW_TP
FW_PORT0_TPA_P
FW_PORT0_TPA_N
FW_PORT0_TPB_P
FW_PORT0_TPB_N
FW_PORT1_TPA_P
FW_PORT1_TPA_N
FW_PORT1_TPB_P
FW_PORT1_TPB_N
FW_PORT1_TPA_FL_P
FW_PORT1_TPA_FL_N
FW_PORT1_TPB_FL_P
FW_PORT1_TPB_FL_N
43
43
43
43
43
43
43
43
43
43
y
r
43
43
a
n
i
m
il
e
r
NET_TYPE
PHYSICAL
SPACING
SMBUS_SMC_A_S3_SCL
SMB_55S
SMB
SMBUS_SMC_A_S3_SDA
SMB_55S
SMB
SMBUS_SMC_B_S0_SCL
SMB_55S
SMB
SMBUS_SMC_B_S0_SDA
SMB_55S
SMB
SMBUS_SMC_0_S0_SCL
SMB_55S
SMB
SMBUS_SMC_0_S0_SDA
SMB_55S
SMB
SMBUS_SMC_BSA_SCL
SMB_55S
SMB
SMBUS_SMC_BSA_SDA
SMB_55S
SMB
SMBUS_SMC_MGMT_SCL
SMB_55S
SMB
SMBUS_SMC_MGMT_SDA
SMB_55S
SMB
SMBUS_SMC_A_S3_SCL
SMBUS_SMC_A_S3_SDA
SMBUS_SMC_B_S0_SCL
SMBUS_SMC_B_S0_SDA
SMBUS_SMC_0_S0_SCL
SMBUS_SMC_0_S0_SDA
SMBUS_SMC_BSA_SCL
SMBUS_SMC_BSA_SDA
SMBUS_SMC_MGMT_SCL
SMBUS_SMC_MGMT_SDA
52
52
52
52
52
52
52
52
SYNC_DATE=09/27/2006
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
LINE-TO-LINE SPACING
WEIGHT
=STANDARD
900
TABLE_SPACING_RULE_ITEM
GND
NET_TYPE
NET_TYPE
TABLE_SPACING_RULE_ITEM
PWR
=STANDARD
900
LINE-TO-LINE SPACING
WEIGHT
ELECTRICAL_CONSTRAINT_SET
ELECTRICAL_CONSTRAINT_SET
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LAYER
TMDS_DATA
PHYSICAL
TMDS_100D
TMDS
TMDS_100D
TMDS
0.20 MM
1000
TMDS_CLK
TABLE_SPACING_RULE_ITEM
PWR_P2MM
0.20 MM
TMDS_100D
TMDS
TMDS_100D
TMDS
TMDS_100D
TMDS
1000
TMDS_100D
TMDS
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
MEM_CLK
GND
GND_P2MM
MEM_CMD
GND
GND_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
TMDS_100D
TMDS
TMDS_100D
TMDS
(USB_EXTA)
(USB_EXTA)
(USB_EXTB)
(USB_EXTB)
(USB_EXTC)
(USB_EXTC)
(USB_EXTD)
(USB_EXTD)
(USB_CAMERA)
(USB_CAMERA)
(USB_IR)
(USB_IR)
MEM_CTRL
GND
GND_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_DATA
GND
GND_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_DQS
GND
GND_P2MM
MEM_CLK
PWR
PWR_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_CMD
PWR
PWR_P2MM
MEM_CTRL
PWR
PWR_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_DATA
PWR
PWR_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
MEM_DQS
PWR
PWR_P2MM
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
GND
GND_P2MM
CLK_MED
GND
GND_P2MM
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
TABLE_SPACING_ASSIGNMENT_ITEM
CLK_FSB
GND
GND_P2MM
CPU_COMP
GND
GND_P2MM
GND_P2MM
DMI
GND
GND_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
CPU_GTLREF
GND
GND_P2MM
CPU_VCCSENSE
GND
GND_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
USB_90D
USB
LVDS_A_CLK
LVDS_100D
LVDS
LVDS_A_CLK
LVDS_100D
LVDS
LVDS_A_DATA
LVDS_100D
LVDS
LVDS_A_DATA
LVDS_100D
LVDS
LVDS_B_CLK
LVDS_100D
LVDS
LVDS_B_CLK
LVDS_100D
LVDS
LVDS_B_DATA
LVDS_100D
LVDS
LVDS_B_DATA
LVDS_100D
LVDS
PCIE_100D
PCIE
PCIE_100D
PCIE
I155
SWITCHNODE
I157
SWITCHNODE
I159
SWITCHNODE
I158
SWITCHNODE
I160
SWITCHNODE
I161
SWITCHNODE
I154
SWITCHNODE
85 94
85 94
85 94
94
94
94
94
y
r
I162
SWITCHNODE
FSB_DSTB
GND
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
GND_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
PCIE
GND
GND_P2MM
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
SATA
GND
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
GND_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
USB
GND
GND_P2MM
CLK_PCIE
PWR
PWR_P2MM
ENET_MDI
GND
GND_P2MM
ENET_MDI
PWR
PWR_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
DMI
PWR
PWR_P2MM
SATA
PWR
PWR_P2MM
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
TABLE_SPACING_ASSIGNMENT_ITEM
m
il
TABLE_SPACING_ASSIGNMENT_ITEM
CLK_MED
PWR
GND_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
USB
PWR
PWR_P2MM
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
ENET_MDI_T
TABLE_SPACING_ASSIGNMENT_ITEM
LVDS
GND
GND_P2MM
ENET_MDI_T
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
ENET_MDI_T
TABLE_SPACING_ASSIGNMENT_ITEM
CLK_PCIE
PWR
PWR_P2MM
ENET_MDI_T
e
r
B
TABLE_PHYSICAL_ASSIGNMENT_HEAD
NET_PHYSICAL_TYPE
AREA_TYPE
PHYSICAL_RULE_SET
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
NET_SPACING_TYPE2
AREA_TYPE
SPACING_RULE_SET
TABLE_PHYSICAL_ASSIGNMENT_ITEM
THERM_DIFF
1:1_DIFFPAIR
TABLE_SPACING_ASSIGNMENT_ITEM
THERMAL
SPACING_0.4MM
SWITCHNODE
SWITCHNODE
TABLE_SPACING_ASSIGNMENT_ITEM
THERMAL
PWR
THERMAL
GND
SMS
TABLE_SPACING_ASSIGNMENT_ITEM
PWR_P2MM
GND_P2MM
SPACING_0.3MM
PCIE_100D
PCIE
PCIE_100D
PCIE
PCIE_100D
PCIE
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
ENET_100D
ENET_MDI
CRT_50S
CRT
CRT_50S
CRT
CRT_50S
CRT
CRT_RED
CRT_50S
CRT
CRT_GREEN
CRT_50S
CRT
CRT_BLUE
CRT_50S
CRT
CRT_55S
CRT_SYNC
CRT_55S
CRT_SYNC
CRT_SYNC
CRT_55S
CRT_SYNC
CRT_SYNC
CRT_55S
CRT_SYNC
CRT_55S
CRT_SYNC
CRT_55S
CRT_SYNC
CRT_50S
CRT
CRT_50S
CRT
CRT_50S
CRT
CRT_55S
CRT
CRT_55S
CRT
CRT_55S
CRT
THERM_DIFF
THERMAL
THERM_DIFF
THERMAL
THERM_DIFF
THERMAL
THERM_DIFF
THERMAL
THERM_DIFF
THERMAL
THERM_DIFF
THERMAL
THERM_DIFF
THERMAL
THERM_DIFF
THERMAL
THERM_DIFF
THERMAL
THERM_DIFF
THERMAL
USB_PORT0_P
USB_PORT0_N
USB_PORT1_P
USB_PORT1_N
USB_PORT2_P
USB_PORT2_N
USB_C_MUXED_P
USB_C_MUXED_N
USB_CAMERA_L_P
USB_CAMERA_L_N
USB_IR_L_P
USB_IR_L_N
I163
SWITCHNODE
I164
SWITCHNODE
I165
SWITCHNODE
46
46
46
46
I167
SMS
I168
SMS
I166
SMS
46
46
46
46
47
(CRT_SYNC)
(CRT_SYNC)
TABLE_SPACING_ASSIGNMENT_ITEM
(CRT_SYNC)
(CRT_SYNC)
72
73
73
74
74
1V8S3_PHASE
5VS5_SW
3V3S3_SW
P3V3S5_SW
P2V5S0_SW
47
47 58
47 58
LVDS_L_CLK_P
LVDS_L_CLK_N
LVDS_L_DATA_P<3..0>
LVDS_L_DATA_N<3..0>
LVDS_U_CLK_P
LVDS_U_CLK_N
LVDS_U_DATA_P<3..0>
LVDS_U_DATA_N<3..0>
85 90
85 90
85 90
85 90
85 90
85 90
85 90
85 90
PCIE_FW_R2D_N
PCIE_FW_R2D_P
PCIE_FW_D2R_C_N
PCIE_FW_D2R_C_P
PCIE_ENET_R2D_P
PCIE_ENET_R2D_N
PCIE_ENET_D2R_C_P
PCIE_ENET_D2R_C_N
PCIE_MINI_R2D_N
PCIE_MINI_R2D_P
75
76
76
77
77
SMS_X_AXIS
SMS_Y_AXIS
SMS_Z_AXIS
49
50
49
50
49
50
7 40
7 40
40
40
7 37
7 37
37
37
34
34
ENET_MDI_T_P<0>
ENET_MDI_T_N<0>
ENET_MDI_T_P<1>
ENET_MDI_T_N<1>
ENET_MDI_T_P<2>
ENET_MDI_T_N<2>
ENET_MDI_T_P<3>
ENET_MDI_T_N<3>
ENET_MDI_R_P<0>
ENET_MDI_R_N<0>
ENET_MDI_R_P<1>
ENET_MDI_R_N<1>
ENET_MDI_R_P<2>
ENET_MDI_R_N<2>
ENET_MDI_R_P<3>
ENET_MDI_R_N<3>
39
39
39
39
39
39
39
39
GPU_TV_COMP
GPU_TV_C
GPU_TV_Y
GPU_RED
GPU_GRN
GPU_BLU
85 91
85 91
85 91
85 91
85 91
85 91
GPU_H2SYNC
GPU_V2SYNC
VGA_HSYNC
VGA_VSYNC
GPU_BUF_HSYNC
GPU_BUF_VSYNC
85 91
85 91
91 94
91 94
VIDEO_MUX_RED
VIDEO_MUX_GRN
VIDEO_MUX_BLU
VGA_RED
VGA_GRN
VGA_BLU
91
91
91
91 94
91 94
91 94
THERM_DIFF
THERM_DIFF
THERM_DIFF
HDD_THRMD_P
HDD_THRMD_N
ODD_THRMD_P
ODD_THRMD_N
CPU_THERMD_P
CPU_THERMD_N
GPU_HSK_THRMD_P
GPU_HSK_THRMD_N
CPU_HSK_THRMD_P
CPU_HSK_THRMD_N
SYNC_MASTER=T9_MLB
55
55
SYNC_DATE=09/27/2006
55
55
10 55
10 55
55
55
55
SIZE
DRAWING NUMBER
55
SHT
NONE
REV.
051-7229
D
SCALE
71
TABLE_SPACING_ASSIGNMENT_ITEM
THERM_DIFF
71
a
n
i
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
USB
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
GND
USB_90D
SPACING_RULE_SET
TABLE_SPACING_ASSIGNMENT_ITEM
CLK_PCIE
USB
TABLE_SPACING_ASSIGNMENT_HEAD
TABLE_SPACING_ASSIGNMENT_ITEM
CLINK_VREF
USB_90D
IMVP6_PHASE1
IMVP6_PHASE2
IMVP6_PHASE3
1V05REG_SWITCHNODE
1V5REG_SWITCHNODE
MCH_CORES0_SWITCHNODE
1V25REG_SWITCHNODE
SWITCHNODE
85 94
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
SPACING
I156
TMDS_DATA_P<3..0>
TMDS_DATA_N<3..0>
TMDS_CLK_P
TMDS_CLK_N
TMDS_CONN_DP<3..0>
TMDS_CONN_DN<3..0>
TMDS_CONN_CLKP
TMDS_CONN_CLKN
TABLE_SPACING_RULE_ITEM
GND_P2MM
PHYSICAL
SPACING
108
OF
33
118
BOARD LAYERS
BOARD AREAS
BOARD UNITS
(MIL or MM)
ALLEGRO
VERSION
TOP,ISL2,ISL3,ISL4,ISL5,ISL6,ISL7,BOTTOM
NO_TYPE,BGA_P1MM
MM
15.5.1
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
TABLE_PHYSICAL_RULE_HEAD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
110_OHM_DIFF_ESCAPE
=STANDARD
=STANDARD
=STANDARD
=STANDARD
=STANDARD
110_OHM_DIFF_ESCAPE
TOP,BOTTOM
0.105 MM
0.100 MM
0.250 MM
0.250 MM
110_OHM_DIFF_ESCAPE
ISL3,ISL6
0.085 MM
0.085 MM
0.330 MM
0.330 MM
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
50_OHM_SE
TOP,BOTTOM
0.15 MM
0.15 MM
50_OHM_SE
0.120 MM
0.120 MM
TABLE_PHYSICAL_RULE_ITEM
DEFAULT
=55_OHM_SE
=55_OHM_SE
4 MM
0 MM
TABLE_PHYSICAL_RULE_ITEM
0 MM
TABLE_PHYSICAL_RULE_ITEM
STANDARD
=DEFAULT
=DEFAULT
12.7 MM
=DEFAULT
=DEFAULT
DEFAULT
TOP,BOTTOM
=55_OHM_SE
0.100 MM
3 MM
0 MM
0 MM
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
55_OHM_SE
TOP,BOTTOM
0.125 MM
0.125 MM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
D
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_HEAD
y
r
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
55_OHM_SE
0.100 MM
0.100 MM
=STANDARD
=STANDARD
=STANDARD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
40_OHM_SE
TOP,BOTTOM
0.225 MM
0.225 MM
40_OHM_SE
0.185 MM
0.185 MM
=STANDARD
=STANDARD
=STANDARD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
45_OHM_SE
TOP,BOTTOM
0.185 MM
0.185 MM
45_OHM_SE
0.150 MM
0.150 MM
=STANDARD
=STANDARD
=STANDARD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
TABLE_PHYSICAL_RULE_ITEM
=STANDARD
=STANDARD
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_HEAD
a
n
i
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
27P4_OHM_SE
TOP,BOTTOM
0.340 MM
0.340 MM
27P4_OHM_SE
0.265 MM
0.265 MM
=STANDARD
=STANDARD
=STANDARD
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
70_OHM_DIFF
=STANDARD
=STANDARD
=STANDARD
=STANDARD
=STANDARD
70_OHM_DIFF
ISL3,ISL6
0.180 MM
0.180 MM
0.120 MM
0.120 MM
70_OHM_DIFF
TOP,BOTTOM
0.215 MM
0.215 MM
0.125 MM
0.125 MM
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
85_OHM_DIFF
=STANDARD
=STANDARD
=STANDARD
=STANDARD
=STANDARD
85_OHM_DIFF
ISL3,ISL6
0.120 MM
0.120 MM
0.130 MM
0.130 MM
85_OHM_DIFF
TOP,BOTTOM
0.145 MM
0.145 MM
0.125 MM
0.125 MM
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
90_OHM_DIFF
=STANDARD
=STANDARD
=STANDARD
=STANDARD
=STANDARD
90_OHM_DIFF
ISL3,ISL6
0.125 MM
0.125 MM
0.200 MM
0.200 MM
90_OHM_DIFF
TOP,BOTTOM
0.145 MM
0.145 MM
0.175 MM
0.175 MM
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
100_OHM_DIFF
=STANDARD
=STANDARD
=STANDARD
=STANDARD
=STANDARD
100_OHM_DIFF
ISL3,ISL6
0.095 MM
0.095 MM
0.205 MM
0.205 MM
100_OHM_DIFF
TOP,BOTTOM
0.115 MM
0.115 MM
0.180 MM
0.180 MM
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
e
r
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
110_OHM_DIFF
=STANDARD
=STANDARD
110_OHM_DIFF
ISL3,ISL6
0.085 MM
0.085 MM
=STANDARD
=STANDARD
=STANDARD
0.330 MM
0.330 MM
TABLE_PHYSICAL_RULE_ITEM
TABLE_PHYSICAL_RULE_ITEM
110_OHM_DIFF
TOP,BOTTOM
0.105 MM
0.100 MM
PHYSICAL_RULE_SET
LAYER
ALLOW ROUTE
ON LAYER?
1:1_DIFFPAIR
=STANDARD
=STANDARD
SPACING_RULE_SET
LAYER
0.280 MM
0.280 MM
=STANDARD
0.1 MM
0.1 MM
TABLE_PHYSICAL_RULE_HEAD
TABLE_PHYSICAL_RULE_ITEM
TABLE_SPACING_RULE_HEAD
LINE-TO-LINE SPACING
WEIGHT
0.1 MM
STANDARD
=DEFAULT
BGA_P1MM
=DEFAULT
AREA_TYPE
SPACING_RULE_SET
BGA_P1MM
BGA_P1MM
BGA_P1MM
BGA_P1MM
BGA_P1MM
BGA_P1MM
FSB_DSTB
BGA_P1MM
MEM_CLK
TABLE_SPACING_RULE_ITEM
CLK_FSB
TABLE_SPACING_RULE_ITEM
BGA_P2MM
=DEFAULT
CLK_PCIE
TABLE_SPACING_RULE_ITEM
BGA_P3MM
=DEFAULT
CLK_MED
TABLE_SPACING_RULE_HEAD
SPACING_RULE_SET
LINE-TO-LINE SPACING
WEIGHT
SPACING_0.15MM
LAYER
*
0.15 MM
SPACING_0.18MM
0.18 MM
SPACING_0.2MM
0.2 MM
SPACING_0.25MM
0.25 MM
SPACING_0.3MM
0.3 MM
SPACING_0.4MM
0.4 MM
FSB_DSTB
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
NET_SPACING_TYPE2
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
SPACING_RULE_SET
TABLE_SPACING_ASSIGNMENT_ITEM
TABLE_SPACING_ASSIGNMENT_ITEM
BGA_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
BGA_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
BGA_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
BGA_P2MM
TABLE_SPACING_ASSIGNMENT_ITEM
BGA_P3MM
0.5 MM
CLK_SPACING_0.6MM
0.6 MM
CLK_SPACING_0.5MM
TOP,BOTTOM
0.2 MM
CLK_SPACING_0.5MM
SYNC_DATE=09/27/2006
TABLE_SPACING_RULE_HEAD
LINE-TO-LINE SPACING
TABLE_SPACING_RULE_ITEM
LAYER
TABLE_SPACING_ASSIGNMENT_HEAD
NET_SPACING_TYPE1
TABLE_SPACING_RULE_ITEM
DEFAULT
m
il
TABLE_PHYSICAL_RULE_HEAD
=STANDARD
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
SPACING_0.5MM
0.5 MM
SPACING_0.6MM
0.6 MM
SWITCHNODE
0.6 MM
1000
TABLE_SPACING_RULE_ITEM
CLK_SPACING_0.6MM
TOP,BOTTOM
0.2 MM
SIZE
TABLE_SPACING_RULE_ITEM
TABLE_SPACING_RULE_ITEM
TOP,BOTTOM
0.2 MM
1000
SHT
NONE
REV.
051-7229
SCALE
TABLE_SPACING_RULE_ITEM
SWITCHNODE
DRAWING NUMBER
109
OF
33
118
8
Title:
Design:
Date:
Basenet Report
m78
May 7 18:11:37 2007
=PP3V3_S0_CK505 - @m78_lib.M78
=PP3V3_S0_SMBUS_SMC_B_S0 @m78_lib.M78
=PP3V3_S0_SMBUS_SMC_MGMT @m78_lib.M78
=PP3V3_S0_SMBUS_SMC_0_S0 @m78_lib.M78
=PP3V3_S0_SMC_LS - @m78_lib.M78
=PP3V3_S0_LPCPLUS - @m78_lib.M78
=PP3V3_S0_SMBUS_SB - @m78_lib.M78
=PP3V3_S0_IMVP - @m78_lib.M78
=PP3V3_S0_AUDIO - @m78_lib.M78
=PPSPD_S0_MEM - @m78_lib.M78
=PP3V3_S0_FAN - @m78_lib.M78
=PP3V3_S0_SB_PM - @m78_lib.M78
=PP3V3_S0_PATA - @m78_lib.M78
=PP3V3_S0_SB_PCI - @m78_lib.M78
=PP3V3_S0_SB_VCC3_3_IDE @m78_lib.M78
=PP3V3_S0_SB_VCC3_3_PCI @m78_lib.M78
=PP3V3_S0_SB_GPIO - @m78_lib.M78
=PP3V3_S0_SB_VCCGLAN3_3 @m78_lib.M78
=PP3V3_S0_SB - @m78_lib.M78
=PP3V3_S0_NB_VCCHV - @m78_lib.M78
0V9S0_COMP_REF
1V05REG_BOOT
1V05REG_BOOT_R
1V05REG_ISEN
1V05REG_LGATE
1V05REG_OCSET
1V05REG_SNUBBER_R
1V05REG_SOFT
1V05REG_SWITCHNODE
1V05REG_UGATE
1V05REG_VSEN
1V05S0_EN
1V05S0_RUNSS
1V05S0_RUNSS_BUF
1V5REG_BOOT
1V5REG_BOOT_R
1V5REG_ISEN
1V5REG_LGATE
1V5REG_OCSET
1V5REG_SNUBBER_R
1V5REG_SOFT
1V5REG_SWITCHNODE
1V5REG_UGATE
1V5REG_VSEN
1V5S0_RUNSS
1V5S0_RUNSS_BUF
1V8S0_COMP_REF
1V8S3_BOOT
1V8S3_BOOT_RC
1V8S3_COMP
1V8S3_COMP_R
1V8S3_EN
1V8S3_FB
1V8S3_FCCM
1V8S3_FSET
1V8S3_ISEN
1V8S3_LG
1V8S3_PHASE
1V8S3_SNUBBER_R
1V8S3_UG
1V8S3_VCC
1V25REG_BOOT
1V25REG_BOOT_R
1V25REG_ISEN
1V25REG_LGATE
1V25REG_OCSET
1V25REG_SNUBBER_R
1V25REG_SOFT
1V25REG_SWITCHNODE
1V25REG_UGATE
1V25REG_VSEN
1V25S0_RUNSS
1V25S0_RUNSS_BUF
3V3S0_COMP_REF
3V3S3_BG
3V3S3_BOOST
3V3S3_BOOST_R
3V3S3_ITH
3V3S3_ITH_R
3V3S3_RUNSS
3V3S3_SNS_N
3V3S3_SNS_P
3V3S3_SW
3V3S3_TG
3V3S3_VOSNS
5VS0_COMP_REF
5VS3_COMP_REF
5VS5_0V76_REF
5VS5_1V53_REF
5VS5_2V80_REF
5VS5_4V24_REF1
5VS5_4V24_REF2
5VS5_4V29_REF
5VS5_BG
5VS5_BOOST
5VS5_BOOST_R
5VS5_ITH
5VS5_ITH_R
5VS5_RUNSS
5VS5_SNS_N
5VS5_SNS_P
5VS5_SW
5VS5_TG
5VS5_VOSNS
12VS0_6V0_REF
12VS0_COMP_REF
=ENET_CLKREQ_L
=ENET_VMAIN_AVLBL
0V9S0_COMP_REF - @m78_lib.M78
1V05REG_BOOT - @m78_lib.M78
1V05REG_BOOT_R - @m78_lib.M78
1V05REG_ISEN - @m78_lib.M78
1V05REG_LGATE - @m78_lib.M78
1V05REG_OCSET - @m78_lib.M78
1V05REG_SNUBBER_R - @m78_lib.M78
1V05REG_SOFT - @m78_lib.M78
1V05REG_SWITCHNODE - @m78_lib.M78
1V05REG_UGATE - @m78_lib.M78
1V05REG_VSEN - @m78_lib.M78
1V05S0_EN - @m78_lib.M78
1V05S0_RUNSS - @m78_lib.M78
1V05S0_RUNSS_BUF - @m78_lib.M78
1V5REG_BOOT - @m78_lib.M78
1V5REG_BOOT_R - @m78_lib.M78
1V5REG_ISEN - @m78_lib.M78
1V5REG_LGATE - @m78_lib.M78
1V5REG_OCSET - @m78_lib.M78
1V5REG_SNUBBER_R - @m78_lib.M78
1V5REG_SOFT - @m78_lib.M78
1V5REG_SWITCHNODE - @m78_lib.M78
1V5REG_UGATE - @m78_lib.M78
1V5REG_VSEN - @m78_lib.M78
1V5S0_RUNSS - @m78_lib.M78
1V5S0_RUNSS_BUF - @m78_lib.M78
1V8S0_COMP_REF - @m78_lib.M78
1V8S3_BOOT - @m78_lib.M78
1V8S3_BOOT_RC - @m78_lib.M78
1V8S3_COMP - @m78_lib.M78
1V8S3_COMP_R - @m78_lib.M78
1V8S3_EN - @m78_lib.M78
1V8S3_FB - @m78_lib.M78
1V8S3_FCCM - @m78_lib.M78
1V8S3_FSET - @m78_lib.M78
1V8S3_ISEN - @m78_lib.M78
1V8S3_LG - @m78_lib.M78
1V8S3_PHASE - @m78_lib.M78
1V8S3_SNUBBER_R - @m78_lib.M78
1V8S3_UG - @m78_lib.M78
1V8S3_VCC - @m78_lib.M78
1V25REG_BOOT - @m78_lib.M78
1V25REG_BOOT_R - @m78_lib.M78
1V25REG_ISEN - @m78_lib.M78
1V25REG_LGATE - @m78_lib.M78
1V25REG_OCSET - @m78_lib.M78
1V25REG_SNUBBER_R - @m78_lib.M78
1V25REG_SOFT - @m78_lib.M78
1V25REG_SWITCHNODE - @m78_lib.M78
1V25REG_UGATE - @m78_lib.M78
1V25REG_VSEN - @m78_lib.M78
1V25S0_RUNSS - @m78_lib.M78
1V25S0_RUNSS_BUF - @m78_lib.M78
3V3S0_COMP_REF - @m78_lib.M78
3V3S3_BG - @m78_lib.M78
3V3S3_BOOST - @m78_lib.M78
3V3S3_BOOST_R - @m78_lib.M78
3V3S3_ITH - @m78_lib.M78
3V3S3_ITH_R - @m78_lib.M78
3V3S3_RUNSS - @m78_lib.M78
3V3S3_SNS_N - @m78_lib.M78
3V3S3_SNS_P - @m78_lib.M78
3V3S3_SW - @m78_lib.M78
3V3S3_TG - @m78_lib.M78
3V3S3_VOSNS - @m78_lib.M78
5VS0_COMP_REF - @m78_lib.M78
5VS3_COMP_REF - @m78_lib.M78
5VS5_0V76_REF - @m78_lib.M78
5VS5_1V53_REF - @m78_lib.M78
5VS5_2V80_REF - @m78_lib.M78
5VS5_4V24_REF1 - @m78_lib.M78
5VS5_4V24_REF2 - @m78_lib.M78
5VS5_4V29_REF - @m78_lib.M78
5VS5_BG - @m78_lib.M78
5VS5_BOOST - @m78_lib.M78
5VS5_BOOST_R - @m78_lib.M78
5VS5_ITH - @m78_lib.M78
5VS5_ITH_R - @m78_lib.M78
5VS5_RUNSS - @m78_lib.M78
5VS5_SNS_N - @m78_lib.M78
5VS5_SNS_P - @m78_lib.M78
5VS5_SW - @m78_lib.M78
5VS5_TG - @m78_lib.M78
5VS5_VOSNS - @m78_lib.M78
12VS0_6V0_REF - @m78_lib.M78
12VS0_COMP_REF - @m78_lib.M78
=ENET_CLKREQ_L - @m78_lib.M78
ENET_CLKREQ_R_L - @m78_lib.M78
=ENET_VMAIN_AVLBL - @m78_lib.M78
PP3V3_S0 - @m78_lib.M78
=PP3V3_DDC_LCD - @m78_lib.M78
=PP3V3_S0_VIDEO - @m78_lib.M78
=PP3V3_S0_NB_VCCA_PEG_BG @m78_lib.M78
=PP3V3_S0_NB_FOLLOW - @m78_lib.M78
=PP3V3_S0_TSENS - @m78_lib.M78
=PP3V3_S0_SMC - @m78_lib.M78
=PP3V3_S0MWOL_SB_VCCCL3_3 @m78_lib.M78
=PP3V3_S0MWOL_SB_VCCLAN3_3 @m78_lib.M78
=PP3V3_S0_SB_VCC3_3_VCCPCORE @m78_lib.M78
=PP3V3R1V5_S0_SB_VCCHDA @m78_lib.M78
=PP3V3_S0_SB_VCC3_3_DMI @m78_lib.M78
=PP3V3_S0_SB_VCC3_3_SATA @m78_lib.M78
=PP3V3_S0MWOL_SB_CLINK0 @m78_lib.M78
=PP3V3_S0M_CK505 - @m78_lib.M78
=PP3V3_S0_SATALED - @m78_lib.M78
=PP3V3_S0_MXM - @m78_lib.M78
70C6
73C4
73C3
73C4
73C3
73B4
73C2
73C4
73B3 108D1
73C4
73B3
73B4
70C5 73C3 74C3
70C6
73C5
73C6
73C5
73C5
73B5
73B7
73C5
73C6 108D1
73C5
73B7
70A5 73C5
70A6
70D6
75C5
75D5
75C6
75C6
75C6
75C6
75C6
75C6
75C5
75C5
75C5 108D1
75C3
75C5
75D6
74C5
74C6
74C5
74C5
74B5
74B7
74C5
74C6 108D1
74C5
74B7
70B5 74C5
70B6
70D6
76B5
76B5
76C6
76B5
76B6
76B5
76C6
76C6
76B5 108D1
76C5
76B5
70C6
76A7
70C6
70D6
70D6
70D6
76A7
76D7
76B4
76B4
76C3
76B4
76B3
76B4
76C3
76C3
76B4 108D1
76C4
76B4
76D7
76D7
37B8 38D1
38D1
37C2 38A3
6B8 6C6 6D7 7C5 7D3 13D6
70C3 70D3 70D8 77C6 78C3
90A8 90D5
6A4 90D7 91B4 91B4 91B7
94D2
6A4 19C6 21A6
6A4
6A4
6A4
6A4
21C2
55B5 55D5 55D6 55D8
53C2
26A6 27D4
PP3V3_S0 - @m78_lib.M78
=PPSPD_S0_MEM - @m78_lib.M78
=PP3V3_S0_VIDEO - @m78_lib.M78
=PP3V3_S0_TSENS - @m78_lib.M78
=PP3V3_S0_SMC_LS - @m78_lib.M78
=PP3V3_S0_SMC - @m78_lib.M78
=PP3V3_S0_SMBUS_SMC_MGMT @m78_lib.M78
=PP3V3_S0_SMBUS_SMC_B_S0 @m78_lib.M78
=PP3V3_S0_SMBUS_SMC_0_S0 @m78_lib.M78
=PP3V3_S0_SMBUS_SB - @m78_lib.M78
=PP3V3_S0_SB_VCCGLAN3_3 @m78_lib.M78
=PP3V3_S0_SB_VCC3_3_VCCPCORE @m78_lib.M78
=PP3V3_S0_SB_VCC3_3_SATA @m78_lib.M78
=PP3V3_S0_SB_VCC3_3_PCI @m78_lib.M78
=PP3V3_S0_SB_VCC3_3_IDE @m78_lib.M78
=PP3V3_S0_SB_VCC3_3_DMI @m78_lib.M78
=PP3V3_S0_SB_PM - @m78_lib.M78
=PP3V3_S0_SB_PCI - @m78_lib.M78
=PP3V3_S0_SB_GPIO - @m78_lib.M78
=PP3V3_S0_SB - @m78_lib.M78
=PP3V3_S0_SATALED - @m78_lib.M78
=PP3V3_S0_PATA - @m78_lib.M78
=PP3V3_S0_NB_VCCHV - @m78_lib.M78
=PP3V3_S0_NB_VCCA_PEG_BG @m78_lib.M78
=PP3V3_S0_NB_FOLLOW - @m78_lib.M78
=PP3V3_S0_MXM - @m78_lib.M78
=GFX_VR_EN
=GND_NB_VSSA_LVDS
=NB_CLINK_MPWROK
=PP0V9_S3M_MEM_NBVRE
FA
=PP0V9_S3M_MEM_NBVRE
FB
=PP0V9_S3_MEM_A_VREF
=PP0V9_S3_MEM_B_VREF
=PP1V2_ENET_PHY
=PP1V05_S0M_NB_VCCAX
M
=PP1V05_S0_CPU
6B4 25C1
6B4 29D2 29D8 30D1
6B4 45C2
6B4 85A3 85C4 85C8 85C8
85D2
@m78_lib.M78
=PPVCORE_S0_NB - @m78_lib.M78
PPMCH_CORE_S0 - @m78_lib.M78
=PPVCORE_S0_NB_FOLLOW @m78_lib.M78
=PPVCORE_S0_NB - @m78_lib.M78
=PP1V25R1V05_S0_NB_VTT @m78_lib.M78
=PP1V25R1V05_S0_FSB_NB @m78_lib.M78
=PP1V05_S0_SB_CPU_IO - @m78_lib.M78
=PP1V5_S0_CPU
=PP1V5_S0_CPU - @m78_lib.M78
=PP1V5_S0_MINI - @m78_lib.M78
PP1V5_S0 - @m78_lib.M78
=PP1V5_S0_SB - @m78_lib.M78
PP1V5_S0_SB_VCCGLANPLL @m78_lib.M78
=PP1V5_S0_SB_VCC1_5_A @m78_lib.M78
=PP1V5_S0_SB_VCCUSBPLL @m78_lib.M78
=PP1V5_S0_SB_VCC1_5_A_USB_CORE @m78_lib.M78
=PP1V5_S0_SB_VCC1_5_A_ATX @m78_lib.M78
=PP1V5_S0_SB_VCC1_5_A_ARX @m78_lib.M78
=PP1V5_S0_NB_TVDAC - @m78_lib.M78
PP1V5_S0 - @m78_lib.M78
=PP1V5_S0_SB_VCCUSBPLL @m78_lib.M78
=PP1V5_S0_SB_VCC1_5_A_USB_CORE @m78_lib.M78
=PP1V5_S0_SB_VCC1_5_A_ATX @m78_lib.M78
=PP1V5_S0_SB_VCC1_5_A_ARX @m78_lib.M78
=PP1V5_S0_SB_VCC1_5_A @m78_lib.M78
=PP1V5_S0_SB - @m78_lib.M78
=PP1V5_S0_NB_TVDAC - @m78_lib.M78
=PP1V5_S0_MINI - @m78_lib.M78
=PP1V5_S0_SB_VCCGLAN =PP1V5_S0_SB_VCCGLAN1_5 1_5
@m78_lib.M78
PP1V5_S0_SB_VCC1_5_B - @m78_lib.M78
=PP1V8_S0_MXM
=PP1V8_S0_MXM - @m78_lib.M78
PP1V8_S0 - @m78_lib.M78
=PP1V8_S3M_MEM_NB
=PP1V8_S3M_MEM_NB - @m78_lib.M78
=PP1V8_S3M_NB_VCC - @m78_lib.M78
=PP1V8_S3_ENET - @m78_lib.M78
PP1V8_S3 - @m78_lib.M78
=PP1V8_S3_MEMVTT - @m78_lib.M78
=PP1V8_S3_MEM - @m78_lib.M78
6B4 52B3
6B4 52D5
6B4
6B4
6B4
6B4
6B4
6B4
6B4
6B4
6B4
6B4
6B4
50D2
51C4
52D8
71D8
98C4
31A7
56B7
28A7
44C6
24A3
26C3
98C6
32A3 32A7
56C7 57C7
27D4
PP1V8_S3 - @m78_lib.M78
=PP1V8_S3_MEMVTT - @m78_lib.M78
=PP1V8_S3_MEM - @m78_lib.M78
=PP1V25_S0M_NB_PLL
56C7 57C7
30D7
98C6
29D8 30D1
27D4
=PP0V9_S0M_MEM_TERM - @m78_lib.M78
PP0V9_S0 - @m78_lib.M78
=PP0V9_S3M_MEM_NBVREFA @m78_lib.M78
PP0V9_S3M_MEM_NBVREFA @m78_lib.M78
=PP0V9_S3M_MEM_NBVREFB @m78_lib.M78
PP0V9_S3M_MEM_NBVREFB @m78_lib.M78
=PP0V9_S3_MEM_A_VREF - @m78_lib.M78
PP0V9_S3_MEM_A_VREF - @m78_lib.M78
=PP0V9_S3_MEM_B_VREF - @m78_lib.M78
PP0V9_S3_MEM_B_VREF - @m78_lib.M78
=PP1V2_ENET_PHY - @m78_lib.M78
PP1V2_S3_ENET - @m78_lib.M78
=PP1V05_S0M_NB_VCCAXM @m78_lib.M78
=PP1V05_S0_NB_FOLLOW - @m78_lib.M78
=PPVCORE_S0_SB - @m78_lib.M78
PP1V05_S0 - @m78_lib.M78
=PP1V05_S0_NB_PCIE - @m78_lib.M78
PP1V05_S0 - @m78_lib.M78
=PPVCORE_S0_SB - @m78_lib.M78
=PP1V05_S0_NB_PCIE - @m78_lib.M78
=PP1V05_S0_NB_FOLLOW - @m78_lib.M78
=PP1V05_S0_CPU - @m78_lib.M78
=PP2V5_S0_MXM
=PP3V3_ENET_PHY
16B3 22A8
22A7
19C6 22C1
22C2
16A3 22C2
7C4 7C7 16B6 22C1 70C2
71C7
6D4 33D5
6D6 7D3 70C8 75A3
7C7 16C2 22B1
=PP3V3_S5_FAN
22B2
=PP1V8_S3_ENET - @m78_lib.M78
=PP1V8_S3M_NB_VCC - @m78_lib.M78
=PP1V9R2V5_ENET_PHY - @m78_lib.M78
PP1V9R2V5_S3_ENET - @m78_lib.M78
=PP1V25_S0M_NB_PLL - @m78_lib.M78
=PP1V25_S0M_NB_VCCD_HPLL @m78_lib.M78
=PP1V25_S0_SB_DMI - @m78_lib.M78
PP1V25_S0 - @m78_lib.M78
=PP1V25_S0_NB_VCC - @m78_lib.M78
=PP1V25_S0_NB_PLL - @m78_lib.M78
=PP1V25_S0M_NB_VCC - @m78_lib.M78
=PP1V25_S0M_NB_VCCA - @m78_lib.M78
=PP1V25_S0_NB_VCCDMI - @m78_lib.M78
PP1V25_S0 - @m78_lib.M78
=PP1V25_S0_SB_DMI - @m78_lib.M78
=PP1V25_S0_NB_VCCDMI - @m78_lib.M78
=PP1V25_S0_NB_VCC - @m78_lib.M78
=PP1V25_S0_NB_PLL - @m78_lib.M78
=PP1V25_S0M_NB_VCCA - @m78_lib.M78
=PP1V25_S0M_NB_VCC - @m78_lib.M78
=PP2V5_S0_MXM - @m78_lib.M78
PP2V5_S0 - @m78_lib.M78
=PP3V3_ENET_PHY - @m78_lib.M78
=PP3V3_S3_ENET - @m78_lib.M78
=PP3V3_S3_BT - @m78_lib.M78
=PP3V3_S3_MINI - @m78_lib.M78
PP3V3_S3 - @m78_lib.M78
=PP3V3_S3_MINI - @m78_lib.M78
=PP3V3_S3_ENET - @m78_lib.M78
=PP3V3_S3_BT - @m78_lib.M78
=PP3V3_S5_FAN - @m78_lib.M78
=PP3V3_S5_SMBUS_SMC_A_S5 @m78_lib.M78
PP3V3_S5 - @m78_lib.M78
=PP3V3_S5_SMCUSBMUX - @m78_lib.M78
=PP3V3_S5_SMBUS_SMC_BSA @m78_lib.M78
=PP3V3_S5_LPCPLUS - @m78_lib.M78
=PP3V3_S5_SB_3V3_VCCSUSHDA @m78_lib.M78
=PP3V3_S5_SB_CLINK1 - @m78_lib.M78
=PP3V3_S5_SB_GPIO - @m78_lib.M78
=PP3V3_S5_ROM - @m78_lib.M78
=PP3V3_S5_SMC - @m78_lib.M78
=PP3V3_S5_FW - @m78_lib.M78
22A2
31C1 31D6
31C2
32C1 32D7
32C2
37D6 38A3
38A3
6C4 18B3 18C1 21D8
6C4 21C4
6C4 26D3 27B1
6C6 7D3 34C3 73A4 73C1
6C4 21D5
6C6 7D3 34C3 73A4 73C1
6C4 26D3 27B1
6C4 21D5
6C4 21C4
6D4 10B5 10B6 10C5 10D5
11C6 12A3 13D6 50D2
=PP1V05_S0_SB_CPU_IO - @m78_lib.M78 6C4 23D2 26C3 27B2
=PPVCORE_S0_NB_FOLLOW 6D4 21B4
@m78_lib.M78
PPMCH_CORE_S0 - @m78_lib.M78
6D6 7D3 55A6 73A2 74C1
=PP1V25R1V05_S0_NB_VTT 6D4 19D3 21C8
@m78_lib.M78
=PP1V25R1V05_S0_FSB_NB 6D4 14B7 30B8 30C8 30C8
=PP3V3_S5_SMBUS_SB_ME @m78_lib.M78
=PP3V3_S5_SB_VCCSUS3_3_USB @m78_lib.M78
=PP3V3_S5_SB_VCCSUS3_3 @m78_lib.M78
=PP3V3_S5_SB_USB - @m78_lib.M78
=PP3V3_S5_SB_PM - @m78_lib.M78
=PP3V3_S5_SB_GPIO - @m78_lib.M78
=PP3V3_S5_SB_CLINK1 - @m78_lib.M78
=PP3V3_S5_SB_3V3_VCCSUSHDA @m78_lib.M78
=PP3V3_S5_SB - @m78_lib.M78
=PP3V3_S5_ROM - @m78_lib.M78
=PP3V3_S5_LPCPLUS - @m78_lib.M78
=PP3V3_S5_FW - @m78_lib.M78
=PP5V_S0_AUDIO
=PP5V_S0_SATA - @m78_lib.M78
=PP5V_S0_LPCPLUS - @m78_lib.M78
=PP5V_S0_PATA - @m78_lib.M78
=PP5V_S0_SB - @m78_lib.M78
PP5V_S0 - @m78_lib.M78
=PP3V3_S5_SMBUS_SB_ME @m78_lib.M78
=PP3V3_S5_SB_VCCSUS3_3_USB @m78_lib.M78
=PP3V3_S5_SB_VCCSUS3_3 @m78_lib.M78
=PP3V3_S5_SB_PM - @m78_lib.M78
=PP3V3_S5_SB_USB - @m78_lib.M78
=PP3V3_S5_SB - @m78_lib.M78
PP3V3_S5 - @m78_lib.M78
=PP3V3_S5_SMCUSBMUX - @m78_lib.M78
=PP3V3_S5_SMC - @m78_lib.M78
=PP3V3_S5_SMBUS_SMC_BSA @m78_lib.M78
=PP3V3_S5_SMBUS_SMC_A_S5 @m78_lib.M78
=PP5V_S3_ALS
=PPV_S0_LCD_20INCH - @m78_lib.M78
=PP5V_S0_SB - @m78_lib.M78
=PP5V_S0_PATA - @m78_lib.M78
=PP5V_S0_MXM - @m78_lib.M78
=PP5V_S0_LPCPLUS - @m78_lib.M78
=PP5V_S3_ALS - @m78_lib.M78
PP5V_S3 - @m78_lib.M78
=PP5V_S3_SYSLED - @m78_lib.M78
=PP5V_S3_MEMVTT - @m78_lib.M78
=PP5V_S3_BNDI - @m78_lib.M78
PP5V_S3 - @m78_lib.M78
6C4 26B6
6C4 27C8
6C4 22B3
6C4 34C2
26A6 27B6
=PP5V_S5_SB
=PP5V_S3_SYSLED - @m78_lib.M78
=PP5V_S3_MEMVTT - @m78_lib.M78
=PP5V_S3_BNDI - @m78_lib.M78
=PP5V_S5_SB - @m78_lib.M78
=PP5V_S5_USB - @m78_lib.M78
PP5V_S5 - @m78_lib.M78
=PPVIN_S5_SMCVREF - @m78_lib.M78
PP5V_S5 - @m78_lib.M78
=PPVIN_S5_SMCVREF - @m78_lib.M78
=PP5V_S5_USB - @m78_lib.M78
=PP12V_S0_AUDIO_SPKR =PP12V_S0_AUDIO_SPKRAMP AMP
@m78_lib.M78
=PP12V_S0_CPU - @m78_lib.M78
=PPV_S0_LCD_24INCH - @m78_lib.M78
=PPV_S0_MXM_PWRSRC - @m78_lib.M78
PP12V_S0 - @m78_lib.M78
=PP12V_S0_FAN - @m78_lib.M78
PP12V_S0 - @m78_lib.M78
=PP12V_S5_FET
=PPV_S0_MXM_PWRSRC - @m78_lib.M78
=PPV_S0_LCD_24INCH - @m78_lib.M78
=PP12V_S0_FAN - @m78_lib.M78
=PP12V_S0_CPU - @m78_lib.M78
=PP12V_S5_FET - @m78_lib.M78
PP12V_S5 - @m78_lib.M78
=PP12V_S5_FW - @m78_lib.M78
PP12V_S5 - @m78_lib.M78
=PPVCORE_S0_CPU
=SB_CLINK_MPWROK
=SMC_SMS_INT
ACDC_TEMP
ALL_SYS_PWRGD
=PP12V_S5_FW - @m78_lib.M78
=PPVCORE_S0_CPU - @m78_lib.M78
PPVCORE_CPU - @m78_lib.M78
=SB_CLINK_MPWROK - @m78_lib.M78
PM_SB_PWROK - @m78_lib.M78
=SMC_SMS_INT - @m78_lib.M78
SMC_SMS_INT - @m78_lib.M78
ACDC_TEMP - @m78_lib.M78
SMC_ANALOG_ID - @m78_lib.M78
ALL_SYS_PWRGD - @m78_lib.M78
PM_LAN_PWRGD - @m78_lib.M78
ALS_GAIN - @m78_lib.M78
NC_ALS_GAIN - @m78_lib.M78
ALS_LEFT
ALS_LEFT - @m78_lib.M78
TP_ALS_LEFT - @m78_lib.M78
ALS_RIGHT
ALS_RIGHT - @m78_lib.M78
ARB_DETECT_L
ARB_DETECT_L - @m78_lib.M78
CK505_48M_FSA
CK505_48M_FSA - @m78_lib.M78
CK505_CLKREQ1_L
CK505_CLKREQ1_L - @m78_lib.M78
CK505_CLKREQ3_L
CK505_CLKREQ3_L - @m78_lib.M78
CK505_CLKREQ6_L
CK505_CLKREQ6_L - @m78_lib.M78
MINI_CLKREQ_L - @m78_lib.M78
CK505_CLKREQ8_L
CK505_CLKREQ8_L - @m78_lib.M78
ENET_CLKREQ_L - @m78_lib.M78
CK505_CPU0_N
CK505_CPU0_N - @m78_lib.M78
FSB_CLK_CPU_N - @m78_lib.M78
CK505_CPU0_P
CK505_CPU0_P - @m78_lib.M78
FSB_CLK_CPU_P - @m78_lib.M78
CK505_CPU1_N
CK505_CPU1_N - @m78_lib.M78
FSB_CLK_NB_N - @m78_lib.M78
CK505_CPU1_P
CK505_CPU1_P - @m78_lib.M78
FSB_CLK_NB_P - @m78_lib.M78
CK505_CPU2_ITP_SRC10 CK505_CPU2_ITP_SRC10_N _N
@m78_lib.M78
XDP_CLK_N - @m78_lib.M78
CK505_CPU2_ITP_SRC10 CK505_CPU2_ITP_SRC10_P _P
@m78_lib.M78
XDP_CLK_P - @m78_lib.M78
CK505_DOT96_27M_N
CK505_DOT96_27M_N - @m78_lib.M78
TP_CK505_27M_N - @m78_lib.M78
CK505_DOT96_27M_P
CK505_DOT96_27M_P - @m78_lib.M78
TP_CK505_27M_P - @m78_lib.M78
CK505_FSA
CK505_FSA - @m78_lib.M78
CK505_FSB_TEST_MODE CK505_FSB_TEST_MODE - @m78_lib.M78
CK505_FSC
CK505_FSC - @m78_lib.M78
CK505_LVDS_N
CK505_LVDS_N - @m78_lib.M78
TP_CK505_LVDS_N - @m78_lib.M78
ALS_GAIN
6D1 52A8
6D1 26A3 27C5
6D1 26A3 27D5
6D1
6D1
6D1
6D1
6D1
24C8
28A5
25D8
25B1
26B3 27B4
y
r
=PP5V_S0_AUDIO - @m78_lib.M78
=PP5V_S0_MXM - @m78_lib.M78
=PPV_S0_LCD_20INCH - @m78_lib.M78
PP5V_S0 - @m78_lib.M78
a
n
i
m
il
=PP1V9R2V5_ENET_PHY
e
r
=PP0V9_S0M_MEM_TERM
=PP3V3_S0_LPCPLUS - @m78_lib.M78
=PP3V3_S0_IMVP - @m78_lib.M78
=PP3V3_S0_FAN - @m78_lib.M78
=PP3V3_S0_ENET - @m78_lib.M78
=PP3V3_S0_CK505 - @m78_lib.M78
=PP3V3_S0_AUDIO - @m78_lib.M78
=PP3V3_S0M_CK505 - @m78_lib.M78
=PP3V3_S0MWOL_SB_VCCLAN3_3 @m78_lib.M78
=PP3V3_S0MWOL_SB_VCCCL3_3 @m78_lib.M78
=PP3V3_S0MWOL_SB_CLINK0 @m78_lib.M78
=PP3V3R1V5_S0_SB_VCCHDA @m78_lib.M78
=GFX_VR_EN - @m78_lib.M78
TP_GFX_VR_EN - @m78_lib.M78
=GND_NB_VSSA_LVDS - @m78_lib.M78
TP_NB_VSSA_LVDS - @m78_lib.M78
=NB_CLINK_MPWROK - @m78_lib.M78
VR_PWRGOOD_DELAY - @m78_lib.M78
8
CK505_LVDS_P
CK505_LVDS_P - @m78_lib.M78
TP_CK505_LVDS_P - @m78_lib.M78
CK505_PCI1_CLK - @m78_lib.M78
TP_CK505_PCI1_CLK - @m78_lib.M78
CK505_PCI2_CLK
CK505_PCI2_CLK - @m78_lib.M78
TP_PCI_CLK33M_TPM - @m78_lib.M78
CK505_PCI3_CLK
CK505_PCI3_CLK - @m78_lib.M78
CK505_PCI4_CLK
CK505_PCI4_CLK - @m78_lib.M78
TP_CK505_PCI4_CLK - @m78_lib.M78
CK505_PCI5_CLK_FCTSE CK505_PCI5_CLK_FCTSEL L
@m78_lib.M78
CK505_PCIF0_CLK_ITPE CK505_PCIF0_CLK_ITPEN N
@m78_lib.M78
CK505_PCIF1_CLK
CK505_PCIF1_CLK - @m78_lib.M78
CK505_REF0_FSC
CK505_REF0_FSC - @m78_lib.M78
CK505_REF1
CK505_REF1 - @m78_lib.M78
TP_CK505_REF1 - @m78_lib.M78
CK505_SRC1_N
CK505_SRC1_N - @m78_lib.M78
GPU_CLK100M_PCIE_N - @m78_lib.M78
CK505_SRC1_P
CK505_SRC1_P - @m78_lib.M78
GPU_CLK100M_PCIE_P - @m78_lib.M78
CK505_SRC2_N
CK505_SRC2_N - @m78_lib.M78
SB_CLK100M_DMI_N - @m78_lib.M78
CK505_SRC2_P
CK505_SRC2_P - @m78_lib.M78
SB_CLK100M_DMI_P - @m78_lib.M78
CK505_SRC3_N
CK505_SRC3_N - @m78_lib.M78
PCIE_CLK100M_FW_N - @m78_lib.M78
CK505_SRC3_P
CK505_SRC3_P - @m78_lib.M78
PCIE_CLK100M_FW_P - @m78_lib.M78
CK505_SRC4_N
CK505_SRC4_N - @m78_lib.M78
SB_CLK100M_SATA_N - @m78_lib.M78
CK505_SRC4_P
CK505_SRC4_P - @m78_lib.M78
SB_CLK100M_SATA_P - @m78_lib.M78
CK505_SRC5_N
CK505_SRC5_N - @m78_lib.M78
NB_CLK100M_PCIE_N - @m78_lib.M78
CK505_SRC5_P
CK505_SRC5_P - @m78_lib.M78
NB_CLK100M_PCIE_P - @m78_lib.M78
CK505_SRC6_N
CK505_SRC6_N - @m78_lib.M78
PCIE_CLK100M_MINI_N - @m78_lib.M78
CK505_SRC6_P
CK505_SRC6_P - @m78_lib.M78
PCIE_CLK100M_MINI_P - @m78_lib.M78
CK505_SRC7_N
CK505_SRC7_N - @m78_lib.M78
CK505_SRC7_P
CK505_SRC7_P - @m78_lib.M78
CK505_SRC8_N
CK505_SRC8_N - @m78_lib.M78
PCIE_CLK100M_ENET_N - @m78_lib.M78
CK505_SRC8_P
CK505_SRC8_P - @m78_lib.M78
PCIE_CLK100M_ENET_P - @m78_lib.M78
CK505_XTAL_IN
CK505_XTAL_IN - @m78_lib.M78
CK505_XTAL_OUT
CK505_XTAL_OUT - @m78_lib.M78
CLINK_NB_CLK
CLINK_NB_CLK - @m78_lib.M78
CLINK_NB_DATA
CLINK_NB_DATA - @m78_lib.M78
CLINK_NB_RESET_L
CLINK_NB_RESET_L - @m78_lib.M78
CLINK_WLAN_CLK
CLINK_WLAN_CLK - @m78_lib.M78
TP_CLINK_WLAN_CLK - @m78_lib.M78
CLINK_WLAN_DATA
CLINK_WLAN_DATA - @m78_lib.M78
TP_CLINK_WLAN_DATA - @m78_lib.M78
CLINK_WLAN_RESET_L
CLINK_WLAN_RESET_L - @m78_lib.M78
TP_CLINK_WLAN_RESET_L @m78_lib.M78
CLK_PWRGD
CLK_PWRGD - @m78_lib.M78
CPUVCORE_ISENSE_CAL CPUVCORE_ISENSE_CAL - @m78_lib.M78
CPUVSENSE_IN
CPUVSENSE_IN - @m78_lib.M78
CPU_A20M_L
CPU_A20M_L - @m78_lib.M78
CPU_BSEL<0>
CPU_BSEL<0> - @m78_lib.M78
CPU_BSEL<1>
CPU_BSEL<1> - @m78_lib.M78
CPU_BSEL<2>
CPU_BSEL<2> - @m78_lib.M78
CPU_COMP<0>
CPU_COMP<0> - @m78_lib.M78
CPU_COMP<1>
CPU_COMP<1> - @m78_lib.M78
CPU_COMP<2>
CPU_COMP<2> - @m78_lib.M78
CPU_COMP<3>
CPU_COMP<3> - @m78_lib.M78
CPU_DPRSTP_L
CPU_DPRSTP_L - @m78_lib.M78
CPU_DPSLP_L
CPU_DPSLP_L - @m78_lib.M78
CPU_FERR_L
CPU_FERR_L - @m78_lib.M78
CPU_GTLREF
CPU_GTLREF - @m78_lib.M78
CPU_HSK_THRMD_N
CPU_HSK_THRMD_N - @m78_lib.M78
CPU_HSK_THRMD_P
CPU_HSK_THRMD_P - @m78_lib.M78
CPU_IERR_L
CPU_IERR_L - @m78_lib.M78
CPU_IGNNE_L
CPU_IGNNE_L - @m78_lib.M78
CPU_INIT_L
CPU_INIT_L - @m78_lib.M78
CPU_INIT_LS3V3
CPU_INIT_LS3V3 - @m78_lib.M78
CPU_INIT_R_L
CPU_INIT_R_L - @m78_lib.M78
CPU_INTR
CPU_INTR - @m78_lib.M78
CPU_NMI
CPU_NMI - @m78_lib.M78
CPU_PROCHOT_BUF
CPU_PROCHOT_BUF - @m78_lib.M78
CPU_PROCHOT_L
CPU_PROCHOT_L - @m78_lib.M78
CPU_PROCHOT_L_R
CPU_PROCHOT_L_R - @m78_lib.M78
CPU_PSI_L
CPU_PSI_L - @m78_lib.M78
IMVP6_PSI_L - @m78_lib.M78
CPU_PWRGD
CPU_PWRGD - @m78_lib.M78
CPU_SMI_L
CPU_SMI_L - @m78_lib.M78
CPU_STPCLK_L
CPU_STPCLK_L - @m78_lib.M78
CPU_TEST1
CPU_TEST1 - @m78_lib.M78
CPU_TEST2
CPU_TEST2 - @m78_lib.M78
CPU_TEST4
CPU_TEST4 - @m78_lib.M78
CPU_THERMD_N
CPU_THERMD_N - @m78_lib.M78
CPU_THERMD_P
CPU_THERMD_P - @m78_lib.M78
CPU_THERMTRIP_R
CPU_THERMTRIP_R - @m78_lib.M78
CPU_VCCSENSE_N
CPU_VCCSENSE_N - @m78_lib.M78
CPU_VCCSENSE_P
CPU_VCCSENSE_P - @m78_lib.M78
CPU_VID<0>
CPU_VID<0> - @m78_lib.M78
CPU_VID<6..0>
CPU_VID<6..0> - @m78_lib.M78
CPU_VID<1>
CPU_VID<1> - @m78_lib.M78
CPU_VID<2>
CPU_VID<2> - @m78_lib.M78
CPU_VID<3>
CPU_VID<3> - @m78_lib.M78
CPU_VID<4>
CPU_VID<4> - @m78_lib.M78
CPU_VID<5>
CPU_VID<5> - @m78_lib.M78
CPU_VID<6>
CPU_VID<6> - @m78_lib.M78
DEBUG_RESET_L
DEBUG_RESET_L - @m78_lib.M78
DMI_IRCOMP_R
DMI_IRCOMP_R - @m78_lib.M78
DMI_N2S_N<0>
DMI_N2S_N<0> - @m78_lib.M78
DMI_N2S_N<3..0>
DMI_N2S_N<3..0> - @m78_lib.M78
DMI_N2S_N<1>
DMI_N2S_N<1> - @m78_lib.M78
DMI_N2S_N<2>
DMI_N2S_N<2> - @m78_lib.M78
DMI_N2S_N<3>
DMI_N2S_N<3> - @m78_lib.M78
DMI_N2S_P<0>
DMI_N2S_P<0> - @m78_lib.M78
DMI_N2S_P<1>
DMI_N2S_P<1> - @m78_lib.M78
DMI_N2S_P<3..1>
DMI_N2S_P<3..1> - @m78_lib.M78
DMI_N2S_P<2>
DMI_N2S_P<2> - @m78_lib.M78
DMI_N2S_P<3>
DMI_N2S_P<3> - @m78_lib.M78
DMI_S2N_N<0>
DMI_S2N_N<0> - @m78_lib.M78
DMI_S2N_N<3..0>
DMI_S2N_N<3..0> - @m78_lib.M78
DMI_S2N_N<1>
DMI_S2N_N<1> - @m78_lib.M78
DMI_S2N_N<2>
DMI_S2N_N<2> - @m78_lib.M78
DMI_S2N_N<3>
DMI_S2N_N<3> - @m78_lib.M78
CK505_PCI1_CLK
7
29B3 30C5
30C3
29C5 30A5
7C3 30A3
29B5 30A5
30A3
29B5 30A5
29B5 30A5
30A3
29B5 30D8
105D3
105D3
105D3
105D3
105D3
105D3
DMI_S2N_P<0>
DMI_S2N_P<1>
DMI_S2N_P<3..1>
DMI_S2N_P<2>
DMI_S2N_P<3>
DVI_DDC_CLK
DVI_DDC_CLK_UF
DVI_DDC_DATA
DVI_DDC_DATA_UF
DVI_HOTPLUG_DET
DMI_S2N_P<0> - @m78_lib.M78
DMI_S2N_P<1> - @m78_lib.M78
DMI_S2N_P<3..1> - @m78_lib.M78
DMI_S2N_P<2> - @m78_lib.M78
DMI_S2N_P<3> - @m78_lib.M78
DVI_DDC_CLK - @m78_lib.M78
DVI_DDC_CLK_UF - @m78_lib.M78
DVI_DDC_DATA - @m78_lib.M78
DVI_DDC_DATA_UF - @m78_lib.M78
DVI_HOTPLUG_DET - @m78_lib.M78
SB_GPIO4 - @m78_lib.M78
DVI_HPD_UF
DVI_HPD_UF - @m78_lib.M78
ENET_CLK25M_XTALI
ENET_CLK25M_XTALI - @m78_lib.M78
ENET_CLK25M_XTALO
ENET_CLK25M_XTALO - @m78_lib.M78
ENET_CTAP_<0>
ENET_CTAP_<0> - @m78_lib.M78
ENET_CTAP_<1>
ENET_CTAP_<1> - @m78_lib.M78
ENET_CTAP_<2>
ENET_CTAP_<2> - @m78_lib.M78
ENET_CTAP_<3>
ENET_CTAP_<3> - @m78_lib.M78
ENET_CTAP_COMMON
ENET_CTAP_COMMON - @m78_lib.M78
ENET_CTRL12
ENET_CTRL12 - @m78_lib.M78
TP_YUKON_CTRL12 - @m78_lib.M78
ENET_CTRL19R25
ENET_CTRL19R25 - @m78_lib.M78
TP_YUKON_CTRL18 - @m78_lib.M78
ENET_LED_ACT_L
ENET_LED_ACT_L - @m78_lib.M78
ENET_LED_LINK10_100_ ENET_LED_LINK10_100_L L
@m78_lib.M78
ENET_LED_LINK1000_L ENET_LED_LINK1000_L - @m78_lib.M78
ENET_LED_LINK_L
ENET_LED_LINK_L - @m78_lib.M78
ENET_LOM_DIS_L
ENET_LOM_DIS_L - @m78_lib.M78
ENET_MDI0
ENET_MDI0 - @m78_lib.M78
ENET_MDI1
ENET_MDI1 - @m78_lib.M78
ENET_MDI2
ENET_MDI2 - @m78_lib.M78
ENET_MDI3
ENET_MDI3 - @m78_lib.M78
ENET_MDI_N<0>
ENET_MDI_N<0> - @m78_lib.M78
ENET_MDI_N<1>
ENET_MDI_N<1> - @m78_lib.M78
ENET_MDI_N<2>
ENET_MDI_N<2> - @m78_lib.M78
ENET_MDI_N<3>
ENET_MDI_N<3> - @m78_lib.M78
ENET_MDI_P<0>
ENET_MDI_P<0> - @m78_lib.M78
ENET_MDI_P<1>
ENET_MDI_P<1> - @m78_lib.M78
ENET_MDI_P<2>
ENET_MDI_P<2> - @m78_lib.M78
ENET_MDI_P<3>
ENET_MDI_P<3> - @m78_lib.M78
ENET_MDI_R_N<0>
ENET_MDI_R_N<0> - @m78_lib.M78
ENET_MDI_R_N<1>
ENET_MDI_R_N<1> - @m78_lib.M78
ENET_MDI_R_N<2>
ENET_MDI_R_N<2> - @m78_lib.M78
ENET_MDI_R_N<3>
ENET_MDI_R_N<3> - @m78_lib.M78
ENET_MDI_R_P<0>
ENET_MDI_R_P<0> - @m78_lib.M78
ENET_MDI_R_P<1>
ENET_MDI_R_P<1> - @m78_lib.M78
ENET_MDI_R_P<2>
ENET_MDI_R_P<2> - @m78_lib.M78
ENET_MDI_R_P<3>
ENET_MDI_R_P<3> - @m78_lib.M78
ENET_MDI_T_N<0>
ENET_MDI_T_N<0> - @m78_lib.M78
ENET_MDI_T_N<1>
ENET_MDI_T_N<1> - @m78_lib.M78
ENET_MDI_T_N<2>
ENET_MDI_T_N<2> - @m78_lib.M78
ENET_MDI_T_N<3>
ENET_MDI_T_N<3> - @m78_lib.M78
ENET_MDI_T_P<0>
ENET_MDI_T_P<0> - @m78_lib.M78
ENET_MDI_T_P<1>
ENET_MDI_T_P<1> - @m78_lib.M78
ENET_MDI_T_P<2>
ENET_MDI_T_P<2> - @m78_lib.M78
ENET_MDI_T_P<3>
ENET_MDI_T_P<3> - @m78_lib.M78
ENET_RESET_L
ENET_RESET_L - @m78_lib.M78
EXCARD_OC_L
EXCARD_OC_L - @m78_lib.M78
EXTGPU_LVDS_EN
EXTGPU_LVDS_EN - @m78_lib.M78
EXTGPU_PWR_EN
EXTGPU_PWR_EN - @m78_lib.M78
TP_EXTGPU_PWR_EN - @m78_lib.M78
EXTGPU_RST_L
EXTGPU_RST_L - @m78_lib.M78
TP_EXTGPU_RST_L - @m78_lib.M78
F0_GATESLOWDN
F0_GATESLOWDN - @m78_lib.M78
F0_VOLTAGE8R5
F0_VOLTAGE8R5 - @m78_lib.M78
F1_GATESLOWDN
F1_GATESLOWDN - @m78_lib.M78
F1_VOLTAGE8R5
F1_VOLTAGE8R5 - @m78_lib.M78
F2_GATESLOWDN
F2_GATESLOWDN - @m78_lib.M78
F2_VOLTAGE8R5
F2_VOLTAGE8R5 - @m78_lib.M78
FAN_0_PWR
FAN_0_PWR - @m78_lib.M78
FAN_1_PWR
FAN_1_PWR - @m78_lib.M78
FAN_2_PWR
FAN_2_PWR - @m78_lib.M78
FAN_TACH0
FAN_TACH0 - @m78_lib.M78
FAN_TACH1
FAN_TACH1 - @m78_lib.M78
FAN_TACH2
FAN_TACH2 - @m78_lib.M78
FSB_ADSTB_L<0>
FSB_ADSTB_L<0> - @m78_lib.M78
FSB_ADSTB_L<1>
FSB_ADSTB_L<1> - @m78_lib.M78
FSB_ADS_L
FSB_ADS_L - @m78_lib.M78
FSB_A_L<3>
FSB_A_L<3> - @m78_lib.M78
FSB_A_L<5..3>
FSB_A_L<5..3> - @m78_lib.M78
FSB_A_L<4>
FSB_A_L<4> - @m78_lib.M78
FSB_A_L<5>
FSB_A_L<5> - @m78_lib.M78
FSB_A_L<6>
FSB_A_L<6> - @m78_lib.M78
FSB_A_L<7>
FSB_A_L<7> - @m78_lib.M78
FSB_A_L<16..7>
FSB_A_L<16..7> - @m78_lib.M78
FSB_A_L<8>
FSB_A_L<8> - @m78_lib.M78
FSB_A_L<9>
FSB_A_L<9> - @m78_lib.M78
FSB_A_L<10>
FSB_A_L<10> - @m78_lib.M78
FSB_A_L<11>
FSB_A_L<11> - @m78_lib.M78
FSB_A_L<12>
FSB_A_L<12> - @m78_lib.M78
FSB_A_L<13>
FSB_A_L<13> - @m78_lib.M78
FSB_A_L<14>
FSB_A_L<14> - @m78_lib.M78
FSB_A_L<15>
FSB_A_L<15> - @m78_lib.M78
FSB_A_L<16>
FSB_A_L<16> - @m78_lib.M78
FSB_A_L<17>
FSB_A_L<17> - @m78_lib.M78
FSB_A_L<26..17>
FSB_A_L<26..17> - @m78_lib.M78
FSB_A_L<18>
FSB_A_L<18> - @m78_lib.M78
FSB_A_L<19>
FSB_A_L<19> - @m78_lib.M78
FSB_A_L<20>
FSB_A_L<20> - @m78_lib.M78
FSB_A_L<21>
FSB_A_L<21> - @m78_lib.M78
FSB_A_L<22>
FSB_A_L<22> - @m78_lib.M78
FSB_A_L<23>
FSB_A_L<23> - @m78_lib.M78
FSB_A_L<24>
FSB_A_L<24> - @m78_lib.M78
FSB_A_L<25>
FSB_A_L<25> - @m78_lib.M78
FSB_A_L<26>
FSB_A_L<26> - @m78_lib.M78
FSB_A_L<27>
FSB_A_L<27> - @m78_lib.M78
FSB_A_L<28>
FSB_A_L<28> - @m78_lib.M78
FSB_A_L<35..28>
FSB_A_L<35..28> - @m78_lib.M78
FSB_A_L<29>
FSB_A_L<29> - @m78_lib.M78
FSB_A_L<30>
FSB_A_L<30> - @m78_lib.M78
FSB_A_L<31>
FSB_A_L<31> - @m78_lib.M78
FSB_A_L<32>
FSB_A_L<32> - @m78_lib.M78
FSB_A_L<33>
FSB_A_L<33> - @m78_lib.M78
FSB_A_L<34>
FSB_A_L<34> - @m78_lib.M78
FSB_A_L<35>
FSB_A_L<35> - @m78_lib.M78
FSB_BNR_L
FSB_BNR_L - @m78_lib.M78
FSB_BPRI_L
FSB_BPRI_L - @m78_lib.M78
FSB_BREQ0_L
FSB_BREQ0_L - @m78_lib.M78
FSB_CPURST_L
FSB_CPURST_L - @m78_lib.M78
FSB_CPUSLP_L
FSB_CPUSLP_L - @m78_lib.M78
FSB_DBSY_L
FSB_DBSY_L - @m78_lib.M78
FSB_DEFER_L
FSB_DEFER_L - @m78_lib.M78
FSB_DINV_L<0>
FSB_DINV_L<0> - @m78_lib.M78
FSB_DINV_L<1>
FSB_DINV_L<2>
FSB_DINV_L<3>
FSB_DPWR_L
FSB_DRDY_L
FSB_DSTB_L_N<0>
FSB_DSTB_L_N<1>
FSB_DSTB_L_N<2>
FSB_DSTB_L_N<3>
FSB_DSTB_L_P<0>
FSB_DSTB_L_P<1>
FSB_DSTB_L_P<2>
FSB_DSTB_L_P<3>
FSB_D_L<0>
FSB_D_L<1>
FSB_D_L<15..1>
FSB_D_L<2>
FSB_D_L<3>
FSB_D_L<4>
FSB_D_L<5>
FSB_D_L<6>
FSB_D_L<7>
FSB_D_L<8>
FSB_D_L<9>
FSB_D_L<10>
FSB_D_L<11>
FSB_D_L<12>
FSB_D_L<13>
FSB_D_L<14>
FSB_D_L<15>
FSB_D_L<16>
FSB_D_L<17>
FSB_D_L<31..17>
FSB_D_L<18>
FSB_D_L<19>
FSB_D_L<20>
FSB_D_L<21>
FSB_D_L<22>
FSB_D_L<23>
FSB_D_L<24>
FSB_D_L<25>
FSB_D_L<26>
FSB_D_L<27>
FSB_D_L<28>
FSB_D_L<29>
FSB_D_L<30>
FSB_D_L<31>
FSB_D_L<32>
FSB_D_L<40..32>
FSB_D_L<33>
FSB_D_L<34>
FSB_D_L<35>
FSB_D_L<36>
FSB_D_L<37>
FSB_D_L<38>
FSB_D_L<39>
FSB_D_L<40>
FSB_D_L<41>
FSB_D_L<42>
FSB_D_L<47..42>
FSB_D_L<43>
FSB_D_L<44>
FSB_D_L<45>
FSB_D_L<46>
FSB_D_L<47>
FSB_D_L<48>
FSB_D_L<58..48>
FSB_D_L<49>
FSB_D_L<50>
FSB_D_L<51>
FSB_D_L<52>
FSB_D_L<53>
FSB_D_L<54>
FSB_D_L<55>
FSB_D_L<56>
FSB_D_L<57>
FSB_D_L<58>
FSB_D_L<59>
FSB_D_L<60>
FSB_D_L<63..60>
FSB_D_L<61>
FSB_D_L<62>
FSB_D_L<63>
FSB_HITM_L
FSB_HIT_L
FSB_LOCK_L
FSB_REQ_L<0>
FSB_REQ_L<4..0>
FSB_REQ_L<1>
FSB_REQ_L<2>
FSB_REQ_L<3>
FSB_REQ_L<4>
FSB_RS_L<0>
FSB_RS_L<2..0>
FSB_RS_L<1>
FSB_RS_L<2>
FSB_TRDY_L
FW643_REGCTL
FWH_INIT_L
FWH_MFG_MODE
FW_OCR10_CTL
FW_OCR10_CTL_R
FW_P0_TPA_C
FW_P0_TPBIAS
FW_P1_TPA_C
FW_P1_TPBIAS
FW_P2_TPA_N
37B2 39A8
37B2 39A8
37C2
37B7 104B3
37B6 104B3
37B6 104B3
37B5 104B3
37B8 39C7 104B3
37B8 39C7 104B3
37B8 39B7 104A3
37B8 39B7 104A3
37B8 39C7 104B3
37B8 39C7 104B3
37B8 39B7 104B3
37B8 39B7 104A3
108B3
108B3
108B3
108B3
108B3
108B3
108B3
108B3
39C5 108B3
39C5 108B3
39B5 108B3
39B5 108B3
39C5 108B3
39C5 108B3
39B5 108B3
39B5 108B3
7D6 28C1 37B8
24C8
13C3 24C8
23C4 28A2
28A1
25A5 25C5 28A2
28A1
56D5
56D6
56B5
56B6
57D4
57D5
56C4
56B3
57C3
56C7
56A7
57C7
7D7 7D8 10D8 14C3 100C3
7D7 7D8 10C8 14C3 100B3
10D6 14C3 100D3
10D8 14D3
100C3
10D8 14D3
10D8 14D3
7D7 7D8 10D8 14D3 100C3
10D8 14D3
100C3
10D8 14D3
10D8 14D3
10D8 14D3
10D8 14D3
10D8 14D3
10D8 14D3
10D8 14D3
10D8 14D3
10D8 14C3
10C8 14C3
100B3
10C8 14C3
10C8 14C3
10C8 14C3
10C8 14C3
10C8 14C3
10C8 14C3
10C8 14C3
10C8 14C3
10C8 14C3
7D7 7D8 10C8 14C3 100B3
10C8 14C3
100B3
10C8 14C3
10C8 14C3
10C8 14C3
10C8 14C3
10C8 14C3
10C8 14C3
10C8 14C3
7C7 10D6 14C3 100D3
10D6 14C3 100D3
7C7 10D6 14B3 100D3
7C8 10D6 13B2 14A5 100D3
10A2 14A5 100B3
7C7 10D6 14B3 100D3
10D6 14B3 100D3
7D7 7D8 10C4 14B3 100D3
FSB_DINV_L<1> - @m78_lib.M78
FSB_DINV_L<2> - @m78_lib.M78
FSB_DINV_L<3> - @m78_lib.M78
FSB_DPWR_L - @m78_lib.M78
FSB_DRDY_L - @m78_lib.M78
FSB_DSTB_L_N<0> - @m78_lib.M78
FSB_DSTB_L_N<1> - @m78_lib.M78
FSB_DSTB_L_N<2> - @m78_lib.M78
FSB_DSTB_L_N<3> - @m78_lib.M78
FSB_DSTB_L_P<0> - @m78_lib.M78
FSB_DSTB_L_P<1> - @m78_lib.M78
FSB_DSTB_L_P<2> - @m78_lib.M78
FSB_DSTB_L_P<3> - @m78_lib.M78
FSB_D_L<0> - @m78_lib.M78
FSB_D_L<1> - @m78_lib.M78
FSB_D_L<15..1> - @m78_lib.M78
FSB_D_L<2> - @m78_lib.M78
FSB_D_L<3> - @m78_lib.M78
FSB_D_L<4> - @m78_lib.M78
FSB_D_L<5> - @m78_lib.M78
FSB_D_L<6> - @m78_lib.M78
FSB_D_L<7> - @m78_lib.M78
FSB_D_L<8> - @m78_lib.M78
FSB_D_L<9> - @m78_lib.M78
FSB_D_L<10> - @m78_lib.M78
FSB_D_L<11> - @m78_lib.M78
FSB_D_L<12> - @m78_lib.M78
FSB_D_L<13> - @m78_lib.M78
FSB_D_L<14> - @m78_lib.M78
FSB_D_L<15> - @m78_lib.M78
FSB_D_L<16> - @m78_lib.M78
FSB_D_L<17> - @m78_lib.M78
FSB_D_L<31..17> - @m78_lib.M78
FSB_D_L<18> - @m78_lib.M78
FSB_D_L<19> - @m78_lib.M78
FSB_D_L<20> - @m78_lib.M78
FSB_D_L<21> - @m78_lib.M78
FSB_D_L<22> - @m78_lib.M78
FSB_D_L<23> - @m78_lib.M78
FSB_D_L<24> - @m78_lib.M78
FSB_D_L<25> - @m78_lib.M78
FSB_D_L<26> - @m78_lib.M78
FSB_D_L<27> - @m78_lib.M78
FSB_D_L<28> - @m78_lib.M78
FSB_D_L<29> - @m78_lib.M78
FSB_D_L<30> - @m78_lib.M78
FSB_D_L<31> - @m78_lib.M78
FSB_D_L<32> - @m78_lib.M78
FSB_D_L<40..32> - @m78_lib.M78
FSB_D_L<33> - @m78_lib.M78
FSB_D_L<34> - @m78_lib.M78
FSB_D_L<35> - @m78_lib.M78
FSB_D_L<36> - @m78_lib.M78
FSB_D_L<37> - @m78_lib.M78
FSB_D_L<38> - @m78_lib.M78
FSB_D_L<39> - @m78_lib.M78
FSB_D_L<40> - @m78_lib.M78
FSB_D_L<41> - @m78_lib.M78
FSB_D_L<42> - @m78_lib.M78
FSB_D_L<47..42> - @m78_lib.M78
FSB_D_L<43> - @m78_lib.M78
FSB_D_L<44> - @m78_lib.M78
FSB_D_L<45> - @m78_lib.M78
FSB_D_L<46> - @m78_lib.M78
FSB_D_L<47> - @m78_lib.M78
FSB_D_L<48> - @m78_lib.M78
FSB_D_L<58..48> - @m78_lib.M78
FSB_D_L<49> - @m78_lib.M78
FSB_D_L<50> - @m78_lib.M78
FSB_D_L<51> - @m78_lib.M78
FSB_D_L<52> - @m78_lib.M78
FSB_D_L<53> - @m78_lib.M78
FSB_D_L<54> - @m78_lib.M78
FSB_D_L<55> - @m78_lib.M78
FSB_D_L<56> - @m78_lib.M78
FSB_D_L<57> - @m78_lib.M78
FSB_D_L<58> - @m78_lib.M78
FSB_D_L<59> - @m78_lib.M78
FSB_D_L<60> - @m78_lib.M78
FSB_D_L<63..60> - @m78_lib.M78
FSB_D_L<61> - @m78_lib.M78
FSB_D_L<62> - @m78_lib.M78
FSB_D_L<63> - @m78_lib.M78
FSB_HITM_L - @m78_lib.M78
FSB_HIT_L - @m78_lib.M78
FSB_LOCK_L - @m78_lib.M78
FSB_REQ_L<0> - @m78_lib.M78
FSB_REQ_L<4..0> - @m78_lib.M78
FSB_REQ_L<1> - @m78_lib.M78
FSB_REQ_L<2> - @m78_lib.M78
FSB_REQ_L<3> - @m78_lib.M78
FSB_REQ_L<4> - @m78_lib.M78
FSB_RS_L<0> - @m78_lib.M78
FSB_RS_L<2..0> - @m78_lib.M78
FSB_RS_L<1> - @m78_lib.M78
FSB_RS_L<2> - @m78_lib.M78
FSB_TRDY_L - @m78_lib.M78
FW643_REGCTL - @m78_lib.M78
FWH_INIT_L - @m78_lib.M78
FWH_MFG_MODE - @m78_lib.M78
FW_OCR10_CTL - @m78_lib.M78
FW_OCR10_CTL_R - @m78_lib.M78
FW_P0_TPA_C - @m78_lib.M78
FW_P0_TPBIAS - @m78_lib.M78
FW_P1_TPA_C - @m78_lib.M78
FW_P1_TPBIAS - @m78_lib.M78
FW_P2_TPA_N - @m78_lib.M78
NC_FW_PORT2_TPA_N - @m78_lib.M78
FW_P2_TPA_P - @m78_lib.M78
NC_FW_PORT2_TPA_P - @m78_lib.M78
FW_P2_TPBIAS - @m78_lib.M78
NC_FW_PORT2_TPBIAS - @m78_lib.M78
FW_P2_TPB_N - @m78_lib.M78
NC_FW_PORT2_TPB_N - @m78_lib.M78
FW_P2_TPB_P - @m78_lib.M78
NC_FW_PORT2_TPB_P - @m78_lib.M78
FW_PHY_DS0 - @m78_lib.M78
FW_PHY_DS1 - @m78_lib.M78
FW_PHY_DS2 - @m78_lib.M78
FW_PORT0_TPA_N - @m78_lib.M78
FW_P0_TPA_N - @m78_lib.M78
FW_PORT0_TPA_P - @m78_lib.M78
FW_P0_TPA_P - @m78_lib.M78
FW_PORT0_TPA_R - @m78_lib.M78
FW_P2_TPA_P
FW_P2_TPBIAS
FW_P2_TPB_N
FW_P2_TPB_P
FW_PHY_DS0
FW_PHY_DS1
FW_PHY_DS2
FW_PORT0_TPA_N
FW_PORT0_TPA_P
FW_PORT0_TPA_R
FW_PORT0_TPB_N
FW_PORT0_TPB_P
FW_PORT0_VP
FW_PORT0_VP_F
FW_PORT1_TPA_FL_N
FW_PORT1_TPA_FL_P
FW_PORT1_TPA_N
FW_PORT1_TPA_P
FW_PORT1_TPB_FL_N
FW_PORT1_TPB_FL_P
FW_PORT1_TPB_N
FW_PORT1_TPB_P
FW_PORT1_VP
FW_PORT1_VP_F
FW_PORTS_VP
FW_PORTS_VP_R
FW_PU_RST_L
FW_R0
FW_RESET_L
FW_REXT
FW_SCL
FW_TPCPS
FW_TRST_L
FW_VAUX_DETECT
FW_XI
FW_XO
FW_XO_R
GATE_12V_S3
GATE_12V_S3_R
GFX_VID<1>
GFX_VID<2>
GFX_VID<3>
GFX_VID<4>
GLAN_COMP
GND_IMVP6_SGND
GND_PP1V5REG_SGND
GND_PP1V8REG_SGND
GND_PP1V25REG_SGND
GND_PP5VREG_SGND
GND_SMC_AVSS
FW_PORT0_TPB_N - @m78_lib.M78
FW_P0_TPB_N - @m78_lib.M78
FW_PORT0_TPB_P - @m78_lib.M78
FW_P0_TPB_P - @m78_lib.M78
FW_PORT0_VP - @m78_lib.M78
FW_PORT0_VP_F - @m78_lib.M78
FW_PORT1_TPA_FL_N - @m78_lib.M78
FW_PORT1_TPA_FL_P - @m78_lib.M78
FW_PORT1_TPA_N - @m78_lib.M78
FW_P1_TPA_N - @m78_lib.M78
FW_PORT1_TPA_P - @m78_lib.M78
FW_P1_TPA_P - @m78_lib.M78
FW_PORT1_TPB_FL_N - @m78_lib.M78
FW_PORT1_TPB_FL_P - @m78_lib.M78
FW_PORT1_TPB_N - @m78_lib.M78
FW_P1_TPB_N - @m78_lib.M78
FW_PORT1_TPB_P - @m78_lib.M78
FW_P1_TPB_P - @m78_lib.M78
FW_PORT1_VP - @m78_lib.M78
FW_PORT1_VP_F - @m78_lib.M78
FW_PORTS_VP - @m78_lib.M78
FW_PORTS_VP_R - @m78_lib.M78
FW_PU_RST_L - @m78_lib.M78
FW_R0 - @m78_lib.M78
FW_RESET_L - @m78_lib.M78
FW_REXT - @m78_lib.M78
FW_SCL - @m78_lib.M78
FW_TPCPS - @m78_lib.M78
FW_TRST_L - @m78_lib.M78
FW_VAUX_DETECT - @m78_lib.M78
FW_XI - @m78_lib.M78
FW_XO - @m78_lib.M78
FW_XO_R - @m78_lib.M78
GATE_12V_S3 - @m78_lib.M78
GATE_12V_S3_R - @m78_lib.M78
GFX_VID<1> - @m78_lib.M78
GFX_VID<2> - @m78_lib.M78
GFX_VID<3> - @m78_lib.M78
GFX_VID<4> - @m78_lib.M78
GLAN_COMP - @m78_lib.M78
GND_IMVP6_SGND - @m78_lib.M78
GND_PP1V5REG_SGND - @m78_lib.M78
GND_PP1V8REG_SGND - @m78_lib.M78
GND_PP1V25REG_SGND - @m78_lib.M78
GND_PP5VREG_SGND - @m78_lib.M78
GND_SMC_AVSS - @m78_lib.M78
GPU_BLU
GPU_BUF_HSYNC
GPU_BUF_VSYNC
GPU_DDC_A_CLK
GPU_DDC_A_DATA
GPU_DDC_C_CLK
GPU_DDC_C_DATA
GPU_DIGON
GPU_ENABLE_BL
GPU_GRN
GPU_H2SYNC
GPU_HPD
GPU_HSK_THRMD_N
GPU_HSK_THRMD_P
GPU_HSYNC_BUF
GPU_PRESENT
GPU_PRESENT_DRAIN
GPU_PRESENT_R
GPU_RED
GPU_TV_C
GPU_TV_COMP
GPU_TV_Y
GPU_V2SYNC
GPU_VARY_BL
GPU_VSYNC_BUF
HDA_BIT_CLK
HDA_BIT_CLK_R
HDA_DOCK_EN_L
HDA_RST_L
HDA_RST_L_R
HDA_SDIN0
HDA_SDIN_CODEC
HDA_SDOUT
HDA_SDOUT_R
HDA_SYNC
HDA_SYNC_R
HDD_THRMD_N
HDD_THRMD_P
IDE_CSEL
IDE_DASP_L
IDE_DASP_L_DS
IDE_IOCS16_PU
IDE_IRQ14
IDE_PDA<0>
IDE_PDA<2..0>
IDE_PDA<1>
IDE_PDA<2>
IDE_PDCS1_L
IDE_PDCS3_L
IDE_PDD<0>
IDE_PDD<8..0>
IDE_PDD<1>
IDE_PDD<2>
IDE_PDD<3>
IDE_PDD<4>
IDE_PDD<5>
IDE_PDD<6>
IDE_PDD<7>
IDE_PDD<8>
IDE_PDD<9>
IDE_PDD<10>
IDE_PDD<15..10>
IDE_PDD<11>
IDE_PDD<12>
IDE_PDD<13>
IDE_PDD<14>
IDE_PDD<15>
IDE_PDDACK_L
IDE_PDDREQ
IDE_PDIORDY
IDE_PDIOR_L
IDE_PDIOW_L
IMVP6_BOOT1
IMVP6_BOOT1_RC
IMVP6_BOOT2
IMVP6_BOOT2_RC
y
r
a
n
i
m
il
e
r
GPU_BLU - @m78_lib.M78
GPU_BUF_HSYNC - @m78_lib.M78
GPU_BUF_VSYNC - @m78_lib.M78
GPU_DDC_A_CLK - @m78_lib.M78
GPU_DDC_A_DATA - @m78_lib.M78
GPU_DDC_C_CLK - @m78_lib.M78
GPU_DDC_C_DATA - @m78_lib.M78
GPU_DIGON - @m78_lib.M78
GPU_ENABLE_BL - @m78_lib.M78
GPU_GRN - @m78_lib.M78
GPU_H2SYNC - @m78_lib.M78
GPU_HPD - @m78_lib.M78
GPU_HSK_THRMD_N - @m78_lib.M78
GPU_HSK_THRMD_P - @m78_lib.M78
GPU_HSYNC_BUF - @m78_lib.M78
GPU_PRESENT - @m78_lib.M78
SB_GPIO6 - @m78_lib.M78
GPU_PRESENT_DRAIN - @m78_lib.M78
GPU_PRESENT_R - @m78_lib.M78
GPU_RED - @m78_lib.M78
GPU_TV_C - @m78_lib.M78
GPU_TV_COMP - @m78_lib.M78
GPU_TV_Y - @m78_lib.M78
GPU_V2SYNC - @m78_lib.M78
GPU_VARY_BL - @m78_lib.M78
GPU_VSYNC_BUF - @m78_lib.M78
HDA_BIT_CLK - @m78_lib.M78
HDA_BIT_CLK_R - @m78_lib.M78
HDA_DOCK_EN_L - @m78_lib.M78
HDA_RST_L - @m78_lib.M78
HDA_RST_L_R - @m78_lib.M78
HDA_SDIN0 - @m78_lib.M78
HDA_SDIN_CODEC - @m78_lib.M78
HDA_SDOUT - @m78_lib.M78
HDA_SDOUT_R - @m78_lib.M78
HDA_SYNC - @m78_lib.M78
HDA_SYNC_R - @m78_lib.M78
HDD_THRMD_N - @m78_lib.M78
HDD_THRMD_P - @m78_lib.M78
IDE_CSEL - @m78_lib.M78
IDE_DASP_L - @m78_lib.M78
IDE_DASP_L_DS - @m78_lib.M78
IDE_IOCS16_PU - @m78_lib.M78
IDE_IRQ14 - @m78_lib.M78
IDE_PDA<0> - @m78_lib.M78
IDE_PDA<2..0> - @m78_lib.M78
IDE_PDA<1> - @m78_lib.M78
IDE_PDA<2> - @m78_lib.M78
IDE_PDCS1_L - @m78_lib.M78
IDE_PDCS3_L - @m78_lib.M78
IDE_PDD<0> - @m78_lib.M78
IDE_PDD<8..0> - @m78_lib.M78
IDE_PDD<1> - @m78_lib.M78
IDE_PDD<2> - @m78_lib.M78
IDE_PDD<3> - @m78_lib.M78
IDE_PDD<4> - @m78_lib.M78
IDE_PDD<5> - @m78_lib.M78
IDE_PDD<6> - @m78_lib.M78
IDE_PDD<7> - @m78_lib.M78
IDE_PDD<8> - @m78_lib.M78
IDE_PDD<9> - @m78_lib.M78
IDE_PDD<10> - @m78_lib.M78
IDE_PDD<15..10> - @m78_lib.M78
IDE_PDD<11> - @m78_lib.M78
IDE_PDD<12> - @m78_lib.M78
IDE_PDD<13> - @m78_lib.M78
IDE_PDD<14> - @m78_lib.M78
IDE_PDD<15> - @m78_lib.M78
IDE_PDDACK_L - @m78_lib.M78
IDE_PDDREQ - @m78_lib.M78
IDE_PDIORDY - @m78_lib.M78
IDE_PDIOR_L - @m78_lib.M78
IDE_PDIOW_L - @m78_lib.M78
IMVP6_BOOT1 - @m78_lib.M78
IMVP6_BOOT1_RC - @m78_lib.M78
IMVP6_BOOT2 - @m78_lib.M78
IMVP6_BOOT2_RC - @m78_lib.M78
111
IMVP6_BOOT3
IMVP6_BOOT3_RC
IMVP6_COMP
IMVP6_COMP_RC
IMVP6_DFB
IMVP6_DROOP
IMVP6_FB
IMVP6_FCCM
IMVP6_FET_RC1
IMVP6_FET_RC2
IMVP6_FET_RC3
IMVP6_ISEN1
IMVP6_ISEN2
IMVP6_ISEN3
IMVP6_LGATE1
IMVP6_LGATE2
IMVP6_LGATE3
IMVP6_NTC
IMVP6_NTC_R
IMVP6_OCSET
IMVP6_PHASE1
IMVP6_PHASE2
IMVP6_PHASE3
IMVP6_PMON
IMVP6_PWM1
IMVP6_PWM2
IMVP6_PWM3
IMVP6_RBIAS
IMVP6_SOFT
IMVP6_UGATE1
IMVP6_UGATE2
IMVP6_UGATE3
IMVP6_VDIFF
IMVP6_VDIFF_RC
IMVP6_VID<0>
IMVP6_VID<6..0>
IMVP6_VID<1>
IMVP6_VID<2>
IMVP6_VID<3>
IMVP6_VID<4>
IMVP6_VID<5>
IMVP6_VID<6>
IMVP6_VO
IMVP6_VO1
IMVP6_VO2
IMVP6_VO3
IMVP6_VO_R
IMVP6_VR_TT_L
IMVP6_VSEN_N
IMVP6_VSEN_P
IMVP6_VSUM
IMVP6_VSUM1
IMVP6_VSUM2
IMVP6_VSUM3
IMVP6_VW
IMVP_DPRSLPVR
IMVP_PGD_IN
IMVP_VR_ON
INT_PIRQA_L
INT_PIRQB_L
INT_PIRQC_L
INT_PIRQD_L
INT_PIRQE_L
INT_PIRQF_L
INT_SERIRQ
INV_EN_BL_OR_PANEL_I
D
ISENSE_CAL_EN
ISENSE_CAL_EN_L
ISENSE_CAL_EN_LS12V
ISENSE_CAL_EN_L_R
ITP_CPURST_L
ITS_ALIVE
ITS_PLUGGED_IN
LAN_ENERGY_DET
LAN_PHYPC
LCD_PWM
LCD_PWREN_DIV
LCD_PWREN_L
LCD_PWREN_L_RC
LCD_SHOULD_ON
LED4300_1
LED4301_1
LED4302_1
LED4303_1
LINDACARD_GPIO
LPC_AD<0>
LPC_AD<1>
LPC_AD<2>
LPC_AD<3>
LPC_FRAME_L
LVDS_A_CLK_N
LVDS_A_CLK_P
LVDS_A_DATA_N<0>
LVDS_A_DATA_N<1>
LVDS_A_DATA_N<2>
LVDS_A_DATA_P<0>
LVDS_A_DATA_P<1>
LVDS_A_DATA_P<2>
LVDS_BKLT_CTL
LVDS_BKLT_EN
LVDS_B_CLK_N
LVDS_B_CLK_P
LVDS_B_DATA_N<0>
LVDS_B_DATA_N<1>
LVDS_B_DATA_N<2>
LVDS_B_DATA_P<0>
LVDS_B_DATA_P<1>
LVDS_B_DATA_P<2>
LVDS_IBG
LVDS_L_CLK_N
LVDS_L_CLK_P
LVDS_L_DATA_N<0>
LVDS_L_DATA_N<3..0>
LVDS_L_DATA_N<1>
7
IMVP6_BOOT3 - @m78_lib.M78
IMVP6_BOOT3_RC - @m78_lib.M78
IMVP6_COMP - @m78_lib.M78
IMVP6_COMP_RC - @m78_lib.M78
IMVP6_DFB - @m78_lib.M78
IMVP6_DROOP - @m78_lib.M78
IMVP6_FB - @m78_lib.M78
IMVP6_FCCM - @m78_lib.M78
IMVP6_FET_RC1 - @m78_lib.M78
IMVP6_FET_RC2 - @m78_lib.M78
IMVP6_FET_RC3 - @m78_lib.M78
IMVP6_ISEN1 - @m78_lib.M78
IMVP6_ISEN2 - @m78_lib.M78
IMVP6_ISEN3 - @m78_lib.M78
IMVP6_LGATE1 - @m78_lib.M78
IMVP6_LGATE2 - @m78_lib.M78
IMVP6_LGATE3 - @m78_lib.M78
IMVP6_NTC - @m78_lib.M78
IMVP6_NTC_R - @m78_lib.M78
IMVP6_OCSET - @m78_lib.M78
IMVP6_PHASE1 - @m78_lib.M78
IMVP6_PHASE2 - @m78_lib.M78
IMVP6_PHASE3 - @m78_lib.M78
IMVP6_PMON - @m78_lib.M78
IMVP6_PWM1 - @m78_lib.M78
IMVP6_PWM2 - @m78_lib.M78
IMVP6_PWM3 - @m78_lib.M78
IMVP6_RBIAS - @m78_lib.M78
IMVP6_SOFT - @m78_lib.M78
IMVP6_UGATE1 - @m78_lib.M78
IMVP6_UGATE2 - @m78_lib.M78
IMVP6_UGATE3 - @m78_lib.M78
IMVP6_VDIFF - @m78_lib.M78
IMVP6_VDIFF_RC - @m78_lib.M78
IMVP6_VID<0> - @m78_lib.M78
IMVP6_VID<6..0> - @m78_lib.M78
IMVP6_VID<1> - @m78_lib.M78
IMVP6_VID<2> - @m78_lib.M78
IMVP6_VID<3> - @m78_lib.M78
IMVP6_VID<4> - @m78_lib.M78
IMVP6_VID<5> - @m78_lib.M78
IMVP6_VID<6> - @m78_lib.M78
IMVP6_VO - @m78_lib.M78
IMVP6_VO1 - @m78_lib.M78
IMVP6_VO2 - @m78_lib.M78
IMVP6_VO3 - @m78_lib.M78
IMVP6_VO_R - @m78_lib.M78
IMVP6_VR_TT_L - @m78_lib.M78
IMVP6_VSEN_N - @m78_lib.M78
IMVP6_VSEN_P - @m78_lib.M78
IMVP6_VSUM - @m78_lib.M78
IMVP6_VSUM1 - @m78_lib.M78
IMVP6_VSUM2 - @m78_lib.M78
IMVP6_VSUM3 - @m78_lib.M78
IMVP6_VW - @m78_lib.M78
IMVP_DPRSLPVR - @m78_lib.M78
IMVP_PGD_IN - @m78_lib.M78
IMVP_VR_ON - @m78_lib.M78
INT_PIRQA_L - @m78_lib.M78
INT_PIRQB_L - @m78_lib.M78
INT_PIRQC_L - @m78_lib.M78
INT_PIRQD_L - @m78_lib.M78
INT_PIRQE_L - @m78_lib.M78
INT_PIRQF_L - @m78_lib.M78
INT_SERIRQ - @m78_lib.M78
INV_EN_BL_OR_PANEL_ID @m78_lib.M78
ISENSE_CAL_EN - @m78_lib.M78
ISENSE_CAL_EN_L - @m78_lib.M78
ISENSE_CAL_EN_LS12V - @m78_lib.M78
ISENSE_CAL_EN_L_R - @m78_lib.M78
ITP_CPURST_L - @m78_lib.M78
ITS_ALIVE - @m78_lib.M78
ITS_PLUGGED_IN - @m78_lib.M78
LAN_ENERGY_DET - @m78_lib.M78
TP_LAN_ENERGY_DET - @m78_lib.M78
LAN_PHYPC - @m78_lib.M78
LCD_PWM - @m78_lib.M78
LCD_PWREN_DIV - @m78_lib.M78
LCD_PWREN_L - @m78_lib.M78
LCD_PWREN_L_RC - @m78_lib.M78
LCD_SHOULD_ON - @m78_lib.M78
LED4300_1 - @m78_lib.M78
LED4301_1 - @m78_lib.M78
LED4302_1 - @m78_lib.M78
LED4303_1 - @m78_lib.M78
LINDACARD_GPIO - @m78_lib.M78
LPC_AD<0> - @m78_lib.M78
LPC_AD<1> - @m78_lib.M78
LPC_AD<2> - @m78_lib.M78
LPC_AD<3> - @m78_lib.M78
LPC_FRAME_L - @m78_lib.M78
LVDS_A_CLK_N - @m78_lib.M78
TP_LVDS_A_CLK_N - @m78_lib.M78
LVDS_A_CLK_P - @m78_lib.M78
TP_LVDS_A_CLK_P - @m78_lib.M78
LVDS_A_DATA_N<0> - @m78_lib.M78
LVDS_A_DATA_N<1> - @m78_lib.M78
LVDS_A_DATA_N<2> - @m78_lib.M78
LVDS_A_DATA_P<0> - @m78_lib.M78
LVDS_A_DATA_P<1> - @m78_lib.M78
LVDS_A_DATA_P<2> - @m78_lib.M78
LVDS_BKLT_CTL - @m78_lib.M78
TP_LVDS_BKLT_CTL - @m78_lib.M78
LVDS_BKLT_EN - @m78_lib.M78
TP_LVDS_BKLT_EN - @m78_lib.M78
LVDS_B_CLK_N - @m78_lib.M78
TP_LVDS_B_CLK_N - @m78_lib.M78
LVDS_B_CLK_P - @m78_lib.M78
TP_LVDS_B_CLK_P - @m78_lib.M78
LVDS_B_DATA_N<0> - @m78_lib.M78
LVDS_B_DATA_N<1> - @m78_lib.M78
LVDS_B_DATA_N<2> - @m78_lib.M78
LVDS_B_DATA_P<0> - @m78_lib.M78
LVDS_B_DATA_P<1> - @m78_lib.M78
LVDS_B_DATA_P<2> - @m78_lib.M78
LVDS_IBG - @m78_lib.M78
TP_LVDS_IBG - @m78_lib.M78
LVDS_L_CLK_N - @m78_lib.M78
LVDS_L_CLK_P - @m78_lib.M78
LVDS_L_DATA_N<0> - @m78_lib.M78
LVDS_L_DATA_N<3..0> - @m78_lib.M78
LVDS_L_DATA_N<1> - @m78_lib.M78
72A7 72C6
72A7 72C5
71A8 71B7
71B8
71A8 71B5
71A8 71B4
71A8 71B7
71A8 71C5 72C7
71A6 71C3
71A4 71B3
72A7 72C3
71A6 71C3 72C1
71A4 71C5
71C5 72A7 72B1
71A6 71D4
71A4 71C4
72A7 72C6
71C7
71C8
71A8 71B5
71A6 71D4 108D1
71A4 71C4 108D1
72A7 72C6 108D1
53C8 71C5
71A6 71D5
71A4 71C5
71C5 72A7 72C7
71A8 71B7
71A8 71C7
71A6 71D4
71A4 71C4
72A7 72C6
71A8 71B7
71B8
12C1 71C7
100A3
12C1 71C7
12C1 71C7
12C1 71C7
12C1 71C7
12C1 71C7
12C1 71C7
71A8 71B4 72C1
71A6 71D1
71A4 71B1
72A7 72C2
71B4
71C7
71A5 100A3
71A5 100A3
71A8 71C4 72B1
71A6 71C2
71A4 71B2
72A7 72C3
71A8 71B7
71C7 100B3
70B3
7C4 49C8 71C7
24A4 24A8 104C3
24A4 24A8 104C3
24A4 24A8 104C3
24A4 24A8 104C3
24A4 24A6 104C3
24A4 24A6 104C3
7D4 25C8 49C8 51B4
6D6 28B2 85A3
49B8 50A2 53A8
53B8
53B7
53B8
100A3
6A7
6A8
23C6 28A2
28A1
25A5 25C5
6D8 90B1
90C8
90B7
90C7
6A6
39A7
39A7
39A6
39A6
7C4 25A7 25D5 51B4
7D4 23D4 49C8 51C6
7A8 7C6 7D4 23D4 49C8
51C6
7D4 23D4 49C8 51C4
7D4 23D4 49C8 51C4
7D4 23D4 49C8 51B6
15C5 22D8
22D7
15C5 22D8
22D7
15C5 22D8
15C5 22C8
15C5 22C8
15C5 22C8
15C5 22C8
15C5 22C8
15D5 22D8
22D7
15D5 22D8
22D7
15C5 22D8
22D7
15C5 22D8
22D7
15C5 22C8
15C5 22C8
15C5 22C8
15C5 22C8
15C5 22C8
15C5 22C8
15D5 22D8
22D7
85B4 90A6 108C3
85B4 90A8 108C3
85A4 90A6
108C3
85B4 90A8
LVDS_L_DATA_N<2>
LVDS_L_DATA_N<3>
LVDS_L_DATA_P<0>
LVDS_L_DATA_P<3..0>
LVDS_L_DATA_P<1>
LVDS_L_DATA_P<2>
LVDS_L_DATA_P<3>
LVDS_U_CLK_N
LVDS_U_CLK_P
LVDS_U_DATA_N<0>
LVDS_U_DATA_N<3..0>
LVDS_U_DATA_N<1>
LVDS_U_DATA_N<2>
LVDS_U_DATA_N<3>
LVDS_U_DATA_P<0>
LVDS_U_DATA_P<3..0>
LVDS_U_DATA_P<1>
LVDS_U_DATA_P<2>
LVDS_U_DATA_P<3>
LVDS_VDD_EN
LVDS_L_DATA_N<2> - @m78_lib.M78
LVDS_L_DATA_N<3> - @m78_lib.M78
LVDS_L_DATA_P<0> - @m78_lib.M78
LVDS_L_DATA_P<3..0> - @m78_lib.M78
LVDS_L_DATA_P<1> - @m78_lib.M78
LVDS_L_DATA_P<2> - @m78_lib.M78
LVDS_L_DATA_P<3> - @m78_lib.M78
LVDS_U_CLK_N - @m78_lib.M78
LVDS_U_CLK_P - @m78_lib.M78
LVDS_U_DATA_N<0> - @m78_lib.M78
LVDS_U_DATA_N<3..0> - @m78_lib.M78
LVDS_U_DATA_N<1> - @m78_lib.M78
LVDS_U_DATA_N<2> - @m78_lib.M78
LVDS_U_DATA_N<3> - @m78_lib.M78
LVDS_U_DATA_P<0> - @m78_lib.M78
LVDS_U_DATA_P<3..0> - @m78_lib.M78
LVDS_U_DATA_P<1> - @m78_lib.M78
LVDS_U_DATA_P<2> - @m78_lib.M78
LVDS_U_DATA_P<3> - @m78_lib.M78
LVDS_VDD_EN - @m78_lib.M78
TP_LVDS_VDD_EN - @m78_lib.M78
LVDS_VREFH
LVDS_VREFH - @m78_lib.M78
TP_LVDS_VREFH - @m78_lib.M78
LVDS_VREFL
LVDS_VREFL - @m78_lib.M78
TP_LVDS_VREFL - @m78_lib.M78
MCH_CORES0_BOOT
MCH_CORES0_BOOT - @m78_lib.M78
MCH_CORES0_BOOT_R
MCH_CORES0_BOOT_R - @m78_lib.M78
MCH_CORES0_ISEN
MCH_CORES0_ISEN - @m78_lib.M78
MCH_CORES0_LGATE
MCH_CORES0_LGATE - @m78_lib.M78
MCH_CORES0_OCSET
MCH_CORES0_OCSET - @m78_lib.M78
MCH_CORES0_SNUBBER_R MCH_CORES0_SNUBBER_R - @m78_lib.M78
MCH_CORES0_SOFT
MCH_CORES0_SOFT - @m78_lib.M78
MCH_CORES0_SWITCHNOD MCH_CORES0_SWITCHNODE E
@m78_lib.M78
MCH_CORES0_UGATE
MCH_CORES0_UGATE - @m78_lib.M78
MCH_CORES0_VSEN
MCH_CORES0_VSEN - @m78_lib.M78
MEMVTT_VREF
MEMVTT_VREF - @m78_lib.M78
MEM_A_A<0>
MEM_A_A<0> - @m78_lib.M78
MEM_A_A<14..0>
MEM_A_A<14..0> - @m78_lib.M78
MEM_A_A<1>
MEM_A_A<1> - @m78_lib.M78
MEM_A_A<2>
MEM_A_A<2> - @m78_lib.M78
MEM_A_A<3>
MEM_A_A<3> - @m78_lib.M78
MEM_A_A<4>
MEM_A_A<4> - @m78_lib.M78
MEM_A_A<5>
MEM_A_A<5> - @m78_lib.M78
MEM_A_A<6>
MEM_A_A<6> - @m78_lib.M78
MEM_A_A<7>
MEM_A_A<7> - @m78_lib.M78
MEM_A_A<8>
MEM_A_A<8> - @m78_lib.M78
MEM_A_A<9>
MEM_A_A<9> - @m78_lib.M78
MEM_A_A<10>
MEM_A_A<10> - @m78_lib.M78
MEM_A_A<11>
MEM_A_A<11> - @m78_lib.M78
MEM_A_A<12>
MEM_A_A<12> - @m78_lib.M78
MEM_A_A<13>
MEM_A_A<13> - @m78_lib.M78
MEM_A_A<14>
MEM_A_A<14> - @m78_lib.M78
MEM_A_BS<0>
MEM_A_BS<0> - @m78_lib.M78
MEM_A_BS<2..0>
MEM_A_BS<2..0> - @m78_lib.M78
MEM_A_BS<1>
MEM_A_BS<1> - @m78_lib.M78
MEM_A_BS<2>
MEM_A_BS<2> - @m78_lib.M78
MEM_A_CAS_L
MEM_A_CAS_L - @m78_lib.M78
MEM_A_DM<0>
MEM_A_DM<0> - @m78_lib.M78
MEM_A_DM<1>
MEM_A_DM<1> - @m78_lib.M78
MEM_A_DM<2>
MEM_A_DM<2> - @m78_lib.M78
MEM_A_DM<3>
MEM_A_DM<3> - @m78_lib.M78
MEM_A_DM<4>
MEM_A_DM<4> - @m78_lib.M78
MEM_A_DM<5>
MEM_A_DM<5> - @m78_lib.M78
MEM_A_DM<6>
MEM_A_DM<6> - @m78_lib.M78
MEM_A_DM<7>
MEM_A_DM<7> - @m78_lib.M78
MEM_A_DQ<0>
MEM_A_DQ<0> - @m78_lib.M78
MEM_A_DQ<6..0>
MEM_A_DQ<6..0> - @m78_lib.M78
MEM_A_DQ<1>
MEM_A_DQ<1> - @m78_lib.M78
MEM_A_DQ<2>
MEM_A_DQ<2> - @m78_lib.M78
MEM_A_DQ<3>
MEM_A_DQ<3> - @m78_lib.M78
MEM_A_DQ<4>
MEM_A_DQ<4> - @m78_lib.M78
MEM_A_DQ<5>
MEM_A_DQ<5> - @m78_lib.M78
MEM_A_DQ<6>
MEM_A_DQ<6> - @m78_lib.M78
MEM_A_DQ<7>
MEM_A_DQ<7> - @m78_lib.M78
MEM_A_DQ<8>
MEM_A_DQ<8> - @m78_lib.M78
MEM_A_DQ<13..8>
MEM_A_DQ<13..8> - @m78_lib.M78
MEM_A_DQ<9>
MEM_A_DQ<9> - @m78_lib.M78
MEM_A_DQ<10>
MEM_A_DQ<10> - @m78_lib.M78
MEM_A_DQ<11>
MEM_A_DQ<11> - @m78_lib.M78
MEM_A_DQ<12>
MEM_A_DQ<12> - @m78_lib.M78
MEM_A_DQ<13>
MEM_A_DQ<13> - @m78_lib.M78
MEM_A_DQ<14>
MEM_A_DQ<14> - @m78_lib.M78
MEM_A_DQ<15>
MEM_A_DQ<15> - @m78_lib.M78
MEM_A_DQ<16>
MEM_A_DQ<16> - @m78_lib.M78
MEM_A_DQ<17>
MEM_A_DQ<17> - @m78_lib.M78
MEM_A_DQ<23..17>
MEM_A_DQ<23..17> - @m78_lib.M78
MEM_A_DQ<18>
MEM_A_DQ<18> - @m78_lib.M78
MEM_A_DQ<19>
MEM_A_DQ<19> - @m78_lib.M78
MEM_A_DQ<20>
MEM_A_DQ<20> - @m78_lib.M78
MEM_A_DQ<21>
MEM_A_DQ<21> - @m78_lib.M78
MEM_A_DQ<22>
MEM_A_DQ<22> - @m78_lib.M78
MEM_A_DQ<23>
MEM_A_DQ<23> - @m78_lib.M78
MEM_A_DQ<24>
MEM_A_DQ<24> - @m78_lib.M78
MEM_A_DQ<25>
MEM_A_DQ<25> - @m78_lib.M78
MEM_A_DQ<26>
MEM_A_DQ<26> - @m78_lib.M78
MEM_A_DQ<31..26>
MEM_A_DQ<31..26> - @m78_lib.M78
MEM_A_DQ<27>
MEM_A_DQ<27> - @m78_lib.M78
MEM_A_DQ<28>
MEM_A_DQ<28> - @m78_lib.M78
MEM_A_DQ<29>
MEM_A_DQ<29> - @m78_lib.M78
MEM_A_DQ<30>
MEM_A_DQ<30> - @m78_lib.M78
MEM_A_DQ<31>
MEM_A_DQ<31> - @m78_lib.M78
MEM_A_DQ<32>
MEM_A_DQ<32> - @m78_lib.M78
MEM_A_DQ<38..32>
MEM_A_DQ<38..32> - @m78_lib.M78
MEM_A_DQ<33>
MEM_A_DQ<33> - @m78_lib.M78
MEM_A_DQ<34>
MEM_A_DQ<34> - @m78_lib.M78
MEM_A_DQ<35>
MEM_A_DQ<35> - @m78_lib.M78
MEM_A_DQ<36>
MEM_A_DQ<36> - @m78_lib.M78
MEM_A_DQ<37>
MEM_A_DQ<37> - @m78_lib.M78
MEM_A_DQ<38>
MEM_A_DQ<38> - @m78_lib.M78
MEM_A_DQ<39>
MEM_A_DQ<39> - @m78_lib.M78
MEM_A_DQ<40>
MEM_A_DQ<40> - @m78_lib.M78
MEM_A_DQ<46..40>
MEM_A_DQ<46..40> - @m78_lib.M78
MEM_A_DQ<41>
MEM_A_DQ<41> - @m78_lib.M78
MEM_A_DQ<42>
MEM_A_DQ<42> - @m78_lib.M78
MEM_A_DQ<43>
MEM_A_DQ<43> - @m78_lib.M78
MEM_A_DQ<44>
MEM_A_DQ<44> - @m78_lib.M78
MEM_A_DQ<45>
MEM_A_DQ<45> - @m78_lib.M78
MEM_A_DQ<46>
MEM_A_DQ<46> - @m78_lib.M78
MEM_A_DQ<47>
MEM_A_DQ<47> - @m78_lib.M78
MEM_A_DQ<48>
MEM_A_DQ<48> - @m78_lib.M78
MEM_A_DQ<53..48>
MEM_A_DQ<53..48> - @m78_lib.M78
MEM_A_DQ<49>
MEM_A_DQ<49> - @m78_lib.M78
MEM_A_DQ<50>
MEM_A_DQ<50> - @m78_lib.M78
85B4 90A6
85B4 90A6
85A4 90A8
108C3
85B4 90A6
85B4 90A8
85B4 90A8
85B4 90A6 108C3
85B4 90A8 108C3
85B4 90A8
108C3
85B4 90A8
85B4 90A8
85B4 90A6
85B4 90A6
108C3
85B4 90A6
85B4 90A6
85B4 90A8
15D5 22D8
22D7
15D5 22D8
22D7
15D5 22D8
22D7
74C4
74C3
74C4
74C3
74B4
74C2
74C4
74C3 108D1
MEM_A_DQ<51>
MEM_A_DQ<52>
MEM_A_DQ<53>
MEM_A_DQ<54>
MEM_A_DQ<55>
MEM_A_DQ<56>
MEM_A_DQ<58..56>
MEM_A_DQ<57>
MEM_A_DQ<58>
MEM_A_DQ<59>
MEM_A_DQ<60>
MEM_A_DQ<63..60>
MEM_A_DQ<61>
MEM_A_DQ<62>
MEM_A_DQ<63>
MEM_A_DQS_N<0>
MEM_A_DQS_N<1>
MEM_A_DQS_N<2>
MEM_A_DQS_N<3>
MEM_A_DQS_N<4>
MEM_A_DQS_N<5>
MEM_A_DQS_N<6>
MEM_A_DQS_N<7>
MEM_A_DQS_P<0>
MEM_A_DQS_P<1>
MEM_A_DQS_P<2>
MEM_A_DQS_P<3>
MEM_A_DQS_P<4>
MEM_A_DQS_P<5>
MEM_A_DQS_P<6>
MEM_A_DQS_P<7>
MEM_A_RAS_L
MEM_A_SA<0>
MEM_A_SA<1>
MEM_A_WE_L
MEM_B_A<0>
MEM_B_A<14..0>
MEM_B_A<1>
MEM_B_A<2>
MEM_B_A<3>
MEM_B_A<4>
MEM_B_A<5>
MEM_B_A<6>
MEM_B_A<7>
MEM_B_A<8>
MEM_B_A<9>
MEM_B_A<10>
MEM_B_A<11>
MEM_B_A<12>
MEM_B_A<13>
MEM_B_A<14>
MEM_B_BS<0>
MEM_B_BS<2..0>
MEM_B_BS<1>
MEM_B_BS<2>
MEM_B_CAS_L
MEM_B_DM<0>
MEM_B_DM<1>
MEM_B_DM<2>
MEM_B_DM<3>
MEM_B_DM<4>
MEM_B_DM<5>
MEM_B_DM<6>
MEM_B_DM<7>
MEM_B_DQ<0>
MEM_B_DQ<5..0>
MEM_B_DQ<1>
MEM_B_DQ<2>
MEM_B_DQ<3>
MEM_B_DQ<4>
MEM_B_DQ<5>
MEM_B_DQ<6>
MEM_B_DQ<7>
MEM_B_DQ<8>
MEM_B_DQ<9>
MEM_B_DQ<15..9>
MEM_B_DQ<10>
MEM_B_DQ<11>
MEM_B_DQ<12>
MEM_B_DQ<13>
MEM_B_DQ<14>
MEM_B_DQ<15>
MEM_B_DQ<16>
MEM_B_DQ<22..16>
MEM_B_DQ<17>
MEM_B_DQ<18>
MEM_B_DQ<19>
MEM_B_DQ<20>
MEM_B_DQ<21>
MEM_B_DQ<22>
MEM_B_DQ<23>
MEM_B_DQ<24>
MEM_B_DQ<25>
MEM_B_DQ<26>
MEM_B_DQ<31..26>
MEM_B_DQ<27>
MEM_B_DQ<28>
MEM_B_DQ<29>
MEM_B_DQ<30>
MEM_B_DQ<31>
MEM_B_DQ<32>
MEM_B_DQ<37..32>
MEM_B_DQ<33>
MEM_B_DQ<34>
MEM_B_DQ<35>
MEM_B_DQ<36>
MEM_B_DQ<37>
MEM_B_DQ<38>
MEM_B_DQ<39>
MEM_B_DQ<40>
MEM_B_DQ<43..40>
MEM_B_DQ<41>
MEM_B_DQ<42>
MEM_B_DQ<43>
MEM_B_DQ<44>
MEM_B_DQ<45>
MEM_B_DQ<47..45>
MEM_B_DQ<46>
MEM_B_DQ<47>
MEM_B_DQ<48>
MEM_B_DQ<49>
MEM_B_DQ<55..49>
MEM_B_DQ<50>
MEM_B_DQ<51>
74C4
74B3
75A4
17C5 31B3 33C6
102D3
17C5 31B6 33C6
17B5 31B3 33C6
17B5 31B6 33C6
17B5 31C3 33C6
17B5 31C6 33C6
17B5 31C3 33C6
17B5 31C3 33C6
17B5 31C6 33C6
17B5 31C6 33C6
17B5 31B6 33C6
17B5 31C3 33C6
17B5 31C6 33C6
17B5 31B3 33C6
16C6 31C3 33C6
17D5 31B6 33B6
102D3
17D5 31B3 33B6
17D5 31C6 33B6
17D5 31B6 33B6 102D3
17D5 31D3 102C3
17D5 31D3 102C3
17C5 31C3 102C3
17C5 31C6 102C3
17C5 31B3 102C3
17C5 31B6 102C3
17C5 31A3 102C3
17C5 31A6 102C3
17D8 31D6
102D3
17D8 31D6
17D8 31D6
17D8 31D6
17D8 31D3
17D8 31D3
17D8 31D3
7C7 17D8 31D3 102D3
17C8 31D6
102D3
17C8 31D6
17C8 31D6
17C8 31D6
17C8 31D3
17C8 31D3
7C7 17C8 31D3 102D3
17C8 31D3 102C3
7B7 17C8 31D6 102C3
17C8 31D6
102C3
17C8 31C6
17C8 31C6
17C8 31D3
17C8 31D3
17C8 31C3
17C8 31C3
17C8 31C6 102C3
7B7 17C8 31C6 102C3
17C8 31C6
102C3
17C8 31C6
17C8 31C3
17C8 31C3
17C8 31C3
17C8 31C3
17C8 31B6
102C3
17C8 31B6
17B8 31B6
17B8 31B6
17B8 31B3
17B8 31B3
17B8 31B3
7B7 17B8 31B3 102C3
17B8 31B6
102C3
17B8 31B6
17B8 31A6
17B8 31A6
17B8 31B3
17B8 31B3
17B8 31A3
7B7 17B8 31A3 102C3
17B8 31A6
102C3
17B8 31A6
17B8 31A6
17B8 31A6
17B8 31A3
17B8 31A3
7B7 17B8 31A3 102C3
17B8 31A3 102C3
17B8 31A6
102C3
17B8 31A6
17B8 31A6
7B7 17B8 31A6 102C3
17A8 31A3
102C3
17A8 31A3
17A8 31A3
17A8 31A3
7B7 17C5 31D6 102B3
7B7 17C5 31D6 102B3
7B7 17C5 31C6 102B3
7B7 17C5 31C3 102B3
7B7 17C5 31B6 102B3
7B7 17C5 31B3 102B3
7B7 17C5 31A6 102B3
7B7 17C5 31A3 102B3
7B7 17C5 31D6 102B3
7B7 17C5 31D6 102B3
7B7 17C5 31C6 102B3
7B7 17C5 31C3 102B3
7B7 17C5 31B6 102B3
7B7 17C5 31B3 102B3
7B7 17C5 31A6 102B3
7B7 17C5 31A3 102B3
17B5 31B3 33B6 102D3
31A4
31A4
17B5 31B6 33B6 102D3
17C1 32B3 33B6
102D1
17C1 32B6 33B6
17B1 32B3 33B6
17B1 32B6 33B6
17B1 32C3 33B6
17B1 32C6 33B6
17B1 32C3 33B6
17B1 32C3 33B6
17B1 32C6 33B6
17B1 32C6 33B6
17B1 32B6 33B6
17B1 32C3 33A6
17B1 32C6 33A6
17B1 32B3 33A6
16C6 32C3 33A6
17D1 32B6 33A6
102D1
17D1 32B3 33A6
17D1 32C6 33A6
17D1 32B6 33A6 102D1
17D1 32D3 102C1
17D1 32D3 102C1
17C1 32C3 102C1
17C1 32C6 102C1
17C1 32B3 102C1
17C1 32B6 102C1
17C1 32A3 102C1
17C1 32A6 102C1
17D4 32D6
102D1
17D4 32D6
17D4 32D6
17D4 32D6
17D4 32D3
17D4 32D3
7B7 17D4 32D3 102D1
17D4 32D3 102D1
7B7 17C4 32D6 102D1
17C4 32D6
102D1
17C4 32D6
17C4 32D6
17C4 32D3
17C4 32D3
17C4 32D3
17C4 32D3
17C4 32D6
102D1
17C4 32D6
17C4 32C6
17C4 32C6
17C4 32D3
17C4 32D3
17C4 32C3
7B7 17C4 32C3 102D1
17C4 32C6 102C1
7B7 17C4 32C6 102C1
17C4 32C6
102C1
17C4 32C6
17C4 32C3
17C4 32C3
17C4 32C3
17C4 32C3
17C4 32B6
102C1
17C4 32B6
17B4 32B6
17B4 32B6
17B4 32B3
17B4 32B3
7A7 17B4 32B3 102C1
17B4 32B3 102C1
17B4 32B6
102C1
17B4 32B6
17B4 32A6
17B4 32A6
7A7 17B4 32B3 102C1
17B4 32B3
102C1
17B4 32A3
17B4 32A3
7A7 17B4 32A6 102C1
17B4 32A6
102C1
17B4 32A6
17B4 32A6
MEM_B_DQ<52>
MEM_B_DQ<53>
MEM_B_DQ<54>
MEM_B_DQ<55>
MEM_B_DQ<56>
MEM_B_DQ<61..56>
MEM_B_DQ<57>
MEM_B_DQ<58>
MEM_B_DQ<59>
MEM_B_DQ<60>
MEM_B_DQ<61>
MEM_B_DQ<62>
MEM_B_DQ<63>
MEM_B_DQS_N<0>
MEM_B_DQS_N<1>
MEM_B_DQS_N<2>
MEM_B_DQS_N<3>
MEM_B_DQS_N<4>
MEM_B_DQS_N<5>
MEM_B_DQS_N<6>
MEM_B_DQS_N<7>
MEM_B_DQS_P<0>
MEM_B_DQS_P<1>
MEM_B_DQS_P<2>
MEM_B_DQS_P<3>
MEM_B_DQS_P<4>
MEM_B_DQS_P<5>
MEM_B_DQS_P<6>
MEM_B_DQS_P<7>
MEM_B_RAS_L
MEM_B_SA<0>
MEM_B_SA<1>
MEM_B_WE_L
MEM_CKE<0>
MEM_CKE<1..0>
MEM_CKE<1>
MEM_CKE<3>
MEM_CKE<4..3>
MEM_CKE<4>
MEM_CLK_N<0>
MEM_CLK_N<1..0>
MEM_CLK_N<1>
MEM_CLK_N<3>
MEM_CLK_N<4..3>
MEM_CLK_N<4>
MEM_CLK_P<0>
MEM_CLK_P<1..0>
MEM_CLK_P<1>
MEM_CLK_P<3>
MEM_CLK_P<4..3>
MEM_CLK_P<4>
MEM_CS_L<0>
MEM_CS_L<1..0>
MEM_CS_L<1>
MEM_CS_L<2>
MEM_CS_L<3..2>
MEM_CS_L<3>
MEM_ODT<0>
MEM_ODT<1..0>
MEM_ODT<1>
MEM_ODT<2>
MEM_ODT<3..2>
MEM_ODT<3>
MEM_RCOMP
MEM_RCOMP_L
MEM_RCOMP_VOH
MEM_RCOMP_VOL
MINI_RESET_L
MXM_DETECT_L
MXM_PIN170
MXM_PWRSRC_SENSE
MXM_ROM_WP
MXM_SENSE_I_R
NB_BSEL<0>
NB_BSEL<1>
NB_BSEL<2>
NB_CFG<3>
NB_CFG<4>
NB_CFG<5>
NB_CFG<6>
NB_CFG<7>
NB_CFG<8>
NB_CFG<9>
NB_CFG<16>
NB_CFG<19>
NB_CFG<20>
NB_CLINK_VREF
NB_CLKREQ_L
NB_FSB_RCOMP
NB_FSB_SCOMP
NB_FSB_SCOMP_L
NB_FSB_SWING
NB_FSB_VREF
NB_RESET_L
NB_SB_SYNC_L
NB_TEST1
NB_TEST2
NB_VCCSM_LF1
NB_VCCSM_LF2
NB_VCCSM_LF3
NB_VCCSM_LF4
NB_VCCSM_LF5
NB_VCCSM_LF6
NB_VCCSM_LF7
NB_VTTLF_CAP1
NB_VTTLF_CAP2
NB_VTTLF_CAP3
NC_SMC_BATT_CHG_EN
MEM_B_DQ<52> - @m78_lib.M78
MEM_B_DQ<53> - @m78_lib.M78
MEM_B_DQ<54> - @m78_lib.M78
MEM_B_DQ<55> - @m78_lib.M78
MEM_B_DQ<56> - @m78_lib.M78
MEM_B_DQ<61..56> - @m78_lib.M78
MEM_B_DQ<57> - @m78_lib.M78
MEM_B_DQ<58> - @m78_lib.M78
MEM_B_DQ<59> - @m78_lib.M78
MEM_B_DQ<60> - @m78_lib.M78
MEM_B_DQ<61> - @m78_lib.M78
MEM_B_DQ<62> - @m78_lib.M78
MEM_B_DQ<63> - @m78_lib.M78
MEM_B_DQS_N<0> - @m78_lib.M78
MEM_B_DQS_N<1> - @m78_lib.M78
MEM_B_DQS_N<2> - @m78_lib.M78
MEM_B_DQS_N<3> - @m78_lib.M78
MEM_B_DQS_N<4> - @m78_lib.M78
MEM_B_DQS_N<5> - @m78_lib.M78
MEM_B_DQS_N<6> - @m78_lib.M78
MEM_B_DQS_N<7> - @m78_lib.M78
MEM_B_DQS_P<0> - @m78_lib.M78
MEM_B_DQS_P<1> - @m78_lib.M78
MEM_B_DQS_P<2> - @m78_lib.M78
MEM_B_DQS_P<3> - @m78_lib.M78
MEM_B_DQS_P<4> - @m78_lib.M78
MEM_B_DQS_P<5> - @m78_lib.M78
MEM_B_DQS_P<6> - @m78_lib.M78
MEM_B_DQS_P<7> - @m78_lib.M78
MEM_B_RAS_L - @m78_lib.M78
MEM_B_SA<0> - @m78_lib.M78
MEM_B_SA<1> - @m78_lib.M78
MEM_B_WE_L - @m78_lib.M78
MEM_CKE<0> - @m78_lib.M78
MEM_CKE<1..0> - @m78_lib.M78
MEM_CKE<1> - @m78_lib.M78
MEM_CKE<3> - @m78_lib.M78
MEM_CKE<4..3> - @m78_lib.M78
MEM_CKE<4> - @m78_lib.M78
MEM_CLK_N<0> - @m78_lib.M78
MEM_CLK_N<1..0> - @m78_lib.M78
MEM_CLK_N<1> - @m78_lib.M78
MEM_CLK_N<3> - @m78_lib.M78
MEM_CLK_N<4..3> - @m78_lib.M78
MEM_CLK_N<4> - @m78_lib.M78
MEM_CLK_P<0> - @m78_lib.M78
MEM_CLK_P<1..0> - @m78_lib.M78
MEM_CLK_P<1> - @m78_lib.M78
MEM_CLK_P<3> - @m78_lib.M78
MEM_CLK_P<4..3> - @m78_lib.M78
MEM_CLK_P<4> - @m78_lib.M78
MEM_CS_L<0> - @m78_lib.M78
MEM_CS_L<1..0> - @m78_lib.M78
MEM_CS_L<1> - @m78_lib.M78
MEM_CS_L<2> - @m78_lib.M78
MEM_CS_L<3..2> - @m78_lib.M78
MEM_CS_L<3> - @m78_lib.M78
MEM_ODT<0> - @m78_lib.M78
MEM_ODT<1..0> - @m78_lib.M78
MEM_ODT<1> - @m78_lib.M78
MEM_ODT<2> - @m78_lib.M78
MEM_ODT<3..2> - @m78_lib.M78
MEM_ODT<3> - @m78_lib.M78
MEM_RCOMP - @m78_lib.M78
MEM_RCOMP_L - @m78_lib.M78
MEM_RCOMP_VOH - @m78_lib.M78
MEM_RCOMP_VOL - @m78_lib.M78
MINI_RESET_L - @m78_lib.M78
MXM_DETECT_L - @m78_lib.M78
MXM_PIN170 - @m78_lib.M78
MXM_PWRSRC_SENSE - @m78_lib.M78
MXM_ROM_WP - @m78_lib.M78
MXM_SENSE_I_R - @m78_lib.M78
NB_BSEL<0> - @m78_lib.M78
NB_BSEL<1> - @m78_lib.M78
NB_BSEL<2> - @m78_lib.M78
NB_CFG<3> - @m78_lib.M78
NB_CFG<4> - @m78_lib.M78
NB_CFG<5> - @m78_lib.M78
NB_CFG<6> - @m78_lib.M78
NB_CFG<7> - @m78_lib.M78
NB_CFG<8> - @m78_lib.M78
NB_CFG<9> - @m78_lib.M78
NB_CFG<16> - @m78_lib.M78
NB_CFG<19> - @m78_lib.M78
NB_CFG<20> - @m78_lib.M78
NB_CLINK_VREF - @m78_lib.M78
NB_CLKREQ_L - @m78_lib.M78
NB_FSB_RCOMP - @m78_lib.M78
NB_FSB_SCOMP - @m78_lib.M78
NB_FSB_SCOMP_L - @m78_lib.M78
NB_FSB_SWING - @m78_lib.M78
NB_FSB_VREF - @m78_lib.M78
NB_RESET_L - @m78_lib.M78
NB_SB_SYNC_L - @m78_lib.M78
NB_TEST1 - @m78_lib.M78
NB_TEST2 - @m78_lib.M78
NB_VCCSM_LF1 - @m78_lib.M78
NB_VCCSM_LF2 - @m78_lib.M78
NB_VCCSM_LF3 - @m78_lib.M78
NB_VCCSM_LF4 - @m78_lib.M78
NB_VCCSM_LF5 - @m78_lib.M78
NB_VCCSM_LF6 - @m78_lib.M78
NB_VCCSM_LF7 - @m78_lib.M78
NB_VTTLF_CAP1 - @m78_lib.M78
NB_VTTLF_CAP2 - @m78_lib.M78
NB_VTTLF_CAP3 - @m78_lib.M78
NC_SMC_BATT_CHG_EN - @m78_lib.M78
SMC_BATT_CHG_EN - @m78_lib.M78
NC_SMC_BATT_ISET
NC_SMC_BATT_ISET - @m78_lib.M78
SMC_BATT_ISET - @m78_lib.M78
NC_SMC_BATT_TRICKLE_ NC_SMC_BATT_TRICKLE_EN_L EN_L
@m78_lib.M78
SMC_BATT_TRICKLE_EN_L @m78_lib.M78
NC_SMC_BATT_VSET
NC_SMC_BATT_VSET - @m78_lib.M78
SMC_BATT_VSET - @m78_lib.M78
NC_SMC_NB_1V8_ISENSE NC_SMC_NB_1V8_ISENSE - @m78_lib.M78
SMC_NB_1V8_ISENSE - @m78_lib.M78
NC_SMC_NB_CORE_ISENS NC_SMC_NB_CORE_ISENSE E
@m78_lib.M78
SMC_NB_CORE_ISENSE - @m78_lib.M78
NC_SMC_SYS_ISET
NC_SMC_SYS_ISET - @m78_lib.M78
SMC_SYS_ISET - @m78_lib.M78
17B4 32A3
17B4 32A3
17B4 32A3
17B4 32A3
17B4 32A6
102C1
17B4 32A6
17B4 32A6
17B4 32A6
17A4 32A3
17A4 32A3
7A7 17A4 32A3 102C1
17A4 32A3 102C1
7A7 17C1 32D6 102B1
7A7 17C1 32D6 102B1
7A7 17C1 32C6 102B1
7A7 17C1 32C3 102B1
7A7 17C1 32B6 102B1
7A7 17C1 32B3 102B1
7A7 17C1 32A6 102B1
7A7 17C1 32A3 102B1
7A7 17C1 32D6 102B1
7A7 17C1 32D6 102B1
7A7 17C1 32C6 102B1
7A7 17C1 32C3 102B1
7A7 17C1 32B6 102B1
7A7 17C1 32B3 102B1
7A7 17C1 32A6 102B1
7A7 17C1 32A3 102B1
17B1 32B3 33A6 102D1
32A4
32A4
17B1 32B6 33A6 102D1
16D3 31C6 33D6
102D3
16D3 31C3 33D6
16D3 32C6 33D6
102D1
16D3 32C3 33D6
16D3 31D3
102D3
16D3 31A3
16D3 32D3
102D1
16D3 32A3
16D3 31D3
102D3
16D3 31A3
16D3 32D3
102D1
16D3 32A3
16D3 31B3 33D6
102D3
16D3 31B6 33D6
16D3 32B3 33D6
102D1
16C3 32B6 33D6
16C3 31B3 33C6
102D3
16C3 31B6 33C6
16C3 32B3 33C6
102D1
16C3 32B6 33C6
16C4
16C4
16C4
16C4
28D1 34C3
85C4
85B5
53C3
85C3
53C3
13C6 16C6 30C8 100B3
13C6 16C6 30B8 100B3
13C3 16B6 30B8 100A3
13C3 16B6
13C6 16B6
13C6 16B6 16D7
13C6 16B6
13C6 16B6
13C3 16B6
16B6 16D7
16B6 16D7
7C3 16B6 16C7
16B6 16C7
16A4 104B3
16A3 29B3 30C2
14A5
14A5
14A5
14A5
14A5
7C7 16B6 28D1
16A3 25B5
16A4
16A4
18A6
18A6
18A6
18A6
18A6
18A6
18A6
19A4
19A4
19A4
50D3
49C8 50D5
50D3
49B5 50D5
50D3
y
r
a
n
i
m
il
e
r
MEM_A_DQ<51> - @m78_lib.M78
MEM_A_DQ<52> - @m78_lib.M78
MEM_A_DQ<53> - @m78_lib.M78
MEM_A_DQ<54> - @m78_lib.M78
MEM_A_DQ<55> - @m78_lib.M78
MEM_A_DQ<56> - @m78_lib.M78
MEM_A_DQ<58..56> - @m78_lib.M78
MEM_A_DQ<57> - @m78_lib.M78
MEM_A_DQ<58> - @m78_lib.M78
MEM_A_DQ<59> - @m78_lib.M78
MEM_A_DQ<60> - @m78_lib.M78
MEM_A_DQ<63..60> - @m78_lib.M78
MEM_A_DQ<61> - @m78_lib.M78
MEM_A_DQ<62> - @m78_lib.M78
MEM_A_DQ<63> - @m78_lib.M78
MEM_A_DQS_N<0> - @m78_lib.M78
MEM_A_DQS_N<1> - @m78_lib.M78
MEM_A_DQS_N<2> - @m78_lib.M78
MEM_A_DQS_N<3> - @m78_lib.M78
MEM_A_DQS_N<4> - @m78_lib.M78
MEM_A_DQS_N<5> - @m78_lib.M78
MEM_A_DQS_N<6> - @m78_lib.M78
MEM_A_DQS_N<7> - @m78_lib.M78
MEM_A_DQS_P<0> - @m78_lib.M78
MEM_A_DQS_P<1> - @m78_lib.M78
MEM_A_DQS_P<2> - @m78_lib.M78
MEM_A_DQS_P<3> - @m78_lib.M78
MEM_A_DQS_P<4> - @m78_lib.M78
MEM_A_DQS_P<5> - @m78_lib.M78
MEM_A_DQS_P<6> - @m78_lib.M78
MEM_A_DQS_P<7> - @m78_lib.M78
MEM_A_RAS_L - @m78_lib.M78
MEM_A_SA<0> - @m78_lib.M78
MEM_A_SA<1> - @m78_lib.M78
MEM_A_WE_L - @m78_lib.M78
MEM_B_A<0> - @m78_lib.M78
MEM_B_A<14..0> - @m78_lib.M78
MEM_B_A<1> - @m78_lib.M78
MEM_B_A<2> - @m78_lib.M78
MEM_B_A<3> - @m78_lib.M78
MEM_B_A<4> - @m78_lib.M78
MEM_B_A<5> - @m78_lib.M78
MEM_B_A<6> - @m78_lib.M78
MEM_B_A<7> - @m78_lib.M78
MEM_B_A<8> - @m78_lib.M78
MEM_B_A<9> - @m78_lib.M78
MEM_B_A<10> - @m78_lib.M78
MEM_B_A<11> - @m78_lib.M78
MEM_B_A<12> - @m78_lib.M78
MEM_B_A<13> - @m78_lib.M78
MEM_B_A<14> - @m78_lib.M78
MEM_B_BS<0> - @m78_lib.M78
MEM_B_BS<2..0> - @m78_lib.M78
MEM_B_BS<1> - @m78_lib.M78
MEM_B_BS<2> - @m78_lib.M78
MEM_B_CAS_L - @m78_lib.M78
MEM_B_DM<0> - @m78_lib.M78
MEM_B_DM<1> - @m78_lib.M78
MEM_B_DM<2> - @m78_lib.M78
MEM_B_DM<3> - @m78_lib.M78
MEM_B_DM<4> - @m78_lib.M78
MEM_B_DM<5> - @m78_lib.M78
MEM_B_DM<6> - @m78_lib.M78
MEM_B_DM<7> - @m78_lib.M78
MEM_B_DQ<0> - @m78_lib.M78
MEM_B_DQ<5..0> - @m78_lib.M78
MEM_B_DQ<1> - @m78_lib.M78
MEM_B_DQ<2> - @m78_lib.M78
MEM_B_DQ<3> - @m78_lib.M78
MEM_B_DQ<4> - @m78_lib.M78
MEM_B_DQ<5> - @m78_lib.M78
MEM_B_DQ<6> - @m78_lib.M78
MEM_B_DQ<7> - @m78_lib.M78
MEM_B_DQ<8> - @m78_lib.M78
MEM_B_DQ<9> - @m78_lib.M78
MEM_B_DQ<15..9> - @m78_lib.M78
MEM_B_DQ<10> - @m78_lib.M78
MEM_B_DQ<11> - @m78_lib.M78
MEM_B_DQ<12> - @m78_lib.M78
MEM_B_DQ<13> - @m78_lib.M78
MEM_B_DQ<14> - @m78_lib.M78
MEM_B_DQ<15> - @m78_lib.M78
MEM_B_DQ<16> - @m78_lib.M78
MEM_B_DQ<22..16> - @m78_lib.M78
MEM_B_DQ<17> - @m78_lib.M78
MEM_B_DQ<18> - @m78_lib.M78
MEM_B_DQ<19> - @m78_lib.M78
MEM_B_DQ<20> - @m78_lib.M78
MEM_B_DQ<21> - @m78_lib.M78
MEM_B_DQ<22> - @m78_lib.M78
MEM_B_DQ<23> - @m78_lib.M78
MEM_B_DQ<24> - @m78_lib.M78
MEM_B_DQ<25> - @m78_lib.M78
MEM_B_DQ<26> - @m78_lib.M78
MEM_B_DQ<31..26> - @m78_lib.M78
MEM_B_DQ<27> - @m78_lib.M78
MEM_B_DQ<28> - @m78_lib.M78
MEM_B_DQ<29> - @m78_lib.M78
MEM_B_DQ<30> - @m78_lib.M78
MEM_B_DQ<31> - @m78_lib.M78
MEM_B_DQ<32> - @m78_lib.M78
MEM_B_DQ<37..32> - @m78_lib.M78
MEM_B_DQ<33> - @m78_lib.M78
MEM_B_DQ<34> - @m78_lib.M78
MEM_B_DQ<35> - @m78_lib.M78
MEM_B_DQ<36> - @m78_lib.M78
MEM_B_DQ<37> - @m78_lib.M78
MEM_B_DQ<38> - @m78_lib.M78
MEM_B_DQ<39> - @m78_lib.M78
MEM_B_DQ<40> - @m78_lib.M78
MEM_B_DQ<43..40> - @m78_lib.M78
MEM_B_DQ<41> - @m78_lib.M78
MEM_B_DQ<42> - @m78_lib.M78
MEM_B_DQ<43> - @m78_lib.M78
MEM_B_DQ<44> - @m78_lib.M78
MEM_B_DQ<45> - @m78_lib.M78
MEM_B_DQ<47..45> - @m78_lib.M78
MEM_B_DQ<46> - @m78_lib.M78
MEM_B_DQ<47> - @m78_lib.M78
MEM_B_DQ<48> - @m78_lib.M78
MEM_B_DQ<49> - @m78_lib.M78
MEM_B_DQ<55..49> - @m78_lib.M78
MEM_B_DQ<50> - @m78_lib.M78
MEM_B_DQ<51> - @m78_lib.M78
49C8 50D5
50D3
49B5 50D5
50B3
49A8 50B5
50B3
49A8 50B5
50D3
49B5 50D5
112
8
NC_SMC_SYS_VSET
ODD_PWR_EN_L
ODD_RST_5VTOL_L
ODD_THRMD_N
ODD_THRMD_P
P1V8S0_EN_L
P1V8S0_EN_L_RC
P1V8S0_GDRV
P1V8S0_SS
P1V8S0_SS_RC
P2V5S0_EN
P2V5S0_SW
P2V5S0_VFB
P3V3S0_EN_L
P3V3S0_SS
P3V3S5_FB
P3V3S5_SW
P5VREG_FCB
P5VREG_FSEL
P5VS0_EN_L
P5VS0_SS
P5VS3_EN_L
P5VS3_SS
P5VS5_EN
P12V_S3_DRAIN
P12V_S3_EN_L
PANEL_ID
PCIE_ENET_D2R_C_N
PCIE_ENET_D2R_C_P
PCIE_ENET_D2R_N
PCIE_ENET_D2R_P
PCIE_ENET_R2D_C_N
PCIE_ENET_R2D_C_P
PCIE_ENET_R2D_N
PCIE_ENET_R2D_P
PCIE_FW_D2R_C_N
PCIE_FW_D2R_C_P
PCIE_FW_D2R_N
PCIE_FW_D2R_P
PCIE_FW_R2D_C_N
PCIE_FW_R2D_C_P
PCIE_FW_R2D_N
PCIE_FW_R2D_P
PCIE_MINI_D2R_N
PCIE_MINI_D2R_P
PCIE_MINI_R2D_C_N
PCIE_MINI_R2D_C_P
PCIE_MINI_R2D_N
PCIE_MINI_R2D_P
PCIE_WAKE_L
PCI_AD<0>
PCI_AD<18..0>
PCI_AD<1>
PCI_AD<2>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<20>
PCI_AD<21>
PCI_AD<31..21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
7
NC_SMC_SYS_VSET - @m78_lib.M78
SMC_SYS_VSET - @m78_lib.M78
ODD_PWR_EN_L - @m78_lib.M78
ODD_RST_5VTOL_L - @m78_lib.M78
ODD_THRMD_N - @m78_lib.M78
ODD_THRMD_P - @m78_lib.M78
P1V8S0_EN_L - @m78_lib.M78
P1V8S0_EN_L_RC - @m78_lib.M78
P1V8S0_GDRV - @m78_lib.M78
P1V8S0_SS - @m78_lib.M78
P1V8S0_SS_RC - @m78_lib.M78
P2V5S0_EN - @m78_lib.M78
P2V5S0_SW - @m78_lib.M78
P2V5S0_VFB - @m78_lib.M78
P3V3S0_EN_L - @m78_lib.M78
P3V3S0_SS - @m78_lib.M78
P3V3S5_FB - @m78_lib.M78
P3V3S5_SW - @m78_lib.M78
P5VREG_FCB - @m78_lib.M78
P5VREG_FSEL - @m78_lib.M78
P5VS0_EN_L - @m78_lib.M78
P5VS0_SS - @m78_lib.M78
P5VS3_EN_L - @m78_lib.M78
P5VS3_SS - @m78_lib.M78
P5VS5_EN - @m78_lib.M78
P12V_S3_DRAIN - @m78_lib.M78
P12V_S3_EN_L - @m78_lib.M78
PANEL_ID - @m78_lib.M78
TP_SB_GPIO20 - @m78_lib.M78
PCIE_ENET_D2R_C_N - @m78_lib.M78
PCIE_ENET_D2R_C_P - @m78_lib.M78
PCIE_ENET_D2R_N - @m78_lib.M78
PCIE_ENET_D2R_P - @m78_lib.M78
PCIE_ENET_R2D_C_N - @m78_lib.M78
PCIE_ENET_R2D_C_P - @m78_lib.M78
PCIE_ENET_R2D_N - @m78_lib.M78
PCIE_ENET_R2D_P - @m78_lib.M78
PCIE_FW_D2R_C_N - @m78_lib.M78
PCIE_FW_D2R_C_P - @m78_lib.M78
PCIE_FW_D2R_N - @m78_lib.M78
TP_PCIE_FW_D2R_N - @m78_lib.M78
PCIE_FW_D2R_P - @m78_lib.M78
TP_PCIE_FW_D2R_P - @m78_lib.M78
PCIE_FW_R2D_C_N - @m78_lib.M78
TP_PCIE_FW_R2D_C_N - @m78_lib.M78
PCIE_FW_R2D_C_P - @m78_lib.M78
TP_PCIE_FW_R2D_C_P - @m78_lib.M78
PCIE_FW_R2D_N - @m78_lib.M78
PCIE_FW_R2D_P - @m78_lib.M78
PCIE_MINI_D2R_N - @m78_lib.M78
PCIE_MINI_D2R_P - @m78_lib.M78
PCIE_MINI_R2D_C_N - @m78_lib.M78
PCIE_MINI_R2D_C_P - @m78_lib.M78
PCIE_MINI_R2D_N - @m78_lib.M78
PCIE_MINI_R2D_P - @m78_lib.M78
PCIE_WAKE_L - @m78_lib.M78
PCI_AD<0> - @m78_lib.M78
TP_PCI_AD_0 - @m78_lib.M78
PCI_AD<18..0> - @m78_lib.M78
TP_PCI_AD_18 - @m78_lib.M78
PCI_AD<1> - @m78_lib.M78
TP_PCI_AD_1 - @m78_lib.M78
PCI_AD<2> - @m78_lib.M78
TP_PCI_AD_2 - @m78_lib.M78
PCI_AD<3> - @m78_lib.M78
TP_PCI_AD_3 - @m78_lib.M78
PCI_AD<4> - @m78_lib.M78
TP_PCI_AD_4 - @m78_lib.M78
PCI_AD<5> - @m78_lib.M78
TP_PCI_AD_5 - @m78_lib.M78
PCI_AD<6> - @m78_lib.M78
TP_PCI_AD_6 - @m78_lib.M78
PCI_AD<7> - @m78_lib.M78
TP_PCI_AD_7 - @m78_lib.M78
PCI_AD<8> - @m78_lib.M78
TP_PCI_AD_8 - @m78_lib.M78
PCI_AD<9> - @m78_lib.M78
TP_PCI_AD_9 - @m78_lib.M78
PCI_AD<10> - @m78_lib.M78
TP_PCI_AD_10 - @m78_lib.M78
PCI_AD<11> - @m78_lib.M78
TP_PCI_AD_11 - @m78_lib.M78
PCI_AD<12> - @m78_lib.M78
TP_PCI_AD_12 - @m78_lib.M78
PCI_AD<13> - @m78_lib.M78
TP_PCI_AD_13 - @m78_lib.M78
PCI_AD<14> - @m78_lib.M78
TP_PCI_AD_14 - @m78_lib.M78
PCI_AD<15> - @m78_lib.M78
TP_PCI_AD_15 - @m78_lib.M78
PCI_AD<16> - @m78_lib.M78
TP_PCI_AD_16 - @m78_lib.M78
PCI_AD<17> - @m78_lib.M78
TP_PCI_AD_17 - @m78_lib.M78
PCI_AD<18> - @m78_lib.M78
TP_PCI_AD_18 - @m78_lib.M78
PCI_AD<19> - @m78_lib.M78
TP_PCI_AD_19 - @m78_lib.M78
PCI_AD<20> - @m78_lib.M78
TP_PCI_AD_20 - @m78_lib.M78
PCI_AD<21> - @m78_lib.M78
TP_PCI_AD_21 - @m78_lib.M78
PCI_AD<31..21> - @m78_lib.M78
TP_PCI_AD_31 - @m78_lib.M78
PCI_AD<22> - @m78_lib.M78
TP_PCI_AD_22 - @m78_lib.M78
PCI_AD<23> - @m78_lib.M78
TP_PCI_AD_23 - @m78_lib.M78
PCI_AD<24> - @m78_lib.M78
TP_PCI_AD_24 - @m78_lib.M78
PCI_AD<25> - @m78_lib.M78
TP_PCI_AD_25 - @m78_lib.M78
PCI_AD<26> - @m78_lib.M78
TP_PCI_AD_26 - @m78_lib.M78
PCI_AD<27> - @m78_lib.M78
TP_PCI_AD_27 - @m78_lib.M78
PCI_AD<28> - @m78_lib.M78
TP_PCI_AD_28 - @m78_lib.M78
PCI_AD<29> - @m78_lib.M78
TP_PCI_AD_29 - @m78_lib.M78
PCI_AD<30> - @m78_lib.M78
TP_PCI_AD_30 - @m78_lib.M78
PCI_AD<31> - @m78_lib.M78
TP_PCI_AD_31 - @m78_lib.M78
50D3
49B5 50D5
24A4 24A6
24B6 44C6 103D3
55A5 55B6 108A3
55B5 55B6 108A3
78A7
78A6
78B7
78B6
78B7
77B5
77B4 108D1
77B4
78C5
78C4
77D5
77D5 108D1
76A3 76B5
76A2 76B4
78D5
78D4
78D8
78D7
77D6
78C1
78D3
28B2
25C5 28B1
37C4 108C3
37C4 108C3
7B8 24C5 37C8 104C3
7B8 24C5 37C8 104C3
24C5 37C8 104C3
24C5 37C8 104C3
7D6 37C4 108C3
7D6 37C4 108C3
40C3 108C3
40C3 108C3
7B8 40C2 42A3 104C3
24D5 42A1
7B8 40C2 42A3 104C3
24D5 42A1
40C1 42A1 104C3
24D5 42A3
40C1 42A1 104C3
24D5 42A3
7D6 40C3 108C3
7D6 40C3 108C3
7B8 24D5 34C8 104C3
7B8 24C5 34C8 104C3
24C5 34B8 104C3
24C5 34B8 104C3
34B6 108C3
34B6 108B3
25C8 34C6 37B8
24B8 28C5
28C4
104D3
28B4
24B8 28C5
28C4
24B8 28C5
28C4
24B8 28C5
28C4
24B8 28C5
28C4
24B8 28C5
28C4
24B8 28C5
28C4
24B8 28C5
28C4
24B8 28C5
28C4
24B8 28C5
28C4
24A8 28C5
28C4
24A8 28C5
28C4
24A8 28C5
28C4
24A8 28C5
28C4
24A8 28C5
28C4
24A8 28C5
28C4
24A8 28C5
28C4
24A8 28C5
28C4
24A8 28B5
28B4
24A8 28B5 104D3
28B4
24A8 28B5 104D3
28B4
24A8 28B5
28B4
104D3
28B4
24A8 28B5
28B4
24A8 28B5
28B4
24A8 28B5
28B4
24A8 28B5
28B4
24A8 28B5
28B4
24A8 28B5
28B4
24A8 28B5
28B4
24A8 28B5
28B4
24A8 28B5
28B4
24A8 28B5
28B4
PCI_CLK33M_LPCPLUS
PCI_CLK33M_SB
PCI_CLK33M_SMC
PCI_CLK33M_TPM
PCI_C_BE_L<0>
PCI_C_BE_L<3..0>
PCI_C_BE_L<1>
PCI_C_BE_L<2>
PCI_C_BE_L<3>
PCI_DEVSEL_L
PCI_FRAME_L
PCI_FW_GNT_L
PCI_FW_REQ_L
PCI_GNT1_L
PCI_GNT2_L
PCI_IRDY_L
PCI_LOCK_L
PCI_PAR
PCI_PERR_L
PCI_PME_FW_L
PCI_REQ1_L
PCI_REQ2_L
PCI_RST_L
PCI_SERR_L
PCI_STOP_L
PCI_TRDY_L
PEG_COMP
PEG_D2R_N<0>
PEG_D2R_N<6..0>
PEG_D2R_N<1>
PEG_D2R_N<2>
PEG_D2R_N<3>
PEG_D2R_N<4>
PEG_D2R_N<5>
PEG_D2R_N<6>
PEG_D2R_N<7>
PEG_D2R_N<8>
PEG_D2R_N<15..8>
PEG_D2R_N<9>
PEG_D2R_N<10>
PEG_D2R_N<11>
PEG_D2R_N<12>
PEG_D2R_N<13>
PEG_D2R_N<14>
PEG_D2R_N<15>
PEG_D2R_P<0>
PEG_D2R_P<6..0>
PEG_D2R_P<1>
PEG_D2R_P<2>
PEG_D2R_P<3>
PEG_D2R_P<4>
PEG_D2R_P<5>
PEG_D2R_P<6>
PEG_D2R_P<7>
PEG_D2R_P<8>
PEG_D2R_P<15..8>
PEG_D2R_P<9>
PEG_D2R_P<10>
PEG_D2R_P<11>
PEG_D2R_P<12>
PEG_D2R_P<13>
PEG_D2R_P<14>
PEG_D2R_P<15>
PEG_R2D_C_N<0>
PEG_R2D_C_N<15..0>
PEG_R2D_C_N<1>
PEG_R2D_C_N<2>
PEG_R2D_C_N<3>
PEG_R2D_C_N<4>
PEG_R2D_C_N<5>
PEG_R2D_C_N<6>
PEG_R2D_C_N<7>
PEG_R2D_C_N<8>
PEG_R2D_C_N<9>
PEG_R2D_C_N<10>
PEG_R2D_C_N<11>
PEG_R2D_C_N<12>
PEG_R2D_C_N<13>
PEG_R2D_C_N<14>
PEG_R2D_C_N<15>
PEG_R2D_C_P<0>
PEG_R2D_C_P<15..0>
PEG_R2D_C_P<1>
PEG_R2D_C_P<2>
PEG_R2D_C_P<3>
PEG_R2D_C_P<4>
PEG_R2D_C_P<5>
PEG_R2D_C_P<6>
PEG_R2D_C_P<7>
PEG_R2D_C_P<8>
PEG_R2D_C_P<9>
PEG_R2D_C_P<10>
PEG_R2D_C_P<11>
PEG_R2D_C_P<12>
PEG_R2D_C_P<13>
PEG_R2D_C_P<14>
PEG_R2D_C_P<15>
PEG_R2D_N<0>
PEG_R2D_N<15..0>
PEG_R2D_N<1>
PEG_R2D_N<2>
PEG_R2D_N<3>
PEG_R2D_N<4>
PEG_R2D_N<5>
PEG_R2D_N<6>
PEG_R2D_N<7>
PEG_R2D_N<8>
PEG_R2D_N<9>
PEG_R2D_N<10>
PEG_R2D_N<11>
PEG_R2D_N<12>
PEG_R2D_N<13>
PEG_R2D_N<14>
PEG_R2D_N<15>
PEG_R2D_P<0>
PEG_R2D_P<15..0>
PCI_CLK33M_LPCPLUS - @m78_lib.M78
PCI_CLK33M_SB - @m78_lib.M78
PCI_CLK33M_SMC - @m78_lib.M78
PCI_CLK33M_TPM - @m78_lib.M78
PCI_C_BE_L<0> - @m78_lib.M78
TP_PCI_C_BE_L_0 - @m78_lib.M78
PCI_C_BE_L<3..0> - @m78_lib.M78
TP_PCI_C_BE_L_3 - @m78_lib.M78
PCI_C_BE_L<1> - @m78_lib.M78
TP_PCI_C_BE_L_1 - @m78_lib.M78
PCI_C_BE_L<2> - @m78_lib.M78
TP_PCI_C_BE_L_2 - @m78_lib.M78
PCI_C_BE_L<3> - @m78_lib.M78
TP_PCI_C_BE_L_3 - @m78_lib.M78
PCI_DEVSEL_L - @m78_lib.M78
PCI_FRAME_L - @m78_lib.M78
PCI_FW_GNT_L - @m78_lib.M78
BOOT_LPC_SPI_L - @m78_lib.M78
PCI_FW_REQ_L - @m78_lib.M78
PCI_GNT1_L - @m78_lib.M78
PCI_GNT2_L - @m78_lib.M78
PCI_IRDY_L - @m78_lib.M78
PCI_LOCK_L - @m78_lib.M78
PCI_PAR - @m78_lib.M78
TP_PCI_PAR - @m78_lib.M78
PCI_PERR_L - @m78_lib.M78
PCI_PME_FW_L - @m78_lib.M78
PCI_REQ1_L - @m78_lib.M78
PCI_REQ2_L - @m78_lib.M78
PCI_RST_L - @m78_lib.M78
TP_PCI_RST_L - @m78_lib.M78
PCI_SERR_L - @m78_lib.M78
PCI_STOP_L - @m78_lib.M78
PCI_TRDY_L - @m78_lib.M78
PEG_COMP - @m78_lib.M78
PEG_D2R_N<0> - @m78_lib.M78
PEG_D2R_N<6..0> - @m78_lib.M78
PEG_D2R_N<1> - @m78_lib.M78
PEG_D2R_N<2> - @m78_lib.M78
PEG_D2R_N<3> - @m78_lib.M78
PEG_D2R_N<4> - @m78_lib.M78
PEG_D2R_N<5> - @m78_lib.M78
PEG_D2R_N<6> - @m78_lib.M78
PEG_D2R_N<7> - @m78_lib.M78
PEG_D2R_N<8> - @m78_lib.M78
PEG_D2R_N<15..8> - @m78_lib.M78
PEG_D2R_N<9> - @m78_lib.M78
PEG_D2R_N<10> - @m78_lib.M78
PEG_D2R_N<11> - @m78_lib.M78
PEG_D2R_N<12> - @m78_lib.M78
PEG_D2R_N<13> - @m78_lib.M78
PEG_D2R_N<14> - @m78_lib.M78
PEG_D2R_N<15> - @m78_lib.M78
PEG_D2R_P<0> - @m78_lib.M78
PEG_D2R_P<6..0> - @m78_lib.M78
PEG_D2R_P<1> - @m78_lib.M78
PEG_D2R_P<2> - @m78_lib.M78
PEG_D2R_P<3> - @m78_lib.M78
PEG_D2R_P<4> - @m78_lib.M78
PEG_D2R_P<5> - @m78_lib.M78
PEG_D2R_P<6> - @m78_lib.M78
PEG_D2R_P<7> - @m78_lib.M78
PEG_D2R_P<8> - @m78_lib.M78
PEG_D2R_P<15..8> - @m78_lib.M78
PEG_D2R_P<9> - @m78_lib.M78
PEG_D2R_P<10> - @m78_lib.M78
PEG_D2R_P<11> - @m78_lib.M78
PEG_D2R_P<12> - @m78_lib.M78
PEG_D2R_P<13> - @m78_lib.M78
PEG_D2R_P<14> - @m78_lib.M78
PEG_D2R_P<15> - @m78_lib.M78
PEG_R2D_C_N<0> - @m78_lib.M78
PEG_R2D_C_N<15..0> - @m78_lib.M78
PEG_R2D_C_N<1> - @m78_lib.M78
PEG_R2D_C_N<2> - @m78_lib.M78
PEG_R2D_C_N<3> - @m78_lib.M78
PEG_R2D_C_N<4> - @m78_lib.M78
PEG_R2D_C_N<5> - @m78_lib.M78
PEG_R2D_C_N<6> - @m78_lib.M78
PEG_R2D_C_N<7> - @m78_lib.M78
PEG_R2D_C_N<8> - @m78_lib.M78
PEG_R2D_C_N<9> - @m78_lib.M78
PEG_R2D_C_N<10> - @m78_lib.M78
PEG_R2D_C_N<11> - @m78_lib.M78
PEG_R2D_C_N<12> - @m78_lib.M78
PEG_R2D_C_N<13> - @m78_lib.M78
PEG_R2D_C_N<14> - @m78_lib.M78
PEG_R2D_C_N<15> - @m78_lib.M78
PEG_R2D_C_P<0> - @m78_lib.M78
PEG_R2D_C_P<15..0> - @m78_lib.M78
PEG_R2D_C_P<1> - @m78_lib.M78
PEG_R2D_C_P<2> - @m78_lib.M78
PEG_R2D_C_P<3> - @m78_lib.M78
PEG_R2D_C_P<4> - @m78_lib.M78
PEG_R2D_C_P<5> - @m78_lib.M78
PEG_R2D_C_P<6> - @m78_lib.M78
PEG_R2D_C_P<7> - @m78_lib.M78
PEG_R2D_C_P<8> - @m78_lib.M78
PEG_R2D_C_P<9> - @m78_lib.M78
PEG_R2D_C_P<10> - @m78_lib.M78
PEG_R2D_C_P<11> - @m78_lib.M78
PEG_R2D_C_P<12> - @m78_lib.M78
PEG_R2D_C_P<13> - @m78_lib.M78
PEG_R2D_C_P<14> - @m78_lib.M78
PEG_R2D_C_P<15> - @m78_lib.M78
PEG_R2D_N<0> - @m78_lib.M78
PEG_R2D_N<15..0> - @m78_lib.M78
PEG_R2D_N<1> - @m78_lib.M78
PEG_R2D_N<2> - @m78_lib.M78
PEG_R2D_N<3> - @m78_lib.M78
PEG_R2D_N<4> - @m78_lib.M78
PEG_R2D_N<5> - @m78_lib.M78
PEG_R2D_N<6> - @m78_lib.M78
PEG_R2D_N<7> - @m78_lib.M78
PEG_R2D_N<8> - @m78_lib.M78
PEG_R2D_N<9> - @m78_lib.M78
PEG_R2D_N<10> - @m78_lib.M78
PEG_R2D_N<11> - @m78_lib.M78
PEG_R2D_N<12> - @m78_lib.M78
PEG_R2D_N<13> - @m78_lib.M78
PEG_R2D_N<14> - @m78_lib.M78
PEG_R2D_N<15> - @m78_lib.M78
PEG_R2D_P<0> - @m78_lib.M78
PEG_R2D_P<15..0> - @m78_lib.M78
PEG_R2D_P<1>
PEG_R2D_P<2>
PEG_R2D_P<3>
PEG_R2D_P<4>
PEG_R2D_P<5>
PEG_R2D_P<6>
PEG_R2D_P<7>
PEG_R2D_P<8>
PEG_R2D_P<9>
PEG_R2D_P<10>
PEG_R2D_P<11>
PEG_R2D_P<12>
PEG_R2D_P<13>
PEG_R2D_P<14>
PEG_R2D_P<15>
PEG_RESET_L
PGOOD_0V9_S0
PGOOD_1V05_S0
PGOOD_1V5_S0
PGOOD_1V8_S0
PGOOD_1V8_S3
PGOOD_1V25_S0
PGOOD_2V5_S0
PGOOD_3V3_S0
PGOOD_3V3_S3
PGOOD_3V3_S5
PM_S4_STATE_L_SMC
PM_SLP_S3_L
PM_S4_STATE_L_SMC - @m78_lib.M78
PM_SLP_S3_L - @m78_lib.M78
PM_SLP_S3_L_SMC
PM_SLP_S3_OD
PM_SLP_S5_L
PM_STPCPU_L
PM_STPPCI_L
PM_SUS_STAT_L
PM_SLP_S3_L_SMC - @m78_lib.M78
PM_SLP_S3_OD - @m78_lib.M78
PM_SLP_S5_L - @m78_lib.M78
PM_STPCPU_L - @m78_lib.M78
PM_STPPCI_L - @m78_lib.M78
PM_SUS_STAT_L - @m78_lib.M78
PM_SYSRST_L
PM_THRMTRIP_L
PM_THRM_L
POWER_BUTTON_L
PP1V0_S5_FW_AVDD
PP1V0_S5_FW_DVDD
PP1V05_S0_NB_VCCPEG
PM_SYSRST_L - @m78_lib.M78
PM_THRMTRIP_L - @m78_lib.M78
PM_THRM_L - @m78_lib.M78
POWER_BUTTON_L - @m78_lib.M78
PP1V0_S5_FW_AVDD - @m78_lib.M78
PP1V0_S5_FW_DVDD - @m78_lib.M78
PP1V05_S0_NB_VCCPEG - @m78_lib.M78
PP1V05_S0_NB_VCCRXRDMI @m78_lib.M78
PP1V5_S0_NB_VCCD_TVDAC @m78_lib.M78
PP1V5_S0_SB_VCCDMIPLL @m78_lib.M78
PP1V5_S0_SB_VCCDMIPLL_F @m78_lib.M78
PP1V5_S0_SB_VCCSATAPLL @m78_lib.M78
PP1V5_S0_SB_VCCSATAPLL_F @m78_lib.M78
PP1V8_S3M_NB_VCCSMCK - @m78_lib.M78
PP1V8_S3M_NB_VCCSMCK_RC @m78_lib.M78
PP1V8_S3_R - @m78_lib.M78
PP1V9R2V5_ENET_PHY_AVDD @m78_lib.M78
PP1V9R2V5_S3_ENET_R - @m78_lib.M78
=YUKON_EC_PP2V5_ENET - @m78_lib.M78
PP1V25_S0M_NB_MPLL_RC @m78_lib.M78
PP1V25_S0M_NB_VCCAXD - @m78_lib.M78
PP1V25_S0M_NB_VCCA_HPLL @m78_lib.M78
PP1V25_S0M_NB_VCCA_MPLL @m78_lib.M78
PP1V25_S0M_NB_VCCA_SM @m78_lib.M78
PP1V25_S0M_NB_VCCA_SM_CK @m78_lib.M78
PP1V25_S0_NB_PEGPLL - @m78_lib.M78
PP1V25_S0_NB_PEGPLL_RC @m78_lib.M78
PP1V25_S0_NB_VCCAXF - @m78_lib.M78
PP2V5_ENET_CTAP - @m78_lib.M78
PP3V3_FW_ESD - @m78_lib.M78
PP3V3_G3_SB_RTC - @m78_lib.M78
PP3V3_S0M_CK505_VDD48 @m78_lib.M78
PP3V3_S0M_CK505_VDDA - @m78_lib.M78
PP3V3_S0M_CK505_VDDA_R @m78_lib.M78
PP3V3_S0M_CK505_VDD_CPU_SRC @m78_lib.M78
PP3V3_S0M_CK505_VDD_PCI @m78_lib.M78
PP3V3_S0M_CK505_VDD_REF @m78_lib.M78
PP3V3_S0_CPUTHMSNS_R - @m78_lib.M78
PP3V3_S0_IMVP6_3V3 - @m78_lib.M78
PP3V3_S0_NB1V05_FOLLOW_R @m78_lib.M78
PP3V3_S0_NBCORE_FOLLOW_R @m78_lib.M78
PP3V3_S3_ENET_O - @m78_lib.M78
PP3V3_S5_AVREF_SMC - @m78_lib.M78
PP3V3_S5_FW_AVDD1 - @m78_lib.M78
PP3V3_S5_FW_AVDD2 - @m78_lib.M78
PP1V25_S0M_NB_MPLL_R
C
PP1V25_S0M_NB_VCCAXD
PP1V25_S0M_NB_VCCA_H
PLL
PP1V25_S0M_NB_VCCA_M
PLL
PP1V25_S0M_NB_VCCA_S
M
PP1V25_S0M_NB_VCCA_S
M_CK
PP1V25_S0_NB_PEGPLL
PP1V25_S0_NB_PEGPLL_
RC
PP1V25_S0_NB_VCCAXF
PP2V5_ENET_CTAP
PP3V3_FW_ESD
PP3V3_G3_SB_RTC
PP3V3_S0M_CK505_VDD4
8
PP3V3_S0M_CK505_VDDA
PP3V3_S0M_CK505_VDDA
_R
PP3V3_S0M_CK505_VDD_
CPU_SRC
PP3V3_S0M_CK505_VDD_
PCI
PP3V3_S0M_CK505_VDD_
REF
PP3V3_S0_CPUTHMSNS_R
PP3V3_S0_IMVP6_3V3
PP3V3_S0_NB1V05_FOLL
OW_R
PP3V3_S0_NBCORE_FOLL
OW_R
PP3V3_S3_ENET_O
PP3V3_S5_AVREF_SMC
PP3V3_S5_FW_AVDD1
PP3V3_S5_FW_AVDD2
84A7
84A7
84A7
84A7
84B7
84B7
84B7
84B7
84B7
84B7
84B7
84B7
84B7
84C7
84C7
28C1 85C7
70C4 70C4
70B4 73B3
70B4 73B5
70C4 70D4
70D4 75C8
70B4 74B5
70C4 77B7
70C8 70D4 77B7
70D4 76B4
70B4 77D4
49D8 70B2
70C4 70C4
76A6
70B8 76D5
70C7
70B4 74B3
70C3
24A6 28D4
25A5 25C3 49B8
16B6 25D5
7B8 7D4 25C8 49C5 51B6
16A6 25C3 71C8 100B3
16B7 31C3 49B8
16B7 32C3 49B8
25C2 49D8
13C3 24C8
25C3 49C8
25A5 25D5
25C2 49C8
78C2
7C4 7D3 25D3 46C8 49C4
75D8 78C3 78D8
49C6
6D8 7C4 25D3 49C4 70A8
75A5 78A8 78C6 78D6
49C6
6D7
25D3 49C5 50A2
25C8 29C3 30C2
25C8 29C3 30C2
7C4 7D4 25D5 49C5 50A2
51B4
7B8 25D5 28A3 49B8
10C6 16A6 23C2 50C3 100B3
25C5
50C7
40D3 42A6 42D4
40D6 42B8 42C4
15D2 19B3 21D3
19B3 21C3
PP3V3_S5_SMC_AVCC
PP5VREG_INTVCC
PP5V_S0_DDC
PP5V_S0_DDC_DIODE
PP5V_S0_DDC_FUSE
PP5V_S0_IMVP6_VDD
PP5V_S0_SB_V5REF
PP5V_S3_BNDI
PP5V_S5_SB_V5REF_SUS
PP5V_USB2_PORT0
PP5V_USB2_PORT0_F
PP5V_USB2_PORT1
PP5V_USB2_PORT1_F
PP5V_USB2_PORT2
PP5V_USB2_PORT2_F
PP12V_S3
PP3V3_S5_SMC_AVCC - @m78_lib.M78
PP5VREG_INTVCC - @m78_lib.M78
PP5V_S0_DDC - @m78_lib.M78
PP5V_S0_DDC_DIODE - @m78_lib.M78
PP5V_S0_DDC_FUSE - @m78_lib.M78
PP5V_S0_IMVP6_VDD - @m78_lib.M78
PP5V_S0_SB_V5REF - @m78_lib.M78
PP5V_S3_BNDI - @m78_lib.M78
PP5V_S5_SB_V5REF_SUS - @m78_lib.M78
PP5V_USB2_PORT0 - @m78_lib.M78
PP5V_USB2_PORT0_F - @m78_lib.M78
PP5V_USB2_PORT1 - @m78_lib.M78
PP5V_USB2_PORT1_F - @m78_lib.M78
PP5V_USB2_PORT2 - @m78_lib.M78
PP5V_USB2_PORT2_F - @m78_lib.M78
PP12V_S3 - @m78_lib.M78
49D3
76A2 76A6 76C3 76C6
94D3 94D4
94D6
94D5
71D7
26D6 27C7
47B5 47D5
26D6 27D7
46B7
46B5
46C6
46C5
46D6
46D2
7C5 7D3 50B7 75D8 76D8
78D1
PPVBATT_G3_RTC
PPVBATT_G3_RTC - @m78_lib.M78
28D8
PPVBATT_G3_RTC_R
PPVBATT_G3_RTC_R - @m78_lib.M78
28D7
PPVIN_S0_P2V5S0_SVIN PPVIN_S0_P2V5S0_SVIN - @m78_lib.M78 77C5
PPVIN_S5_5VS5_R
PPVIN_S5_5VS5_R - @m78_lib.M78
76C5
PPVIN_S5_IMVP6_VIN
PPVIN_S5_IMVP6_VIN - @m78_lib.M78
71D7
PPV_LCD_CONN
PPV_LCD_CONN - @m78_lib.M78
6A7 90A6 90A8 90C5
PPV_LCD_SW
PPV_LCD_SW - @m78_lib.M78
90C6
PPV_S0_LCD
PPV_S0_LCD - @m78_lib.M78
90C8
PPV_S0_MXM_PWRSRC
PPV_S0_MXM_PWRSRC - @m78_lib.M78
53C2 53D4 84C4
PPV_S3_ENET_O
PPV_S3_ENET_O - @m78_lib.M78
38B5
PPV_S3_ENET_R
PPV_S3_ENET_R - @m78_lib.M78
38B7
REMOTE_TEMP_ADDR
REMOTE_TEMP_ADDR - @m78_lib.M78
55A3
REMOTE_THRMD_M
REMOTE_THRMD_M - @m78_lib.M78
55A4
RSVD_EXTGPU_LVDS_EN RSVD_EXTGPU_LVDS_EN - @m78_lib.M78 25D2
RSVD_MINI_BT_ACTIVE RSVD_MINI_BT_ACTIVE - @m78_lib.M78 34C6
RSVD_MINI_WLAN_ACTIV RSVD_MINI_WLAN_ACTIVE 34C6
E
@m78_lib.M78
RUNSS_GATE_D_L
RUNSS_GATE_D_L - @m78_lib.M78
70A7 70B7 70B7
SATA_A_D2R_C_N
SATA_A_D2R_C_N - @m78_lib.M78
45D7 103C3
SATA_A_D2R_C_P
SATA_A_D2R_C_P - @m78_lib.M78
45C7 103C3
SATA_A_D2R_N
SATA_A_D2R_N - @m78_lib.M78
7B8 23B6 45C5 103C3
SATA_A_D2R_P
SATA_A_D2R_P - @m78_lib.M78
7B8 23B6 45C5 103D3
SATA_A_R2D_C_N
SATA_A_R2D_C_N - @m78_lib.M78
23B6 45D5 103D3
SATA_A_R2D_C_P
SATA_A_R2D_C_P - @m78_lib.M78
23B6 45D5 103D3
SATA_A_R2D_N
SATA_A_R2D_N - @m78_lib.M78
45D7 103D3
SATA_A_R2D_P
SATA_A_R2D_P - @m78_lib.M78
45D7 103D3
SATA_B_D2R_N
SATA_B_D2R_N - @m78_lib.M78
23B6 45B7 103C3
TP_SATA_B_D2R_N - @m78_lib.M78
45B5
SATA_B_D2R_P
SATA_B_D2R_P - @m78_lib.M78
23B6 45B7 103C3
TP_SATA_B_D2R_P - @m78_lib.M78
45B5
SATA_B_DET_L
SATA_B_DET_L - @m78_lib.M78
25D3
SATA_B_PWR_EN_L
SATA_B_PWR_EN_L - @m78_lib.M78
25B5 25C5
SATA_B_R2D_C_N
SATA_B_R2D_C_N - @m78_lib.M78
23B6 45B5 103C3
TP_SATA_B_R2D_N - @m78_lib.M78
45B7
SATA_B_R2D_C_P
SATA_B_R2D_C_P - @m78_lib.M78
23B6 45B5 103C3
TP_SATA_B_R2D_P - @m78_lib.M78
45B7
SATA_C_D2R_N
SATA_C_D2R_N - @m78_lib.M78
23B6 45B7
TP_SATA_C_D2R_N - @m78_lib.M78
45B5
SATA_C_D2R_P
SATA_C_D2R_P - @m78_lib.M78
23B6 45B7
TP_SATA_C_D2R_P - @m78_lib.M78
45B5
SATA_C_R2D_C_N
SATA_C_R2D_C_N - @m78_lib.M78
23B6 45B5
TP_SATA_C_R2D_N - @m78_lib.M78
45B7
SATA_C_R2D_C_P
SATA_C_R2D_C_P - @m78_lib.M78
23B6 45B5
TP_SATA_C_R2D_P - @m78_lib.M78
45B7
SATA_RBIAS
SATA_RBIAS - @m78_lib.M78
45B2 103C3
SATA_RBIAS_N - @m78_lib.M78
23B6 45B2
SATA_RBIAS_P - @m78_lib.M78
23A6 45B2
SATA_RBIAS_N - @m78_lib.M78
23B6 45B2
SB_A20GATE
SB_A20GATE - @m78_lib.M78
23C4
SB_CLINK_VREF0
SB_CLINK_VREF0 - @m78_lib.M78
25C3 104B3
SB_CLINK_VREF1
SB_CLINK_VREF1 - @m78_lib.M78
25C3 104B3
SB_CLK14P3M_TIMER
SB_CLK14P3M_TIMER - @m78_lib.M78
7B8 25D3 30A6 105B3
SB_CLK48M_USBCTLR
SB_CLK48M_USBCTLR - @m78_lib.M78
7B8 25D3 30C6 105B3
SB_CRT_TVOUT_MUX_L
SB_CRT_TVOUT_MUX_L - @m78_lib.M78
25D2 91A7
SB_GPIO10_CL1
SB_GPIO10_CL1 - @m78_lib.M78
25A5 25B3
SB_GPIO14_CL2
SB_GPIO14_CL2 - @m78_lib.M78
25A5 25B3
SB_GPIO18
SB_GPIO18 - @m78_lib.M78
25C5
SB_GPIO30
SB_GPIO30 - @m78_lib.M78
13C3 24C8
SB_GPIO36
SB_GPIO36 - @m78_lib.M78
25D3
SB_GPIO40
SB_GPIO40 - @m78_lib.M78
13C3 24C8
SB_INTVRMEN
SB_INTVRMEN - @m78_lib.M78
23D6
SB_LAN100_SLP
SB_LAN100_SLP - @m78_lib.M78
23C6
SB_RCIN_L
SB_RCIN_L - @m78_lib.M78
23C4
SB_RTC_RST_L
SB_RTC_RST_L - @m78_lib.M78
7B8 23D8 28D5
SB_RTC_X1
SB_RTC_X1 - @m78_lib.M78
23D8 28C8
SB_RTC_X1_R
SB_RTC_X1_R - @m78_lib.M78
28C7
SB_RTC_X2
SB_RTC_X2 - @m78_lib.M78
23D8 28C8
SB_SATALED_L
SB_SATALED_L - @m78_lib.M78
45C2
TP_SB_SATALED_L - @m78_lib.M78
23B6 45C1
SB_SATALED_R_L
SB_SATALED_R_L - @m78_lib.M78
45C2
SB_SATA_CLKREQ_L
SB_SATA_CLKREQ_L - @m78_lib.M78
25C5 29B3 30D2
SB_SCLOCK
SB_SCLOCK - @m78_lib.M78
25C5
SB_SDATAOUT<0>
SB_SDATAOUT<0> - @m78_lib.M78
25C5
SB_SDATAOUT<1>
SB_SDATAOUT<1> - @m78_lib.M78
25C5
SB_SLOAD
SB_SLOAD - @m78_lib.M78
25C5
SB_SM_INTRUDER_L
SB_SM_INTRUDER_L - @m78_lib.M78
23D8 28D5
SB_SPKR
SB_SPKR - @m78_lib.M78
25B5
SDF3400_1
SDF3400_1 - @m78_lib.M78
34A5
SDF4720_1
SDF4720_1 - @m78_lib.M78
47C3
SDF4721_1
SDF4721_1 - @m78_lib.M78
47C2
SMBUS_SMC_0_S0_SCL
SMBUS_SMC_0_S0_SCL - @m78_lib.M78
52D5 106B3
=SMB_LCD_TEMP_SCL - @m78_lib.M78
52C3 55C6
=SMB_AMB_TEMP_SCL - @m78_lib.M78
52D3 55C8
=SMB_GPU_THRM_SCL - @m78_lib.M78
52D3 85C7
SMB_0_S0_CLK - @m78_lib.M78
49B8 52D6
=SMB_LCD_TEMP_SCL - @m78_lib.M78
52C3 55C6
=SMB_GPU_THRM_SCL - @m78_lib.M78
52D3 85C7
=SMB_AMB_TEMP_SCL - @m78_lib.M78
52D3 55C8
SMBUS_SMC_0_S0_SDA
SMBUS_SMC_0_S0_SDA - @m78_lib.M78
52D5 106B3
=SMB_LCD_TEMP_SDA - @m78_lib.M78
52C3 55C6
=SMB_AMB_TEMP_SDA - @m78_lib.M78
52C3 55C8
=SMB_GPU_THRM_SDA - @m78_lib.M78
52D3 85C7
SMB_0_S0_DATA - @m78_lib.M78
49B5 52D6
=SMB_LCD_TEMP_SDA - @m78_lib.M78
52C3 55C6
=SMB_GPU_THRM_SDA - @m78_lib.M78
52D3 85C7
=SMB_AMB_TEMP_SDA - @m78_lib.M78
52C3 55C8
SMBUS_SMC_A_S3_SCL
SMBUS_SMC_A_S3_SCL - @m78_lib.M78
106B3
SMBUS_SMC_A_S3_SDA
SMBUS_SMC_A_S3_SDA - @m78_lib.M78
106B3
SMBUS_SMC_A_S5_SCL
SMBUS_SMC_A_S5_SCL - @m78_lib.M78
52D2
SMB_A_S3_CLK - @m78_lib.M78
49A5 52D3
SMBUS_SMC_A_S5_SDA
SMBUS_SMC_A_S5_SDA - @m78_lib.M78
52D2
SMB_A_S3_DATA - @m78_lib.M78
49A5 52D3
SMBUS_SMC_BSA_SCL
SMBUS_SMC_BSA_SCL - @m78_lib.M78
52C2 106B3
SMB_BSA_CLK - @m78_lib.M78
49A5 52C3
SMBUS_SMC_BSA_SDA
SMBUS_SMC_BSA_SDA - @m78_lib.M78
52C2 106B3
SMB_BSA_DATA - @m78_lib.M78
49A5 52C3
SMBUS_SMC_B_S0_SCL
SMBUS_SMC_B_S0_SCL - @m78_lib.M78
52C5 106B3
y
r
a
n
i
m
il
e
r
PGOOD_5V_S0
PGOOD_5V_S3_L
PGOOD_12V_S0
PGOOD_CR_S0
PGOOD_MCH_CORE_S0
PGOOD_S0_OUT1
PLT_RST_L
PM_BATLOW_L
PM_BMBUSY_L
PM_CLKRUN_L
PM_DPRSLPVR
PM_EXTTS_L<0>
PM_EXTTS_L<1>
PM_LAN_ENABLE
PM_LATRIGGER_L
PM_PWRBTN_L
PM_RI_L
PM_RSMRST_L
PM_S4_STATE_INV
PM_S4_STATE_L
PEG_R2D_P<1> - @m78_lib.M78
PEG_R2D_P<2> - @m78_lib.M78
PEG_R2D_P<3> - @m78_lib.M78
PEG_R2D_P<4> - @m78_lib.M78
PEG_R2D_P<5> - @m78_lib.M78
PEG_R2D_P<6> - @m78_lib.M78
PEG_R2D_P<7> - @m78_lib.M78
PEG_R2D_P<8> - @m78_lib.M78
PEG_R2D_P<9> - @m78_lib.M78
PEG_R2D_P<10> - @m78_lib.M78
PEG_R2D_P<11> - @m78_lib.M78
PEG_R2D_P<12> - @m78_lib.M78
PEG_R2D_P<13> - @m78_lib.M78
PEG_R2D_P<14> - @m78_lib.M78
PEG_R2D_P<15> - @m78_lib.M78
PEG_RESET_L - @m78_lib.M78
PGOOD_0V9_S0 - @m78_lib.M78
PGOOD_1V05_S0 - @m78_lib.M78
PGOOD_1V5_S0 - @m78_lib.M78
PGOOD_1V8_S0 - @m78_lib.M78
PGOOD_1V8_S3 - @m78_lib.M78
PGOOD_1V25_S0 - @m78_lib.M78
PGOOD_2V5_S0 - @m78_lib.M78
PGOOD_3V3_S0 - @m78_lib.M78
PGOOD_3V3_S3 - @m78_lib.M78
PGOOD_3V3_S5 - @m78_lib.M78
RSMRST_PWRGD - @m78_lib.M78
PGOOD_5V_S0 - @m78_lib.M78
PGOOD_5V_S3_L - @m78_lib.M78
PGOOD_12V_S0 - @m78_lib.M78
PGOOD_CR_S0 - @m78_lib.M78
PGOOD_MCH_CORE_S0 - @m78_lib.M78
PGOOD_S0_OUT1 - @m78_lib.M78
PLT_RST_L - @m78_lib.M78
PM_BATLOW_L - @m78_lib.M78
PM_BMBUSY_L - @m78_lib.M78
PM_CLKRUN_L - @m78_lib.M78
PM_DPRSLPVR - @m78_lib.M78
PM_EXTTS_L<0> - @m78_lib.M78
PM_EXTTS_L<1> - @m78_lib.M78
PM_LAN_ENABLE - @m78_lib.M78
PM_LATRIGGER_L - @m78_lib.M78
PM_PWRBTN_L - @m78_lib.M78
PM_RI_L - @m78_lib.M78
PM_RSMRST_L - @m78_lib.M78
PM_S4_STATE_INV - @m78_lib.M78
PM_S4_STATE_L - @m78_lib.M78
PP1V5_S0_NB_VCCD_TVD
AC
PP1V5_S0_SB_VCCDMIPL
L
PP1V5_S0_SB_VCCDMIPL
L_F
PP1V5_S0_SB_VCCSATAP
LL
PP1V5_S0_SB_VCCSATAP
LL_F
PP1V8_S3M_NB_VCCSMCK
PP1V8_S3M_NB_VCCSMCK
_RC
PP1V8_S3_R
PP1V9R2V5_ENET_PHY_A
VDD
PP1V9R2V5_S3_ENET_R
19B6 22B1
26C3 27A6
27A8
26B6 27A6
27A8
19B3 21A2
21A4
75C1
37C6 39D8 104B3
38C3 104B2
37C7 38C1
21C3
16A2 19C3 21A6
19D6 21D1
19D6 21C1
19C6 21B5
19B6 21B5
19C6 21B2
21B4
19C3 21D3
39D7
43A6 43A6 43B6 43C5 43D5
23D7 26D6 27D5 28D5
29D4
29C6
29C7
29D7
29D4
29C4
55D4
71D7
21C4
21B4
38D6
49D4 50B7
40D4 42A8 42B1
40D3 42A7 42B1
113
SMBUS_SMC_B_S0_SDA
SMBUS_SMC_MGMT_SCL
SMBUS_SMC_MGMT_SDA
SMB_CLK
SMB_DATA
SMB_ME_CLK
SMB_ME_DATA
SMC_ADAPTER_EN
SMC_BATT_ISENSE
C
SMC_BC_ACOK
SMC_BS_ALRT_L
SMC_CASE_OPEN
SMC_CPU_ISENSE
SMC_CPU_VSENSE
SMC_EXCARD_CP
SMC_EXCARD_OC_L
SMC_EXCARD_PWR_EN
SMC_EXTAL
SMC_FAN_0_CTL
SMC_FAN_0_TACH
SMC_FAN_1_CTL
SMC_FAN_1_TACH
SMC_FAN_2_CTL
SMC_FAN_2_TACH
SMC_FAN_3_CTL
SMC_FAN_3_TACH
SMC_FWE
SMC_GFX_OVERTEMP_L
SMC_GFX_THROTTLE_L
SMC_GPU_ISENSE
SMC_GPU_VSENSE
SMC_KBC_MDE
SMC_LID
SMC_LRESET_L
SMC_MANUAL_RST_L
SMC_MD1
SMC_MXM_VSENSE_R
SMC_NMI
SMC_ODD_DETECT
SMC_ONOFF_L
SMC_P14
SMC_P20
SMC_P21
SMC_P22
SMC_P23
SMC_P26
SMC_P27
SMC_P43
SMC_P44
SMC_P45
SMC_P46
SMC_P62
SMC_P63
SMC_P64
SMC_P67
SMC_P81
SMC_PA0
SMC_PA1
SMC_PB0
SMC_PF0
SMC_PF1
7
=SMBUS_MINI_SCL - @m78_lib.M78
=SMB_REMOTE_TEMP_SCL - @m78_lib.M78
=SMB_CPU_THRM_SCL - @m78_lib.M78
SMB_B_S0_CLK - @m78_lib.M78
=SMB_REMOTE_TEMP_SCL - @m78_lib.M78
=SMB_CPU_THRM_SCL - @m78_lib.M78
=SMBUS_MINI_SCL - @m78_lib.M78
SMBUS_SMC_B_S0_SDA - @m78_lib.M78
=SMBUS_MINI_SDA - @m78_lib.M78
=SMB_REMOTE_TEMP_SDA - @m78_lib.M78
=SMB_CPU_THRM_SDA - @m78_lib.M78
SMB_B_S0_DATA - @m78_lib.M78
=SMB_REMOTE_TEMP_SDA - @m78_lib.M78
=SMB_CPU_THRM_SDA - @m78_lib.M78
=SMBUS_MINI_SDA - @m78_lib.M78
SMBUS_SMC_MGMT_SCL - @m78_lib.M78
SMB_MGMT_CLK - @m78_lib.M78
SMBUS_SMC_MGMT_SDA - @m78_lib.M78
SMB_MGMT_DATA - @m78_lib.M78
SMB_CLK - @m78_lib.M78
=SMBUS_CK505_SCL - @m78_lib.M78
SMBUS_SB_SCL - @m78_lib.M78
=I2C_DIMMA_SCL - @m78_lib.M78
=I2C_DIMMB_SCL - @m78_lib.M78
SMBUS_SB_SCL - @m78_lib.M78
=SMBUS_CK505_SCL - @m78_lib.M78
=I2C_DIMMB_SCL - @m78_lib.M78
=I2C_DIMMA_SCL - @m78_lib.M78
SMB_DATA - @m78_lib.M78
=SMBUS_CK505_SDA - @m78_lib.M78
SMBUS_SB_SDA - @m78_lib.M78
=I2C_DIMMA_SDA - @m78_lib.M78
=I2C_DIMMB_SDA - @m78_lib.M78
SMBUS_SB_SDA - @m78_lib.M78
=SMBUS_CK505_SDA - @m78_lib.M78
=I2C_DIMMB_SDA - @m78_lib.M78
=I2C_DIMMA_SDA - @m78_lib.M78
SMB_ME_CLK - @m78_lib.M78
SMBUS_SB_ME_SCL - @m78_lib.M78
SMB_ME_DATA - @m78_lib.M78
SMBUS_SB_ME_SDA - @m78_lib.M78
SMC_ADAPTER_EN - @m78_lib.M78
TP_SMC_ADAPTER_EN - @m78_lib.M78
SMC_BATT_ISENSE - @m78_lib.M78
SMC_NB_1V25_ISENSE - @m78_lib.M78
UNUSED_SMC_SENSE - @m78_lib.M78
SMC_PBUS_VSENSE - @m78_lib.M78
SMC_DCIN_ISENSE - @m78_lib.M78
UNUSED_SMC_SENSE - @m78_lib.M78
SMC_PBUS_VSENSE - @m78_lib.M78
SMC_NB_1V25_ISENSE - @m78_lib.M78
SMC_DCIN_ISENSE - @m78_lib.M78
SMC_BC_ACOK - @m78_lib.M78
SMC_BS_ALRT_L - @m78_lib.M78
SMC_CASE_OPEN - @m78_lib.M78
SMC_CPU_ISENSE - @m78_lib.M78
SMC_CPU_VSENSE - @m78_lib.M78
SMC_EXCARD_CP - @m78_lib.M78
SMC_EXCARD_OC_L - @m78_lib.M78
SMC_EXCARD_PWR_EN - @m78_lib.M78
TP_SMC_EXCARD_PWR_EN - @m78_lib.M78
SMC_EXTAL - @m78_lib.M78
SMC_FAN_0_CTL - @m78_lib.M78
SMC_FAN_0_TACH - @m78_lib.M78
SMC_FAN_1_CTL - @m78_lib.M78
SMC_FAN_1_TACH - @m78_lib.M78
SMC_FAN_2_CTL - @m78_lib.M78
SMC_FAN_2_TACH - @m78_lib.M78
SMC_FAN_3_CTL - @m78_lib.M78
TP_SMC_FAN_3_CTL - @m78_lib.M78
SMC_FAN_3_TACH - @m78_lib.M78
TP_SMC_FAN_3_TACH - @m78_lib.M78
SMC_FWE - @m78_lib.M78
SMC_GFX_OVERTEMP_L - @m78_lib.M78
SMC_GFX_THROTTLE_L - @m78_lib.M78
SMC_GPU_ISENSE - @m78_lib.M78
SMC_GPU_VSENSE - @m78_lib.M78
SMC_KBC_MDE - @m78_lib.M78
SMC_LID - @m78_lib.M78
SMC_LRESET_L - @m78_lib.M78
SMC_MANUAL_RST_L - @m78_lib.M78
SMC_MD1 - @m78_lib.M78
SMC_MXM_VSENSE_R - @m78_lib.M78
SMC_NMI - @m78_lib.M78
SMC_ODD_DETECT - @m78_lib.M78
SMC_ONOFF_L - @m78_lib.M78
SMC_P14 - @m78_lib.M78
TP_SMC_P14 - @m78_lib.M78
SMC_P20 - @m78_lib.M78
TP_SMC_P20 - @m78_lib.M78
SMC_P21 - @m78_lib.M78
TP_SMC_P21 - @m78_lib.M78
SMC_P22 - @m78_lib.M78
TP_SMC_P22 - @m78_lib.M78
SMC_P23 - @m78_lib.M78
TP_SMC_P23 - @m78_lib.M78
SMC_P26 - @m78_lib.M78
TP_SMC_P26 - @m78_lib.M78
SMC_P27 - @m78_lib.M78
TP_SMC_P27 - @m78_lib.M78
SMC_P43 - @m78_lib.M78
TP_SMC_P43 - @m78_lib.M78
SMC_P44 - @m78_lib.M78
TP_SMC_P44 - @m78_lib.M78
SMC_P45 - @m78_lib.M78
TP_SMC_P45 - @m78_lib.M78
SMC_P46 - @m78_lib.M78
TP_SMC_P46 - @m78_lib.M78
SMC_P62 - @m78_lib.M78
TP_SMC_P62 - @m78_lib.M78
SMC_P63 - @m78_lib.M78
TP_SMC_P63 - @m78_lib.M78
SMC_P64 - @m78_lib.M78
TP_SMC_P64 - @m78_lib.M78
SMC_P67 - @m78_lib.M78
SMC_P81 - @m78_lib.M78
TP_SMC_P81 - @m78_lib.M78
SMC_PA0 - @m78_lib.M78
SMC_PA1 - @m78_lib.M78
SMC_PB0 - @m78_lib.M78
SMC_PF0 - @m78_lib.M78
TP_SMC_PF0 - @m78_lib.M78
SMC_PF1 - @m78_lib.M78
TP_SMC_PF1 - @m78_lib.M78
34B3 52B3
52B3 55B2
52C3 55C2
49A5 52C5
52B3 55B2
52C3 55C2
34B3 52B3
52B5 106B3
34B3 52B3
52B3 55B2
52B3 55C2
49A5 52B5
52B3 55B2
52B3 55C2
34B3 52B3
52B2 106B3
49C5 52B3
52B2 106B3
49C8 52B3
25D5 52D8 103A3
29B5 52D6
52D7
31A6 52D6
32A6 52C6
52D7
29B5 52D6
32A6 52C6
31A6 52D6
25D5 52D8 103A3
29B5 52D6
52D7
31A6 52D6
32A6 52C6
52D7
29B5 52D6
32A6 52C6
31A6 52D6
25D5 52A8 103A3
52A7
25D5 52A8 103A3
52A7
49D5 50C5
50C3
49C5 50B5
49C5 50B5
50A2 50B3 50B3 50B3 50B3
49C5 50B5
49C5 50B5
50A2 50B3 50B3 50B3 50B3
49C5 50B5
49C5 50B5
49C5 50B5
49C5 50B2
49C5 50B2
49B5 50A2
49C5 53C6
49C5 53D6
49B8 50A2
49B8 50B2
49B8 50B5
50B3
49C3 50C8
49A8 56D8
49A8 56C8
49A8 56B8
49A8 56A8
49A8 57D8
49A8 57C8
49A8 50C5
50C3
49A8 50C5
50C3
49A5 50B2
49A8 85C8
49C8 85B7
49C5 53C1
49C5 53D2
49C2
49B5 50B2
7C6 28D1 49C8
50D7
7D4 49C1 51B6
53D3
7C4 49C1 51B4
49B8 50B2
49C5 50B2 50C5
49D8 50D5
50D3
49C8 50D5
50D3
49C8 50D5
50D3
49C8 50C5
50C3
49C8 50C5
50C3
49C8 50C5
50C3
49C8 50C5
50C3
49C8 50C5
50C3
49C8 50C5
50C3
49C8 50C5
50C3
49B8 50B5
50B3
49D5 50C5
50C3
49D5 50C5
50C3
49D5 50C5
50C3
49C5 50B2
49C5 50C5
50C3
49B8 50B2
49B8 50B2
49B8 50B2
49B5 50C5
50C3
49B5 50C5
50C3
SMC_PF3
SMC_PG0
SMC_PH4
SMC_PM_G2_EN
SMC_PROCHOT
SMC_PROCHOT_3_3_L
SMC_RESET_L
SMC_RSTGATE_L
SMC_RUNTIME_SCI_L
SMC_RX_L
SMC_SUS_CLK
SMC_SYS_KBDLED
SMC_SYS_LED
SMC_TCK
SMC_TDI
SMC_TDO
SMC_THRMTRIP
SMC_TMS
SMC_TRST_L
SMC_TX_L
SMC_VCL
SMC_WAKE_SCI_L
SMC_XTAL
SMS_ONOFF_L
SMS_X_AXIS
SMS_Y_AXIS
SMS_Z_AXIS
SPI_A_SCLK_R
SPI_A_SI_R
SPI_A_SO_R
SPI_B_SCLK_R
SPI_B_SI_R
SPI_B_SO
SPI_B_SO_R
SPI_CE_L<0>
SPI_CE_L<1>
SPI_CE_R_L<0>
SPI_CE_R_L<1>
SPI_HOLD_L
SPI_SCLK
SPI_SCLK_R
SPI_SI
SPI_SI_R
SPI_SO
SPI_WP_L
SYSLED_SW
SYS_LED_ANODE
SYS_LED_ANODE_CONN
SYS_LED_BIAS
SYS_LED_EN
SYS_LED_ILIM
SYS_LED_IREF
SYS_LED_RETURN_CONN
SYS_LGP_ANODE
SYS_LGP_RETURN
SYS_ONEWIRE
TMDS_CLK_N
TMDS_CLK_P
TMDS_CONN_CLKN
TMDS_CONN_CLKP
TMDS_CONN_DN<0>
TMDS_CONN_DN<3..0>
TMDS_CONN_DN<1>
TMDS_CONN_DN<2>
TMDS_CONN_DP<0>
TMDS_CONN_DP<3..0>
TMDS_CONN_DP<1>
TMDS_CONN_DP<2>
TMDS_DATA_N<0>
TMDS_DATA_N<3..0>
TMDS_DATA_N<1>
TMDS_DATA_N<2>
TMDS_DATA_P<0>
TMDS_DATA_P<3..0>
TMDS_DATA_P<1>
TMDS_DATA_P<2>
TP_CK505_PGMODE
TP_CPU_RSVD0
TP_CPU_RSVD1
TP_CPU_RSVD2
TP_CPU_RSVD3
TP_CPU_RSVD4
TP_CPU_RSVD5
TP_CPU_RSVD6
TP_CPU_RSVD7
TP_CPU_RSVD8
TP_CPU_RSVD9
TP_CPU_TEST3
TP_CPU_TEST5
TP_CPU_TEST6
TP_ENET_GLAN_CLK
TP_FW_AVREG
TP_FW_CE
TP_FW_FW620_L
TP_FW_JASI_EN
TP_FW_MODE_A
TP_FW_NAND_TREE
TP_FW_SCIFCLK
TP_FW_SCIFDAIN
TP_FW_SCIFDOUT
TP_FW_SCIFMC
TP_FW_SDA
TP_FW_SE
TP_FW_SM
TP_FW_TCK
TP_FW_TDI
TP_FW_TDO
TP_FW_TMS
TP_FW_VAUX_DISABLE
TP_FW_VBUF
TP_GPU_DDC_B_CLK
TP_GPU_DDC_B_DATA
TP_HDA_DOCK_RST_L
TP_HDA_SDIN1
SMC_PF3 - @m78_lib.M78
SMC_PG0 - @m78_lib.M78
SMC_PH4 - @m78_lib.M78
SMC_PM_G2_EN - @m78_lib.M78
TP_SMC_PM_G2_EN - @m78_lib.M78
SMC_PROCHOT - @m78_lib.M78
SMC_PROCHOT_3_3_L - @m78_lib.M78
SMC_RESET_L - @m78_lib.M78
SMC_RSTGATE_L - @m78_lib.M78
TP_SMC_RSTGATE_L - @m78_lib.M78
SMC_RUNTIME_SCI_L - @m78_lib.M78
SMC_RX_L - @m78_lib.M78
SMC_SUS_CLK - @m78_lib.M78
SUS_CLK_SB - @m78_lib.M78
SMC_SYS_KBDLED - @m78_lib.M78
TP_SMC_SYS_KBDLED - @m78_lib.M78
SMC_SYS_LED - @m78_lib.M78
SMC_TCK - @m78_lib.M78
SMC_TDI - @m78_lib.M78
SMC_TDO - @m78_lib.M78
SMC_THRMTRIP - @m78_lib.M78
SMC_TMS - @m78_lib.M78
SMC_TRST_L - @m78_lib.M78
SMC_TX_L - @m78_lib.M78
SMC_VCL - @m78_lib.M78
SMC_WAKE_SCI_L - @m78_lib.M78
SMC_XTAL - @m78_lib.M78
SMS_ONOFF_L - @m78_lib.M78
TP_SMS_ONOFF_L - @m78_lib.M78
SMS_X_AXIS - @m78_lib.M78
NC_SMS_X_AXIS - @m78_lib.M78
SMS_Y_AXIS - @m78_lib.M78
NC_SMS_Y_AXIS - @m78_lib.M78
SMS_Z_AXIS - @m78_lib.M78
NC_SMS_Z_AXIS - @m78_lib.M78
SPI_A_SCLK_R - @m78_lib.M78
SPI_A_SI_R - @m78_lib.M78
SPI_A_SO_R - @m78_lib.M78
SPI_B_SCLK_R - @m78_lib.M78
SPI_B_SI_R - @m78_lib.M78
SPI_B_SO - @m78_lib.M78
SPI_B_SO_R - @m78_lib.M78
SPI_CE_L<0> - @m78_lib.M78
SPI_CE_L<1> - @m78_lib.M78
SPI_CE_R_L<0> - @m78_lib.M78
SPI_CE_R_L<1> - @m78_lib.M78
SPI_HOLD_L - @m78_lib.M78
SPI_SCLK - @m78_lib.M78
SPI_SCLK_R - @m78_lib.M78
SPI_SI - @m78_lib.M78
SPI_SI_R - @m78_lib.M78
SPI_SO - @m78_lib.M78
SPI_WP_L - @m78_lib.M78
SYSLED_SW - @m78_lib.M78
SYS_LED_ANODE - @m78_lib.M78
SYS_LED_ANODE_CONN - @m78_lib.M78
SYS_LED_BIAS - @m78_lib.M78
SYS_LED_EN - @m78_lib.M78
SYS_LED_ILIM - @m78_lib.M78
SYS_LED_IREF - @m78_lib.M78
SYS_LED_RETURN_CONN - @m78_lib.M78
SYS_LGP_ANODE - @m78_lib.M78
SYS_LGP_RETURN - @m78_lib.M78
SYS_ONEWIRE - @m78_lib.M78
TMDS_CLK_N - @m78_lib.M78
TMDS_CLK_P - @m78_lib.M78
TMDS_CONN_CLKN - @m78_lib.M78
TMDS_CONN_CLKP - @m78_lib.M78
TMDS_CONN_DN<0> - @m78_lib.M78
TMDS_CONN_DN<3..0> - @m78_lib.M78
TMDS_CONN_DN<1> - @m78_lib.M78
TMDS_CONN_DN<2> - @m78_lib.M78
TMDS_CONN_DP<0> - @m78_lib.M78
TMDS_CONN_DP<3..0> - @m78_lib.M78
TMDS_CONN_DP<1> - @m78_lib.M78
TMDS_CONN_DP<2> - @m78_lib.M78
TMDS_DATA_N<0> - @m78_lib.M78
TMDS_DATA_N<3..0> - @m78_lib.M78
TMDS_DATA_N<1> - @m78_lib.M78
TMDS_DATA_N<2> - @m78_lib.M78
TMDS_DATA_P<0> - @m78_lib.M78
TMDS_DATA_P<3..0> - @m78_lib.M78
TMDS_DATA_P<1> - @m78_lib.M78
TMDS_DATA_P<2> - @m78_lib.M78
TP_CK505_PGMODE - @m78_lib.M78
TP_CPU_RSVD0 - @m78_lib.M78
TP_CPU_RSVD1 - @m78_lib.M78
TP_CPU_RSVD2 - @m78_lib.M78
TP_CPU_RSVD3 - @m78_lib.M78
TP_CPU_RSVD4 - @m78_lib.M78
TP_CPU_RSVD5 - @m78_lib.M78
TP_CPU_RSVD6 - @m78_lib.M78
TP_CPU_RSVD7 - @m78_lib.M78
TP_CPU_RSVD8 - @m78_lib.M78
TP_CPU_RSVD9 - @m78_lib.M78
TP_CPU_TEST3 - @m78_lib.M78
TP_CPU_TEST5 - @m78_lib.M78
TP_CPU_TEST6 - @m78_lib.M78
TP_ENET_GLAN_CLK - @m78_lib.M78
TP_FW_AVREG - @m78_lib.M78
TP_FW_CE - @m78_lib.M78
TP_FW_FW620_L - @m78_lib.M78
TP_FW_JASI_EN - @m78_lib.M78
TP_FW_MODE_A - @m78_lib.M78
TP_FW_NAND_TREE - @m78_lib.M78
TP_FW_SCIFCLK - @m78_lib.M78
TP_FW_SCIFDAIN - @m78_lib.M78
TP_FW_SCIFDOUT - @m78_lib.M78
TP_FW_SCIFMC - @m78_lib.M78
TP_FW_SDA - @m78_lib.M78
TP_FW_SE - @m78_lib.M78
TP_FW_SM - @m78_lib.M78
TP_FW_TCK - @m78_lib.M78
TP_FW_TDI - @m78_lib.M78
TP_FW_TDO - @m78_lib.M78
TP_FW_TMS - @m78_lib.M78
TP_FW_VAUX_DISABLE - @m78_lib.M78
TP_FW_VBUF - @m78_lib.M78
TP_GPU_DDC_B_CLK - @m78_lib.M78
TP_GPU_DDC_B_DATA - @m78_lib.M78
TP_HDA_DOCK_RST_L - @m78_lib.M78
TP_HDA_SDIN1 - @m78_lib.M78
49B5 50B2
49B5 50B2
49A5 50B2
49D5 50C5
50C3
49A5 50C1
49C5 50D1
7C4 7C6 49C3 50D6 51B4
49D8 50B5
50B3
25C8 49B8
7C4 46D5 49B8 49C5 50B2
51B4
49C5 50C3
25D3 50C2
49B8 50B5
50B3
49C8 50A5 50A8
7D4 49B5 50B2 51B4
7D4 49B5 50B2 51B4
7D4 49B5 50B2 51B6
49A5 50C1
7D4 49B5 50B2 51B6
7D4 49C1 51B6
7D4 46D5 49B8 49C5 50B2
51B6
49D2
13C3 25C8 49C5
49C3 50C8
49A5 50B5
50B3
49A8 50D5 108D1
50D3
49A8 50D5 108D1
50D3
49A8 50D5 108D1
50D3
103A3
61B4 103A3
7B3 61B4 103A3
103A3
103A3
103A3
103A3
7B3 61B6 103A3
103A3
24C5 61B7 103A3
103A3
61B5
7A8 61B6 103A3
24C5 61B7 103A3
103A3
24C5 61B3 103A3
7A8 24C5 61B3 103A3
61B5
50A4
50A6
50A3 50A4 50A5
50A7
50A8
50A6
50A7
50A3 50A4 50A5
50A4
50A4
49B8 50B2
85A7 94C8 108D3
85A7 94B8 108D3
94C4 94C7 108D3
94B7 94C4 108D3
94C4 94D6
108D3
94C4 94D6
94C6 94D4
94C4 94D6
108D3
94C4 94D6
94C6 94D4
85A7 94D8
108D3
85A7 94D8
85A7 94C8
85A7 94D8
108D3
85A7 94C8
85A7 94C8
29B5
10B8
10B8
10B8
10B8
10B8
10B8
10B8
10B8
10B8
10B8
10B4
10B4
10B4
23C6
40B6
7B3 40B6
40B6
40B6
40B6
7C3 40B6
40B3
40B3
40B3
40B3
40B3
7C3 40B6
7C3 40B6
7C3 40C3
7C3 40C3
7C3 40C3
7C3 40C3
40C3
40B6
85A4
85A4
23B6
23C8
TP_HDA_SDIN2
TP_HDA_SDIN3
TP_LAN_D2R<0>
TP_LAN_D2R<1>
TP_LAN_D2R<2>
TP_LAN_R2D<0>
TP_LAN_R2D<1>
TP_LAN_R2D<2>
TP_LAN_RSTSYNC
TP_LPC_DRQ0_L
TP_LVDS_A_DATAN3
TP_LVDS_A_DATAP3
TP_LVDS_B_DATAN3
TP_LVDS_B_DATAP3
TP_LVDS_VBG
TP_MEM_A_A<15>
TP_MEM_A_RCVEN_L
TP_MEM_B_A<15>
TP_MEM_B_RCVEN_L
TP_MEM_CLKN2
TP_MEM_CLKN5
TP_MEM_CLKP2
TP_MEM_CLKP5
TP_NB_CFG<10>
TP_NB_CFG<11>
TP_NB_CFG<12>
TP_NB_CFG<13>
TP_NB_CFG<14>
TP_NB_CFG<15>
TP_NB_CFG<17>
TP_NB_CFG<18>
TP_NB_NC<1>
TP_NB_NC<2>
TP_NB_NC<3>
TP_NB_NC<4>
TP_NB_NC<5>
TP_NB_NC<6>
TP_NB_NC<7>
TP_NB_NC<8>
TP_NB_NC<9>
TP_NB_NC<10>
TP_NB_NC<11>
TP_NB_NC<12>
TP_NB_NC<13>
TP_NB_NC<14>
TP_NB_NC<15>
TP_NB_NC<16>
TP_NB_RSVD<1>
TP_NB_RSVD<2>
TP_NB_RSVD<3>
TP_NB_RSVD<4>
TP_NB_RSVD<5>
TP_NB_RSVD<6>
TP_NB_RSVD<7>
TP_NB_RSVD<8>
TP_NB_RSVD<9>
TP_NB_RSVD<10>
TP_NB_RSVD<11>
TP_NB_RSVD<12>
TP_NB_RSVD<13>
TP_NB_RSVD<14>
TP_NB_RSVD<20>
TP_NB_RSVD<21>
TP_NB_RSVD<22>
TP_NB_RSVD<23>
TP_NB_RSVD<24>
TP_NB_RSVD<25>
TP_NB_RSVD<26>
TP_NB_RSVD<27>
TP_NB_RSVD<34>
TP_NB_RSVD<35>
TP_NB_RSVD<36>
TP_NB_RSVD<41>
TP_NB_RSVD<42>
TP_NB_RSVD<43>
TP_NB_RSVD<44>
TP_NB_RSVD<45>
TP_PCIE_A_D2R_N
TP_PCIE_A_D2R_P
TP_PCIE_A_R2D_C_N
TP_PCIE_A_R2D_C_P
TP_PCIE_B_D2R_N
TP_PCIE_B_D2R_P
TP_PCIE_B_R2D_C_N
TP_PCIE_B_R2D_C_P
TP_PCIE_EXCARD_D2R_N
TP_PCIE_EXCARD_D2R_P
TP_PCIE_EXCARD_R2D_C
_N
TP_PCIE_EXCARD_R2D_C
_P
TP_PCI_PME_L
TP_PM_SLP_M_L
TP_PM_SLP_S4_L
TP_PP5VREG_PLLIN
TP_SB_GPIO51
TP_SB_GPIO53
TP_SB_GPIO55
TP_SB_TP3
TP_SB_TP7
TP_SB_TP8
TP_SPI_CE_R_L<1>
TP_VCCCL1_05_INTERNA
L_REG
TP_VCCLAN1_05_INTERN
AL_REG1
TP_VCCLAN1_05_INTERN
AL_REG2
TP_VCCSUS1_05_INTERN
AL_REG1
TP_VCCSUS1_05_INTERN
AL_REG2
TP_VCCSUS1_5_INTERNA
L_REG1
TP_VCCSUS1_5_INTERNA
L_REG2
TP_XDP_HOOK2
TP_XDP_HOOK3
U5500_TCRIT1
U5500_TCRIT2
U5500_TCRIT3
U7550_VDDQ
USB_BT_N
USB_BT_P
TP_HDA_SDIN2 - @m78_lib.M78
TP_HDA_SDIN3 - @m78_lib.M78
TP_LAN_D2R<0> - @m78_lib.M78
TP_LAN_D2R<1> - @m78_lib.M78
TP_LAN_D2R<2> - @m78_lib.M78
TP_LAN_R2D<0> - @m78_lib.M78
TP_LAN_R2D<1> - @m78_lib.M78
TP_LAN_R2D<2> - @m78_lib.M78
TP_LAN_RSTSYNC - @m78_lib.M78
TP_LPC_DRQ0_L - @m78_lib.M78
TP_LVDS_A_DATAN3 - @m78_lib.M78
TP_LVDS_A_DATAP3 - @m78_lib.M78
TP_LVDS_B_DATAN3 - @m78_lib.M78
TP_LVDS_B_DATAP3 - @m78_lib.M78
TP_LVDS_VBG - @m78_lib.M78
TP_MEM_A_A<15> - @m78_lib.M78
TP_MEM_A_RCVEN_L - @m78_lib.M78
TP_MEM_B_A<15> - @m78_lib.M78
TP_MEM_B_RCVEN_L - @m78_lib.M78
TP_MEM_CLKN2 - @m78_lib.M78
TP_MEM_CLKN5 - @m78_lib.M78
TP_MEM_CLKP2 - @m78_lib.M78
TP_MEM_CLKP5 - @m78_lib.M78
TP_NB_CFG<10> - @m78_lib.M78
TP_NB_CFG<11> - @m78_lib.M78
TP_NB_CFG<12> - @m78_lib.M78
TP_NB_CFG<13> - @m78_lib.M78
TP_NB_CFG<14> - @m78_lib.M78
TP_NB_CFG<15> - @m78_lib.M78
TP_NB_CFG<17> - @m78_lib.M78
TP_NB_CFG<18> - @m78_lib.M78
TP_NB_NC<1> - @m78_lib.M78
TP_NB_NC<2> - @m78_lib.M78
TP_NB_NC<3> - @m78_lib.M78
TP_NB_NC<4> - @m78_lib.M78
TP_NB_NC<5> - @m78_lib.M78
TP_NB_NC<6> - @m78_lib.M78
TP_NB_NC<7> - @m78_lib.M78
TP_NB_NC<8> - @m78_lib.M78
TP_NB_NC<9> - @m78_lib.M78
TP_NB_NC<10> - @m78_lib.M78
TP_NB_NC<11> - @m78_lib.M78
TP_NB_NC<12> - @m78_lib.M78
TP_NB_NC<13> - @m78_lib.M78
TP_NB_NC<14> - @m78_lib.M78
TP_NB_NC<15> - @m78_lib.M78
TP_NB_NC<16> - @m78_lib.M78
TP_NB_RSVD<1> - @m78_lib.M78
TP_NB_RSVD<2> - @m78_lib.M78
TP_NB_RSVD<3> - @m78_lib.M78
TP_NB_RSVD<4> - @m78_lib.M78
TP_NB_RSVD<5> - @m78_lib.M78
TP_NB_RSVD<6> - @m78_lib.M78
TP_NB_RSVD<7> - @m78_lib.M78
TP_NB_RSVD<8> - @m78_lib.M78
TP_NB_RSVD<9> - @m78_lib.M78
TP_NB_RSVD<10> - @m78_lib.M78
TP_NB_RSVD<11> - @m78_lib.M78
TP_NB_RSVD<12> - @m78_lib.M78
TP_NB_RSVD<13> - @m78_lib.M78
TP_NB_RSVD<14> - @m78_lib.M78
TP_NB_RSVD<20> - @m78_lib.M78
TP_NB_RSVD<21> - @m78_lib.M78
TP_NB_RSVD<22> - @m78_lib.M78
TP_NB_RSVD<23> - @m78_lib.M78
TP_NB_RSVD<24> - @m78_lib.M78
TP_NB_RSVD<25> - @m78_lib.M78
TP_NB_RSVD<26> - @m78_lib.M78
TP_NB_RSVD<27> - @m78_lib.M78
TP_NB_RSVD<34> - @m78_lib.M78
TP_NB_RSVD<35> - @m78_lib.M78
TP_NB_RSVD<36> - @m78_lib.M78
TP_NB_RSVD<41> - @m78_lib.M78
TP_NB_RSVD<42> - @m78_lib.M78
TP_NB_RSVD<43> - @m78_lib.M78
TP_NB_RSVD<44> - @m78_lib.M78
TP_NB_RSVD<45> - @m78_lib.M78
TP_PCIE_A_D2R_N - @m78_lib.M78
TP_PCIE_A_D2R_P - @m78_lib.M78
TP_PCIE_A_R2D_C_N - @m78_lib.M78
TP_PCIE_A_R2D_C_P - @m78_lib.M78
TP_PCIE_B_D2R_N - @m78_lib.M78
TP_PCIE_B_D2R_P - @m78_lib.M78
TP_PCIE_B_R2D_C_N - @m78_lib.M78
TP_PCIE_B_R2D_C_P - @m78_lib.M78
TP_PCIE_EXCARD_D2R_N - @m78_lib.M78
TP_PCIE_EXCARD_D2R_P - @m78_lib.M78
TP_PCIE_EXCARD_R2D_C_N @m78_lib.M78
TP_PCIE_EXCARD_R2D_C_P @m78_lib.M78
TP_PCI_PME_L - @m78_lib.M78
TP_PM_SLP_M_L - @m78_lib.M78
TP_PM_SLP_S4_L - @m78_lib.M78
TP_PP5VREG_PLLIN - @m78_lib.M78
TP_SB_GPIO51 - @m78_lib.M78
TP_SB_GPIO53 - @m78_lib.M78
TP_SB_GPIO55 - @m78_lib.M78
TP_SB_TP3 - @m78_lib.M78
TP_SB_TP7 - @m78_lib.M78
TP_SB_TP8 - @m78_lib.M78
TP_SPI_CE_R_L<1> - @m78_lib.M78
TP_VCCCL1_05_INTERNAL_REG @m78_lib.M78
TP_VCCLAN1_05_INTERNAL_REG1 @m78_lib.M78
TP_VCCLAN1_05_INTERNAL_REG2 @m78_lib.M78
TP_VCCSUS1_05_INTERNAL_REG1 @m78_lib.M78
TP_VCCSUS1_05_INTERNAL_REG2 @m78_lib.M78
TP_VCCSUS1_5_INTERNAL_REG1 @m78_lib.M78
TP_VCCSUS1_5_INTERNAL_REG2 @m78_lib.M78
TP_XDP_HOOK2 - @m78_lib.M78
TP_XDP_HOOK3 - @m78_lib.M78
U5500_TCRIT1 - @m78_lib.M78
U5500_TCRIT2 - @m78_lib.M78
U5500_TCRIT3 - @m78_lib.M78
U7550_VDDQ - @m78_lib.M78
USB_BT_N - @m78_lib.M78
USB_BT_P - @m78_lib.M78
23C8
23C8
23C6
23C6
23C6 28C4
23C6
23C6
23C6
23C6
23D4
16C6
16C6
16C6
16C6
15D5
31C3
17B5
32C3
17B2
16C6
16C6
16C6
16C6
16B6
16B6
7C3 16B6
7C3 16B6
16B6
16B6
16B6
7C3 16B6
16A6
16A6
16A6
16A6
16A6
16A6
16A6
16A6
16A6
16A6
16A6
16A6
16A6
16A6
16A6
16A6
16D6
16D6
16D6
16D6
16D6
16D6
16D6
16D6
16D6
16D6
16D6
16D6
16D6
16D6
16D6
16D6
16C6
16C6
16C6
16C6
16C6
16C6
16C6
16C6
16C6
16C6
16C6
16C6
16C6
16C6
24D5
24D5
24D5
24D5
24D5
24D5
24D5
24D5
24D5
24D5
24D5
USB_CAMERA_L_N
USB_CAMERA_L_P
USB_CAMERA_N
USB_CAMERA_P
USB_C_MUXED_N
USB_C_MUXED_P
USB_DEBUGPRT_EN_L
USB_EXCARD_N
USB_EXCARD_P
USB_EXTA_MUXED_N
USB_EXTA_MUXED_P
USB_EXTA_N
USB_EXTA_OC_L
USB_EXTA_P
USB_EXTB_N
USB_EXTB_OC_L
USB_EXTB_P
USB_EXTC_N
USB_EXTC_OC_L
USB_EXTC_P
USB_EXTD_N
USB_EXTD_OC_L
USB_EXTD_P
USB_IR_L_N
USB_IR_L_P
USB_IR_N
USB_IR_P
USB_MINI_N
USB_MINI_P
USB_PORT0_N
USB_PORT0_P
USB_PORT1_N
USB_PORT1_P
USB_PORT2_N
USB_PORT2_P
USB_PWR_ENA_L
USB_RBIAS
USB_TPAD_N
USB_CAMERA_L_N - @m78_lib.M78
USB_CAMERA_L_P - @m78_lib.M78
USB_CAMERA_N - @m78_lib.M78
USB_CAMERA_P - @m78_lib.M78
USB_C_MUXED_N - @m78_lib.M78
USB_C_MUXED_P - @m78_lib.M78
USB_DEBUGPRT_EN_L - @m78_lib.M78
USB_EXCARD_N - @m78_lib.M78
TP_USB_EXCARD_N - @m78_lib.M78
USB_EXCARD_P - @m78_lib.M78
TP_USB_EXCARD_P - @m78_lib.M78
USB_EXTA_MUXED_N - @m78_lib.M78
USB_EXTA_MUXED_P - @m78_lib.M78
USB_EXTA_N - @m78_lib.M78
USB_EXTA_OC_L - @m78_lib.M78
USB_EXTA_P - @m78_lib.M78
USB_EXTB_N - @m78_lib.M78
USB_EXTB_OC_L - @m78_lib.M78
USB_EXTB_P - @m78_lib.M78
USB_EXTC_N - @m78_lib.M78
USB_EXTC_OC_L - @m78_lib.M78
USB_EXTC_P - @m78_lib.M78
USB_EXTD_N - @m78_lib.M78
TP_USB_EXTD_N - @m78_lib.M78
USB_EXTD_OC_L - @m78_lib.M78
USB_EXTD_P - @m78_lib.M78
TP_USB_EXTD_P - @m78_lib.M78
USB_IR_L_N - @m78_lib.M78
USB_IR_L_P - @m78_lib.M78
USB_IR_N - @m78_lib.M78
USB_IR_P - @m78_lib.M78
USB_MINI_N - @m78_lib.M78
USB_MINI_P - @m78_lib.M78
USB_PORT0_N - @m78_lib.M78
USB_PORT0_P - @m78_lib.M78
USB_PORT1_N - @m78_lib.M78
USB_PORT1_P - @m78_lib.M78
USB_PORT2_N - @m78_lib.M78
USB_PORT2_P - @m78_lib.M78
USB_PWR_ENA_L - @m78_lib.M78
USB_RBIAS - @m78_lib.M78
USB_TPAD_N - @m78_lib.M78
TP_USB_TPAD_N - @m78_lib.M78
USB_TPAD_P - @m78_lib.M78
TP_USB_TPAD_P - @m78_lib.M78
VCCCL1_5V - @m78_lib.M78
VGA_BLU - @m78_lib.M78
VGA_GRN - @m78_lib.M78
VGA_HSYNC - @m78_lib.M78
VGA_HSYNC_R - @m78_lib.M78
VGA_RED - @m78_lib.M78
VGA_VSYNC - @m78_lib.M78
VGA_VSYNC_R - @m78_lib.M78
VIDEO_MUX_BLU - @m78_lib.M78
VIDEO_MUX_GRN - @m78_lib.M78
VIDEO_MUX_RED - @m78_lib.M78
VR_PWRGD_CLKEN - @m78_lib.M78
VR_PWRGD_CLKEN_L - @m78_lib.M78
WOL_EN - @m78_lib.M78
WOW_EN - @m78_lib.M78
XDP_BPM_L<0> - @m78_lib.M78
XDP_BPM_L<4..0> - @m78_lib.M78
XDP_BPM_L<1> - @m78_lib.M78
XDP_BPM_L<2> - @m78_lib.M78
XDP_BPM_L<3> - @m78_lib.M78
XDP_BPM_L<4> - @m78_lib.M78
XDP_BPM_L<5> - @m78_lib.M78
XDP_CPURST_L - @m78_lib.M78
XDP_DBRESET_L - @m78_lib.M78
XDP_OBS20 - @m78_lib.M78
XDP_PWRGD - @m78_lib.M78
XDP_TCK - @m78_lib.M78
XDP_TDI - @m78_lib.M78
XDP_TDO - @m78_lib.M78
XDP_TMS - @m78_lib.M78
XDP_TRST_L - @m78_lib.M78
YUKON_RSET - @m78_lib.M78
YUKON_VPD_CLK - @m78_lib.M78
YUKON_VPD_DATA - @m78_lib.M78
USB_TPAD_P
VCCCL1_5V
VGA_BLU
VGA_GRN
VGA_HSYNC
VGA_HSYNC_R
VGA_RED
VGA_VSYNC
VGA_VSYNC_R
VIDEO_MUX_BLU
VIDEO_MUX_GRN
VIDEO_MUX_RED
VR_PWRGD_CLKEN
VR_PWRGD_CLKEN_L
WOL_EN
WOW_EN
XDP_BPM_L<0>
XDP_BPM_L<4..0>
XDP_BPM_L<1>
XDP_BPM_L<2>
XDP_BPM_L<3>
XDP_BPM_L<4>
XDP_BPM_L<5>
XDP_CPURST_L
XDP_DBRESET_L
XDP_OBS20
XDP_PWRGD
XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST_L
YUKON_RSET
YUKON_VPD_CLK
YUKON_VPD_DATA
47B5 108C3
47B5 108C3
7A8 24C2 47B7 103B3
7A8 24C2 47B7 103B3
46D3 108C3
46D3 108D3
46C4 49B8
24C2 47B3 103B3
47B1
24C2 47B3 103B3
47B1
103B3
103B3
24C2 46A7 103B3
13C3 24C8 46C8
24C2 46A7 103B3
24C2 46B7 103B3
13C3 24C8 46C8
24C2 46B7 103B3
24C2 46D5 103A3
24C8 46D8
24C2 46D5 103B3
24C2 46B3 103B3
46B2
13C3 24C8
24C2 46B3 103B3
46B2
47A5 58C5 108C3
47A5 58C5 108C3
7A8 24C2 47A7 103B3
7A8 24C2 47A7 103B3
24C2 34B3 103B3
24C2 34B3 103B3
46A5 108D3
46A5 108D3
46B5 108D3
46B5 108D3
46D2 108D3
46D2 108D3
46D8
24B3 103A3
24C2 47B3 103B3
47B2
24C2 47B3 103B3
47B2
26A4
91A4 94C5 108A3
91B4 94C5 108A3
91A2 94C5 108A3
91A3
91B4 94C5 108A3
91B2 94C5 108A3
91B3
91B7 108A3
91B7 108A3
91B7 108A3
7C4 25C5 28A6
28A8 71C7
25B3
13C3 24C8
10C6 13C6
100A3
10C6 13C6
10C6 13C6
10C6 13C6
10C6 13C6
10C5 13C6 100A3
13B4
10C6 13B3 28A5
13B6
13C6
10A7 10C6 13B6 100A3
10B7 10C6 13B3 100A3
10A7 10C6 13B3 100A3
10B7 10C6 13B3 100A3
10A7 10C6 13B3 100A3
37C2
37B2
37B2
y
r
a
n
i
m
il
e
r
24D5
24A6
25C3
25D3
76B5
24B6
24B6
24B6
25B5
25C5
23C4
24C5
26A3
26A6
26A6
26B3
26B3
26B3
26B3
13B6
13B6
55B3
55B3
55A3
75B5
7A8 24C2 47D3 103B3
7A8 24C2 47C3 103B3
114
8
Title:
Design:
Date:
C600
C621
C622
C623
C624
C625
C701
C702
C703
C704
C705
C706
C707
C708
C709
C710
C1000
C1200
C1201
C1202
C1203
C1204
C1205
C1206
C1207
C1208
C1209
C1210
C1211
C1212
C1213
C1214
C1215
C1216
C1217
C1218
C1219
C1220
C1221
C1222
C1223
C1224
C1225
C1226
C1227
C1228
C1229
C1230
C1231
C1235
C1236
C1237
C1238
C1239
C1240
C1241
C1250
C1251
C1252
C1253
C1254
C1255
C1280
C1281
C1300
C1301
C1410
C1425
C1615
C1616
C1622
C1623
C1624
C1625
C1640
C1801
C1802
C1803
C1804
C1805
C1806
C1807
C1911
C1912
C1913
C2100
C2101
C2102
C2103
C2104
C2110
C2111
C2112
C2113
C2114
C2115
C2120
C2121
C2122
C2123
C2124
C2130
C2131
C2132
C2135
C2140
C2141
C2142
C2143
C2144
C2145
C2146
C2148
C2150
C2151
C2160
C2161
C2165
C2170
CAP_402
CAP_603
CAP_805
CAP_805
CAP_1210
CAP_P_6.3X5.5-SM
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_805
CAP_P_6.3X8-SM
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASE-D2-SM1
CAP_P_CASE-D2-SM1
CAP_P_CASE-D2-SM1
CAP_P_CASE-D2-SM1
CAP_P_CASE-D2-SM1
CAP_P_CASE-D2-SM1
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_6.3X8-SM
CAP_805
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_6.3X8-SM
CAP_603
CAP_603
CAP_603
CAP_402
CAP_P_6.3X8-SM
CAP_805
CAP_805
CAP_402
CAP_P_6.3X8-SM
CAP_805
CAP_805
CAP_603
CAP_402-1
CAP_805
CAP_603
CAP_402
CAP_805
CAP_402-1
CAP_402
CAP_402
CAP_402
CAP_603
7
C2171
C2173
C2174
C2177
C2180
C2181
C2182
C2183
C2184
C2190
C2191
C2192
C2195
C2196
C2197
C2200
C2201
C2213
C2500
C2501
C2600
C2601
C2700
C2701
C2702
C2703
C2704
C2705
C2706
C2707
C2708
C2711
C2712
C2714
C2715
C2717
C2718
C2719
C2721
C2722
C2723
C2724
C2725
C2726
C2727
C2728
C2729
C2730
C2731
C2732
C2733
C2734
C2735
C2736
C2737
C2738
C2739
C2741
C2805
C2808
C2809
C2810
C2811
C2900
C2901
C2902
C2903
C2904
C2905
C2906
C2907
C2908
C2909
C2910
C2911
C2912
C2913
C2914
C2915
C2916
C2989
C2990
C3100
C3101
C3110
C3111
C3112
C3113
C3114
C3115
C3116
C3117
C3118
C3119
C3120
C3121
C3122
C3123
C3130
C3131
C3140
C3141
C3200
C3201
C3210
C3211
C3212
C3213
C3214
C3215
C3216
C3217
C3218
C3219
C3220
C3221
C3222
C3223
C3230
C3231
C3240
C3241
C3300
C3302
m78[6D7]
m78[6D6]
m78[6D7]
m78[6D7]
m78[6D8]
m78[6D8]
m78[7C6]
m78[7C5]
m78[7C6]
m78[7C5]
m78[7C6]
m78[7B5]
m78[7B6]
m78[7B5]
m78[7B6]
m78[7B5]
m78[10B5]
m78[12D7]
m78[12D6]
m78[12D6]
m78[12D6]
m78[12D6]
m78[12D5]
m78[12D5]
m78[12D5]
m78[12D4]
m78[12D4]
m78[12C7]
m78[12C6]
m78[12C6]
m78[12C6]
m78[12C6]
m78[12C5]
m78[12C5]
m78[12C5]
m78[12C4]
m78[12C4]
m78[12C7]
m78[12C6]
m78[12C6]
m78[12C6]
m78[12C6]
m78[12C5]
m78[12B7]
m78[12B6]
m78[12B6]
m78[12B6]
m78[12B6]
m78[12B5]
m78[12A3]
m78[12A2]
m78[12A2]
m78[12A2]
m78[12A2]
m78[12A1]
m78[12A1]
m78[12B7]
m78[12B6]
m78[12B5]
m78[12B5]
m78[12B6]
m78[12B5]
m78[12B3]
m78[12B2]
m78[13B5]
m78[13B4]
m78[14A6]
m78[14A7]
m78[16C3]
m78[16C3]
m78[16C1]
m78[16C1]
m78[16C1]
m78[16C1]
m78[16A3]
m78[18A4]
m78[18A4]
m78[18A4]
m78[18A4]
m78[18A5]
m78[18A5]
m78[18A5]
m78[19A3]
m78[19A3]
m78[19A3]
m78[21D7]
m78[21D7]
m78[21D7]
m78[21D6]
m78[21D6]
m78[21C7]
m78[21C7]
m78[21C7]
m78[21C6]
m78[21C6]
m78[21C6]
m78[21C7]
m78[21C7]
m78[21C7]
m78[21C6]
m78[21C6]
m78[21C7]
m78[21C7]
m78[21C7]
m78[21C7]
m78[21B7]
m78[21B7]
m78[21B6]
m78[21B6]
m78[21B6]
m78[21B6]
m78[21B6]
m78[21B6]
m78[21A7]
m78[21A6]
m78[21A7]
m78[21A7]
m78[21A7]
m78[21D4]
CAP_402-1
CAP_P_SM-CASE-C1
CAP_603
CAP_603
CAP_402
CAP_805
CAP_402
CAP_805
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603
CAP_805
CAP_402
CAP_402
FILTER_3P_A_NFM18
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_SM-CASE-C1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_805
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_603
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
m78[21D4]
m78[21C4]
m78[21C4]
m78[21C4]
m78[21D2]
m78[21D2]
m78[21D2]
m78[21C3]
m78[21C2]
m78[21B4]
m78[21B3]
m78[21B3]
m78[21A4]
m78[21A3]
m78[21A3]
m78[22B2]
m78[22B2]
m78[22B2]
m78[25C2]
m78[25B2]
m78[26A3]
m78[26A3]
m78[27C7]
m78[27A6]
m78[27B1]
m78[27C8]
m78[27D8]
m78[27C7]
m78[27C7]
m78[27C7]
m78[27A6]
m78[27D1]
m78[27C1]
m78[27D1]
m78[27C1]
m78[27A6]
m78[27B1]
m78[27D3]
m78[27B3]
m78[27B1]
m78[27B1]
m78[27B1]
m78[27D3]
m78[27C3]
m78[27C3]
m78[27C3]
m78[27D5]
m78[27D5]
m78[27D5]
m78[27B7]
m78[27C5]
m78[27D5]
m78[27A6]
m78[27B7]
m78[27C3]
m78[27C3]
m78[27C1]
m78[27B3]
m78[28D5]
m78[28C6]
m78[28C6]
m78[28D6]
m78[28A7]
m78[29D7]
m78[29D6]
m78[29D6]
m78[29D6]
m78[29D5]
m78[29D5]
m78[29D5]
m78[29C5]
m78[29C5]
m78[29D4]
m78[29D3]
m78[29D2]
m78[29D4]
m78[29D3]
m78[29D3]
m78[29C4]
m78[29C3]
m78[29C6]
m78[29C6]
m78[31B2]
m78[31B2]
m78[31B2]
m78[31B2]
m78[31B1]
m78[31B1]
m78[31B2]
m78[31B2]
m78[31B1]
m78[31B1]
m78[31B2]
m78[31B2]
m78[31B1]
m78[31B1]
m78[31A1]
m78[31A1]
m78[31D6]
m78[31D6]
m78[31A7]
m78[31A6]
m78[32B2]
m78[32B2]
m78[32B2]
m78[32B2]
m78[32B1]
m78[32B1]
m78[32B2]
m78[32B2]
m78[32B1]
m78[32B1]
m78[32B2]
m78[32B2]
m78[32B1]
m78[32B1]
m78[32A1]
m78[32A1]
m78[32D6]
m78[32D6]
m78[32A6]
m78[32A6]
m78[33D4]
m78[33D4]
C3305
C3307
C3310
C3312
C3330
C3332
C3334
C3336
C3338
C3340
C3342
C3344
C3346
C3348
C3350
C3352
C3354
C3356
C3358
C3360
C3362
C3364
C3366
C3368
C3370
C3400
C3401
C3410
C3420
C3421
C3430
C3431
C3700
C3701
C3702
C3703
C3704
C3705
C3706
C3707
C3708
C3710
C3711
C3712
C3713
C3714
C3715
C3720
C3721
C3722
C3723
C3724
C3730
C3731
C3735
C3736
C3740
C3742
C3744
C3746
C3750
C3751
C3780
C3800
C3801
C3802
C3803
C3804
C3805
C3806
C3807
C3810
C3811
C3812
C3813
C3814
C3815
C3816
C3817
C3890
C3891
C3900
C3901
C3902
C3903
C3910
C4000
C4001
C4010
C4011
C4020
C4021
C4090
C4200
C4201
C4210
C4211
C4212
C4213
C4230
C4231
C4240
C4241
C4242
C4250
C4251
C4252
C4253
C4254
C4260
C4261
C4262
C4263
C4264
C4265
C4266
C4280
C4281
C4290
C4291
C4300
C4301
C4310
C4311
m78[33D4]
m78[33D4]
m78[33C4]
m78[33C4]
m78[33C4]
m78[33C4]
m78[33C4]
m78[33C4]
m78[33C4]
m78[33C4]
m78[33B4]
m78[33B4]
m78[33B4]
m78[33B4]
m78[33B4]
m78[33B4]
m78[33B4]
m78[33B4]
m78[33A4]
m78[33A4]
m78[33A4]
m78[33A4]
m78[33A4]
m78[33A4]
m78[33A4]
m78[34C3]
m78[34C3]
m78[34C3]
m78[34C3]
m78[34C3]
m78[34B7]
m78[34B7]
m78[37D6]
m78[37D6]
m78[37D5]
m78[37D5]
m78[37D5]
m78[37D4]
m78[37D4]
m78[37D4]
m78[37D3]
m78[37D6]
m78[37D6]
m78[37D5]
m78[37D5]
m78[37D5]
m78[37D4]
m78[37C5]
m78[37C5]
m78[37C5]
m78[37C4]
m78[37C4]
m78[37C7]
m78[37C7]
m78[37C5]
m78[37C5]
m78[37B7]
m78[37B6]
m78[37B6]
m78[37B5]
m78[37B5]
m78[37B5]
m78[37B2]
m78[38C8]
m78[38C7]
m78[38C7]
m78[38C7]
m78[38C6]
m78[38C5]
m78[38C5]
m78[38C5]
m78[38B6]
m78[38B6]
m78[38B6]
m78[38B5]
m78[38B5]
m78[38A4]
m78[38A4]
m78[38A4]
m78[38C2]
m78[38C2]
m78[39D7]
m78[39D7]
m78[39D6]
m78[39D6]
m78[39A3]
m78[40B7]
m78[40B7]
m78[40C2]
m78[40C2]
m78[40C3]
m78[40C3]
m78[40B6]
m78[42C7]
m78[42C7]
m78[42C6]
m78[42C5]
m78[42C5]
m78[42C5]
m78[42A5]
m78[42A5]
m78[42A7]
m78[42A7]
m78[42A7]
m78[42B7]
m78[42B7]
m78[42B7]
m78[42B6]
m78[42B6]
m78[42B7]
m78[42B7]
m78[42B7]
m78[42B6]
m78[42B6]
m78[42B6]
m78[42B6]
m78[42A6]
m78[42A6]
m78[42B5]
m78[42B5]
m78[43D3]
m78[43B3]
m78[43D4]
m78[43D4]
C4312
C4313
C4320
C4321
C4322
C4323
C4332
C4335
C4350
C4354
C4360
C4364
C4404
C4405
C4406
C4510
C4511
C4515
C4516
C4600
C4601
C4602
C4603
C4604
C4605
C4613
C4623
C4633
C4650
C4700
C4701
C4720
C4721
C4902
C4903
C4904
C4905
C4906
C4907
C4920
C5000
C5001
C5010
C5020
C5021
C5050
C5051
C5052
C5065
C5066
C5067
C5309
C5358
C5359
C5370
C5500
C5501
C5502
C5503
C5510
C5511
C5550
C5551
C5570
C5580
C5601
C5602
C5603
C5605
C5660
C5701
C5702
C5880
C5881
C6100
C7000
C7001
C7002
C7003
C7010
C7052
C7056
C7060
C7061
C7062
C7090
C7100
C7101
C7102
C7103
C7104
C7105
C7106
C7107
C7108
C7109
C7110
C7111
C7112
C7113
C7114
C7115
C7116
C7121
C7126
C7127
C7128
C7129
C7130
C7131
C7132
C7133
C7134
C7135
C7136
C7150
C7152
C7154
C7155
C7156
C7190
C7192
C7196
C7200
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_CASE-D2-LF
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_402
CAP_805-1
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_P_6.3X5.5SM1
CAP_805
CAP_P_6.3X5.5SM1
CAP_402
CAP_805
CAP_P_6.3X5.5SM1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_1206-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_1206-1
CAP_P_TH
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603-1
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_1206-1
CAP_1206-1
CAP_P_TH
CAP_1206-1
CAP_1206-1
CAP_402
CAP_402
CAP_402
CAP_402
m78[43C4]
m78[43C4]
m78[43B5]
m78[43B5]
m78[43A5]
m78[43A5]
m78[43C2]
m78[43C2]
m78[43C7]
m78[43B7]
m78[43D7]
m78[43B7]
m78[44B6]
m78[44B4]
m78[44B4]
m78[45D6]
m78[45D6]
m78[45C6]
m78[45C6]
m78[46C8]
m78[46C8]
m78[46C7]
m78[46C7]
m78[46D8]
m78[46D7]
m78[46D2]
m78[46C5]
m78[46A5]
m78[46D5]
m78[47D7]
m78[47D6]
m78[47D3]
m78[47D3]
m78[49D4]
m78[49D4]
m78[49D3]
m78[49D3]
m78[49D3]
m78[49D2]
m78[49C3]
m78[50D7]
m78[50D7]
m78[50C6]
m78[50C7]
m78[50C7]
m78[50B6]
m78[50A4]
m78[50A4]
m78[50B8]
m78[50B7]
m78[50B7]
m78[53D6]
m78[53C2]
m78[53D3]
m78[53C7]
m78[55C7]
m78[55B4]
m78[55B4]
m78[55B4]
m78[55A7]
m78[55A6]
m78[55B7]
m78[55B6]
m78[55D3]
m78[55C4]
m78[56D5]
m78[56C4]
m78[56B5]
m78[56B3]
m78[55C5]
m78[57C5]
m78[57C3]
m78[58C5]
m78[58D5]
m78[61C4]
m78[70C6]
m78[70C6]
m78[70C6]
m78[70C6]
m78[70D6]
m78[70D2]
m78[70D1]
m78[70A5]
m78[70B5]
m78[70B5]
m78[70A3]
m78[71C4]
m78[71D1]
m78[71B4]
m78[71C2]
m78[71B2]
m78[71C8]
m78[71B8]
m78[71B7]
m78[71D1]
m78[71D5]
m78[71C7]
m78[71B2]
m78[71C2]
m78[71B7]
m78[71B8]
m78[71D4]
m78[71B4]
m78[71A5]
m78[71D6]
m78[71C4]
m78[71B4]
m78[71B5]
m78[71D6]
m78[71B5]
m78[71A5]
m78[71A5]
m78[71B5]
m78[71D4]
m78[71C4]
m78[71D4]
m78[71D4]
m78[71D2]
m78[71D1]
m78[71D4]
m78[71C3]
m78[71B3]
m78[71D6]
m78[72C4]
y
r
a
n
i
m
il
e
r
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805-1
CAP_402
CAP_805-1
CAP_603
CAP_402
CAP_603
CAP_402
CAP_805-1
CAP_805-1
CAP_402
CAP_805-1
CAP_603
CAP_402
CAP_603
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_1808
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402-LF
CAP_402-LF
CAP_402
CAP_402
CAP_805-1
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603-1
CAP_603-1
CAP_402
CAP_402
115
C7201
C7203
C7208
C7212
C7215
C7235
C7254
C7255
C7290
C7300
C7301
C7302
C7303
C7304
C7310
C7324
C7330
C7331
C7332
C7335
C7340
C7341
C7342
C7345
C7360
C7361
C7364
C7370
C7372
C7381
C7382
C7390
C7391
C7392
C7393
C7400
C7401
C7402
C7403
C7404
C7410
C7424
C7430
C7431
C7432
C7435
C7440
C7441
C7442
C7445
C7460
C7461
C7464
C7470
C7472
C7480
C7481
C7482
C7490
C7491
C7492
C7493
C7500
C7501
C7502
C7503
C7506
C7507
C7508
C7509
C7510
C7530
C7531
C7532
C7533
C7534
C7540
C7541
C7542
C7543
C7544
C7550
C7551
C7552
C7553
C7555
C7559
C7560
C7564
C7585
C7586
C7587
C7588
C7589
C7590
C7591
C7592
C7593
C7594
C7595
C7596
C7597
C7598
C7599
C7600
C7601
C7602
C7604
C7605
C7607
C7608
C7609
C7612
C7613
C7621
C7622
C7624
C7625
C7626
C7628
C7629
C7630
C7631
C7632
CAP_1206-1
CAP_402
CAP_1206-1
CAP_402
CAP_603
CAP_603
CAP_P_TH
CAP_1206-1
CAP_402
CAP_P_CASE-D2-SM
CAP_805
CAP_402
CAP_P_CASE-D2-SM
CAP_805
CAP_603
CAP_402
CAP_603-1
CAP_603
CAP_402
CAP_402
CAP_P_TH
CAP_1206-1
CAP_1206-1
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_1206-1
CAP_1206-1
CAP_P_CASE-D2-SM
CAP_P_CASE-D2-SM
CAP_805
CAP_805
CAP_P_CASE-D2-SM
CAP_805
CAP_402
CAP_P_CASE-D2-SM
CAP_805
CAP_603
CAP_402
CAP_603-1
CAP_603
CAP_402
CAP_402
CAP_P_TH
CAP_1206-1
CAP_1206-1
CAP_402
CAP_603-1
CAP_603
CAP_402
CAP_402
CAP_402
CAP_P_TH
CAP_1206-1
CAP_1206-1
CAP_P_TH
CAP_P_TH
CAP_805
CAP_805
CAP_603
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_P_TH
CAP_603
CAP_P_TH
CAP_1206-1
CAP_1206-1
CAP_805
CAP_805
CAP_P_CASE-D2-SM
CAP_P_CASE-D2-SM
CAP_P_CASE-D2-SM
CAP_402
CAP_805-1
CAP_805-1
CAP_402
CAP_P_CASE-C3
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
7
m78[72D2]
m78[72C2]
m78[72D2]
m78[72C3]
m78[72C5]
m78[72D6]
m78[72D2]
m78[72D2]
m78[72C4]
m78[73C8]
m78[73C8]
m78[73B7]
m78[73C7]
m78[73C8]
m78[73C7]
m78[73B7]
m78[73D6]
m78[73C6]
m78[73B5]
m78[73B6]
m78[73D7]
m78[73D7]
m78[73D6]
m78[73B3]
m78[73D2]
m78[73C2]
m78[73B2]
m78[73B2]
m78[73B4]
m78[73D2]
m78[73D2]
m78[73C1]
m78[73C2]
m78[73C1]
m78[73C1]
m78[74C8]
m78[74C8]
m78[74B7]
m78[74C7]
m78[74C8]
m78[74C7]
m78[74B7]
m78[74D6]
m78[74C6]
m78[74B5]
m78[74B6]
m78[74D7]
m78[74D7]
m78[74D6]
m78[74B3]
m78[74D2]
m78[74C2]
m78[74B2]
m78[74B2]
m78[74B4]
m78[74D3]
m78[74D2]
m78[74D2]
m78[74C2]
m78[74C1]
m78[74C1]
m78[74C1]
m78[75D5]
m78[75D6]
m78[75D6]
m78[75C2]
m78[75C8]
m78[75C6]
m78[75C7]
m78[75D4]
m78[75C5]
m78[75D5]
m78[75D4]
m78[75D5]
m78[75D5]
m78[75D4]
m78[75C3]
m78[75C3]
m78[75C2]
m78[75C2]
m78[75C2]
m78[75B4]
m78[75A6]
m78[75A4]
m78[75A6]
m78[75A4]
m78[75B5]
m78[75D8]
m78[75C3]
m78[75A3]
m78[75A2]
m78[75A2]
m78[75A2]
m78[75A1]
m78[75B3]
m78[75B2]
m78[75B2]
m78[75B2]
m78[75B1]
m78[75B3]
m78[75B2]
m78[75B2]
m78[75B2]
m78[75B1]
m78[76C4]
m78[76A4]
m78[76A4]
m78[76A3]
m78[76B5]
m78[76A3]
m78[76D2]
m78[76D7]
m78[76A7]
m78[76A7]
m78[76B6]
m78[76C5]
m78[76C6]
m78[76B6]
m78[76B6]
m78[76B7]
m78[76B7]
m78[76A5]
m78[76C7]
m78[76C2]
C7640
C7641
C7642
C7643
C7650
C7651
C7652
C7661
C7662
C7664
C7665
C7666
C7668
C7669
C7670
C7680
C7681
C7682
C7689
C7690
C7691
C7692
C7693
C7700
C7701
C7702
C7705
C7706
C7707
C7710
C7712
C7715
C7800
C7801
C7810
C7811
C7850
C7851
C7890
C7891
C7895
C7896
C7899
C8400
C8401
C8420
C8421
C8422
C8423
C8424
C8425
C8426
C8427
C8428
C8429
C8430
C8431
C8432
C8433
C8434
C8435
C8436
C8437
C8438
C8439
C8440
C8441
C8442
C8443
C8444
C8445
C8446
C8447
C8448
C8449
C8450
C8451
C8500
C8570
C9000
C9001
C9010
C9020
C9130
C9131
C9140
C9141
C9142
C9143
C9144
C9145
C9160
C9161
C9162
C9163
C9410
C9411
C9413
C9414
C9800
C9801
C9802
D2185
D2186
D2702
CAP_1206-1
CAP_1206-1
CAP_1206-1
CAP_1206-1
CAP_805
CAP_P_CASE-D3L
CAP_P_CASE-D3L
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_1206-1
CAP_1206-1
CAP_P_SM-1
CAP_402
CAP_805
CAP_P_CASE-D3L
CAP_P_CASE-D3L
CAP_P_CASE-D3L
CAP_805
CAP_402
CAP_402
CAP_805
CAP_805
CAP_805
CAP_805
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_P_SM-LF
CAP_805
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_603-1
CAP_402
CAP_402
CAP_1210
CAP_402
CAP_805-1
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_402
CAP_603
CAP_402
CAP_402
CAP_402
CAP_805
CAP_402
CAP_402
DIODE_SCHOT_SOT23
DIODE_SCHOT_SOT23
DIODE_SCHOT_6PB_SOT363
DIODE_SCHOT_6PB_SOT363
ZENER_SOT23
DIODE_SCHOT_3P_A_SC75
DIODE_SCHOT_3P_A_SC75
DIODE_SCHOT_3P_A_SC75
DIODE_3P_2NC_SOT23-L
F
DIODE_SOT23
DIODE_SOT23
DIODE_SOT23
DIODE_SCHOT_SMB
DIODE_SCHOT_SMB
DIODE_SCHOT_SMB
DIODE_SCHOT_5P_TLM83
D4390
D4600
D4601
D4602
D5350
D5600
D5601
D5700
D7100
D7101
D7200
D7300
D7301
D7373
D7374
D7400
D7401
D7473
D7474
D7520
D7600
D7601
D7624
D7664
D7810
D7890
D9400
D9410
DE4300
DP4310
DP4311
DP4320
DP4321
DS4599
F4300
F4310
F9410
FL4300
FL4310
J600
J1000
J1000
J1300
J2800
J3100
J3200
J3400
J3900
J4300
J4301
3
DIODE_SCHOT_SOT23
DIODE_SCHOT_5P_TLM83
3
DIODE_SCHOT_SOT23
DIODE_SCHOT_5P_TLM83
3
DIODE_SCHOT_SOT23
DIODE_SCHOT_5P_TLM83
3
DIODE_SCHOT_SOT23
DIODE_SCHOT_5P_TLM83
3
DIODE_SCHOT_5P_TLM83
3
DIODE_SCHOT_5P_TLM83
3
DIODE_SCHOT_SOD-323
DIODE_SCHOT_SOD-323
DIODE_SCHOT_SOD-123
DIODE_SCHOT_SOD-123
ZENER_CASE425
DIODE_SCHOT_SOD-123
DIODE_SCHOT_SM
DIODE_DUAL_6P_SOT-36
3
DIODE_DUAL_6P_SOT-36
3
DIODE_DUAL_6P_SOT-36
3
DIODE_DUAL_6P_SOT-36
3
LED_2.0X1.25MM-SM
FUSE_SM
FUSE_SM
FUSE_805
FILTER_4P_L701-SM
FILTER_4P_L701-SM
CON_M12RT_D_THB_M-RT
-TH
MEROM_BGA-SKT-P
MEROM_BGA-SKT-P
CON_F60ST_D_SM1_F-ST
-SM
BATTERY_2P_SM
CON_F200RT_DDR2DIMM_
5MT_SM_F-RT-SM
CON_F200RT_DDR2DIMM_
5MT_SM_F-RT-SM
CON_F52RT_D2MT_SM_FRT-SM
CON_RJ45_8ANG_D3MT_T
H_F-ANG-TH
CON_F9ANG_1394B_D6MT
_TH_F-ANG-TH1
CON_F6ANG_S3MT_1394A
_TH_F-ANG-TH
CON_M50ST_D2MT_SM1_M
-ST-SM
CON_M7ST_SATA_SM_M-S
T-SM
CON_F4ANG_S4MT_USB_T
H_F-ANG-TH
CON_F4ANG_S4MT_USB_T
H_F-ANG-TH
CON_F4ANG_S4MT_USB_T
H_F-ANG-TH
CON_M5ST_S2MT_SM_M-S
T-SM
CON_F10ST_D_SMA_F-ST
-SM
CON_M2ST_S2MT_SM_M-S
T-SM
CON_M2ST_S2MT_SM_M-S
T-SM
CON_F30STSM_5047_SM1
CON_M5ST_S2MT_SM_PN1
VD_M-ST-SM
CON_M2ST_S2MT_SM_M-S
T-SM
CON_M2RT_S2MT_SM_M-R
T-SM
CON_M3RT_S2MT_SM_M-R
T-SM
CON_2RTSM_125_SM-2MT
-BLK-LF
CON_M5ST_S2MT_SM_PN1
VD_M-ST-SM
CON_M4RT_S2MT_SM_M-R
T-SM
CON_M4RT_S2MT_SM_M-R
T-SM
CON_4SM_WRIB_85205-0
401-BLK-ST-SM
CON_M7ST_S2MT_SM_M-S
T-SM
CON_F232RT_MXM_SM1_F
-RT-SM
CON_F232RT_MXM_SM1_F
-RT-SM
CON_F30ST_D_SM_F-STSM
CON_DVI_F32ST_Q2MT_S
M_F-ST-SM
CON_F20RT_S2MT_SM1_F
-RT-SM
IND_0603
IND_1210
IND_0603
IND_0603
IND_0805
IND_0805
IND_0805-1
IND_0805
IND_1210
IND_0402
IND_0402
IND_0402
IND_0805-1
IND_0805-1
IND_0805
IND_0402-LF
IND_0402-LF
IND_0402-LF
L4300
L4301
L4610
L4612
L4620
L4622
L4630
L4632
L4700
L4701
L4710
L5050
L7100
L7101
L7200
L7300
L7360
L7400
L7460
m78[73C6]
m78[73B3]
m78[73C3]
m78[74B6]
m78[74C6]
m78[74B3]
m78[74C4]
m78[75C4]
m78[76B7]
m78[76B2]
m78[76C6]
m78[76C3]
m78[78D7]
m78[78D2]
m78[94C1]
m78[94D6]
m78[43D7]
m78[43D4 43D3]
m78[43C4 43C3]
L7580
m78[43B5 43B4]
J4510
m78[45C2]
m78[43D6]
m78[43D6]
m78[94D5]
m78[43B3]
m78[43B3]
m78[6D7]
m78[10C3 10D7]
m78[11D3 11D7]
m78[13C4]
m78[28D8]
m78[31D5]
m78[32D5]
m78[34C5]
m78[39C3]
m78[43C2]
m78[43B2]
J4610
J4620
J4630
J4700
J4720
J5010
J5050
J5100
J5500
J5510
J5511
J5550
J5551
J5560
J5600
J5601
J5700
J5880
J8400
J8400
J9002
J9410
J9800
m78[28D6]
L2150
L2173
L2181
L2183
L2190
L2195
L2700
L2702
L2703
L2901
L2902
L2903
L3800
L3810
L3900
L4200
L4210
L4211
m78[43A6]
m78[46C2]
m78[46B5]
m78[46A5]
m78[53C2]
m78[56C4]
m78[56B4]
m78[57C4]
m78[71D2]
m78[71B2]
m78[72C3]
m78[73B6]
m78[44C4]
m78[45D7]
m78[46D1]
m78[46B4]
m78[46A4]
m78[47B5]
m78[47D2]
m78[50C6]
m78[50A3]
m78[51B5]
m78[55D7]
m78[55A7]
m78[55A5]
m78[55B7]
m78[55B6]
m78[55D6]
m78[56D3]
m78[56B2]
m78[57C2]
m78[58C6]
m78[84C5]
m78[85C6]
m78[90B7]
m78[94D5]
m78[98C5]
m78[21A7]
m78[21D4]
m78[21D2]
m78[21C2]
m78[21B3]
m78[21A3]
m78[27C8]
m78[27A7]
m78[27A7]
m78[29D7]
m78[29D3]
m78[29C7]
m78[38D7]
m78[38B6]
m78[39D7]
m78[42D5]
m78[42B2]
m78[42B2]
L7620
L7680
L7700
L7710
L9000
L9140
L9141
L9142
L9160
L9161
L9400
L9401
L9402
L9403
L9410
LED601
LED602
LED603
LED604
LED3900
LED3901
LED3902
LED3903
LED4400
PP1000
PP1001
PP1002
PP1003
PP1004
PP1005
PP1006
PP1007
PP1008
PP1009
PP1010
PP1011
PP1012
PP1013
PP1014
PP1015
PP1016
PP1017
PP1018
PP1019
PP1020
PP1021
PP1022
PP1023
PP1024
PP1025
PP1026
PP1027
PP1028
PP1029
PP1030
PP1031
PP1032
PP1033
PP1034
PP1035
PP1400
PP1401
PP1402
PP1403
PP1404
PP1405
PP1406
PP1407
PP1408
PP1409
PP1410
PP1411
PP1412
PP1413
PP1414
PP1415
PP1416
PP1417
PP1418
PP1419
PP1420
PP1421
PP1422
PP1423
PP1424
PP1425
PP1426
PP1427
PP1428
PP1429
PP1430
PP1431
PP1432
PP1433
PP1434
PP1435
PP1436
PP1437
PP1438
PP1439
PP1440
PP1441
IND_SM
IND_SM
IND_SM
FILTER_4P_L701-SM
IND_SM
FILTER_4P_L701-SM
IND_SM
FILTER_4P_L701-SM
IND_SM
FILTER_4P_L701-SM
FILTER_4P_L701-SM
IND_3.8X3.8X1.5MM
IND_HM56-11120-TH
IND_HM56-11120-TH
IND_HM56-11120-TH
IND_MMD06EZ-SM
IND_MMD06EZ-SM
IND_MMD06EZ-SM
IND_IHLP5050-MMD12CE
-SM
IND_IHLP5050-MMD12CE
-SM
IND_MMD06EZ-SM
IND_HM56-11123-TH
IND_SM-MSS5131
IND_IHLP
IND_SM
IND_0402
IND_0402
IND_0402
IND_0402
IND_0402
FILTER_4P_SM
FILTER_4P_SM
FILTER_4P_SM
FILTER_4P_SM
IND_SM-1
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
LED_2.0X1.25MM-SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
m78[43D3]
m78[43B4]
m78[46D3]
m78[46D3]
m78[46C6]
m78[46B6]
m78[46B6]
m78[46A6]
m78[47D6]
m78[47B6]
m78[47A6]
m78[50A4]
m78[71D2]
m78[71B2]
m78[72C3]
m78[73C7]
m78[73C2]
m78[74C7]
m78[74C2]
y
r
a
n
i
m78[43A5 43A4]
m
il
J4401
e
r
D2800
m78[76D6]
m78[76D6]
m78[76D6]
m78[76D6]
m78[76B7]
m78[76B8]
m78[76B8]
m78[76B3]
m78[76C4]
m78[76C3]
m78[76B4]
m78[76B3]
m78[76B2]
m78[76B2]
m78[76B4]
m78[76D3]
m78[76D4]
m78[76D4]
m78[76B4]
m78[76B2]
m78[76B1]
m78[76B1]
m78[76B1]
m78[77C6]
m78[77C5]
m78[77B3]
m78[77B3]
m78[77B3]
m78[77B3]
m78[77D6]
m78[77D4]
m78[77D3]
m78[78D4]
m78[78D4]
m78[78D6]
m78[78D7]
m78[78C4]
m78[78C4]
m78[78D2]
m78[78D2]
m78[78B7]
m78[78A6]
m78[78B6]
m78[84C5]
m78[84C7]
m78[84C7]
m78[84C7]
m78[84C7]
m78[84C7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84B7]
m78[84A7]
m78[84A7]
m78[84A7]
m78[84A7]
m78[84A7]
m78[84A7]
m78[84A7]
m78[84A7]
m78[84A7]
m78[84A7]
m78[84A7]
m78[85A5]
m78[85D2]
m78[90C7]
m78[90C5]
m78[90A8]
m78[90C5]
m78[91B7]
m78[91B7]
m78[91A5]
m78[91B5]
m78[91B5]
m78[91A6]
m78[91B6]
m78[91B6]
m78[91B4]
m78[91B4]
m78[91A2]
m78[91A2]
m78[94C3]
m78[94D3]
m78[94C2]
m78[94C2]
m78[98C5]
m78[98C4]
m78[98C4]
m78[21C4]
m78[21B4]
m78[27D8 27D8]
m78[75C3]
m78[76B7]
m78[76B2]
m78[77B4]
m78[77D4]
m78[90C6]
m78[91A5]
m78[91B5]
m78[91B5]
m78[91B2]
m78[91A2]
m78[94D7]
m78[94D7]
m78[94C7]
m78[94B7]
m78[94D4]
m78[6A8]
m78[6A7]
m78[6A6]
m78[6B7]
m78[39A7]
m78[39A7]
m78[39A7]
m78[39A6]
m78[44B5]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7D7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7D6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
m78[7C6]
116
PP1442
PP1443
PP1444
PP1445
PP1446
PP1447
PP1448
PP1449
PP1450
PP1451
PP1452
PP1453
PP1454
PP1455
PP1456
PP1457
PP1458
PP1459
PP1460
PP1461
PP1462
PP1463
PP1464
PP1465
PP1466
PP1467
PP1468
PP1469
PP1470
PP1471
PP1472
PP1473
PP1474
PP1475
PP1476
PP1477
PP1478
PP1479
PP1480
PP1481
PP1482
PP1483
PP1484
PP1485
PP1486
PP1487
PP1488
PP1489
PP1490
PP1491
PP1492
PP1493
PP2100
PP2101
PP2102
PP2103
PP2104
PP2105
PP2106
PP2107
PP2108
PP2109
PP2110
PP2111
PP2112
PP2113
PP2114
PP2115
PP2116
PP2117
PP2118
PP2119
PP2120
PP2121
PP2122
PP2123
PP2124
PP2125
PP2126
PP2127
PP2128
PP2129
PP2130
PP2131
PP2132
PP2133
PP3700
PP3701
PP3702
PP3703
PP3704
PP4000
PP4001
PP4002
PP4003
PP4004
PP4900
PP4901
PP4902
PP4903
Q600
Q610
Q3800
Q3810
Q4200
Q4600
Q5050
Q5052
Q5077
Q5095
Q5190
Q5339
Q5341
Q5600
Q5602
Q5603
Q5605
Q5700
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
PROBEPOINT_SM
TRA_2N7002_SOT23-LF
TRA_2N7002_SOT23-LF
TRA_PBSS5540Z_SOT223
TRA_PBSS5540Z_SOT223
TRA_BCP69_SOT223-4
TRA_2N7002_SOT23-LF
TRA_DUAL_MMDT3906_SO
T-363
TRA_2N7002_SOT23-LF
TRA_DUAL_MMDT3904_SO
T-363-LF
TRA_2N7002DW_SOT-363
TRA_DUAL_MMDT3904_SO
T-363-LF
TRA_2N7002_SOT23-LF
TRA_FDC796N_SUPERSOT
-6
TRA_NTHS5443T1_1206A
-03-LF
TRA_2N7002_SOT23-LF
TRA_NTHS5443T1_1206A
-03-LF
TRA_2N7002_SOT23-LF
TRA_NTHS5443T1_1206A
7
m78[7C6]
m78[7C6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7B6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7A6]
m78[7C7]
m78[7C7]
m78[7C7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7B7]
m78[7A7]
m78[7A7]
m78[7A7]
m78[7A7]
m78[7A7]
m78[7A7]
m78[7A7]
m78[7A7]
m78[7A7]
m78[7A7]
m78[7A7]
m78[7B7]
m78[7B7]
m78[7D5]
m78[7D5]
m78[7D5]
m78[7D5]
m78[7D5]
m78[7D5]
m78[7D5]
m78[7D5]
m78[7D5]
m78[7D5]
m78[7C5]
m78[7C5]
m78[7C5]
m78[7C5]
m78[6A8]
m78[6D7]
m78[38C5]
m78[38A4]
m78[42D6]
m78[46C8]
m78[50A6 50A7]
Q5702
Q7006
Q7007
Q7100
Q7101
Q7102
Q7103
Q7104
Q7105
Q7200
Q7201
Q7204
Q7300
Q7360
Q7400
Q7460
Q7461
Q7520
Q7521
Q7603
Q7620
Q7640
Q7660
Q7661
Q7800
Q7801
Q7810
Q7811
Q7850
Q7851
Q7890
Q7891
Q7892
Q7895
Q7896
Q7897
Q9000
Q9001
Q9411
R600
R602
R604
R605
R610
R1002
R1003
R1004
R1005
R1006
R1007
R1012
R1016
R1017
R1018
R1019
R1020
R1021
R1022
R1023
R1024
R1030
R1100
R1101
R1290
R1291
R1292
R1293
R1294
R1295
R1296
R1303
R1315
R1330
R1331
R1399
R1410
R1411
R1415
R1420
R1421
R1425
R1426
R1510
R1610
R1611
R1620
R1622
R1624
R1630
R1631
R1640
R1641
R1655
R1659
R1666
R1669
R1670
R1690
-03-LF
TRA_2N7002_SOT23-LF
TRA_DUAL_SSM6N15FE_S
OT563
TRA_DUAL_SSM6N15FE_S
OT563
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK-DFN
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK-DFN
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK-DFN
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK-DFN
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK-DFN
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK-DFN
TRA_FDMS9620S_MLP
TRA_FDMS9620S_MLP
TRA_FDMS9620S_MLP
TRA_FDM6296_MICROFET
3X3
TRA_FDM6296_MICROFET
3X3
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK-DFN
TRA_2N7002_SOT23-LF
TRA_FDMS9620S_MLP
TRA_SINGLE_MOSFET_PC
HN_SOT-23
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK
TRA_MOSFET_NCHN_5P1_
MLP5X6-LFPAK-DFN
TRA_IRF7410_SO-8
TRA_SINGLE_MOSFET_NC
HN_SOT23
TRA_IRF7410_SO-8
TRA_SINGLE_MOSFET_NC
HN_SOT23
TRA_IRF7410_SO-8
TRA_SINGLE_MOSFET_NC
HN_SOT23
TRA_MOSFET_PCHN_8P1_
SOI
TRA_SINGLE_MOSFET_NC
HN_SOT23
TRA_2N7002DW_SOT-363
TRA_MOSFET_NCHN_8P_S
O-8
TRA_2N7002_SOT23-LF
TRA_SINGLE_MOSFET_NC
HN_SOT23
TRA_SI3443DV_TSOP-LF
TRA_2N7002_SOT23-LF
TRA_2N7002DW_SOT-363
RES_402
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
m78[70A6 70B6]
m78[71D3]
m78[71D3]
m78[71C3]
m78[71B3]
m78[71C3]
m78[71B3]
m78[72C4]
m78[72C4]
m78[72C3]
m78[73C6]
m78[73C3]
m78[74C6]
m78[74C3]
m78[74C3]
m78[75D4]
m78[75C4]
m78[76A6]
m78[76C7]
m78[53B7]
m78[76C3]
m78[76B3]
m78[78D4]
m78[78D5]
m78[78D7]
m78[78D8]
m78[78C4]
m78[78C5]
m78[78D2]
m78[78C2]
m78[78C2 78C1]
m78[78B6]
m78[50C2 50C2]
m78[51B3 51C4]
m78[53B7]
m78[53B6]
m78[56D4]
m78[56D6]
m78[56B4]
m78[56B6]
m78[57D4]
m78[90C7]
m78[90B7]
m78[94D2 94C2]
m78[6A7]
m78[6A8]
m78[6B7]
m78[6A6]
m78[6D6]
m78[10D5]
m78[10C5]
m78[10C5]
m78[10B5]
m78[10B5]
m78[10A4]
m78[10A4]
m78[10B1]
m78[10B1]
m78[10B1]
m78[10B1]
m78[10B7]
m78[10B7]
m78[10A7]
m78[10A7]
m78[10A7]
m78[10A4]
m78[11B5]
m78[11A5]
m78[12C2]
m78[12C2]
m78[12C2]
m78[12C2]
m78[12C2]
m78[12C2]
m78[12C2]
m78[13B2]
m78[13C6]
m78[13C5]
m78[13C5]
m78[13C7]
m78[14B6]
m78[14A6]
m78[14A6]
m78[14B6]
m78[14B6]
m78[14A7]
m78[14A7]
m78[15D3]
m78[16C2]
m78[16C2]
m78[16C1]
m78[16C1]
m78[16C1]
m78[16B7]
m78[16B7]
m78[16A3]
m78[16A3]
m78[16D7]
m78[16D7]
m78[16C7]
m78[16C7]
m78[16C7]
m78[16A3]
RES_402
RES_603
RES_603
RES_603
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
m78[16A3]
m78[21B7]
m78[21B7]
m78[21A7]
m78[21D4]
m78[21C2]
m78[21C3]
m78[21B3]
m78[21B3]
m78[21A3]
m78[22B2]
m78[22A2]
m78[22B2]
m78[22A2]
m78[23D7]
m78[23D7]
m78[23D6]
m78[23D3]
m78[23C3]
m78[23C3]
m78[23D3]
m78[23C3]
m78[23C3]
m78[23D6]
m78[23D6]
m78[23C7]
m78[23C7]
m78[23C7]
m78[23B7]
m78[24C7]
m78[24C7]
m78[24C7]
m78[24C7]
m78[24C7]
m78[24C6]
m78[24B6]
m78[24C6]
m78[24C6]
m78[24C6]
m78[24C3]
m78[24B3]
m78[24B5]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[24A3]
m78[25D7]
m78[25D7]
m78[25D6]
m78[25D6]
m78[25D6]
m78[25D6]
m78[25D6]
m78[25A8]
m78[25A8]
m78[25A7]
m78[25A7]
m78[25A7]
m78[25B3]
m78[25C2]
m78[25C2]
m78[25C2]
m78[25B2]
m78[25B2]
m78[25B2]
m78[25B4]
m78[25B4]
m78[25D3]
m78[25D2]
m78[25D2]
m78[25D3]
m78[25A4]
m78[25A4]
m78[25A4]
m78[25A4]
m78[25D6]
m78[25D7]
m78[25D7]
m78[25D7]
m78[25D7]
m78[25A4]
m78[25A4]
m78[25A4]
m78[27A8]
m78[27D8]
m78[27D8]
m78[28B2]
m78[27A8]
m78[28D5]
m78[28A6]
m78[28D6]
m78[28D7]
m78[28C7]
m78[28C7]
m78[28B1]
m78[28D2]
m78[28D2]
m78[28D2]
m78[28C2]
m78[28D2]
m78[28C2]
m78[28C2]
m78[28A4]
m78[28A4]
m78[29C6]
m78[29D3]
m78[29C3]
m78[29B6]
m78[30A4]
m78[30A4]
e
r
R3030
R3032
R3033
R3034
R3035
R3046
R3047
R3050
R3051
R3052
R3053
R3054
R3055
R3067
R3080
R3081
R3082
R3083
R3084
R3085
R3086
R3087
R3088
R3089
R3090
R3091
R3098
R3100
R3101
R3140
R3141
R3200
R3201
R3240
R3241
R3300
R3301
R3302
R3303
R3304
R3305
R3400
R3401
R3410
R3720
R3740
R3741
R3742
R3743
R3744
R3745
R3746
R3747
R3760
R3765
R3780
R3781
R3801
R3811
R3820
R3821
R3880
R3890
R3901
R3902
R3903
R3904
R3910
R3911
R3912
R3913
R4000
R4001
R4002
R4010
R4011
R4012
R4013
R4080
R4090
R4200
R4250
R4251
R4252
R4260
R4261
R4262
R4300
R4301
R4302
R4335
R4350
R4351
R4352
R4353
R4354
R4360
R4361
R4362
R4363
R4364
R4390
R4403
R4451
R4453
R4457
R4458
R4459
R4590
R4599
R4600
R4650
R4651
R4652
R4701
R4702
R4710
R4711
R4720
R4721
R4901
R4902
R4903
R4909
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_603
RES_402
RES_603
RES_603
RES_603
RES_603
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_2512
RES_2512
RES_805
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
m78[30A4]
m78[30C7]
m78[30C7]
m78[30A7]
m78[30A7]
m78[30C1]
m78[30C1]
m78[30D1]
m78[30D1]
m78[30D1]
m78[30C1]
m78[30C1]
m78[30C1]
m78[30D7]
m78[30C7]
m78[30C7]
m78[30C7]
m78[30C7]
m78[30B7]
m78[30B7]
m78[30B7]
m78[30B7]
m78[30B7]
m78[30B7]
m78[30B7]
m78[30B7]
m78[30B4]
m78[31D2]
m78[31C2]
m78[31A3]
m78[31A3]
m78[32C2]
m78[32C2]
m78[32A3]
m78[32A3]
m78[33D5]
m78[33D5]
m78[33D5]
m78[33D5]
m78[33C5]
m78[33C5]
m78[34C7]
m78[34C7]
m78[34A5]
m78[37C6]
m78[37B7]
m78[37B7]
m78[37B6]
m78[37B6]
m78[37B6]
m78[37B5]
m78[37B5]
m78[37B5]
m78[37C2]
m78[37B2]
m78[37B2]
m78[37B2]
m78[38C6]
m78[38A5]
m78[38B8]
m78[38B8]
m78[38D3]
m78[38C2]
m78[39A7]
m78[39A7]
m78[39A7]
m78[39A6]
m78[39A4]
m78[39A4]
m78[39A4]
m78[39A4]
m78[40B6]
m78[40C7]
m78[40C7]
m78[40C2]
m78[40B2]
m78[40B2]
m78[40C2]
m78[40B8]
m78[40B6]
m78[42C7]
m78[42D3]
m78[42D2]
m78[42D2]
m78[42C3]
m78[42C2]
m78[42C2]
m78[43D7]
m78[43D7]
m78[43D7]
m78[43B2]
m78[43C7]
m78[43C7]
m78[43B7]
m78[43B7]
m78[43B7]
m78[43C7]
m78[43C7]
m78[43B7]
m78[43B7]
m78[43B7]
m78[43A7]
m78[44C5]
m78[44C5]
m78[44C4]
m78[44B6]
m78[44B5]
m78[44B5]
m78[45B1]
m78[45C2]
m78[46D8]
m78[46D4]
m78[46C4]
m78[46C4]
m78[47B6]
m78[47B6]
m78[47A6]
m78[47A6]
m78[47C2]
m78[47C2]
m78[49C1]
m78[49C2]
m78[49C1]
m78[49C1]
y
r
a
n
i
m
il
m78[78A7]
m78[78A6]
m78[50A8]
m78[50D1 50D2]
R1691
R2141
R2145
R2150
R2170
R2183
R2185
R2186
R2190
R2195
R2200
R2201
R2202
R2203
R2300
R2301
R2302
R2303
R2304
R2305
R2306
R2308
R2309
R2310
R2311
R2313
R2314
R2315
R2316
R2400
R2401
R2402
R2403
R2404
R2405
R2406
R2407
R2408
R2409
R2413
R2414
R2415
R2423
R2424
R2425
R2426
R2427
R2428
R2429
R2430
R2431
R2432
R2433
R2436
R2437
R2438
R2439
R2440
R2441
R2442
R2500
R2502
R2504
R2505
R2506
R2507
R2510
R2511
R2512
R2514
R2515
R2516
R2523
R2524
R2525
R2526
R2527
R2528
R2529
R2530
R2531
R2532
R2533
R2534
R2535
R2536
R2544
R2545
R2546
R2547
R2550
R2551
R2552
R2553
R2596
R2597
R2598
R2700
R2701
R2702
R2710
R2735
R2800
R2803
R2806
R2807
R2809
R2810
R2850
R2881
R2883
R2885
R2890
R2891
R2892
R2893
R2896
R2897
R2900
R2901
R2902
R2903
R3026
R3027
m78[57C5]
m78[70A7 70B6]
117
R4950
R4951
R4998
R4999
R5000
R5010
R5032
R5033
R5034
R5035
R5036
R5037
R5038
R5039
R5040
R5041
R5042
R5043
R5046
R5047
R5048
R5050
R5051
R5052
R5053
R5055
R5056
R5057
R5058
R5059
R5070
R5071
R5078
R5080
R5082
R5083
R5084
R5086
R5087
R5088
R5090
R5091
R5092
R5093
R5094
R5096
R5190
R5191
R5192
R5200
R5201
R5230
R5231
R5250
R5251
R5260
R5261
R5270
R5271
R5280
R5281
R5290
R5291
R5309
R5339
R5340
R5341
R5342
R5343
R5350
R5351
R5352
R5353
R5354
R5355
R5370
R5500
R5501
R5510
R5511
R5512
R5570
R5600
R5601
R5602
R5603
R5605
R5606
R5607
R5609
R5610
R5611
R5698
R5699
R5700
R5701
R5703
R5704
R5705
R5797
R6100
R6101
R6114
R6190
R6191
R6193
R7000
R7001
R7002
R7003
R7005
R7006
R7007
R7008
R7010
R7011
R7013
R7014
R7018
R7019
R7020
R7021
R7030
R7031
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_2512-1
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_805
RES_805
RES_402
RES_805
RES_805
RES_1206
RES_402
RES_402
RES_402
RES_402
RES_805
RES_805
RES_1206
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
7
m78[49C4]
m78[49C4]
m78[49C2]
m78[49D4]
m78[50D6]
m78[50C6]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50A1]
m78[50B1]
m78[50A1]
m78[50B6]
m78[50B7]
m78[50A7]
m78[50A6]
m78[50A3]
m78[50A3]
m78[50A6]
m78[50A5]
m78[50A4]
m78[50D2]
m78[50D3]
m78[50D1]
m78[50B1]
m78[50B1]
m78[50A1]
m78[50A1]
m78[50A1]
m78[50B1]
m78[50A1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[50B1]
m78[51B2]
m78[51C3]
m78[51C4]
m78[52D7]
m78[52D7]
m78[52A7]
m78[52A7]
m78[52D4]
m78[52D4]
m78[52C4]
m78[52C4]
m78[52D2]
m78[52D2]
m78[52C2]
m78[52C2]
m78[52B2]
m78[52B2]
m78[53D7]
m78[53B7]
m78[53A8]
m78[53B7]
m78[53B7]
m78[53B5]
m78[53C3]
m78[53C3]
m78[53C2]
m78[53D3]
m78[53D3]
m78[53D3]
m78[53C7]
m78[55B2]
m78[55A2]
m78[55B3]
m78[55B3]
m78[55B3]
m78[55D4]
m78[56C7]
m78[56A7]
m78[56D6]
m78[56D5]
m78[56D5]
m78[56D6]
m78[56B5]
m78[56B5]
m78[56B6]
m78[56B6]
m78[56A7]
m78[56C7]
m78[57C7]
m78[57D5]
m78[57D5]
m78[57D5]
m78[57D6]
m78[57C8]
m78[61C5]
m78[61C5]
m78[61B4]
m78[61B6]
m78[61B6]
m78[61B3]
m78[70D8]
m78[70D8]
m78[70C8]
m78[70C8]
m78[70D5]
m78[70D5]
m78[70D5]
m78[70D5]
m78[70D7]
m78[70C7]
m78[70D7]
m78[70C7]
m78[70D7]
m78[70C7]
m78[70D7]
m78[70C7]
m78[70C3]
m78[70C3]
R7032
R7033
R7034
R7035
R7036
R7037
R7038
R7039
R7040
R7041
R7060
R7061
R7062
R7063
R7064
R7065
R7066
R7070
R7080
R7081
R7092
R7100
R7101
R7102
R7103
R7104
R7105
R7106
R7107
R7108
R7109
R7110
R7111
R7112
R7114
R7115
R7116
R7117
R7118
R7119
R7120
R7121
R7122
R7123
R7126
R7127
R7130
R7131
R7140
R7141
R7142
R7143
R7197
R7199
R7200
R7201
R7203
R7204
R7241
R7250
R7300
R7301
R7306
R7310
R7311
R7312
R7313
R7321
R7323
R7331
R7356
R7361
R7371
R7382
R7383
R7384
R7390
R7391
R7400
R7401
R7406
R7421
R7423
R7431
R7456
R7461
R7471
R7483
R7490
R7491
R7500
R7501
R7504
R7505
R7506
R7507
R7508
R7510
R7521
R7522
R7539
R7551
R7556
R7600
R7601
R7602
R7603
R7604
R7606
R7607
R7612
R7613
R7614
R7615
R7616
R7617
R7618
R7621
R7624
R7625
R7626
R7627
R7628
R7629
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_1206
RES_1206
RES_402
RES_402
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
THERMISTER_402
RES_402
RES_402
THERMISTER_0603-LF
RES_603
RES_603
RES_402
RES_402
RES_402
RES_402
RES_402
RES_603
RES_1206
RES_402
RES_603
RES_402
RES_402
RES_402
RES_1206
RES_1206
RES_1206
RES_1206
RES_1206
RES_402
RES_402
RES_402
RES_1206
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_402
RES_402
RES_402
RES_1206
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_1206
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
m78[70C3]
m78[70C3]
m78[70D3]
m78[70B3]
m78[70B3]
m78[70B3]
m78[70B3]
m78[70C3]
m78[70C7]
m78[70B7]
m78[70A7]
m78[70A6]
m78[70A6]
m78[70B6]
m78[70B6]
m78[70C6]
m78[70C6]
m78[70C7]
m78[70D3]
m78[70D3]
m78[70B3]
m78[71C2]
m78[71C2]
m78[71B3]
m78[71D3]
m78[71C1]
m78[71B2]
m78[71B2]
m78[71B1]
m78[71C8]
m78[71B7]
m78[71B7]
m78[71B8]
m78[71D7]
m78[71B7]
m78[71B4]
m78[71B4]
m78[71B5]
m78[71B5]
m78[71C8]
m78[71D7]
m78[71D7]
m78[71A4]
m78[71A4]
m78[71C8]
m78[71C7]
m78[71B4]
m78[71B4]
m78[71B1]
m78[71C1]
m78[71D4]
m78[71C4]
m78[71D6]
m78[71C7]
m78[72C3]
m78[72B3]
m78[72C3]
m78[72C2]
m78[72C2]
m78[72C5]
m78[73B7]
m78[73B7]
m78[73C7]
m78[73A3]
m78[73A3]
m78[73A3]
m78[73A3]
m78[73C5]
m78[73B5]
m78[73C5]
m78[73C2]
m78[73C3]
m78[73C3]
m78[73C4]
m78[73B4]
m78[73B4]
m78[73B2]
m78[73B2]
m78[74B7]
m78[74B7]
m78[74C7]
m78[74C5]
m78[74B5]
m78[74C5]
m78[74C2]
m78[74C4]
m78[74C3]
m78[74B4]
m78[74B2]
m78[74B2]
m78[75D5]
m78[75C2]
m78[75D7]
m78[75C7]
m78[75C7]
m78[75D5]
m78[75C7]
m78[75C4]
m78[75C1]
m78[75C1]
m78[75D6]
m78[75B5]
m78[75C3]
m78[76C5]
m78[76A7]
m78[76A7]
m78[76A3]
m78[76A3]
m78[76A4]
m78[76A4]
m78[76A6]
m78[76D7]
m78[76D7]
m78[76D7]
m78[76D7]
m78[76D7]
m78[76D6]
m78[76C7]
m78[76C6]
m78[76B6]
m78[76C7]
m78[76B7]
m78[76B7]
m78[76C7]
R7630
R7631
R7661
R7664
R7665
R7666
R7667
R7668
R7669
R7670
R7692
R7700
R7701
R7702
R7703
R7704
R7705
R7710
R7711
R7712
R7713
R7800
R7801
R7810
R7811
R7850
R7851
R7870
R7871
R7888
R7889
R7891
R7892
R7893
R7894
R7895
R7896
R7897
R7898
R8500
R8501
R8502
R8503
R8505
R8570
R9000
R9001
R9002
R9003
R9070
R9074
R9075
R9090
R9099
R9140
R9141
R9142
R9160
R9161
R9400
R9402
R9403
R9404
R9405
R9408
R9409
R9410
R9411
R9412
R9413
R9414
R9415
R9420
R9421
R9422
RP3300
RP3305
RP3310
RP3330
RP3334
RP3338
RP3342
RP3346
RP3350
RP3354
RP3358
RP3362
S5000
m78[76A7]
m78[76A7]
m78[76C2]
m78[76C3]
m78[76B4]
m78[76C2]
m78[76B2]
m78[76B2]
m78[76C2]
m78[76C4]
m78[76A6]
m78[77C6]
m78[77C5]
m78[77B5]
m78[77B3]
m78[77B3]
m78[77B2]
m78[77D6]
m78[77D6]
m78[77D4]
m78[77C4]
m78[78D5]
m78[78D5]
m78[78D8]
m78[78D7]
m78[78C5]
m78[78C5]
m78[78B7]
m78[78B7]
m78[78C1]
m78[78C2]
m78[78D3]
m78[78D2]
m78[78D3]
m78[78D1]
m78[78A7]
m78[78A6]
m78[78B6]
m78[78B6]
m78[85C7]
m78[85C5]
m78[85C7]
m78[85A4]
m78[85B4]
m78[85D3]
m78[90C8]
m78[90C7]
m78[90C8]
m78[90C8]
m78[90B7]
m78[90B2]
m78[90B2]
m78[90C6]
m78[90C8]
m78[91A6]
m78[91B6]
m78[91B6]
m78[91B3]
m78[91A3]
m78[94D7]
m78[94D7]
m78[94D7]
m78[94C7]
m78[94C7]
m78[94C7]
m78[94C7]
m78[94D2]
m78[94D2]
m78[94D2]
m78[94C2]
m78[94C2]
m78[94B7]
m78[94D1]
m78[94D1]
m78[94C2]
m78[33C4 33C4
m78[33B4 33C4
m78[33D4 33A4
m78[33D4 33B4
m78[33B4 33B4
m78[33A4 33B4
m78[33B4 33C4
m78[33D4 33C4
m78[33B4 33A4
m78[33B4 33A4
m78[33C4 33C4
m78[33A4 33C4
m78[50D8]
U2300
U2300
U2300
U2300
U2803
U2900
S5010
SC0700
SC0701
SC0702
SDF0717
SDF0721
SDF0726
SDF0727
SDF0750
SDF0751
SDF3400
SDF4400
SDF4401
SDF4720
SDF4721
SDF9000
SDF9001
SDF9800
SDF9801
SDF9803
SDF9804
SW2800
T3900
U1400
U1400
U1400
U1400
U1400
U1400
U1400
SB_ICH8M_BGA
SB_ICH8M_BGA
SB_ICH8M_BGA
SB_ICH8M_BGA
MC74VHC1G00_SC70-5
CLK_SYN_SLG8LP537_QF
N
88E8058_QFN
EEPROM_M24C08_SO8
FW643_BGA
SWI_TPS2060_MSOP
SWI_TPS2068_MSOP
PI3USB10_TDFN
SMC_H8S2116_BGA
VDET_RN5VD_SOT23-5A
MM3120_LLP
ZXCT1010_SOT23-5
LM95214_LLP
EMC1043_MSOP
FLASH_SST25VF016B_SO
I_SOI
COMPARATOR_LM339A_SO
I-LF
MC74VHC1G08_SOT23-5LF
MC74VHC1G08_SOT23-5LF
ISL6260C_QFN
ISL6208_QFN
ISL6208_QFN
ISL6208_QFN
ISL6539_SSOP
ISL6539_SSOP
ISL6269_QFN
SN74LVC1G07_SC70
LREG_BD3533FVM_MSOP8
LTC3728L_QFN
COMPARATOR_LM393_SOI
-1-LF
TPS62050_MSOP
TPS62510_BQA
EEPROM_M24C02_SO8
VIDEO_TS3V330_SOP
74LVC1G125LF_SOT23-5
74LVC1G125LF_SOT23-5
VREF_REF3133_SOT23-3
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
SHORT_SM
CRYSTAL_4PIN_SM-LF
CRYSTAL_5X3.2-SM
CRYSTAL_SM-3-LF
CRYSTAL_HC49-USMD
CRYSTAL_SM-4
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
HOLE_VIA
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
MTGHOLE
U3700
U3780
U4000
U4600
U4601
U4650
U4900
U5000
U5050
U5350
U5500
U5570
U6100
U7052
U7056
U7100
U7101
U7102
U7201
U7300
U7400
U7500
U7501
U7550
a
n
i
U7600
U7601
33C4
33C4
33A4
33B4
33B4
33B4
33C4
33B4
33B4
33A4
33C4
33D4
m78[50C7]
m78[7B6]
m78[7B5]
m78[7B5]
m78[7A3]
m78[7A3]
m78[7A6]
m78[7A5]
m78[7A3]
m78[7A2]
m78[34A5]
m78[44D4]
m78[44A4]
m78[47D2]
m78[47C1]
m78[90B7]
m78[90A7]
m78[98D5]
m78[98D5]
m78[98B5]
m78[98B5]
m78[28A4]
33C4]
33C4]
33A4]
33B4]
33B4]
33A4]
33C4]
33C4]
33B4]
33B4]
33C4]
33A4]
m78[23D5]
m78[24B7 24D4]
m78[25D4]
m78[26D5 26D8]
m78[28A7]
m78[29C5]
m78[37C4]
m78[37B2]
m78[40C5]
m78[46C7]
m78[46D7]
m78[46D4]
m78[49A3 49C3 49B7 49D7]
m78[50D7]
m78[50A4]
m78[53C4]
m78[55B4]
m78[55D4]
m78[61C5]
y
r
U7010
m
il
e
r
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_805
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_805
RES_805
RES_402
RES_402
RES_402
RES_805
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RES_402
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
RPAK4P_SM-LF
SWI_TACT_4SM_EVQPH_S
M-LF
SWI_TACT_4SM_EVQPH_S
M-LF
SPRING_CLIP_1P_EMI_C
LIP-SM1
SPRING_CLIP_1P_EMI_C
LIP-SM1
SPRING_CLIP_1P_EMI_S
C57
PCB_STANDOFF
PCB_STANDOFF
HSK_NUT_TH
HSK_NUT_TH
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
PCB_STANDOFF
SWI_TACT_4SM_EVQPH_S
M-LF
XFR_LFE9245A_SOI
CRESTLINE_FCBGA
CRESTLINE_FCBGA
CRESTLINE_FCBGA
CRESTLINE_FCBGA
CRESTLINE_FCBGA
CRESTLINE_FCBGA
CRESTLINE_FCBGA
U7710
U7750
U8570
U9130
U9160
U9161
VR5065
XW4900
XW5309
XW5350
XW5500
XW5501
XW5502
XW5503
XW7100
XW7101
XW7102
XW7103
XW7104
XW7203
XW7204
XW7300
XW7400
XW7500
XW7600
Y2800
Y2901
Y3750
Y4000
Y5020
ZH500
ZH501
ZH502
ZH503
ZH504
ZH505
ZH506
ZH507
ZH508
ZH509
ZH510
ZH511
ZH512
ZH513
ZH514
ZH515
ZH516
ZH517
ZH518
ZH519
ZH520
ZH521
ZH522
ZH523
ZH524
ZH525
ZH526
ZH527
ZH528
ZH529
ZH0700
ZH0701
ZH0702
ZH0703
ZH0711
ZH0712
ZH0714
ZH0715
ZH0718
ZH0720
ZH0722
ZH0723
ZH0724
ZH0725
ZH0750
m78[70D6]
m78[70C2]
m78[70C2]
m78[71C6]
m78[71D5]
m78[71C5]
m78[72C7]
m78[73C5]
m78[74C5]
m78[75D6]
m78[75D8]
m78[75B4]
m78[76C5]
m78[76D6 76A7]
m78[77D5]
m78[77B4]
m78[85D2]
m78[91B7]
m78[91B4]
m78[91A4]
m78[50B8]
m78[49C2]
m78[53D7]
m78[53C3]
m78[55A4]
m78[55A4]
m78[55A4]
m78[55A4]
m78[71A6]
m78[71B2]
m78[71B1]
m78[71D2]
m78[71D1]
m78[72C3]
m78[72C2]
m78[73B4]
m78[74B4]
m78[75C5]
m78[76A5]
m78[28C7]
m78[29C6]
m78[37B5]
m78[40B7]
m78[50C8]
m78[7C1]
m78[7C1]
m78[7C1]
m78[7C1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7C1]
m78[7C1]
m78[7C1]
m78[7C1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7C1]
m78[7C1]
m78[7C1]
m78[7C1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7B1]
m78[7A5]
m78[7A5]
m78[7A4]
m78[7A4]
m78[7A6]
m78[7A5]
m78[7A5]
m78[7A5]
m78[7A5]
m78[7A4]
m78[7B4]
m78[7B4]
m78[7B3]
m78[7B3]
m78[7A4]
m78[39C5]
m78[14D4]
m78[15D4]
m78[16D5]
m78[17D3 17D7]
m78[18D3 18D7]
m78[19D5]
m78[20D4 20D7]
118