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BIPOLAR JUNCTION TRANSISTOR
1. Give reasons for the following (a) In a high junction transistor, the collector region has the highest resistivity and the emitter region has the lowest resistivity, the base region resistivity being in between. 2. Sketch the output V-I characteristics of an NPN transistor in common-emitter operation and indicate there on the different regions of importance. Explain how you would use these characteristics to determine hFE, ICBO and BVCBO of the transistor. 3. A silicon junction transistor operating at IE = 1 mA, VCE = 3V, has base-collector capacitory of 2 pf and base- emitter capacitance of 18pf. Determine the current gain bandwidth kT/q = 26mV at normal room temperature]
1. Explain the following, with neat sketches wherever necessary: (a) Input and output V-I characteristics of a junction transistor. 2. Define the following terms relating to a bipolar transistor: (i) B VCEO (ii) fr (iii) Fmax (iv) Risc time (v) Storage time 3. A silicon n-p-n transistor with, hFE = 100 ICBO = 0.1 µ A. Calculate the IC for this transistor under following base circuit conditions: (i) IB = 0 (ii) IB = 20 µ A (iii) VBE = 0 (iv) VCB = 0. 4. Draw the Ebers Moll model for a bipolar transistor. And using this, show that the collector- emitter voltage drop of a saturated transistor is higher in the normal mode of operation than in the inverted mode of operation of the transistor. What is the practical use of this result?
1. PROVE/ELABRATE the following: (i) Cut-off voltages of a silicon transistor and a germanium transistor.
2. For a small signal low frequency operation, write down v, I equations in terms of h parameters for common emitter (CE) configuration of a transistor. There from find out expressions for h parameters. 3. Draw an approximate h parameter model of a CE transistor configuration driven by voltage source R0 = 0, Ignore hre and hoe. Consider RL and RE as resistances in collector and emitter respectively.
show that the transistor is in Saturation. Determine the series resistance in each case.2 (b). The silicon transistor as connected in figure below has a minimum value of hFB of 30. (c) For the case (b) find the maximum temperature at which the transistor remain just cut-off. Which of these five connection has the lowest series resistance? Colloctor rc Ic =Ib rb Base Ideal Transistor Actual Transistor Ib 2.4 volt. Q. show that the transistor is in cut-off. 1985 1. 3(a) is known as a VBE multiplier. The stability factor S for a transistor is defined as rate of change of collector current with respect to reverse saturation current. justify this by deriving an Emitter . Sketch five different connections in which a bipolar junction transistor can be used as a diode. A CE configuration of a transistor utilizes self or emitter bias.4. The circuit shown in fig. Draw the complete hybrid-vs equivalent circuit of a transistor and find an expression for the short-circuit current gain 1986 1. if the given transistor can be represented by the equivalent circuit shown in Fig. +12V Ze E VA Is Z0 Q 100K 2K V0 E 12V (a) If input voltage vi= 12 volts. 1984 1. (b) If input voltage vi = 0. Draw the circuit and derive the expression for the stability factor. Assume ICBO of 10 nano-amperes at 25 degrees Centigrade and doubles for every 10 degrees Centigrade rise in temperature.
Q + VCC I Ic = Ib R1 Q R2 Ib + VA - 3. In the circuit of Fig. Draw a sketch of VA versus I0.expression for VA. Find I2 in the term of I0 + Vcc R I0 I2 = β 1b Q2 Ib Q1 1987 . Q1 and Q2 are identical. Identify clearly the regions in which Q is ON and Q is OFF. 4(c).
2.6V and hFE = 50 + 12 1 K 10 K VBB Fig. f βand f γas applied to a transistor and establish the relations between them 2. where ∫ N and ∫ I are. Define the terms f α. Find minimum base current required to saturate the transistor and the voltage across each junction. and ∫ N = 0.1. State clearly the assumptions involved. Q. Neglect VVE(sat). Note that ∫ I ICO = ∫ N IEO . An npn transistor with aN =0.99 mA in its collector current for a change of 1. 3. Both emitter and collector junctions of a transistor are reverse biased by about 2 volts. determine VDB to saturate the transistor. Assume ICO (reverse saturation current of the collector-base diode) = 6 µA. Apply it to unilaterlize the hybrid π equivalent circuit of a common emitter amplifier with a resistive load. A transistor exhibits a change of 0. 1988 1.0mA O2 O1 Calculate its common-base in its emitter current. respectively. IEO(reverse saturation current of the emitter base diode) = 2 µA. State how you will determine if it is a pnp or npn transistor and identify all three terminals using only a multimeter. 1989 1. the common-base current gain under normal and reverse operations. Determine the relation between I2 and Io. In the circuit shown. Assume VCE sat =0. You are given a transistor whose terminals are unmarked. and common-emitter short-circuit current gains. .6 µa is used in a common emitter configuration with VCC = 12 and RC=4k. Find IE and IC (Emitter and collector currents).98. Vg’sat = 0. ICO=2 µa and IEO=1.96 .2a. ( IES-EC-89)(17Marks) I0 R O3 Iz 1991 1. Q1 and Q2 are identical transistors with current gain βand Q2 has current gain β ’. State and prove Miller’s theorem. What do you mean by ‘saturation’ of a transistor? In the circuit show in Fig. 2(a) 3.1.
Find ICEO. IC and IE. connected in CE configuration.98. IE1. while IB = 20 µA. I C1 IB = Q1 RC I C2 I E1 2001 2004 Q2 VCE IE 1. Calculate the voltage and power gains of circuit. All symbols carry their usual meanings.1993 1. is in amplifying mode. . Neglect reverse satuaration currents. Find also percentage error in the values obtained if hoe is neglected. IB2. VCC IC 1998 1. 3(a) has the following hparameters: hie = 800 Ω .A transistor used in the amplifier circuit show in Fig.99 and ICBO = 100nA. Calculate the current ICI IB1. IC the voltage VCE and the ratios IC/IB and IC/IE. Elucidate three consequences of the Early effect in bipolar junction transistors . The parameters of a certain transistor are α = 0. The transistor. IC2. α 1 = 0. hoe = 50 x 10–6 Ω –1 and hfe = 55. α 2 = 0. For the circuit shown in fig 3(a). -12v RL 20000 Ω C1 R1 100K C2 R2 10K RZ 100K CE 1995 1. RC = 120 Ω and IE=100 mA.96 VCC = 24.
(iii) temperature. assume β= hFE = 100. Indicate whether the β.1 mA 10 k -10 V Fig. we have four mods of operations-normal. (iv) collector current.2(c) 3K 2007 V0 7K 2009 1.2 V. saturation or in–the active region.ρ -n transistors for the following circuit +12V 2K Vin IC1 100 1K Vouty 2005 1. +5V 1k + VBB 0. In the circuit shown in Fig. saturation and iverse region. Find if the transistor is in cutoff.1 . 3V + Re 500 Fig. what would be the minimum value of βsuch that the transistor is in saturation? Assume VCE Sat = 0. (v) collector voltage. For the circuit shown in Fig. (ii) minority carrier lifetime in the base region. 2(c). 2. cut-off.1. A bipolar transistor has two junctions either one of which may be forward or reverse biased. 1.value of a BJT increases or decreases with increase in the values of the following parameters: (i) base width. With the help of Ebers-moll equations model the transistor circuit with a single set of equations describing there four regions 1. Consider silicon n.
Show that these equations are true for any arbitrary geometry of the device. Obtain Ebers-Moll equations for a p-n-p bipolar junction transistor. .2010 1.
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