a) RTL Design • Lead a team of 10 people for verification closure at SoC and block level.

• Guide team to create verification plans at module and chip level for complex SOC`s. • Should have excellant communication and managerial skills • Should have basic knowledge of other domains like Design, DFT and Physical design • Should have deep knowledge and experience on starting from scratch and building verification environment design and environment. • Should have good understanding of specman