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;***************************Motor_Driver************************** list P = 16F877A PORTD TRISD STATUS INTCON ADCON1 TMR2 PIE1 PIR1 PR2 CCP1CON CCPR1L CCP2CON

CCPR2L T2CON TRISC B5 B4 PWM1 PWM2 TMR2IF RP1 RP0 EQU 0x08 EQU 0x88 EQU 0x03 EQU 0x0b EQU 0x9F EQU 0x11 EQU 0x8c EQU 0x0c EQU 0x92 EQU 0x17 EQU 0x15 EQU 0x1D EQU 0x1B EQU 0x12 EQU 0x87 EQU 0x05 EQU 0x04 EQU 0x01 EQU 0x02 EQU 0x01 EQU 6 EQU 5 ;Bit 6 and 5 for bank selection in STATUS register. ;To select bank 0, RP1 = 0 and RP0 = 0 {PORTA and PORTB} ; bank 1 ; bank1 ; bank1

To select bank 3. Tosc = 1/[Clock Frequency] = 0. RP1 = 1 and RP0 = 0 . RAM AREA for USE at address 20h .TRISB & ADCON1} . PR2 = (period / [4*Tosc*Prescale]) .05us . RP1 = 1 and RP0 = 1 CBLOCK 0x20 FIFTY EIGHTY TWENTY ENDC . = [250u]/[0.5 *(0. = 0.line 1 GOTO START . = 155 .end of ram block .line 2 ($0000) . ---> PWM Duty Cycle / (Tosc * Prescale) .5 = 313 = 0x139 .5 ms . PWM Period = 2000Hz = 0.25 . PWM Ducty Cycle = 50% of the PWM period . RP1 = 0 and RP0 = 1 {TRISA. 16F877 Clock Frequency = 20 MHz .========================================================= org 0x0000 .========================================================= . = 0x9b .1 = 155.To select bank 1.05u*16] = 312. TMR2 Prescale = 16 .To select bank 2.5ms)= 250us ..

01|1111|01 |00| . = 0.5ms)= 100us . CCPR1L CCP1CON .. = 0.5ms)= 400us . 76|5432|10 76|54|3210 . CCP1CON<5:4> = b'01' .PWMDucty Cycle = 80% of the PWM period . CCPR1L:CCP1CON<5:4>=(PWM Duty Cycle)/(Tosc*Prescale)= 139h . = [400u]/[0.05u*16] = 500 = 0x1F4 . CCPR1L = 0x4e . . CCPR1L:CCP1CON<5:4>=(PWM Duty Cycle)/(Tosc*Prescale)= 139h . CCP1CON<5:4> = b'00' .05u*16] = 125 =0x7d . 01|0011|10 |01| .PWMDucty Cycle = 20% of the PWM period . CCPR1L CCP1CON .2 *(0. = [250u]/[0. ---> PWM Duty Cycle / (Tosc * Prescale) . . 76|5432|10 76|54|3210 . ---> PWM Duty Cycle / (Tosc * Prescale) . CCPR1L = 0x7d .8 *(0. CCPR1L CCP1CON .

CCPR1L:CCP1CON<5:4>=(PWM Duty Cycle)/(Tosc*Prescale)= 139h .Now All PORTA bits are set as INPUT MOVLW B'00000110' MOVWF ADCON1 MOVLW B'11111111' MOVWF Banksel clrf TRISD PIE1 PIE1 banksel CCP1CON banksel CCP2CON clrf clrf clrf clrf clrf movlw movwf CCP1CON CCP2CON TMR2 INTCON PIR1 0x4e FIFTY . 76|5432|10 76|54|3210 .move binary value 11111111 to register W . CCPR1L = 0x1F . CCP1CON<5:4> = b'01' org 0x0005 START BANKSEL ADCON1 . . 00|0111|11 |01| .Load literal value=6 into W register .50% Duty Cycle ..Move the literal value into ADCON1 register.

2000Hz(0. W .0 GOTO LEFT BTFSS PORTD.5ms)Period TEST BTFSS PORTD.PWM Period Setting banksel PR2 movlw 0x9b movwf PR2 .PWM Duty Cycle movf FIFTY.Move 50% Duty Data to W reg.1 GOTO MID BTFSS PORTD.movlw 0x7d movwf movlw 0x1f movwf TWENTY EIGHTY .2 GOTO RIGHT GOTO STOP STOP banksel FIFTY . .

TMR2 Prescale 16 . PWM1 .Move 50% Duty Data to W reg. B5 CCP2CON. B4 . the other 8bits are located at banksel T2CON movlw 0x07 movwf T2CON .CCP1CON Module Setting .Under PWM mode .set PORTC. the other 8bits .TMR2 Prescale 16 .2 as output banksel T2CON movlw 0x07 movwf T2CON bankselCCP1CON bsf bsf CCP1CON. W . movwf CCPR2L bcf bsf CCPR1L bankselTRISC bcf TRISC.TMR2 Turn On and . 0x02 . 0x03 CCP1CON.movwf CCPR1L bcf bsf CCP1CON.are located at CCPR1L banksel TRISC bcf TRISC.2 LSB's of PWM duty cycle. B5 CCP1CON.TRISC Setting for output .2 as output CCP2CON.PWM Turn ON . PWM2 .Under PWM mode .TRISC Setting for output .2 LSB's of PWM duty cycle.TMR2 Turn On and .set PORTC. B4 .11xx<3:0> is PWM mode BANKSEL FIFTY movf FIFTY.

PWM Duty Cycle movf EIGHTY.TMR2 Turn On and .Under PWM mode . 0x02 . B4 . movwf CCPR2L bcf CCP2CON.11xx<3:0> is PWM mode GOTO TEST LEFT banksel EIGHTY . W . the other 8bits are located at banksel T2CON movlw 0x07 movwf T2CON banksel CCP1CON bsf . PWM2 .PWM Turn ON .PWM Turn ON .CCP1CON Module Setting . 0x02 BANKSEL EIGHTY movf EIGHTY. movwf CCPR1L bcf bsf CCPR1L banksel TRISC bcf TRISC.CCP1CON Module Setting CCP1CON. B5 CCP1CON.11xx<3:0> is PWM mode bsf CCP1CON. B5 . W .banksel CCP2CON bsf bsf CCP2CON.Under PWM mode .TRISC Setting for output .Move 50% Duty Data to W reg.Move 50% Duty Data to W reg. 0x03 CCP2CON.set PORTC. 0x03 .2 LSB's of PWM duty cycle.2 as output CCP1CON.TMR2 Prescale 16 .

B5 CCP1CON.TRISC Setting for output .2 LSB's of PWM duty cycle.TMR2 Prescale 16 .CCP1CON Module Setting CCP2CON.TMR2 Prescale 16 . PWM2 .set PORTC.PWM Turn ON CCP2CON.bsf CCPR1L CCP2CON. the other 8bits are located at banksel TRISC bcf TRISC. the other 8bits are located at banksel T2CON movlw 0x07 movwf T2CON banksel CCP1CON .PWM Duty Cycle movf TWENTY.2 as output banksel T2CON movlw 0x07 movwf T2CON banksel CCP2CON bsf bsf .Move 50% Duty Data to W reg. PWM1 . W .CCP1CON Module Setting .2 as output CCP1CON.TMR2 Turn On and .TRISC Setting for output . 0x03 . 0x02 .Under PWM mode . movwf CCPR1L bcf bsf CCPR1L banksel TRISC bcf TRISC. B4 .11xx<3:0> is PWM mode GOTO TEST MID banksel TWENTY . B4 .2 LSB's of PWM duty cycle.TMR2 Turn On and .set PORTC.

11xx<3:0> is PWM mode . W . B4 .PWM Turn ON .PWM Duty Cycle movf TWENTY.TRISC Setting for output .PWM Turn ON CCP1CON. W . movwf CCPR1L . movwf CCPR2L bcf bsf CCPR1L banksel TRISC bcf TRISC. 0x03 CCP2CON.TMR2 Prescale 16 .set PORTC. 0x02 .CCP1CON Module Setting . PWM1 banksel T2CON movlw 0x07 movwf T2CON banksel CCP2CON bsf bsf CCP2CON. the other 8bits are located at GOTO TEST RIGHT banksel TWENTY .11xx<3:0> is PWM mode BANKSEL EIGHTY movf EIGHTY.bsf bsf CCP1CON. 0x02 . 0x03 .Move 50% Duty Data to W reg.Move 50% Duty Data to W reg.2 LSB's of PWM duty cycle.2 as output CCP2CON.TMR2 Turn On and .Under PWM mode . B5 CCP2CON.

set PORTC.CCP1CON Module Setting CCP1CON. B5 CCP1CON.TMR2 Turn On and .CCP1CON Module Setting CCP2CON. PWM1 . the other 8bits .Under PWM mode .set PORTC.are located at CCPR1L banksel TRISC bcf TRISC.2 LSB's of PWM duty cycle. 0x02 .are located at CCPR1L banksel TRISC bcf TRISC.2 as output banksel T2CON movlw 0x07 movwf T2CON banksel CCP2CON bsf . BANKSEL movf TWENTY.bcf bsf CCP1CON. 0x03 . the other 8bits . B5 CCP2CON. 0x03 .Under PWM mode .TRISC Setting for output . B4 .TMR2 Prescale 16 . B4 .TMR2 Turn On and .11xx<3:0> is PWM mode TWENTY .2 as output banksel T2CON movlw 0x07 movwf T2CON banksel CCP1CON bsf bsf .TRISC Setting for output .TMR2 Prescale 16 . W movwf CCPR2L bcf bsf CCP2CON.Move 50% Duty Data to W reg.PWM Turn ON . PWM2 .PWM Turn ON CCP1CON.2 LSB's of PWM duty cycle.

11xx<3:0> is PWM mode GOTO TEST END . 0x02 .bsf CCP2CON.