NA555, NE555, SA555, SE555

www.ti.com SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010

PRECISION TIMERS
Check for Samples: NA555, NE555, SA555, SE555
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FEATURES
Timing From Microseconds to Hours Astable or Monostable Operation
NA555...D OR P PACKAGE NE555...D, P, PS, OR PW PACKAGE SA555...D OR P PACKAGE SE555...D, JG, OR P PACKAGE (TOP VIEW)

• •

• •

Adjustable Duty Cycle TTL-Compatible Output Can Sink or Source up to 200 mA
SE555...FK PACKAGE (TOP VIEW)

GND TRIG OUT RESET

1 2 3 4

8 7 6 5

VCC DISCH THRES CONT

NC GND NC VCC NC
NC TRIG NC OUT NC
4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13

NC DISCH NC THRES NC

NC – No internal connection

DESCRIPTION/ORDERING INFORMATION
These devices are precision timing circuits capable of producing accurate time delays or oscillation. In the time-delay or monostable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the astable mode of operation, the frequency and duty cycle can be controlled independently with two external resistors and a single external capacitor. The threshold and trigger levels normally are two-thirds and one-third, respectively, of VCC. These levels can be altered by use of the control-voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set, and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset and the output is low. The reset (RESET) input can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset, and the output goes low. When the output is low, a low-impedance path is provided between discharge (DISCH) and ground. The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of 5 V to 15 V. With a 5-V supply, output levels are compatible with TTL inputs.

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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

NC RESET NC CONT NC
Copyright © 1973–2010, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

NA555, NE555, SA555, SE555
SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 www.ti.com

ORDERING INFORMATION (1)
TA VTHRES MAX VCC = 15 V PDIP – P SOIC – D 0°C to 70°C 11.2 V SOP – PS TSSOP – PW PDIP – P –40°C to 85°C 11.2 V SOIC – D PDIP – P –40°C to 105°C 11.2 V SOIC – D PDIP – P –55°C to 125°C 10.6 SOIC – D CDIP – JG LCCC – FK (1) (2) PACKAGE (2) Tube of 50 Tube of 75 Reel of 2500 Reel of 2000 Tube of 150 Reel of 2000 Tube of 50 Tube of 75 Reel of 2000 Tube of 50 Tube of 75 Reel of 2000 Tube of 50 Tube of 75 Reel of 2500 Tube of 50 Tube of 55 ORDERABLE PART NUMBER NE555P NE555D NE555DR NE555PSR NE555PW NE555PWR SA555P SA555D SA555DR NA555P NA555D NA555DR SE555P SE555D SE555DR SE555JG SE555FK TOP-SIDE MARKING NE555P NE555 N555 N555 SA555P SA555 NA555P NA555 SE555P SE555D SE555JG SE555FK

For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.

Table 1. FUNCTION TABLE
RESET Low High High High (1) TRIGGER VOLTAGE (1) Irrelevant <1/3 VCC >1/3 VCC >1/3 VCC THRESHOLD VOLTAGE (1) Irrelevant Irrelevant >2/3 VCC <2/3 VCC OUTPUT Low High Low DISCHARGE SWITCH On Off On

As previously established

Voltage levels shown are nominal.

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Copyright © 1973–2010, Texas Instruments Incorporated

Product Folder Link(s): NA555 NE555 SA555 SE555

NA555, NE555, SA555, SE555
www.ti.com SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010

FUNCTIONAL BLOCK DIAGRAM
VCC 8 CONT 5 RESET 4

6 THRES

2 TRIG

Î Î Î Î Î Î Î

Î Î Î Î Î Î Î Î Î
R1 R S 1

3 OUT

7 1 GND A. B. Pin numbers shown are for the D, JG, P, PS, and PW packages. RESET can override TRIG, which can override THRES.

DISCH

Copyright © 1973–2010, Texas Instruments Incorporated

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Product Folder Link(s): NA555 NE555 SA555 SE555

TC)/qJC. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.5 150 260 300 UNIT V V mA CONT.61 14. qJC. SA555. The package thermal impedance is calculated in accordance with JESD 51-7. and TA. The maximum allowable power dissipation at any allowable case temperature is PD = (TJ(max) .5 MAX 16 18 VCC ±200 105 70 85 125 °C UNIT V V mA 4 Submit Documentation Feedback Copyright © 1973–2010.5 4.ti. RESET. and TRIG 4. 6 mm (1/16 in) from case for 60 s Tstg (1) (2) (3) (4) (5) (6) Storage temperature range 150 Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. TRIG P package PS package PW package FK package JG package FK package JG package –65 °C/W qJC TJ Package thermal impedance (5) (6) °C/W °C °C °C °C Operating virtual junction temperature Case temperature for 60 s Lead temperature 1. All voltage values are with respect to GND. and TC. qJA. SA555 SE555 CONT. Maximum power dissipation is a function of TJ(max). Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) MIN VCC VI IO Supply voltage Input voltage Output current NA555 TA Operating free-air temperature NE555 SA555 SE555 –40 0 –40 –55 NA555. Operating at the absolute maximum TJ of 150°C can affect reliability. SE555 SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 www. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) .NA555.TA)/qJA.com Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) MIN VCC VI IO Supply voltage (2) Input voltage Output current D package qJA Package thermal impedance (3) (4) MAX 18 VCC ±225 97 85 95 149 5. These are stress ratings only. Operating at the absolute maximum TJ of 150°C can affect reliability. Texas Instruments Incorporated Product Folder Link(s): NA555 NE555 SA555 SE555 . THRES. NE555. THRES. NE555. RESET. Maximum power dissipation is a function of TJ(max). The package thermal impedance is calculated in accordance with MIL-STD-883.

3 9.9 1.4 10.com SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 Electrical Characteristics VCC = 5 V to 15 V.4 20 10 0.5 100 11 V 0. and for VCC = 15 V. TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN THRES voltage level THRES current (1) VCC = 15 V TRIG voltage level VCC = 5 V TRIG current RESET voltage level RESET current DISCH switch off-state current VCC = 15 V CONT voltage (open circuit) VCC = 5 V VCC = 15 V.25 2.4 TA = –55°C to 125°C 2 TA = –55°C to 125°C 2.3 TA = –55°C to 125°C RESET at VCC RESET at 0 V 0.25 12.9 0.67 2.75 0. the maximum value is 10 MΩ.67 VCC = 15 V VCC = 5 V 9. No load (1) 3 TA = –55°C to 125°C VCC = 15 V VCC = 5 V VCC = 15 V VCC = 5 V 2 10 3 9 2 12 5 10 4 10 3 9 2 15 6 13 5 mA 13 TA = –55°C to 125°C 12 12.4 –1 100 10.4 2.4 0.1 0.4 20 10 4. Copyright © 1973–2010.1 3. IOL = 8 mA VCC = 15 V.4 0.2 0. IOL = 5 mA VCC = 5 V. IOL = –100 mA High-level output voltage VCC = 15 V. the maximum value is R = RA + RB ≉ 3.6 3.7 2.3 30 5 MAX 11.1 1.5 0.8 0.4 3.2 250 5.4 MΩ.3 2.45 1.5 0.5 3.2 0.35 9. IOL = 200 mA VCC = 5 V.6 4 250 5.6 2.15 13.6 TA = –55°C to 125°C TA = –55°C to 125°C TA = –55°C to 125°C 0.5 MIN 8.15 13.7 SE555 TYP 10 3.3 0.8 2.NA555.3 30 5 MAX 10. NE555.15 0. IOL = 100 mA VCC = 15 V. IOL = –100 mA Output low.3 V TA = –55°C to 125°C 0.9 2.35 0. SE555 www.2 4.5 V 0. No load Supply current Output high.5 3.1 TA = –55°C to 125°C 0.2 4. For example.2 2.5 1 2. IOL = 50 mA VCC = 15 V.75 0.4 NA555 NE555 SA555 TYP 10 3.7 3 1.1 –0. SA555. Texas Instruments Incorporated Submit Documentation Feedback 5 Product Folder Link(s): NA555 NE555 SA555 SE555 .6 V V nA UNIT Low-level output voltage This parameter influences the maximum value of the timing resistors RA and RB in the circuit of Figure 12.5 2 2.5 0.9 1 1.5 mA VCC = 5 V.3 TRIG at 0 V 0.1 0. when VCC = 5 V.1 0.3 0.4 –1.7 2 1 mA V mA nA 1. IOL = 10 mA VCC = 15 V. IOH = –200 mA VCC = 5 V. IOL = 3.3 4 9 0.ti.2 6 1.8 3.8 0.9 0.1 –0.75 12.8 TA = –55°C to 125°C TA = –55°C to 125°C 0.

5 30 90 0. Values specified are for a device in an astable circuit similar to Figure 12.1 mF. TA = 25°C CL = 15 pF.2 (4) 100 (4) MAX 1.com Operating Characteristics VCC = 5 V to 15 V. TA = 25°C (unless otherwise noted) PARAMETER (3) TEST CONDITIONS (1) MIN TA = 25°C TA = MIN to MAX TA = 25°C CL = 15 pF.ti.1 mF. On products compliant to MIL-PRF-38535. Values specified are for a device in a monostable circuit similar to Figure 9.NA555.5 (4) NA555 NE555 SA555 MIN TYP 1 2. astable Output-pulse rise time Output-pulse fall time (1) (2) (3) (4) (5) For conditions shown as MIN or MAX. 6 Submit Documentation Feedback Copyright © 1973–2010. astable (5) (3) Supply-voltage sensitivity of Each timer.5 1.15 100 100 200 (4) 200 (4) 0. Timing interval error is defined as the difference between the measured value and the average value of a random sample from each process run. monostable (5) timing interval Each timer. monostable (3) Each timer. with the following component values: RA = 1 kΩ to 100 kΩ. NE555. with the following component values: RA = 2 kΩ to 100 kΩ. TA = 25°C SE555 TYP 0. use the appropriate value specified under recommended operating conditions. astable (5) % ppm/ °C %/V ns ns Each timer.05 0. this parameter is not production tested. C = 0. SA555.5 MAX 3 UNIT Initial error of timing interval (2) Temperature coefficient of timing interval Each timer. Texas Instruments Incorporated Product Folder Link(s): NA555 NE555 SA555 SE555 .3 100 100 300 300 0. monostable Each timer.25 50 150 0.1 0. C = 0. SE555 SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 www.

7 0.8 0. Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Link(s): NA555 NE555 SA555 SE555 .6 0.2 0.2 0.1 0.6 1.4 0. 10 7 VOL − Low-Level Output Voltage − V 4 2 1 0.4 1.2 1 0.4 0.07 0.07 0.07 0.01 1 2 4 7 10 20 40 70 100 0 IOL − Low-Level Output Current − mA Figure 3.1 0.NA555.02 0. 1 ÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏ VCC = 5 V to 15 V 2 4 7 10 20 40 70 100 IOH − High-Level Output Current − mA Figure 4.01 VOL − Low-Level Output Voltage − V ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT VCC = 5 V TA = −55°C TA = 25°C TA = 125°C 1 2 4 7 10 20 40 70 100 10 7 4 2 1 0.4 0.4 0.1 0.7 0.04 0.04 0.7 0. IOL − Low-Level Output Current − mA Figure 2.04 0.01 ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ VCC = 10 V TA = 25°C TA= −55°C TA = 125°C LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT 1 2 4 7 10 20 40 70 100 IOL − Low-Level Output Current − mA Figure 1.ti. 10 7 VOL − Low-Level Output Voltage − V 4 2 1 0. NE555.02 0.02 ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ VCC = 15 V TA = 125°C LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT DROP BETWEEN SUPPLY VOLTAGE AND OUTPUT vs HIGH-LEVEL OUTPUT CURRENT 2. SA555.2 0.com SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 TYPICAL CHARACTERISTICS Data for temperatures below 0°C and above 70°C are applicable for SE555 circuits only. SE555 www.0 TA = −55°C TA = −55°C ( VCC − VOH) − Voltage Drop − V 1. Copyright © 1973–2010.8 1.2 TA = 25°C ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏÏÏ TA = 25°C TA = 125°C 0.

NA555.com TYPICAL CHARACTERISTICS (continued) Data for temperatures below 0°C and above 70°C are applicable for SE555 circuits only.2 0.005 1 0.990 0.010 1.995 0.05 0.1 0. NORMALIZED OUTPUT PULSE DURATION (MONOSTABLE OPERATION) vs FREE-AIR TEMPERATURE 1. No Load 1. TA = −55°C TA = 125°C Pulse Duration Relative to Value at VCC = 10 V Output Low. Texas Instruments Incorporated Product Folder Link(s): NA555 NE555 SA555 SE555 .995 0.015 NORMALIZED OUTPUT PULSE DURATION (MONOSTABLE OPERATION) vs SUPPLY VOLTAGE 1.4 Figure 8. SA555.005 1 0.15 0.985 0 5 10 15 20 VCC − Supply Voltage − V Figure 6.25 0. 0.015 Pulse Duration Relative to Value at TA = 255C VCC = 10 V t PD – Propagation Delay Time – ns 1000 900 PROPAGATION DELAY TIME vs LOWEST VOLTAGE LEVEL OF TRIGGER PULSE TA = 125° C 1.35 Lowest Level of Trigger Pulse – ×VCC 0. 8 Submit Documentation Feedback Copyright © 1973–2010.ti.3 0. SE555 SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 www.990 0.010 800 700 TA = 70° C 600 500 TA = 25° C 400 300 TA = 0° C 200 TA = –55° C 100 0 1. NE555.985 −75 −50 −25 0 25 50 75 100 125 0 TA − Free-Air Temperature − °C Figure 7. SUPPLY CURRENT vs SUPPLY VOLTAGE 10 9 8 I CC − Supply Current − mA TA = 25°C 7 6 5 4 3 2 1 0 5 6 7 8 9 10 11 12 13 14 15 VCC − Supply Voltage − V Figure 5.

If the output is low. P. it should be connected to VCC. SE555 www. which limits the minimum monostable pulse width to 10 µs. SA555. JG. the output pulse duration is approximately tw = 1. When the trigger is grounded. the comparator storage time can be as long as 10 µs. Applying a negative-going trigger pulse simultaneously to RESET and TRIG during the timing interval discharges C and reinitiates the cycle. Because of the threshold level and saturation voltage of Q1. The output is held low as long as the reset pulse is low. independent of the supply voltage. VCC. the sequence ends only if TRIG is high for at least 10 µs before the end of the timing interval. NE555. when RESET is not used. Once initiated. To prevent false triggering. The threshold levels and charge rates both are directly proportional to the supply voltage. any of these timers can be connected as shown in Figure 9. PS. and turns off Q1. Circuit for Monostable Operation Monostable operation is initiated when TRIG voltage falls below the trigger threshold.com SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 APPLICATION INFORMATION Monostable Operation For monostable operation. If TRIG has returned to a high level.NA555. VCC (5 V to 15 V) RA 4 7 6 Input 2 Î Î Î 5 CONT RESET DISCH 8 VCC RL OUT THRES TRIG GND 1 3 Output Pin numbers shown are for the D. The timing interval is. Figure 11 is a plot of the time constant for various values of RA and C. Copyright © 1973–2010. drives the output high. and discharges C through Q1. Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): NA555 NE555 SA555 SE555 . Figure 9.1RAC. so long as the supply voltage is constant during the time interval. and PW packages. therefore. the output of the threshold comparator resets the flip-flop (Q goes high). drives the output low. commencing on the positive edge of the reset pulse.ti. application of a negative-going pulse to the trigger (TRIG) sets the flip-flop (Q goes low). Capacitor C then is charged through RA until the voltage across the capacitor reaches the threshold voltage of the threshold (THRES) input.

P. NE555. VCC (5 V to 15 V) RA = 5 kW RB = 3 kW C = 0. NOTE A: Decoupling CONT voltage to ground with a capacitor can improve operation. adding a second resistor. JG.01 µF ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎ tL Output Voltage C Pin numbers shown are for the D.01 µF RL = 1 kΩ See Figure 9 www.1 1 10 100 C − Capacitance − µF Figure 10. As in the monostable circuit. SA555. Circuit for Astable Operation Figure 13.33 × VCC).com 10 RA = 10 MΩ 1 RA = 1 MΩ 10−1 Voltage − 2 V/div Input Voltage 10−2 10−3 ÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏ Output Voltage Capacitor Voltage Time − 0. Therefore. Capacitor Voltage Time − 0. RB. Texas Instruments Incorporated Product Folder Link(s): NA555 NE555 SA555 SE555 . the duty cycle is controlled by the values of RA and RB. This should be evaluated for individual applications. the frequency and duty cycle) are independent of the supply voltage. PS. therefore. Typical Monostable Waveforms Figure 11.001 0.ti. Output Pulse Duration vs Capacitance Astable Operation As shown in Figure 12. SE555 SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 tw − Output Pulse Duration − s ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ RA = 9.1 kΩ CL = 0.01 0.NA555. and PW packages. to the circuit of Figure 9 and connecting the trigger input to the threshold input causes the timer to self-trigger and run as a multivibrator. This astable connection results in capacitor C charging and discharging between the threshold-voltage level (≉0.5 ms/div Figure 12. The capacitor C charges through RA and RB and then discharges through RB only.1 ms/div RA = 100 kΩ RA = 10 kΩ RA = 1 kΩ 10−4 10−5 0. Typical Astable Waveforms 10 Submit Documentation Feedback Copyright © 1973–2010.67 × VCC) and the trigger-voltage level (≉0.15 µF RL = 1 kW See Figure 12 RA 8 VCC RL 3 RB 6 2 OUT THRES TRIG GND 1 Output Voltage − 1 V/div t H Open (see Note A) 5 CONT 4 RESET 7 DISCH Î Î Î 0. charge and discharge times (and.

693 (R C RA + 2 RB = 10 kΩ L B) f − Free-Running Frequency − Hz Other useful relationships are shown below. period + t ) t + 0. VCC (5 V to 15 V) Input 2 4 RESET TRIG 8 VCC OUT RL 3 DISCH 5 0.01 0.1 µF See Figure 15 Voltage − 2 V/div Output Input Voltage C Output Voltage Capacitor Voltage Time − 0.NA555. SA555. Completed Timing Waveforms for Missing-Pulse Detector Copyright © 1973–2010. The timing interval of the monostable circuit is retriggered continuously by the input pulse train as long as the pulse spacing is less than the timing interval. and PW packages.693 (R ) 2R ) C H L A B 1.1 0. NE555. SE555 www. JG. missing pulse. PS. A longer pulse spacing. 1 RA + 2 RB = 1 MΩ RA + 2 RB = 10 MΩ 0. Circuit for Missing-Pulse Detector Figure 16. P. thereby generating an output pulse as shown in Figure 16. The output high-level duration tH and low-level duration tL can be calculated as follows: 100 k t + 0. Free-Running Frequency Missing-Pulse Detector The circuit shown in Figure 15 can be used to detect a missing pulse or abnormally long spacing between consecutive pulses in a train of pulses.001 0.com SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 Figure 12 shows typical waveforms generated during astable operation.01 µF CONT GND 1 7 THRES 6 ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ RA VCC = 5 V RA = 1 kΩ C = 0.ti.1 1 10 100 C − Capacitance − µF Figure 14.1 ms/div A5T3644 Pin numbers shown are shown for the D. Figure 15. Texas Instruments Incorporated Submit Documentation Feedback 11 Product Folder Link(s): NA555 NE555 SA555 SE555 . or terminated pulse train permits the timing interval to be completed.44 frequency [ (R ) 2R ) C A B Output driver duty cycle + L B + t )t R ) 2R H L A B t R 10 k RA + 2 RB = 100 kΩ 1k 100 10 Output waveform duty cycle t R H + 1– B + t )t R ) 2R H L A B t R B Low-to-high ratio + L + t R ) R H A B Figure .693 (R ) R C H A B) RA + 2 RB = 1 kΩ t + 0.

02 µF See Figure 9 Voltage − 2 V/div Input Voltage Output Voltage Capacitor Voltage Time − 0. Divide-by-Three Circuit Waveforms 12 Submit Documentation Feedback Copyright © 1973–2010. ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ VCC = 5 V RA = 1250 Ω C = 0.1 ms/div Figure 17.NA555. Texas Instruments Incorporated Product Folder Link(s): NA555 NE555 SA555 SE555 . Figure 17 shows a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing cycle. SE555 SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 www.com Frequency Divider By adjusting the length of the timing cycle. SA555. NE555.ti. the basic circuit of Figure 9 can be made to operate as a frequency divider.

the effects of modulation source voltage and impedance on the bias of the timer should be considered. P. any wave shape could be used. which is accomplished by applying an external voltage (or current) to CONT. Texas Instruments Incorporated Submit Documentation Feedback 13 Product Folder Link(s): NA555 NE555 SA555 SE555 .NA555.02 µF RL = 1 kΩ See Figure 18 Modulation Input Voltage Clock Input Voltage Output Voltage Capacitor Voltage Time − 0. A continuous input pulse train triggers the monostable circuit. and a control signal modulates the threshold voltage. For direct coupling. and PW packages. Figure 18 shows a circuit for pulse-width modulation. Pulse-Width-Modulation Waveforms Copyright © 1973–2010. PS. NOTE A: The modulating signal can be direct or capacitively coupled to CONT. SA555. NE555.ti.com SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 Pulse-Width Modulation The operation of the timer can be modified by modulating the internal threshold and trigger voltages. SE555 www. VCC (5 V to 15 V) 4 RESET Clock Input 2 TRIG 8 VCC OUT 3 RL RA Output 7 DISCH Modulation 5 Input (see Note A) CONT THRES GND 1 C 6 Pin numbers shown are for the D. Figure 19 shows the resulting output pulse-width modulation. While a sine-wave modulation signal is shown.5 ms/div Figure 18. ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏÏÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏÏ ÏÏÏÏÏÏ RA = 3 kΩ C = 0. Circuit for Pulse-Width Modulation Voltage − 2 V/div Figure 19. JG.

any of these timers can be used as a pulse-position modulator. Pulse-Position-Modulation Waveforms 14 Submit Documentation Feedback Copyright © 1973–2010.1 ms/div Figure 20. however. SA555. P. NE555. thereby. VCC (5 V to 15 V) RA = 3 kΩ RB = 500 Ω RL = 1 kΩ See Figure 20 4 RESET 2 TRIG 8 VCC OUT RL 3 RA Output Voltage − 2 V/div DISCH Modulation Input 5 (see Note A) CONT GND THRES 7 RB 6 C Pin numbers shown are for the D. the time delay. Texas Instruments Incorporated Product Folder Link(s): NA555 NE555 SA555 SE555 .NA555. Figure 21 shows a triangular-wave modulation signal for such a circuit.com Pulse-Position Modulation As shown in Figure 20. PS. Circuit for Pulse-Position Modulation Figure 21. the effects of modulation source voltage and impedance on the bias of the timer should be considered. ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎÎÎÎ Modulation Input Voltage Output Voltage Capacitor Voltage Time − 0. SE555 SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 www. This application modulates the threshold voltage and. JG. For direct coupling. any wave shape could be used. of a free-running oscillator. and PW packages.ti. NOTE A: The modulating signal can be direct or capacitively coupled to CONT.

com SLFS022H – SEPTEMBER 1973 – REVISED JUNE 2010 Sequential Timer Many applications. These timing circuits can be connected to provide such sequential control.1 RCCC t=0 t − Time − 1 s/div Voltage − 5 V/div Figure 23. JG.7 µF RC = 100 kΩ Output C Pin numbers shown are for the D. require activation of test signals in sequence.01 µF THRES GND 1 CC CA = 10 µF RA = 100 kΩ CB = 4. and Figure 23 shows the output waveforms.01 µF 6 THRES GND 1 CA CONT 0. ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏ ÏÏÏÏ ÏÏÏ ÏÏÏÏÏ ÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏ ÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏ ÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ ÏÏÏÏ ÏÏ ÏÏÏÏ ÏÏ ÏÏÏÏÏ ÏÏÏÏÏ ÏÏÏÏ ÏÏ ÏÏÏÏÏ ÏÏÏ ÏÏÏ ÏÏÏ ÏÏÏ Figure 22. SA555. such as computers.001 µF 5 4 RESET TRIG 8 VCC 3 OUT DISCH 7 6 RC 0. such as test equipment. Other applications.001 µF 5 4 RESET TRIG 8 VCC 3 OUT DISCH 7 RB 33 kΩ 2 0.ti. require signals for initializing conditions during start-up.1 RBCB Output C twC twC = 1. with or without modulation. P. NE555.1 RACA twB Output B twB = 1. Texas Instruments Incorporated Submit Documentation Feedback 15 Product Folder Link(s): NA555 NE555 SA555 SE555 . Sequential Timer Circuit See Figure 22 Output A twA twA = 1. VCC 4 RESET 2 S 5 CONT TRIG 8 VCC 3 OUT DISCH 7 RA 33 kΩ 2 0.7 µF RB = 100 kΩ Output B CC = 14.01 µF Output A THRES GND 1 CB 6 CONT 0. NOTE A: S closes momentarily at t = 0. The timers can be used in various combinations of astable or monostable circuit connections. for extremely flexible waveform control.NA555. Sequential Timer Waveforms Copyright © 1973–2010. and PW packages. Figure 22 shows a sequencer circuit with possible applications in many systems. PS. SE555 www.

com 11-Apr-2013 PACKAGING INFORMATION Orderable Device JM38510/10901BPA M38510/10901BPA NA555D NA555DG4 NA555DR NA555DRG4 NA555P NA555PE4 NE555D NE555DE4 NE555DG4 NE555DR NE555DRE4 NE555DRG3 NE555DRG4 NE555P NE555PE4 Status (1) Package Type Package Pins Package Drawing Qty CDIP CDIP SOIC SOIC SOIC SOIC PDIP PDIP SOIC SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP JG JG D D D D P P D D D D D D D P P 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 1 1 75 75 2500 2500 50 50 75 75 75 2500 2500 2500 2500 50 50 Eco Plan (2) Lead/Ball Finish A42 A42 CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU SN CU NIPDAU CU NIPDAU CU NIPDAU MSL Peak Temp (3) Op Temp (°C) -55 to 125 -55 to 125 -40 to 105 -40 to 105 -40 to 105 -40 to 105 -40 to 105 -40 to 105 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 Top-Side Markings (4) Samples ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE PREVIEW ACTIVE ACTIVE ACTIVE TBD TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type JM38510 /10901BPA JM38510 /10901BPA NA555 NA555 NA555 NA555 NA555P NA555P NE555 NE555 NE555 NE555 NE555 NE555 NE555 NE555P NE555P Addendum-Page 1 .PACKAGE OPTION ADDENDUM www.ti.

PACKAGE OPTION ADDENDUM www.ti.com 11-Apr-2013 Orderable Device NE555PSLE NE555PSR NE555PSRE4 NE555PSRG4 NE555PW NE555PWE4 NE555PWG4 NE555PWR NE555PWRE4 NE555PWRG4 NE555Y SA555D SA555DE4 SA555DG4 SA555DR SA555DRE4 SA555DRG4 SA555P SA555PE4 Status (1) Package Type Package Pins Package Drawing Qty SO SO SO SO TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP PS PS PS PS PW PW PW PW PW PW 8 8 8 8 8 8 8 8 8 8 0 SOIC SOIC SOIC SOIC SOIC SOIC PDIP PDIP D D D D D D P P 8 8 8 8 8 8 8 8 75 75 75 2500 2500 2500 50 50 2000 2000 2000 150 150 150 2000 2000 2000 Eco Plan (2) Lead/Ball Finish Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU MSL Peak Temp (3) Op Temp (°C) 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 0 to 70 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 Top-Side Markings (4) Samples OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Pb-Free (RoHS) Pb-Free (RoHS) Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type N555 N555 N555 N555 N555 N555 N555 N555 N555 SA555 SA555 SA555 SA555 SA555 SA555 SA555P SA555P Addendum-Page 2 .

1% by weight in homogeneous material) (3) MSL. (4) Multiple Top-Side Markings will be inside parentheses. Peak Temp. and peak solder temperature. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances. but TI does not recommend using this part in a new design. and a lifetime-buy period is in effect.com/productcontent for the latest availability information and additional product content details. and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package.com 11-Apr-2013 Orderable Device SE555D SE555DG4 SE555DR SE555DRG4 SE555FKB SE555JG SE555JGB SE555N SE555P Status (1) Package Type Package Pins Package Drawing Qty SOIC SOIC SOIC SOIC LCCC CDIP CDIP PDIP PDIP D D D D FK JG JG N P 8 8 8 8 20 8 8 8 8 50 75 75 2500 2500 1 1 1 Eco Plan (2) Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU POST-PLATE A42 A42 Call TI CU NIPDAU MSL Peak Temp (3) Op Temp (°C) -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 -55 to 125 Top-Side Markings (4) Samples ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD TBD TBD TBD Pb-Free (RoHS) Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM N / A for Pkg Type N / A for Pkg Type N / A for Pkg Type Call TI N / A for Pkg Type SE555 SE555 SE555 SE555 SE555FKB SE555JG SE555JGB SE555P (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. TI Pb-Free products are suitable for use in specified lead-free processes. OBSOLETE: TI has discontinued the production of the device.The planned eco-friendly classification: Pb-Free (RoHS). Addendum-Page 3 . Samples may or may not be available. PREVIEW: Device has been announced but is not in production. or Green (RoHS & no Sb/Br) . Where designed to be soldered at high temperatures.please check http://www.ti. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible). The component is otherwise considered Pb-Free (RoHS compatible) as defined above. (2) Eco Plan . LIFEBUY: TI has announced that the device will be discontinued.ti. TBD: The Pb-Free/Green conversion plan has not been defined. or 2) lead-based die adhesive used between the die and leadframe. NRND: Not recommended for new designs. Pb-Free (RoHS Exempt).PACKAGE OPTION ADDENDUM www.1% by weight in homogeneous materials. including the requirement that lead not exceed 0. Device is in production to support existing customers.The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications. -.

and makes no representation or warranty as to the accuracy of such information.Radiation tolerant. TI bases its knowledge and belief on information provided by third parties. TI and TI suppliers consider certain information to be proprietary.QML certified for Military and Defense Applications • Space . In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. SE555M : • Catalog: SE555 • Military: SE555M • Space: SE555-SP.TI's standard catalog product • Military . OTHER QUALIFIED VERSIONS OF SE555. SE555-SP NOTE: Qualified Version Definitions: • Catalog . TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.com 11-Apr-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.ti. and thus CAS numbers and other limited information may not be available for release.PACKAGE OPTION ADDENDUM www. Efforts are underway to better integrate information from third parties. ceramic packaging and qualified for use in Space-based application Addendum-Page 4 .

1 2.0 330.0 330.0 330.4 12.0 12.4 6.2 K0 (mm) 2.0 12.0 8.2 5.0 12.5 1.0 12.4 6.1 2.2 7.4 12.1 2.0 8.0 8.0 12.6 3.4 6.4 12.4 6.4 16.0 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 Q1 NA555DR NA555DR NE555DR NE555DRG4 NE555DRG4 NE555PSR NE555PWR SA555DR SA555DRG4 SE555DR SE555DRG4 2500 2500 2500 2500 2500 2000 2000 2500 2500 2500 2500 Pack Materials-Page 1 .0 8.2 5.0 330.2 5.0 330.4 B0 (mm) 5.0 6.ti.2 6.4 12.0 8.0 330.2 5.6 2.4 12.2 5.4 12.1 2.0 8.0 12.0 330.0 330.com 24-Apr-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SOIC SOIC SOIC SOIC SOIC SO TSSOP SOIC SOIC SOIC SOIC D D D D D PS PW D D D D 8 8 8 8 8 8 8 8 8 8 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 W Pin1 (mm) Quadrant 12.0 12.4 12.1 2.4 8.0 330.0 330.1 2.0 12.4 6.4 6.0 12.4 12.PACKAGE MATERIALS INFORMATION www.0 12.0 8.1 P1 (mm) 8.0 8.4 6.1 2.4 12.2 5.1 2.0 16.4 6.2 5.6 5.0 12.0 8.

6 20.0 Height (mm) 20.0 367.5 340.0 20.6 20.0 338.6 35.5 340.0 367.5 367.1 338.0 338.0 367.0 367.0 35.0 20.0 367.0 35.6 35.com 24-Apr-2013 *All dimensions are nominal Device NA555DR NA555DR NE555DR NE555DRG4 NE555DRG4 NE555PSR NE555PWR SA555DR SA555DRG4 SE555DR SE555DRG4 Package Type SOIC SOIC SOIC SOIC SOIC SO TSSOP SOIC SOIC SOIC SOIC Package Drawing D D D D D PS PW D D D D Pins 8 8 8 8 8 8 8 8 8 8 8 SPQ 2500 2500 2500 2500 2500 2000 2000 2500 2500 2500 2500 Length (mm) 340.5 367.1 367.0 340.1 367.6 35.ti.0 Pack Materials-Page 2 .1 367.0 Width (mm) 338.5 367.0 38.PACKAGE MATERIALS INFORMATION www.0 367.0 340.1 338.

60) 0.020 (0.65) 0.38) 0.310 (7. C.38) 0. This package can be hermetically sealed with a ceramic lid using glass frit.30) MIN 0.015 (0.54) 0.00) 8 5 CERAMIC DUAL-IN-LINE 0.22) 1 4 0. B.14) 0.87) 0. Falls within MIL STD 1835 GDIP1-T8 POST OFFICE BOX 655303 • DALLAS.200 (5.015 (0.11) 0.245 (6.014 (0.045 (1. E.36) 0. Index point is provided on cap for terminal identification. TEXAS 75265 .51) MIN 0.MECHANICAL DATA MCER001A – JANUARY 1995 – REVISED JANUARY 1997 JG (R-GDIP-T8) 0.008 (0.400 (10.290 (7. All linear dimensions are in inches (millimeters).37) 0.023 (0.100 (2.065 (1.130 (3.08) MAX Seating Plane 0.280 (7.58) 0. This drawing is subject to change without notice.20) 0°–15° 4040107/C 08/96 NOTES: A. D.16) 0.355 (9.063 (1.

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