## Are you sure?

This action might not be possible to undo. Are you sure you want to continue?

Set No. 1

III B.Tech I Semester Regular Examinations, November 2006 DIGITAL SYSTEMS DESIGN (Electronics & Computer Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. Find the CAMP − II Printout for the function. f= (0, 1, 3, 5, 7 − 10, 13 − 15, 17, 21, 25, 29) [16]

2. (a) What are the basic building blocks of an ASM chart? Explain about them? (b) Show the eight exit paths in an ASM block emanating from the decision boxes that check the eight possible binary values of three control variables x, y and z. [8+8] 3. (a) List the PLA programming table for the combinational circuit deﬁned by the functions. F1 (abc) = (3, 5, 6, 7) F2 (abc) = (0, 2, 4, 7) (b) What is meant by PLA? Draw a block diagram and explain its working.[8+8] 4. (a) Describe the Boolean diﬀerence method in a combinational circuit. shown in ﬁgure1 (b) Find the test set to detect A1 - SA0 and A1 - SA1 faults using path sensitization method. [8+8]

Figure 1: 5. In a multiprocessor array of 4 × 4 certain processor 12, 23, 33, 42 and 44 are faulty. Show by the diagram how these faulty processors can be taken out of the array that will still function correctly. Also explain the principle of reconﬁguration process adopted. [16] 1 of 2

Z X=0 X=1 B. 1 [8+8] 6.12 2.11 1. 1 C. (b) With the help of a map.6.11. 1 C. 0 C.7.12 1. Use COMPACT algorithm to ﬁnd column folded PLA for the given PLA whose set of subsuming rows are given below.8.9 4.2. (a) State and prove EPC test criteria.9.10 3.12 3. if any.3.Code No: RR311901 Set No.5.3.5. PS A B C D NS. 0 D. (b) Construct a fault detection experiment for the machine shown below. [8+8] Column A B C D E F G H 8. Also list undetectable faults.9 ⋆⋆⋆⋆⋆ 2 of 2 .6.7. [8+8] x1 1 2 1 0 x2 1 1 0 0 x3 0 0 2 2 x4 2 2 2 1 z1 0 1 0 1 z2 1 0 1 1 z3 0 1 1 0 SSRs 4. 0 7.9.7.2. 1 A.10 1. (a) Describe the procedure for the design of fault detection experiments. 0 D.10. 1 B. determine the minimal test set for the following PLAs.8.5.

November 2006 DIGITAL SYSTEMS DESIGN (Electronics & Computer Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. 13) (7 − 15) (0. 12. 13) [8+8] 4. (a) What are the basic building blocks of an ASM chart? Explain about them? (b) Show the eight exit paths in an ASM block emanating from the decision boxes that check the eight possible binary values of three control variables x. 10 .tests for detecting multiple stuck at faults.bit parity checker circuit.8.14) [16] 2. 10. 15) (1. 2 − 8.and b .3. (b) The ﬁgure ??ﬁg4M071) shown below is a 3 . 12.1. Explain with the help of a VLSI processor array structure. ﬁnd the test vectors for SA0 and SA1 faults on each line of the circuit. 2 III B. 11.OR network realizes the function 1 1 1 f = x1 x1 3 x4 + x2 x4 + x1 + x3 + x4 + x1 x2 x3 Derive the a . 8. f (abcd) = (0. will the program fail to get a VSPC and therefore skip the Minterm? The function will be input in the same order as given in the function.Code No: RR311901 Set No.Tech I Semester Regular Examinations. y and z. After branching. and at which Minterms . With the help of a Map. Using path sensitization method. 5 . Write a note on fault tolerant VLSI processor arrays. ﬁnd the CAMP Printout of the following cyclic function. [16] 1 of 2 . (a) A two level AND . [8+8] Figure 1: 5. 2. [8+8] 3. W (ABCD) = X (ABCD) = Y (ABCD) = Z (ABCD) = (2. (b) Tabulate the PAL programming table that implements the following Boolean functions. how many times. (a) Write short notes on ROM.

determine the minimal test set for the following PLAs.11. Use COMPACT algorithm to ﬁnd column folded PLA for the given PLA whose set of subsuming rows are given below.5. 0 B. 0 C.8.7.10 1.10. 0 B. and if any do exist.9. if any. (b) For the machine shown below determine whether or not preset distinguishing sequences exist. (b) With the help of a map.6.12 2.8. Z X=0 X=1 D.3.3. 1 B. (a) State and prove EPC test criteria.11 1.9 ⋆⋆⋆⋆⋆ 2 of 2 . [8+8] PS A B C D E NS. [8+8] x1 1 2 1 0 x2 1 1 0 0 x3 0 0 2 2 x4 2 2 2 1 z1 0 1 0 1 z2 1 0 1 1 z3 0 1 1 0 SSRs 4.10 3.Code No: RR311901 Set No.2.9.2. 1 7. Also list undetectable faults. 1 E. [8+8] Column A B C D E F G H 8. (a) What is a diagnisable sequential machine? Discuss the design of deﬁnitely diagnisable machine. 0 D. 2 6. 1 C.5. 1 E.5.7.12 1.7.6.12 3. ﬁnd the shortest ones.9 4. 1 A.

[4+12] 6. November 2006 DIGITAL SYSTEMS DESIGN (Electronics & Computer Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. 3 III B. 5. 2. People enter the room from one door with a photocell that changes a signal x from 1 to 0 when the light is interrupted. 17. (a) Explain how the ASM chart diﬀers from a conventional ﬂowchart? (b) Construct an ASM chart for a digital system that counts the number of people in a room. A (xyz) = B (xyz) = C (xyz) = D (xyz) = (1. 3. 1. 21. (a) Contrast the structures of FPGA’s and CPLD’s. 7 − 10. 5. [8+8] 3.down counter with a display of its contents. ﬁnd a minimum test set for all stuck at faults by the fault table method. Both x and y are synchronized with the clock. 13 − 15. (a) Deﬁne the term fault tolerance of a system? (b) How many diﬀerence approaches are there to have fault tolerance of a digital system? Explain about one such approach. (a) What is a diagnisable sequential machine? Discuss the design of deﬁnitely diagnisable machine. (b) For the circuit shown in ﬁgure??. 1. 1 of 2 . 6) (0. (a) A two level AND .Tech I Semester Regular Examinations. 25.OR network realizes the function f = 0200 + 1002 + 2121 Find the minimum test set to detect all the faults using Kohavi algorithm. (b) Tabulate the truth table for an 8 X 4 ROM that implements the following four Boolean functions. c. Assume that faults can occur only on lines a. b. They leave the room from a second door with a similar photocell with a signal y. 2. 4. but they may stay ON or OFF for more than one clock pulse period. 7) [8+8] 4. 6) (1. 29) [16] 2. f= (0.Code No: RR311901 Set No. [8+8] 5. 6. Find the CAMP − II Printout for the function. d and e. The data processor subsystem consists of an up . 7) (2. 3.

1 E.Code No: RR311901 Set No. 1 B. 0 B. 1 E. 3 Figure 1: (b) For the machine shown below determine whether or not preset distinguishing sequences exist. (a) Discuss the types of faults in PLAs. 0 D. (b) Minimize the following function implemented on PLA using IISC algorithm. 1 C. and if any do exist. ﬁnd the shortest ones. 0 C. determine the minimal test set for the following PLAs. f = 2120 + 0102 + 1121 + 0002 [8+8] 8. (b) With the help of a map. 0 B. [8+8] x1 1 2 1 0 x2 2 0 1 1 x3 0 1 0 1 x4 1 1 2 0 z1 1 1 1 0 z2 0 0 1 1 ⋆⋆⋆⋆⋆ 2 of 2 . [8+8] PS A B C D E NS. if any. Z X=0 X=1 D. 1 A. Also list undetectable faults. 1 7. (a) Describe the Fujiwara’s DFT scheme.

shown in ﬁgure1 (b) Find the test set to detect A1 . (a) Explain the cubical operations Sharp. Disjunction. and it responds by producing the output sequence Z. 3.SA0 and A1 .Code No: RR311901 Set No. Adjacency. disjoint Sharp.SA1 faults using path sensitization method. (b) Write short notes on hardware description languages. [8+8] [16] 4. 15 ) [8+8] 2. (a) Describe the Boolean diﬀerence method in a combinational circuit. November 2006 DIGITAL SYSTEMS DESIGN (Electronics & Computer Engineering) Time: 3 hours Max Marks: 80 Answer any FIVE Questions All Questions carry equal marks ⋆⋆⋆⋆⋆ 1. List the PLA programming table for the BCD to Excess-3 code converter. (b) Find the CAMP-II printout for the function f (abcd) = ( 2 − 8 . 4 III B. [8+8] Figure 1: 5. (a) Deﬁne the term fault tolerance of a system? (b) How many diﬀerence approaches are there to have fault tolerance of a digital system? Explain about one such approach.Tech I Semester Regular Examinations. 10 − 13 . (a) Draw an ASM chart for a circuit with two 8-bit registers RA and RB that receive two unsigned binary numbers and perform subtraction operation RA ←RA-RB and set a borrow ﬂip ﬂop to 1 if the answer is negative. [4+12] 6. An unknown three state machine with two input symbols 0 and 1 is provided with the input sequence X. as shown below: 1 of 2 .

(a) Explain folding theorem. ⋆⋆⋆⋆⋆ [8+8] 2 of 2 .Code No: RR311901 X 1 Z 1 1 0 0 0 0 1 0 0 0 0 1 0 0 0 1 1 1 0 1 0 1 1 1 0 Set No. 4 0 0 0 0 0 0 1 1 0 1 0 0 1 1 1 0 0 1 0 0 [16] Show that this experiment is suﬃcient to identity the machine uniquely. 7. (b) Minimize the following function implemented on PLA using IISC algorithm. f = 2120 + 0102 + 1121 + 0002 [8+8] 8. What are the necessary and required conditions to fold a PLA along the column to have maximum folding? (b) Write short notes on the test generation for the faults in PLA. (a) Discuss the types of faults in PLAs.

- DSD Notes
- 54111-mt----digital system design
- 1. Basic Logic Design
- PLA Minimization and Testing
- M TECH
- mtech-vlsi
- Ecad & Vlsi Lab(3)
- Brain Machine Interface
- Ecad & Vlsi Lab Manual
- Iit Lecture
- 54111 Mt Digital System Design
- VLSI
- m.tech Digital System Design
- Syllabus - Cpld and Fpga Architecture and Applications
- Brain Machine Interface(v.gud)
- Digital System Design
- Brain Machine Interface Ppt
- 17 LectureASM
- VLSI__VLSID__VLSISD__VLSI_ME_ECE_.pdf
- SAMPLE PAPER FOR DSD
- Basic Questions
- 54102-MT-ANALOG AND DIGITAL IC DESIGN
- Introduction to Programmable Logic Devices
- DIGITAL SYSTEM DESIGN
- Qb Unit Wise
- m.tech Digital System Design
- Digital System Design Questions
- verilog
- rr420203-vlsi-design
- MTech 2013 Recommended BOOKS

- ISBN Manual 2012
- GkPaper I2012 Net Set W
- JNTUH Syllabus 2013 Civil Engg Course Structure
- JNTUH MCA Syllabus 2013
- JNTUH MBA Course structure and Syllabus 2013
- JNTUH Syllabus 2013 M.Tech EPS
- JNTUH Syllabus 2013 M.Tech CSE
- J-59-12 (Library of Inf Sci)
- JNTUH M.TECH PEDS 2013 Syllabus
- JNTUH Syllabus 2013 m.tech Embedded Systems
- JNTUH Syllabus 2013 M.tech Communication Sys
- kvs librarypolicy2012
- NET -59-12 (Library & Inf Sci)
- JNTYH Syllabus 2013 M.Tech CAD CAM
- The Ideal Library -the Informatorium
- Good Handling Principles
- Ready Reckoner Radar Ew
- Use Full Library Terms
- Library Quality Criteria for NBA Accreditation
- TEQIP II
- Academic Conference and Case Chase Competition 12
- AICTE Hand Book 2011-12
- Dspace on windows
- NET GK
- Guidelines for Open Educational Resources (OER) in Higher Education,
- IP Addresses and Subnetting
- Vbit Journals 2011-12
- Librarian is Teaching or Non Teaching
- Aicte 6 Pay for Engineering Teachers
- PSoC Express First Touch Documentation

Close Dialog## Are you sure?

This action might not be possible to undo. Are you sure you want to continue?

Loading