EC2308: MICROPROCESSORS & MICROCONTROLLERS LAB MANUAL V SEM ECE

1. INTRODUCTION TO 8085
INTEL 8085 is one of the most popular 8-bit microprocessor capable of addressing 64 KB of memory and its architecture is simple. The device has 40 pins, requires +5 V power supply and can operate with 3MHz single phase clock. ALU (Arithmetic Logic Unit): The 8085A has a simple 8-bit ALU and it works in coordination with the accumulator, temporary registers, 5 flags and arithmetic and logic circuits. ALU has the capability of performing several mathematical and logical operations. The temporary registers are used to hold the data during an arithmetic and logic operation. The result is stored in the accumulator and the flags are set or reset according to the result of the operation. The flags are affected by the arithmetic and logic operation. They are as follows: • Sign flag After the execution of the arithmetic - logic operation if the bit D7 of the result is 1, the sign flag is set. This flag is used with signed numbers. If it is 1, it is a negative number and if it is 0, it is a positive number. • Zero flag The zero flag is set if the ALU operation results in zero. This flag is modified by the result in the accumulator as well as in other registers. • Auxillary carry flag In an arithmetic operation when a carry is generated by digit D3 and passed on to D4, the auxillary flag is set. • Parity flag After arithmetic – logic operation, if the result has an even number of 1’s the flag is set. If it has odd number of 1’s it is reset. • Carry flag If an arithmetic operation results in a carry, the carry flag is set. The carry flag also serves as a borrow flag for subtraction.

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Timing and control unit This unit synchronizes all the microprocessor operation with a clock and generates the control signals necessary for communication between the microprocessor and peripherals. The control signals RD (read) and WR (write) indicate the availability of data on the data bus. Instruction register and decoder The instruction register and decoder are part of the ALU. When an instruction is fetched from memory it is loaded in the instruction register. The decoder decodes the instruction and establishes the sequence of events to follow. Register array The 8085 has six general purpose registers to store 8-bit data during program execution. These registers are identified as B, C, D, E, H and L. they can be combined as BC, DE and HL to perform 16-bit operation. Accumulator Accumulator is an 8-bit register that is part of the ALU. This register is used to store 8-bit data and to perform arithmetic and logic operation. The result of an operation is stored in the accumulator. Program counter The program counter is a 16-bit register used to point to the memory address of the next instruction to be executed. Stack pointer It is a 16-bit register which points to the memory location in R/W memory, called the Stack.

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e. • Address bus – it is a group of 16-bit lines generally identified as A0 – A15..Communication lines 8085 microprocessor performs data transfer operations using three communication lines called buses. data bus and control bus. The microprocessor uses such signals for timing purpose. The data ranges from 00 – FF. It is capable of addressing 2 16 memory locations. They are address bus. the bits flow in one direction from microprocessor to the peripheral devices. Control bus – it consist of various single lines that carry synchronizing signals. The address bus is unidirectional i. 4 . • • Data bus – it is a group of 8 lines used for data flow and it is bidirectional.

5 . 8 BIT DATA ADDITION AIM: To add two 8 bit numbers stored at consecutive memory locations. Store the answer at another memory location. 2. 4. Get the second number and add it to the accumulator. Get the first number from memory in accumulator. Initialize memory pointer to data location. 3. ALGORITHM: 1. RESULT: Thus the 8 bit numbers stored at 4500 &4501 are added and the result stored at 4502 & 4503.2(A).

FLOW CHART: START [C] 00H [HL] 4500H [A] [M] [HL][HL]+1 [A][A]+[M] NO Is there a Carry ?YES [C][C]+1 [HL][HL]+1 [M] [A] [HL][HL]+1 [M] [C] STOP 6 .

Jump to location if result does not yield carry. Add first number to acc. to point next memory Location. Increment HL reg. to point next memory Location. A H M. Transfer the result from acc. to 4500 Transfer first data to accumulator Increment HL reg. Content. to point next memory Location. Move carry to memory Stop the program INR INX MOV INX MOV HLT C H M. Increment HL reg. to memory.PROGRAM: ADDRESS OPCODE LABEL 4100 START 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 OBSERVATION: INPUT 4500 4501 4502 4503 OUTPUT L1 MNEMONICS OPERAND MVI C. Initialize HL reg. 4500 A. C 7 . Increment C reg. 00 LXI MOV INX ADD JNC H. M H M L1 COMMENT Clear C reg.

is incremented in case there is a borrow. If there is no borrow the content of the acc. 8 . RESULT: Thus the 8 bit numbers stored at 4500 &4501 are subtracted and the result stored at 4502 & 4503. Get the second number and subtract from the accumulator. 8 BIT DATA SUBTRACTION AIM: To Subtract two 8 bit numbers stored at consecutive memory locations. Store the answer at next memory location. Initialize memory pointer to data location. the content of the acc. If the result yields a borrow. 4. ALGORITHM: 1. 3. 5. 2.2(B). is complemented and 01H is added to it (2’s complement). A register is cleared and the content of that reg. Get the first number from memory in accumulator. is directly taken as the result.

FLOW CHART: START [C] 00H [HL] 4500H [A] [M] [HL][HL]+1 [A][A]-[M] Is there a Borrow ? NO YES Complement [A] Add 01H to [A] [C][C]+1 [HL][HL]+1 [M] [A] [HL][HL]+1 [M] [C] STOP 9 .

Increment C reg. Complement the Acc. Location. A H M. to point next mem. Increment HL reg. Subtract first number from acc. Initialize HL reg. content Add 01H to content of acc. 00 LXI MOV INX SUB JNC H. to point next mem.PROGRAM: ADDRESS OPCODE LABEL 4100 START 4102 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 OBSERVATION: INPUT 4500 4501 4502 4503 OUTPUT MNEMONICS OPERAND MVI C. Stop the program INR CMA ADI L1 INX MOV INX MOV HLT C 01H H M. Jump to location if result does not yield borrow. to point next mem. to memory. 4500 A. Move carry to mem. M H M L1 COMMENT Clear C reg. Location. Increment HL reg. Content. C 10 . to 4500 Transfer first data to accumulator Increment HL reg. Transfer the result from acc. Location.

11 . is stored in a memory location.3(A). 4. 3. Initialize memory pointer to data location. ALGORITHM: LOGIC: Multiplication can be done by repeated addition. 7. which is in the accumulator. Move the multiplier to another register. 2. 6. The result. Move multiplicand to a register. RESULT: Thus the 8-bit multiplication was done in 8085µp using repeated addition method. 5. 1. 8 BIT DATA MULTIPLICATION AIM: To multiply two 8 bit numbers stored at consecutive memory locations and store the result in memory. 8. Add multiplicand to accumulator Decrement multiplier Repeat step 5 till multiplier comes to zero. Clear the accumulator.

FLOW CHART: START [HL] ←4500 B ←M [HL] ← [HL]+1 A ← 00 C ← 00 [A] ← [A] +[M] Is there any carry YES C ← C+1 B ← B-1 NO NO IS B=0 YES A 12 .

A [HL][HL]+1 [M] [A] [HL][HL]+1 [M] [C] STOP 13 .

Clear the acc. 4500 B. to 4500 Transfer first data to reg. to memory. Transfer the result from C reg. Location. Location. to point next mem. Stop the program NEXT INR DCR JNZ INX MOV INX MOV HLT C B L1 H M.PROGRAM: ADDRESS OPCODE LABEL 4100 START 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 OBSERVATION: INPUT 4500 4501 4502 4503 14 OUTPUT L1 MNEMONICS LXI MOV INX MVI MVI ADD JNC OPERAND H. 00H M NEXT COMMENT Initialize HL reg. M H A. to memory. to point next mem. Location. A H M. Increment HL reg. Transfer the result from acc. Jump to NEXT if there is no carry Increment C reg Decrement B reg Jump to L1 if B is not zero. Increment HL reg. B Increment HL reg. Clear C reg for carry Add multiplicand multiplier times. 00H C. C . to point next mem.

3(B). 5. Load Divisor and Dividend 2. Subtract divisor from dividend 3. 1.The dividend now becomes the remainder. Count the number of times of subtraction which equals the quotient 4. ALGORITHM: LOGIC: Division is done using the method Repeated subtraction. stop the program execution. Otherwise go to step 2. RESULT: Thus an ALP was written for 8-bit division using repeated subtraction method and executed using 8085µ p kits 15 . 8 BIT DIVISION AIM: To divide two 8-bit numbers and store the result in memory. Stop subtraction when the dividend is less than the divisor .

FLOWCHART: START B ← 00 [HL] ←4500 A ←M [HL] ← [HL]+1 M ← A-M [B] ← [B] +1 NO IS A<0 YES A ← A+ M B ← B-1 [HL][HL]+1 [M] [A] [HL][HL]+1 [M] [B] STOP 16 .

4500 A. Location. Stop the program ADDRESS 4502 4503 4502 4503 17 . Transfer the remainder from acc.A H M. to memory.M H M B LOOP M B H M. Transfer the quotient from B reg. Increment HL reg. to 4500H Transfer dividend to acc. Location. Location. to point next mem.NO 1 2 ADDRESS 4500 4501 4500 4501 INPUT DATA OUTPUT DATA LOOP OPCODE LABEL MNEMO NICS MVI LXI MOV INX SUB INR JNC ADD DCR INX MOV INX MOV HLT OPERA ND B.PROGRAM: ADDRESS 4100 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 OBSERVATION: S. to point next mem. Decrement B reg Increment HL reg. to point next mem.00 H. to memory. Subtract divisor from dividend Increment B reg Jump to LOOP if result does not yield borrow Add divisor to acc. Increment HL reg.B COMMENTS Clear B reg for quotient Initialize HL reg.

16 BIT DATA ADDITION AIM: To add two 16-bit numbers stored at consecutive memory locations. 3. Get the second number in memory and add it to the Register pair. Initialize memory pointer to data location. 2. Get the first number from memory and store in Register pair.4(A). RESULT: Thus an ALP program for 16-bit addition was written and executed in 8085µp using special instructions. 18 . Store the sum & carry in separate memory locations. 4. ALGORITHM: 1.

FLOW CHART: START [L] [H] [DE] [8050 H] [8051 H] [HL] [L] [H] [8052H] [8053H] [A]00H [HL][HL]+[DE] Is there a Carry? NO YES [A][A]+1 [8054][ L] [8055] [H] [8056] [A] STOP 19 .

00H D LOOP A 8054H 8056H Load the addend in HL pair. OBSERVATION: INPUT DATA OUTPUT DATA ADDRESS 8050H 8051H 8052H 8053H ADDRESS 8054H 8055H 8056H 20 . A Store the content of HL Pair in 8054H(LSB of sum) Store the carry in 8056H through Acc. Stop the program. Initialize reg. Otherwise increment reg. If there is no carry. A for carry Add the contents of HL Pair with that of DE pair.PROGRAM: ADDRESS OPCODE LABEL 8000 START 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 LOOP MNEMONICS OPERAND LHLD 8050H XCHG LHLD MVI DAD JNC INR SHLD STA HLT COMMENT Load the augend in DE pair through HL pair. 8052H A. go to the instruction labeled LOOP. (MSB of sum).

2.4(B). Store the difference and borrow in different memory locations. 21 . Initialize memory pointer to data location. Subtract subtrahend from minuend. RESULT: Thus an ALP program for subtracting two 16-bit numbers was written and executed. ALGORITHM: 1. 16 BIT DATA SUBTRACTION AIM: To subtract two 16-bit numbers stored at consecutive memory locations. Get the subtrahend from memory and transfer it to register pair. 5. 3. Get the minuend from memory and store it in another register pair. 4.

FLOW CHART: START [L] [H] [DE] [8050 H] [8051 H] [HL] [L] [H] [8052H] [8053H] [HL][HL]-[DE] Is there a borrow? NO YES [C][C]+1 [8054][ L] [8055] [H] [8056] [C] STOP 22 .

Transfer content of acc. Pair. to the memory location 8506H Stop the program execution. Subtract content of reg. H D H. Move the content of reg. A A. D with that of Acc. Increment reg. A 8054H NEXT C A. C 8056H NEXT INPUT DATA ADDRESS 8054H 8055H 8056H 23 . pair. L Move the content of reg. C to Acc. L E L. 8050H Load the subtrahend in DE reg. Move the content of Acc. L to Acc. 00 Initialize C reg. Store the content of acc. If there is borrow. Pair through HL reg. to reg.PROGRAM: ADDRESS OPCODE LABEL 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A OBSERVATION: ADDRESS 8050H 8051H 8052H 8053H START MNEMO NICS MVI LHLD XCHG LHLD MOV SUB MOV MOV SBB MOV SHLD JNC INR MOV STA HLT OPER COMMENTS AND C. OUTPUT DATA 8052H A. C Transfer the content of reg. Subtract the content of reg. go to the instruction labeled NEXT. to reg. H to Acc. E from that of acc. Load the minuend in HL reg. H Store the content of HL pair in memory location 8504H.

Get the multiplier and multiplicand.5(A). Add multiplicand. Initialize a register to store partial product. RESULT: Thus the 16-bit multiplication was done in 8085µp using repeated addition method. ALGORITHM: 1. 2. 4. 16 BIT MULTIPLICATION AIM: To multiply two 16 bit numbers and store the result in memory. 24 . multiplier times. Store the result in consecutive memory locations. 3.

FLOWCHART: START L H [8050] [8051] SP HL L H [8052] [8053] DE HL HL0000 BC0000 HLHL+SP NO Is Carry flag set? BCBC+1 DEDE+1 Is Zero flag set? A 25 .

YES

NO YES A

[8054] [8055]

L H

[8056] [8057]

C B

STOP

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ADDRESS OPCODE LABEL MNEM

8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A 801B 801C 801D 801E 801F 8020 8021 8022 8023 8024 OBSERVATION:
INPUT

START

OPERAN COMMENTS O D N I C S LHLD 8050 Load the first No. in stack pointer through HL reg. pair SPHL LHLD XCHG LXI LXI

8052

Load the second No. in HL reg. pair & Exchange with DE reg. pair.

H, 0000H Clear HL & DE reg. pairs. B, 0000H SP NEXT B D A,E D LOOP 8054 A, C 8056 A, B 8057 Add SP with HL pair. If there is no carry, go to the instruction labeled NEXT Increment BC reg. pair Decrement DE reg. pair. Move the content of reg. E to Acc. OR Acc. with D reg. If there is no zero, go to instruction labeled LOOP Store the content of HL pair in memory locations 8054 & 8055. Move the content of reg. C to Acc. Store the content of Acc. in memory location 8056. Move the content of reg. B to Acc. Store the content of Acc. in memory location 8056. Stop program execution

LOOP

DAD JNC INX DCX MOV ORA JNZ SHLD MOV STA MOV STA HLT
OUTPUT

NEXT

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ADDRESS

DATA

ADDRESS

DATA

8050 8051 8052
8053

8054 8055 8056
8057

5(B). 16- BIT DIVISION
AIM: To divide two 16-bit numbers and store the result in memory using 8085 mnemonics. ALGORITHM: 1. 2. 3. 4. 5. Get the dividend and divisor. Initialize the register for quotient. Repeatedly subtract divisor from dividend till dividend becomes less than divisor. Count the number of subtraction which equals the quotient. Store the result in memory.

RESULT: Thus the 16-bit Division was done in 8085µp using repeated subtraction method.

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E LA AH AA.Borrow HA BCBC+ 1 Is Carry flag set ? NO YES A 29 .H. AA.FLOWCHART: START L [8051] H [8052] HL DE L [8050] H [8051] BC 0000H A L.

A BCBC.1 HLHL+DE L[8054] H[8055] AC [8056] A AB [8057] A STOP 30 .

H Acc. Decrement BC reg. L E L. Pair BC If there is no carry. Store the content of Acc. Increment reg. C 8056 A. Store the content of HL pair in 8054 & 8055. Clear BC reg.PROGRAM: ADDRESS OPCODE LABEL 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A 801B 801C 801D 801E 801F 8020 8021 OBSERVATION: INPUT ADDRESS DATA 8050 8051 8052 8053 START MNEM ONICS LHLD XCHG LHLD LXI OPERA ND 8052 COMMENTS Load the first No. Subtract reg. pair. Move the content of Acc to L. E from that of Acc. Move the content of reg. H D H. Move the content of Acc to H. pair. 0000H Load the second No. L to Acc. Stop the program execution. in HL reg. in stack pointer through HL reg. LOOP MOV SUB MOV MOV SBB MOV INX JNC DCX DAD SHLD MOV STA MOV STA HLT A. B 8057 Move the content of reg. Add content of HL and DE reg. go to the location labeled LOOP. D from that of Acc. A A. in memory 8057. Move the content of reg. Store the content of Acc. pair. B to Acc. A B LOOP B D 8054 A. C to Acc. OUTPUT ADDRESS DATA 8054 8055 8056 8057 31 . Subtract reg. in memory 8056 Move the content of reg. pairs. pair 8050 B. pair & Exchange with DE reg.

Decrement the counter by 1. Increment the memory pointer to point to the next element. 8. Fetch the first element from the memory location and load it in the accumulator. 4. LARGEST ELEMENT IN AN ARRAY AIM: To find the largest element in an array. 7. ALGORITHM: 1. Initialize a counter (register) with the total number of elements in an array. Compare the accumulator content with the memory content (next element). 9. 6. 5. Repeat steps 5 to 8 until the counter reaches zero 10. 32 . Else continue. RESULT: Thus the largest number in the given array is found out. 2. Place all the elements of an array in the consecutive memory locations. Decrement the counter by 1. 3. If the accumulator content is smaller.6(A). Store the result (accumulator content) in the specified memory location. then move the memory content (largest element) to the accumulator.

FLOW CHART: START [HL]  [8100H] [B]  04H [A]  [HL] [HL  [HL] + 1 NO IS [A] < [HL]? YES [A] [HL] [B]  [B]-1 IS [B] = 0? NO YES [8105]  [A] STOP 33 .

M B LOOP1 8105 COMMENTS Initialize HL reg. to 8100H Initialize B reg with no. of comparisons(n-1) Transfer first data to acc.PROGRAM: ADDRE SS 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 OBSERVATION: INPUT ADDRESS DATA 8100 8101 8102 8103 8104 OUTPUT ADDRESS DATA 8105 OPCO DE LABEL MNEM ONICS LXI MVI LOOP1 MOV INX CMP JNC MOV DCR JNZ STA HLT OPER AND H.04 A. to point next memory location Compare M & A If A is greater than M then go to loop Transfer data from M to A reg Decrement B reg If B is not Zero go to loop1 Store the result in a memory location.M H M LOOP A. Increment HL reg.8100 B. Stop the program LOOP 34 .

If the accumulator content is smaller. 5. Repeat steps 5 to 8 until the counter reaches zero 10. Decrement the counter by 1. ALGORITHM: 1. Increment the memory pointer to point to the next element. 6.6(B). 8. Else continue. RESULT: Thus the smallest number in the given array is found out. Store the result (accumulator content) in the specified memory location. 35 . Place all the elements of an array in the consecutive memory locations. then move the memory content (largest element) to the accumulator. 2. 7. Fetch the first element from the memory location and load it in the accumulator. SMALLEST ELEMENT IN AN ARRAY AIM: To find the smallest element in an array. 9. 4. Decrement the counter by 1. Initialize a counter (register) with the total number of elements in an array. Compare the accumulator content with the memory content (next element). 3.

FLOW CHART: START [HL]  [8100H] [B]  04H [A]  [HL] [HL  [HL] + 1 YES IS [A] < [HL]? NO [A] [HL] [B]  [B]-1 IS [B] = 0? NO YES [8105]  [A] STOP 36 .

8100 B. to point next memory location Compare M & A If A is lesser than M then go to loop Transfer data from M to A reg Decrement B reg If B is not Zero go to loop1 Store the result in a memory location. of comparisons(n-1) Transfer first data to acc.04 A.M H M LOOP A.PROGRAM: ADDRE SS 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 OBSERVATION: INPUT ADDRESS DATA 8100 8101 8102 8103 8104 OUTPUT ADDRESS DATA 8105 OPCO DE LABEL MNEM ONICS LXI MVI LOOP1 MOV INX CMP JC MOV DCR JNZ STA HLT OPER AND H. Stop the program LOOP 37 .M B LOOP1 8105 COMMENTS Initialize HL reg. Increment HL reg. to 8100H Initialize B reg with no.

ASCENDING ORDER AIM: To sort the given number in the ascending order using 8085 microprocessor. 2. Compare the first two numbers and if the first number is larger than second then I interchange the number. go to step 4 4. ALGORITHM: 1.7(A). Repeat steps 2 and 3 until the numbers are in required order RESULT: Thus the ascending order program is executed and thus the numbers are arranged in ascending order. 3. Get the numbers to be sorted from the memory locations. If the first number is smaller. 38 .

1 [HL]  [D] [HL]  [HL] + 1 [C]  [C] – 01 H A 39 .FLOWCHART: START [B]  04H [HL]  [8100H] [C]  04H [A]  [HL] [HL  [HL] + 1 YES IS [A] < [HL]? NO [D] [HL] [HL]  [A] [HL]  [HL] .

A IS [C] = 0? NO YES [B]  [B]-1 IS [B] = 0? NO YES STOP PROGRAM: 40 .

ADDR E SS 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A OPCO DE LABEL MNEM ONICS MVI OPER AND B. of comparisons(n-1) Transfer first data to acc. to point next memory location Compare M & A If A is less than M then go to loop1 Transfer data from M to D reg Transfer data from acc to M Decrement HL pair Transfer data from D to M Increment HL pair Decrement C reg If C is not zero go to loop2 Decrement B reg If B is not Zero go to loop3 Stop the program LOOP 3 LXI MVI LOOP2 MOV INX CMP JC MOV MOV DCX MOV INX DCR JNZ DCR JNZ HLT LOOP1 OBSERVATION: INPUT MEMORY LOCATION 8100 8101 8102 8103 8104 DATA MEMORY LOCATION 8100 8101 8102 8103 8104 OUTPUT DATA 41 .04 H.A H M. Increment HL reg.M M.D H C LOOP2 B LOOP3 COMMENTS Initialize B reg with number of comparisons (n-1) Initialize HL reg. to 8100H Initialize C reg with no.8100 C.M H M LOOP1 D.04 A.

2.7(B). ALGORITHM: 1. DESCENDING ORDER AIM: To sort the given number in the descending order using 8085 microprocessor. Repeat steps 2 and 3 until the numbers are in required order RESULT: Thus the descending order program is executed and thus the numbers are arranged in descending order. 42 . Get the numbers to be sorted from the memory locations. go to step 4 4. Compare the first two numbers and if the first number is smaller than second then I interchange the number. If the first number is larger. 3.

1 [HL]  [D] [HL]  [HL] + 1 [C]  [C] – 01 H A 43 .FLOWCHART: START [B]  04H [HL]  [8100H] [C]  04H [A]  [HL] [HL  [HL] + 1 NO IS [A] < [HL]? YES [D] [HL] [HL]  [A] [HL]  [HL] .

A IS [C] = 0? NO YES [B]  [B]-1 IS [B] = 0? NO YES STOP PROGRAM: 44 .

ADDRE SS 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A

OPCO DE

LABEL

MNEM ONICS MVI LXI MVI

OPER AND B,04 H,8100 C,04 A,M H M LOOP1 D,M M,A H M,D H C LOOP2 B LOOP3

COMMENTS Initialize B reg with number of comparisons (n-1) Initialize HL reg. to 8100H Initialize C reg with no. of comparisons(n-1) Transfer first data to acc. Increment HL reg. to point next memory location Compare M & A If A is greater than M then go to loop1 Transfer data from M to D reg Transfer data from acc to M Decrement HL pair Transfer data from D to M Increment HL pair Decrement C reg If C is not zero go to loop2 Decrement B reg If B is not Zero go to loop3 Stop the program

LOOP 3

LOOP2

MOV INX CMP JNC MOV MOV DCX MOV INX DCR JNZ DCR JNZ HLT

LOOP1

OBSERVATION: INPUT MEMORY LOCATION 8100 8101 8102 8103 8104 DATA MEMORY LOCATION 8100 8101 8102 8103 8104 OUTPUT DATA

8(A). CODE CONVERSION –DECIMAL TO HEX

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AIM: To convert a given decimal number to hexadecimal. ALGORITHM: 1. 2. 3. 4. 5. 6. Initialize the memory location to the data pointer. Increment B register. Increment accumulator by 1 and adjust it to decimal every time. Compare the given decimal number with accumulator value. When both matches, the equivalent hexadecimal value is in B register. Store the resultant in memory location.

RESULT: Thus an ALP program for conversion of decimal to hexadecimal was written and executed.

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FLOWCHART:

START HL 4500H

A 00

B B

00H B+1

A

A +1

Decimal adjust accumulator

NO

Is A=M?

YES
A B

8101

A

Stop

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Stop the program 48 . Store the result in a memory location.00 B 01 M LOOP A. Initialize B register.B 8101 COMMENTS Initialize HL reg. Increment A reg Decimal Adjust Accumulator Compare M & A If acc and given number are not equal.8100 A.PROGRAM: ADDRE SS 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 RESULT: INPUT ADDRESS DATA 8100 OUTPUT ADDRESS DATA 8101 OPCO DE LABEL MNEM ONICS LXI MVI MVI LOOP INR ADI DAA CMP JNZ MOV STA HLT OPER AND H..00 B. Increment B reg. to 8100H Initialize A register. then go to LOOP Transfer B reg to acc.

6. CODE CONVERSION –HEXADECIMAL TO DECIMAL AIM: To convert a given hexadecimal number to decimal. RESULT: Thus an ALP program for conversion of hexadecimal to decimal was written and executed. Increment accumulator by 1 and adjust it to decimal every time. 49 . 4.8(B). Increment B register. ALGORITHM: 1. 3. 5. the equivalent decimal value is in A register. When both match. Store the resultant in memory location. Initialize the memory location to the data pointer. Compare the given hexadecimal number with B register value. 2.

A C YES A Stop 50 . Is A=M? NO 8101 8102 A. A B.FLOWCHART: HL START 8100H A 00 B C B 00H 00H B+1 A A +1 Decimal adjust accumulator Is there carry? C C+1 D A.

00 C.00 B 01 NEXT C D. Initialize B register. to 8100H Initialize A register. then go to LOOP Store the result in a memory location.8100 A. Increment B reg. Transfer A to D Transfer B to A Compare M & A Transfer D to A If acc and given number are not equal.C 8102 COMMENTS Initialize HL reg. Initialize C register for carry. Increment c register.00 B. Transfer C to A Store the carry in another memory location.PROGRAM: ADDRE SS 8000 8001 8002 8003 8004 8005 8006 8007 8008 8009 800A 800B 800C 800D 800E 800F 8010 8011 8012 8013 8014 8015 8016 8017 8018 8019 801A 801B 801C 801D 801E 801F RESULT: INPUT ADDRESS 8100 DATA OUTPUT ADDRESS 8101 8102 DATA OPCO DE LABEL MNEM ONICS LXI MVI MVI MVI LOOP INR ADI DAA JNC INR MOV MOV CMP MOV JNZ STA MOV STA HLT OPER AND H. Increment A reg Decimal Adjust Accumulator If there is no carry go to NEXT. Stop the program NEXT 51 .D LOOP 8101 A.B M A.A A.

RESULT: Thus the 8 bit BCD numbers stored at 4500 &4501 are added and the result stored at 4502 & 4503. Store the answer at another memory location. Initialize memory pointer to data location. 2. ALGORITHM: 1. 4. 3. Get the second number and add it to the accumulator Adjust the accumulator value to the proper BCD value using DAA instruction. 5. Get the first number from memory in accumulator. 52 .9(A) BCD ADDITION AIM: To add two 8 bit BCD numbers stored at consecutive memory locations.

FLOW CHART: START [C] 00H [HL] 4500H [A] [M] [HL][HL]+1 [A][A]+[M] Decimal Adjust Accumulator NO YES Is there a Carry ? [C][C]+1 [HL][HL]+1 [M] [A] [HL][HL]+1 [M] [C] STOP 53 .

to point next memory Location. 00 LXI MOV INX ADD DAA JNC L1 H. Increment C reg. Increment HL reg. Move carry to memory Stop the program INR INX MOV INX MOV HLT C H M. Transfer the result from acc. to 4500 Transfer first data to accumulator Increment HL reg. C 54 . Initialize HL reg. to point next memory Location. A H M. to point next memory Location. to memory. 4500 A.PROGRAM: ADDRESS OPCODE LABEL 4100 START 4103 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 OBSERVATION: INPUT 4500 4501 4502 4503 OUTPUT L1 MNEMONICS OPERAND MVI C. Add first number to acc. Increment HL reg. M H M COMMENT Clear C reg. Decimal adjust accumulator Jump to location if result does not yield carry. Content.

Store the content of the accumulator (result)and borrow register in the specified memory location RESULT: Thus the 8 bit BCD numbers stored at 4500 &4501 are subtracted and the result stored at 4502 & 4503. 2. ALGORITHM: 1.9(B). If there is no carry. Take the 100’s complement of the subtrahend. 5. Initialize Borrow register to 0. 4. Add the result with the minuend which yields the result. increment the carry register by 1 7. Load the minuend and subtrahend in two registers. 55 . If there is a carry ignore it. Adjust the accumulator value to the proper BCD value using DAA instruction. 3. BCD SUBTRACTION AIM: To Subtract two 8 bit BCD numbers stored at consecutive memory locations. 6.

FLOW CHART: START [D] 00H HL 4500 B M HL HL+ 1 C M A 99 [A] [A] – [C] [A] [A]+1 [A][A]+[B] DAA Is there a Carry ? YES NO [D][D]+1 [HL][HL]+1 [4502] A [4503] D STOP 56 .

Location. to point next mem. Location. Move 99 to the Accumulator Subtract [C] from acc. 4500 B. Increment HL register pair Move the Acc. 99 C A B LOOP Initialize HL reg. LXI MOV INX MOV MVI SUB INR ADD DAA JC H. to 4500 Transfer first data to accumulator Increment HL reg. D Increment D reg.PROGRAM: ADDRESS OPCODE LABEL 4100 START 4101 4102 4103 4104 4105 4106 4107 4108 4109 410A 410B 410C 410D 410E 410F 4110 4111 4112 4113 4114 4115 4116 OBSERVATION: INPUT 4500 4501 4502 4503 OUTPUT LOOP INR INX MOV INX MOV HLT D H M. Move second no. to point next mem.content to the memory location Increment HL reg. M A. 00 Clear D reg. M H C. to B reg. Content.A H M. Transfer D register content to memory. Increment A register Add [B] with [A] Adjust Accumulator value for Decimal digits Jump on carry to loop 57 . Stop the program MNEMONICS OPERAND COMMENT MVI D.

Call a subroutine for performing the multiplication of one element of a matrix with the other element of the other matrix. 2 X 2 MATRIX MULTIPLICATION AIM: To perform the 2 x 2 matrix multiplication. 3. RESULT: Thus the 2 x 2 matrix multiplication is performed and the result is stored at 4700. 4702 & 4703. ALGORITHM: 1. Load the 2 input matrices in the separate address and initialize the HL and the DE register pair with the starting address respectively. 2.4701 . 58 .10. Call a subroutine to store the resultant values in a separate matrix.

DE DE+1 Call subroutine MUL A A+B DE 8600H Call subroutine MUL B A Call subroutine STORE A C HL HL+1 DE DE+1. pair YES Call subroutine STORE HL HL-1 DE DE-1.FLOW CHART: START C HL 00H 8500H A HL HL+1 DE DE+1. DE DE+1 Call subroutine MUL A A+B Is A=04H ? NO Increment HL reg. Call subroutine MUL B A B STOP B A A 59 Call subroutine MUL .

1 B 87 [A][[BC]] C C+ 1 Is H=0 ? YES RET NO [D][D]+1 H H.1 NO Is H=0 ? YES [H]85.MUL STORE [A] [[DE]] D A H M H H. [D]86 RET 60 .

Increment HL register pair . 8500 D.A H D D MUL B STORE A.C Transfer A reg content to B reg. Increment DE register pair Increment DE register pair Call subroutine MUL Add [B] with [A] Call subroutine STORE Decrement HL register pair Decrement DE register pair Call subroutine MUL 61 . 8600 MUL B. Increment HL register pair Increment DE register pair Increment DE register pair Call subroutine MUL Add A with B Call subroutine MUL Transfer C register content to Acc. to 4500 Load DE register pair Call subroutine MUL Move A to B reg. 00 H. MNEM ONICS MVI LXI LXI CALL MOV INX INX INX CALL ADD CALL DCX DCX CALL OPERAN D C. Initialize HL reg.A H D D MUL B STORE H D MUL COMMENT Clear C reg.PROGRAM: ADDRESS OPCOD LABEL E 8100 8101 8102 8103 8104 8105 LOOP2 8106 8107 8108 8109 810A 810B 810C 810D 810E 810F 8110 8111 8112 8113 8114 8115 8116 8117 8118 8119 811A 811B 811C 811D 811E 811F 8120 8121 8122 8123 8124 8125 8126 MOV INX INX INX CALL ADD CALL MOV B.

M H LOOP3 D H LOOP4 H. Decrement H register. If H is not zero go to LOOP4.87 B C LOOP3 OBSERVATION: 4500 4501 4502 4503 INPUT 4600 4601 4602 4603 OUTPUT 4700 4701 4702 4703 62 . Transfer from memory to H register. Return to main program. Load acc from the memory location pointed by DE pair. go to loop1 Increment HL register Pair.8127 8128 8129 812A 812B 812C 812D 812E 812F 8130 8131 8132 8133 8134 8135 8136 8137 8138 8139 813A 813B 813C 813D 813E 813F 8140 8141 8142 8143 8144 8145 8146 CPI JZ INX JMP LOOP1 MUL HLT LDAX MOV MOV DCR JZ LOOP4 ADD DCR JNZ MVI MVI STORE RET MVI STAX INR RET 04 LOOP1 H LOOP2 Compare with 04 to check whether all elements are multiplied. Transfer 85 TO H register. Transfer acc content to D register. D D. Stop the program. Transfer 86 to D register.85 D.86 B. Transfer 87 to B register. Add Acc with D reg Decrement H register. If H is zero go to LOOP3.A H. If completed. Return to main program. Jump to LOOP2. Load A from memory location pointed by BC pair. Increment C register.

4CH INT 21H CODE ENDS END START RESULT: A message is displayed on the CRT screen of a microcomputer using DOS calls 63 . 0AH. Initialize the data segment and the message to be displayed. 3. DATA MOV DS. 09H MOV DX. AX MOV AH. PROGRAM: ASSUME CS: CODE. Point to the message and run the interrupt to display the message in the CRT. BIOS/DOS CALLS – DISPLAY AIM: To display a message on the CRT screen of a microcomputer using DOS calls. ALGORITHM: 1. “$” DATA ENDS CODE SEGMENT START: MOV AX. Set function value for display. DS: DATA DATA SEGMENT MSG DB 0DH. “GOOD MORNING” . OFFSET MSG INT 21H MOV AH.11. 2. OAH. ODH.

12. “$” DATA ENDS CODE SEGMENT START: MOV AX. Set the file attribute to create a file using a DOS call.DAT”. DATA MOV DS. AX MOV DX. 09H INT 21H LOOP1 CODE ENDS END START RESULT: A file is opened using DOS calls. ODH. Initialize the data segment. “$” MSG DB 0DH. 3CH INT 21H JNC LOOP1 MOV AX. ALGORITHM: 1. OFFSET MSG MOV AH. BIOS/DOS CALLS – FILE MANIPULATION AIM: To open a file using DOS calls. AX MOV DX. “FILE NOT CREATED”. 4CH INT 21H 64 . OAH. 0AH. 3. DATA MOV DS. If the file is unable t o create a file display the message PROGRAM: ASSUME CS: CODE. DS: DATA DATA SEGMENT FILENAME DB “SAMPLE. OFFSET FILENAME MOV CX. 2. MOV AH. file name and the message to be displayed. 00H MOV AH.

ODH. 0AH. 2. 65 . “$” DATA ENDS CODE SEGMENT START: MOV AX. BIOS/DOS CALLS – DISK INFORMATION AIM: To display the disk information. Point to the message and run the interrupt to display the message in the CRT. PROGRAM: ASSUME CS: CODE. OAH. DATA MOV DS. Set function value for disk information. ALGORITHM: 1. 36H MOV DX.13. AX MOV AH. “GOOD MORNING” . OFFSET MSG INT 21H MOV AH. Initialize the data segment and the message to be displayed. 3. 4CH INT 21H CODE ENDS END START RESULT: The disk information is displayed. DS: DATA DATA SEGMENT MSG DB 0DH.

5. 4. If a match is found (z=1). ALGORITHM: 1. 66 . Clear the direction flag for auto incrementing mode of transfer. 2. RESULT: A word is searched and the count of number of appearances is displayed. 3. Initialize the counter with the total number of words to be copied. Use the string manipulation instruction SCASW with the prefix REP to search a word from string.1. display 01 in destination address. Load the source and destination index register with starting and the ending address respectively. Otherwise.8086 STRING MANIPULATION – SEARCH A WORD AIM: To search a word from a string. display 00 in destination address.

15H. AX MOV AH. DEST MOV CX. DS: DATA DATA SEGMENT LIST DW 53H. 02H DEST EQU 3000H COUNT EQU 05H DATA ENDS CODE SEGMENT START: MOV AX. 15H. 4CH INT 21H CODE ENDS END START INPUT: LIST: 53H. 00 CLD REP SCASW JZ LOOP MOV AX. 19H. OFFSET LIST MOV DI. AX MOV AX. 02H 67 . 01 LOOP MOV [DI]. 15H MOV SI. 19H. COUNT MOV AX. DATA MOV DS.PROGRAM: ASSUME CS: CODE.

OUTPUT: 3000 01 68 .

4. 2. stop. Load the source and destination index register with starting and the ending address respectively.2. Clear the direction flag for auto incrementing mode of transfer. Otherwise.8086 STRING MANIPULATION –FIND AND REPLACE A WORD AIM: To find and replace a word from a string. 3. RESULT: A word is found and replaced from a string. If a match is found (z=1). Initialize the counter with the total number of words to be copied. 69 . ALGORITHM: 1. replace the old word with the current word in destination address. Use the string manipulation instruction SCASW with the prefix REP to search a word from string. 5.

19H. 00 CLD REP SCASW JNZ LOOP MOV DI. 15H. REPLACE LOOP CODE ENDS END START INPUT: LIST: 53H. 02H MOV AH. OFFSET LIST MOV CX. COUNT MOV AX. 4CH INT 21H 70 . DS: DATA DATA SEGMENT LIST DW 53H. 15H. 19H. DATA MOV DS.PROGRAM: ASSUME CS: CODE. 15H MOV SI. 02H REPLACE EQU 30H COUNT EQU 05H DATA ENDS CODE SEGMENT START: MOV AX. LABEL LIST MOV [DI]. AX MOV AX.

Clear the direction flag for auto incrementing mode of transfer. 19H. 30H. 02H 3. 7. Load the source and destination index register with starting and the ending address respectively. Use the string manipulation instruction MOVSW with the prefix REP to copy a string from source to destination. 9. ALGORITHM: 6. RESULT: A string of data words is copied from one location to other. 71 . 8. 8086 STRING MANIPULATION – COPY A STRING AIM: To copy a string of data words from one location to the other.OUTPUT: LIST: 53H. Initialize the counter with the total number of words to be copied.

4CH INT 21H CODE ENDS END START INPUT: 2000 2001 48 84 OUTPUT: 3000 3001 48 84 72 .PROGRAM: ASSUME CS: CODE. DEST MOV CX. AX MOV SI. COUNT CLD REP MOVSW MOV AH. DS: DATA DATA SEGMENT SOURCE EQU 2000H DEST EQU 3000H COUNT EQU 05H DATA ENDS CODE SEGMENT START: MOV AX. DATA MOV DS. AX MOV ES. SOURCE MOV DI.

2002 2003 2004 67 90 21 3002 3003 3004 67 90 21 73 .

Do the following steps until the counter B reaches 0. Initialize two counters DX & CX with the total number of elements in the array. o Load the first element in the accumulator o Do the following steps until the counter C reaches 0. ALGORITHM: • • • Place all the elements of an array named list (in the consecutive memory locations). • RESULT: A group of data bytes are arranged in ascending order.8086 STRING MANIPULATION – SORTING AIM: To sort a group of data bytes. 2. 3. swap the content of accumulator with the content of memory location. otherwise. If the accumulator content is smaller go to next step. 1. Decrement the counter C by 1. Increment the memory pointer to point to the next element.4. Compare the accumulator content with the next element present in the next memory location. Stop the execution. 74 .

4CH INT 21H CODE ENDS END START INPUT: 75 . 25H. 19H. [SI+2] JC LOOP1 XCHG [SI +2]. COUNT-1 LOOP2: AGAIN: MOV CX. 02H COUNT EQU 04H DATA ENDS CODE SEGMENT START: MOV AX. AX LOOP1: ADD SI. DX MOV SI. 02 LOOP AGAIN DEC DX JNZ LOOP2 MOV AH. AX XCHG [SI]. [SI] CMP AX.PROGRAM: ASSUME CS: CODE. OFFSET LIST MOV AX. DS: DATA DATA SEGMENT LIST DW 53H. DATA MOV DS. AX MOV DX.

25H. 53H 76 .LIST: 53H. 25H. 19H. 19H. 02H OUTPUT: LIST: 02H.

APPARATUS REQUIRED: 8085 µp kit. VXT parallel bus I/O MODES: Control Word: MODE 0 – SIMPLE I/O MODE: This mode provides simple I/O operations for each of the three ports and is suitable for synchronous data transfer. In this mode all the ports can be configured either as input or output port. DC regulated power supply.mode1 and BSR mode.4. Let us initialize port A as input port and port B as output port 77 . 8255Interface board. INTERFACING 8255 WITH 8085 AIM: To interface programmable peripheral interface 8255 with 8085 and study its characteristics in mode0.

90 Initialize port A as Input and Port 4101 B as output. 4102 OUT C6 Send Mode Control word 4103 4104 IN C0 Read from Port A 4105 4106 OUT C2 Display the data in port B 4107 4108 STA 4200 Store the data read from Port A 4109 in 4200 410A 410B HLT Stop the program. B4 Initialize port A as Input port in 4101 mode 1. 4102 OUT C6 Send Mode Control word 4103 4104 MVI A. port A and port B are used as data ports and port C is used as control signals for strobed I/O data transfer.08 Enable RST5. MODE1 STROBED I/O MODE: In this mode.PROGRAM: ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS 4100 START: MVI A.09 Set the PC4 bit for INTE A 4105 4106 OUT C6 Display the data in port B 4107 EI 4108 MVI A. Let us initialize port A as input port in mode1 MAIN PROGRAM: ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS 4100 START: MVI A.5 4109 410A SIM 78 .

Sub program: ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS 405E JMP 4200 Go to 4200 405F 4060 BSR MODE (Bit Set Reset mode) 79 .410B ISR (Interrupt Service Routine) EI HLT Stop the program. 4203 4204 4205 HLT Stop the program. ADDRESS OPCODES LABEL MNEMONICS OPERAND COMMENTS 4200 START: IN C0 Read from port A 4201 4202 STA 4500 Store in 4500.

PROGRAM: ADDRESS OPCODES LABEL MNEMONICS 4100 START: MVI 4101 4102 OUT 4103 4104 MVI 4105 4106 OUT 4107 OPERAND COMMENTS A. 01 Set PC0 C6 A. Let us set PC0 and PC3 bits using this mode.07 C6 Send Mode Control word Set PC3 Send Mode Control word 80 .Any lines of port c can be set or reset individually without affecting other lines using this mode.

until reloaded again. APPARATUS REQUIRED: 8085 µp kit. the output will become high. CRO. DC regulated power supply. Mode 0 – Interrupt on terminal count: The output will be initially low after mode set operations. Let us set the channel 0 in mode 0. INTERFACING 8253 TIMER WITH 8085 Interfacing 8253 Programmable Interval Timer with 8085 µ p AIM: To interface 8253 Interface board to 8085 µp and verify the operation of 8253in six different modes.4109 RESULT: HLT Stop the program. VXT parallel bus. 8253 Interface board. After loading the counter. the output will be remaining low while counting and on terminal count. 6. Program: 81 .mode1 and BSR mode is studied. Thus 8255 is interfaced and its characteristics in mode0. Connect the CLK 0 to the debounce circuit by changing the jumper J3 and then execute the following program.

the output goes HIGH. 05 OUT C8 MVI A. If the count register is reloaded between output pulses the present period will not be affected but the subsequent period will reflect the new value. 00 OUT C8 OUT D0 HLT Comments Channel 0 in mode 1 Send Mode Control word LSB of count Write count to register MSB of count Write count to register Trigger Gate0 Mode 2 – Rate Generator: It is a simple divide by N counter. Example: The following program initializes channel 0 of 8253 in Mode 1 and also initiates triggering of Gate 0. Mode 1 – Programmable ONE-SHOT: After loading the counter. 30 OUT CE MVI A. OUT 0 goes low. The period from one output pulse to the next equals the number of input counts in the count register.Address Opcodes 4100 4102 4104 4106 4108 410A 410C Label Mnemonic Operands START: MVI A. give clock pulses through the debounce logic and verify using CRO. After giving six clock pulses. Execute the program. the output will remain low following the rising edge of the gate input. 32 OUT CE MVI A. Address Opcodes 4100 4102 4104 4106 4108 410A 410C 4100 Label Mnemonic Operands START: MVI A. after any rising edge of the gate input. as clock pulse after triggering the goes back to high level after 5 clock pulses. The output will go high on the terminal count. 82 . It is retriggerable. The output will be low for one period of the input clock. hence the output will remain low for the full count. 05 OUT C8 MVI A. 00 OUT C8 HLT Comments Channel 0 in mode 0 Send Mode Control word LSB of count Write count to register MSB of count Write count to register It is observed in CRO that the output of Channel 0 is initially LOW.

the resulting square wave has an ON time of 0.Example: Using Mode 2. Thus with the input clock frequency of 1. Connect the CLK1 to PCLK. 83 .5 MHz. 00 MSB of count 410A D3 C8 OUT C8 Write count to register 410C 76 HLT Set the jumper.02184 microseconds and an OFF time of 0. the square wave will remain high for 7FFF H counts and remain low for 7FFF H counts. which corresponds to a period of 0.02184 microseconds. Let us divide the clock present at Channel 1 by 10. 00 MSB of count 410A D3 CA OUT CA Write count to register 410C 76 HLT In CRO observe simultaneously the input clock to channel 1 and the output at Out1. Example: We utilize Mode 0 to generate a square wave of frequency 150 KHz at channel 0. So.067 microseconds. This mode is used of generating Baud rate for 8251A (USART). This program divides this PCLK by 10 and thus the output at channel 0 is 150 KHz. If the count is odd. Vary the frequency by varying the count. Address Opcodes Label Mnemonic Operands Comments 4100 3E 36 START: MVI A. Here the maximum count is FFFF H. 0A LSB of count 4106 D3 C8 OUT C8 Write count to register 4108 3E 00 MVI A. so that the clock 0 of 8253 is given a square wave of frequency 1.5 MHz. 74 Channel 1 in mode 2 4102 D3 CE OUT CE Send Mode Control word 4104 3E 0A MVI A. Address Opcodes Label Mnemonic Operands Comments 4100 3E 74 START: MVI A. the output will be high for (count + 1)/2 counts. Mode 3 Square wave generator: It is similar to Mode 2 except that the output will remain high until one half of count and go low for the other half for even number count. 0A LSB of count 4106 D3 CA OUT CA Write count to register 4108 3E 00 MVI A. 36 Channel 0 in mode 3 4102 D3 CE OUT CE Send Mode Control word 4104 3E 0A MVI A.

This mode can be used for interrupt generation. B8 OUT CE MVI A. On terminal count. Counter 2 will generate a pulse after 1 second. 36 OUT CE MVI A. the output will go low for one clock period and becomes high again. Using the above-mentioned program.To increase the time period of square wave. Example: Connect OUT 0 to CLK 2 (jumper J1). 98 OUT CC MVI A. 00 OUT C8 MVI A. the initially HIGH output goes LOW. Mode 4: Software Triggered Strobe: The output is high after mode is set and also during counting. you can see using CRO. 05 Comments Channel 0 in mode 5 Send Mode Control word LSB of count 84 . Example: The program that follows initializes channel 0 in mode 5 and also triggers Gate 0. output a square wave of frequency 150 KHz at channel 0. The output ( OUT 0 pin) goes high on the next clock pulse. The following program initializes channel 2 of 8253 in mode 4. The counter is retriggerable. Execute the program and observe the output OUT 2. Execute the program. 3A OUT CC HLT Comments Channel 0 in mode 0 Send Mode Control word LSB of count Write count to register MSB of count Write count to register Channel 2 in Mode 4 Send Mode control Word LSB of Count Write Count to register MSB of Count Write Count to register Mode 5 Hardware triggered strobe: Counter starts counting after rising edge of trigger input and output goes low for one clock period when terminal count is reached. After giving Six clock pulses. Address Opcodes 4100 4102 4104 Label Mnemonic Operands START: MVI A. Now this is the clock to channel 2. Address Opcodes 4100 4102 4104 4106 4108 410A 410C 410E 4110 4112 4114 4116 4118 Label Mnemonic Operands START: MVI A. Connect CLK 0 to debounce circuit. 0A OUT C8 MVI A. set the jumpers such that CLK2 of 8253 is connected to OUT 0. 1A OUT CE MVI A.

00 D0 Write count to register MSB of count Trigger Gate 0 Result: Thus the 8253 has been interfaced to 8085 µp and six different modes of 8253 have been studied. INTERFACING 8251 WITH 8085 85 . 7. INTERFACING 8279 WITH 8085 8.4106 4108 410A 410C OUT MVI OUT HLT C8 A.

6. 2. 4. stop. Check for carry. pointer. 7. ALGORITHM: 1.SUM OF ELEMENTS IN AN ARRAY AIM: To find the sum of elements in an array. increment the carry register by 1. if exist. RESULT: The sum of elements in an array is calculated. Load the array in the consecutive memory location and initialize the memory pointer with the starting address. continue Decrement the counter and if it reaches 0. Clear the accumulator. 3. 5. Load the total number of elements in a separate register as a counter.9. 8051 . Add the register with the accumulator. Load the other register with the value of the memory 86 . Otherwise increment the memory pointer by 1 and go to step 4. otherwise.

#4500 MOV A. #00 MOV R1. R1 MOVX @DPTR. @DPTR MOV R0. B INC DPTR LOOP2: CLR C MOVX A. #4200 MOVX A. A JNC LOOP INC R1 LOOP: INC DPTR DJNZ R0. LOOP2 MOV DPTR. A 87 .PROGRAM: MOV DPTR. A MOV B. B MOV B. @DPTR ADD A.

B MOVX @DPTR. A HLT: SJMP HLT INPUT 4200 4201 4201 4202 4203 04 05 06 03 02 OUTPUT: 4500 4501 0F 00 88 .INC DPTR MOV A.

Store the result and carry in the specified memory location. Load the number to be converted into the accumulator. The accumulator now has the units. If the number is less than 100 (64H).8051 . 2. 4. Have the count(ten’s value) in separate register. RESULT The given hexadecimal number is converted into decimal number. If the number is less than 10 (0AH). 3. Multiply the ten’s value by 10 and add it with the units. 5. go to next step. Have the count(100’s value) in separate register which is the carry. ALGORITHM: 1. go to next step. otherwise. 6. otherwise.HEXADECIMAL TO DECIMAL CONVERSION AIM: To perform hexadecimal to decimal conversion. subtract 100 (64H) repeatedly until the remainder is less than 100 (64H). 89 .10(A). subtract 10 (0AH) repeatedly until the remainder is less than 10 (0AH).

#4501 MOVX @DPTR. B MOVX @DPTR. B MOV B. @DPTR MOV B. #4500 MOVX A.PROGRAM: MOV DPTR. A INC DPTR MOV A. A MOV A. B MOV DPTR. A HLT: INPUT 4500 D7 SJMP HLT OUTPUT: 4501 4502 15 02 90 . #0A DIV A. #64 DIV A. B INC DPTR MOVX @DPTR.

A INC DPTR MOVX A. A HLT: INPUT 4500 23 SJMP HLT OUTPUT 4501 17 Load the number to be converted in the accumulator. 91 .10(B).DECIMAL TO HEXADECIMAL CONVERSION AIM: To perform decimal to hexadecimal conversion ALGORITHM: 1. B INC DPTR MOVX @DPTR. #4500 MOVX A. Separate the higher order digit from lower order. #0A MUL A.8051 . B MOV B. PROGRAM: MOV DPTR. Multiply the higher order digit by 10 and add it with the lower order digit. RESULT: The given decimal number is converted to hexadecimal number. 4. 3. 2. Store the result in the specified memory location. @DPTR MOV B. @DPTR ADD A.

process control machine tools. The rotor magnetic system has two end faces. the interface circuitry that generates the driving pulses use silicon darlington pair transistors. CS1 & CS2 for selecting the IC 74175. A2. 2-PHASE SWITCHING SCHEME: In this scheme. B2. Stepper Motors are used very wisely in position control systems like printers. disk drives. B2 are cyclically excited with a DC current to run the motor in clockwise direction. B1. By reversing the phase sequence as A1. 92 . The Stepper Motor windings A1. THEORY: A motor in which the rotor is able to assume only discrete stationary angular position is a stepper motor. The rotary motion occurs in a step-wise manner from one equilibrium position to the next. It is a permanent magnet with one face as South Pole and the other as North Pole. A South Pole gets induced at the diametrically opposite side. anticlockwise stepping can be obtained.The 74175 latches the data bus to the stepper motor driving circuitry. Therefore.13. ANTICLOCKWISE STEP A1 A2 B1 CLOCKWISE STEP A1 A2 B2 DATA B1 B2 DATA 1 2 3 4 1 0 0 1 0 1 1 0 0 0 1 1 1 1 0 0 9h 5h 6h Ah 1 2 3 4 1 0 0 1 0 1 1 0 1 1 0 0 0 0 1 1 Ah 6h 5h 9h ADDRESS DECODING LOGIC: The 74138 chip is used for generating the address decoding logic to generate the device select pulses. A2. Stepper Motor requires logic signals of relatively high power. The basic two-phase stepper motor consists of two pairs of stator poles. any two adjacent stator windings are energized. The switching scheme is shown in the table given below. etc. STEPPER MOTOR INTERFACING WITH 8051 AIM: To interface a stepper motor with 8051 microcontroller and operate it. B1. Each of the four poles has its own winding. This scheme produces more torque. The excitation of any one winding generates a North Pole.

The inputs for the interface circuit are TTL pulses generated under software control using the Microcontroller Kit. 93 . The TTL levels of pulse sequence from the data bus is translated to high voltage output pulses using a buffer 7407 with open collector.

if not zero repeat the loop Short jump to Start of the program to make the motor rotate continuously Values as per twophase switching scheme 4100 START: MOV 4103 4105 4106 4108 410A 410D 410E 4110 4112 4114 4116 4118 411A 411B 411D LOOP: MOV MOVX PUSH PUSH MOV MOVX MOV MOV DJNZ DJNZ POP POP INC DJNZ SJMP R0. @DPTR DPH DPL DPTR. Entering the data in the look-up TABLE in the reverse order can vary direction of rotation. Varying the count at R4 and R5 can vary the speed. DELAY1 R4. #0FFh R5. A R4.PROGRAM : Address OPCODES Label Comments ORG 4100h DPTR. #04 A. #0FFh R5. LOOP START DELAY : DELAY 1: 411F TABLE: DB 09 05 06 0Ah PROCEDURE: Enter the above program starting from location 4100. 94 . DELAY DPL DPH DPTR R0. The stepper motor rotates. #TABLE Load the start address of switching scheme data TABLE into Data Pointer (DPTR) Load the count in R0 Load the number in TABLE into A Push DPTR value to Stack Load the Motor port address into DPTR Send the value in A to stepper Motor port address Delay loop to cause a specific amount of time delay before next data item is sent to the Motor POP back DPTR value from Stack Increment DPTR to point to next item in the table Decrement R0. #0FFC0h @DPTR.and execute the same.

RESULT: Thus a stepper motor was interfaced with 8051 and run in forward and reverse directions at various speeds. 95 .

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