Gursharan Singh Tatla

professorgstatla@gmail.com

Gursharan Singh Tatla professorgstatla@gmail.com

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1

Instruction Set of 8085
 An instruction is a binary pattern designed inside a

microprocessor to perform a specific function.
 The entire group of instructions that a microprocessor

supports is called Instruction Set.
 8085 has 246 instructions.  Each instruction is represented by an 8-bit binary value.  These 8-bits of binary value is called Op-Code or

Instruction Byte.
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Classification of Instruction Set
 Data Transfer Instruction  Arithmetic Instructions  Logical Instructions  Branching Instructions  Control Instructions
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Data Transfer Instructions
 These instructions move data between registers, or

between memory and registers.
 These instructions copy data from source to

destination.
 While copying, the contents of source are not

modified.

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com 5 .Data Transfer Instructions Opcode MOV Operand Rd. its location is specified by the contents of the HL registers. Rs Rd.eazynotes. M Description Copy from source to destination. Rs M. C or MOV B.com www.  Example: MOV B. M Gursharan Singh Tatla professorgstatla@gmail.  If one of the operands is a memory location.  The contents of the source register are not altered.  This instruction copies the contents of the source register into the destination register.

57H Gursharan Singh Tatla professorgstatla@gmail. 57H or MVI M.com 6 .eazynotes. its location is specified by the contents of the H-L registers.com www.  Example: MVI B.  If the operand is a memory location. Data Description Move immediate 8-bit  The 8-bit data is stored in the destination register or memory. Data M.Data Transfer Instructions Opcode MVI Operand Rd.

eazynotes.Data Transfer Instructions Opcode LDA Operand 16-bit address Description Load Accumulator  The contents of a memory location.com 7 . are copied to the accumulator.com www.  The contents of the source are not altered. specified by a 16- bit address in the operand.  Example: LDA 2034H Gursharan Singh Tatla professorgstatla@gmail.

com www.  The contents of either the register pair or the memory location  Example: LDAX B Gursharan Singh Tatla professorgstatla@gmail.  This instruction copies the contents of that memory location into the accumulator.Data Transfer Instructions Opcode LDAX Operand B/D Register Pair Description Load accumulator indirect  The contents of the designated register pair point to a memory location.eazynotes.com 8 . are not altered.

2034 H Gursharan Singh Tatla professorgstatla@gmail.com www. 16-bit data Description Load register pair immediate  This instruction loads 16-bit data in the register pair.com 9 . pair.Data Transfer Instructions Opcode LXI Operand Reg.eazynotes.  Example: LXI H.

 It copies the contents of next memory location into register H.  Example: LHLD 2040 H Gursharan Singh Tatla professorgstatla@gmail.Data Transfer Instructions Opcode LHLD Operand 16-bit address Description Load H-L registers direct  This instruction copies the contents of memory location pointed out by 16-bit address into register L.eazynotes.com 10 .com www.

com www.com 11 .Data Transfer Instructions Opcode STA Operand 16-bit address Description Store accumulator direct  The contents of accumulator are copied into the memory location specified by the operand.eazynotes.  Example: STA 2500 H Gursharan Singh Tatla professorgstatla@gmail.

Data Transfer Instructions Opcode STAX Operand Reg.eazynotes. pair Description Store accumulator indirect  The contents of accumulator are copied into the memory location specified by the contents of the register pair.  Example: STAX B Gursharan Singh Tatla professorgstatla@gmail.com www.com 12 .

 Example: SHLD 2550 H Gursharan Singh Tatla professorgstatla@gmail.Data Transfer Instructions Opcode SHLD Operand 16-bit address Description Store H-L registers direct  The contents of register L are stored into memory location specified by the 16-bit address.eazynotes.com www.  The contents of register H are stored into the next memory location.com 13 .

Data Transfer Instructions Opcode XCHG Operand None Description Exchange H-L with D-E  The contents of register H are exchanged with the contents of register D.  Example: XCHG Gursharan Singh Tatla professorgstatla@gmail.com www.com 14 .  The contents of register L are exchanged with the contents of register E.eazynotes.

com 15 .Data Transfer Instructions Opcode SPHL Operand None Description Copy H-L pair to the Stack Pointer (SP)  This instruction loads the contents of H-L pair into SP.eazynotes.com www.  Example: SPHL Gursharan Singh Tatla professorgstatla@gmail.

 The contents of H register are exchanged with the next location (SP + 1).com 16 .com www.eazynotes.Data Transfer Instructions Opcode XTHL Operand None Description Exchange H–L with top of stack  The contents of L register are exchanged with the location pointed out by the contents of the SP.  Example: XTHL Gursharan Singh Tatla professorgstatla@gmail.

com 17 .com www.  Example: PCHL Gursharan Singh Tatla professorgstatla@gmail.eazynotes.  The contents of H are placed as the high-order byte and the contents of L as the low-order byte.Data Transfer Instructions Opcode PCHL Operand None Description Load program counter with H-L contents  The contents of registers H and L are copied into the program counter (PC).

E. L.Data Transfer Instructions Opcode PUSH Operand Reg.eazynotes. A) are copied into stack. D. pair Description Push register pair onto stack  The contents of register pair are copied onto stack.com 18 . H.com www.  Example: PUSH B Gursharan Singh Tatla professorgstatla@gmail.  SP is again decremented and the contents of low-order registers (C. Flags) are copied into stack.  SP is decremented and the contents of high-order registers (B.

 SP is incremented and the contents of location are copied to the high-order register (B.eazynotes. D.com 19 . H.  Example: POP H Gursharan Singh Tatla professorgstatla@gmail.com www. L.  The contents of location pointed out by SP are copied to the low-order register (C. E.Data Transfer Instructions Opcode POP Operand Reg. Flags). A). pair Description Pop stack to register pair  The contents of top of stack are copied into register pair.

eazynotes.Data Transfer Instructions Opcode OUT Operand 8-bit port address Description Copy data from accumulator to a port with 8bit address  The contents of accumulator are copied into the I/O port.  Example: OUT 78 H Gursharan Singh Tatla professorgstatla@gmail.com 20 .com www.

 Example: IN 8C H Gursharan Singh Tatla professorgstatla@gmail.com 21 .com www.eazynotes.Data Transfer Instructions Opcode IN Operand 8-bit port address Description Copy data to accumulator from a port with 8bit address  The contents of I/O port are copied into accumulator.

com 22 .eazynotes.Arithmetic Instructions  These instructions perform the operations like:  Addition  Subtract  Increment  Decrement Gursharan Singh Tatla professorgstatla@gmail.com www.

 The result (sum) is stored in the accumulator.  Example: The contents of register B cannot be added directly to the contents of register C.  No two other 8-bit registers can be added directly.Addition  Any 8-bit number. or the contents of register.eazynotes.com www. Gursharan Singh Tatla professorgstatla@gmail.com 23 . or the contents of memory location can be added to the contents of accumulator.

or the contents of memory location can be subtracted from the contents of accumulator.  The result is stored in the accumulator. it is stored in 2’s complement form.  Subtraction is performed in 2’s complement form.  No two other 8-bit registers can be subtracted directly. or the contents of register.  If the result is negative.com www. Gursharan Singh Tatla professorgstatla@gmail.eazynotes.com 24 .Subtraction  Any 8-bit number.

com 25 .Increment / Decrement  The 8-bit contents of a register or a memory location can be incremented or decremented by 1.  Increment or decrement can be performed on any register or a memory location.  The 16-bit contents of a register pair can be incremented or decremented by 1.eazynotes. Gursharan Singh Tatla professorgstatla@gmail.com www.

com 26 .  Example: ADD B or ADD M Gursharan Singh Tatla professorgstatla@gmail. its address is specified by H-L pair.  If the operand is memory location.Arithmetic Instructions Opcode ADD R M Operand Description Add register or memory to accumulator  The contents of register or memory are added to the contents of accumulator.  All flags are modified to reflect the result of the addition.eazynotes.  The result is stored in accumulator.com www.

com www.  Example: ADC B or ADC M Gursharan Singh Tatla professorgstatla@gmail.Arithmetic Instructions Opcode ADC R M Operand Description Add register or memory to accumulator with carry  The contents of register or memory and Carry Flag (CY) are added to the contents of accumulator.  If the operand is memory location.  All flags are modified to reflect the result of the addition.  The result is stored in accumulator.com 27 .eazynotes. its address is specified by H-L pair.

com 28 .com www.  Example: ADI 45 H Gursharan Singh Tatla professorgstatla@gmail.eazynotes.Arithmetic Instructions Opcode ADI Operand 8-bit data Description Add immediate to accumulator  The 8-bit data is added to the contents of accumulator.  All flags are modified to reflect the result of the addition.  The result is stored in accumulator.

 Example: ACI 45 H Gursharan Singh Tatla professorgstatla@gmail.com 29 .  All flags are modified to reflect the result of the addition.Arithmetic Instructions Opcode ACI Operand 8-bit data Description Add immediate to accumulator with carry  The 8-bit data and the Carry Flag (CY) are added to the contents of accumulator.com www.eazynotes.  The result is stored in accumulator.

pair Description Add register pair to H-L pair  The 16-bit contents of the register pair are added to the contents of H-L pair.Arithmetic Instructions Opcode DAD Operand Reg. then CY is set.com www.com 30 .  No other flags are changed.eazynotes.  Example: DAD B Gursharan Singh Tatla professorgstatla@gmail.  If the result is larger than 16 bits.  The result is stored in H-L pair.

 All flags are modified to reflect the result of subtraction.  The result is stored in accumulator.com 31 .com www.eazynotes.  Example: SUB B or SUB M Gursharan Singh Tatla professorgstatla@gmail. its address is specified by H-L pair.Arithmetic Instructions Opcode SUB R M Operand Description Subtract register or memory from accumulator  The contents of the register or memory location are subtracted from the contents of the accumulator.  If the operand is memory location.

com www.  If the operand is memory location. CY) are subtracted from the contents of the accumulator.e. its address is specified by H-L pair.eazynotes.  The result is stored in accumulator.  Example: SBB B or SBB M Gursharan Singh Tatla professorgstatla@gmail.com 32 .  All flags are modified to reflect the result of subtraction.Arithmetic Instructions Opcode SBB R M Operand Description Subtract register or memory from accumulator with borrow  The contents of the register or memory location and Borrow Flag (i.

Arithmetic Instructions Opcode SUI Operand 8-bit data Description Subtract immediate from accumulator  The 8-bit data is subtracted from the contents of the accumulator.eazynotes.  Example: SUI 45 H Gursharan Singh Tatla professorgstatla@gmail.  All flags are modified to reflect the result of subtraction.com www.  The result is stored in accumulator.com 33 .

Arithmetic Instructions Opcode SBI Operand 8-bit data Description Subtract immediate from accumulator with borrow  The 8-bit data and the Borrow Flag (i.com 34 .com www.  Example: SBI 45 H Gursharan Singh Tatla professorgstatla@gmail. CY) is subtracted from the contents of the accumulator.eazynotes.e.  All flags are modified to reflect the result of subtraction.  The result is stored in accumulator.

com 35 .  The result is stored in the same place.Arithmetic Instructions Opcode INR R M Operand Description Increment register or memory by 1  The contents of register or memory location are incremented by 1.com www.  Example: INR B or INR M Gursharan Singh Tatla professorgstatla@gmail.  If the operand is a memory location. its address is specified by the contents of H-L pair.eazynotes.

 The result is stored in the same place.Arithmetic Instructions Opcode INX R Operand Description Increment register pair by 1  The contents of register pair are incremented by 1.eazynotes.  Example: INX H Gursharan Singh Tatla professorgstatla@gmail.com 36 .com www.

 If the operand is a memory location.  The result is stored in the same place.Arithmetic Instructions Opcode DCR R M Operand Description Decrement register or memory by 1  The contents of register or memory location are decremented by 1. its address is specified by the contents of H-L pair.com www.com 37 .  Example: DCR B or DCR M Gursharan Singh Tatla professorgstatla@gmail.eazynotes.

com 38 .com www.eazynotes.  Example: DCX H Gursharan Singh Tatla professorgstatla@gmail.Arithmetic Instructions Opcode DCX R Operand Description Decrement register pair by 1  The contents of register pair are decremented by 1.  The result is stored in the same place.

com 39 .eazynotes.Logical Instructions  These instructions perform logical operations on data stored in registers.  The logical operations are:  AND  OR  XOR  Rotate  Compare  Complement Gursharan Singh Tatla professorgstatla@gmail. memory and status flags.com www.

or the contents of register.com www. or memory location can logically have  AND operation  OR operation  XOR operation with the contents of accumulator. OR.eazynotes.AND.com 40 . Gursharan Singh Tatla professorgstatla@gmail. XOR  Any 8-bit data.  The result is stored in accumulator.

Gursharan Singh Tatla professorgstatla@gmail.com 41 .Rotate  Each bit in the accumulator can be shifted either left or right to the next position.com www.eazynotes.

 The result is reflected in status flags. Gursharan Singh Tatla professorgstatla@gmail.Compare  Any 8-bit data. or memory location can be compares for:  Equality  Greater Than  Less Than with the contents of accumulator.eazynotes.com 42 . or the contents of register.com www.

Complement  The contents of accumulator can be complemented.com 43 .eazynotes. Gursharan Singh Tatla professorgstatla@gmail.  Each 0 is replaced by 1 and each 1 is replaced by 0.com www.

com www.  Both contents are preserved .eazynotes.  The result of the comparison is shown by setting the flags of the PSW as follows: Gursharan Singh Tatla professorgstatla@gmail.Logical Instructions Opcode CMP R M Operand Description Compare register or memory with accumulator  The contents of the operand (register or memory) are compared with the contents of the accumulator.com 44 .

 Example: CMP B or CMP M Gursharan Singh Tatla professorgstatla@gmail.com www.eazynotes.Logical Instructions Opcode CMP R M Operand Description Compare register or memory with accumulator  if (A) < (reg/mem): carry flag is set  if (A) = (reg/mem): zero flag is set  if (A) > (reg/mem): carry and zero flags are reset.com 45 .

Logical Instructions Opcode CPI Operand 8-bit data Description Compare immediate with accumulator  The 8-bit data is compared with the contents of accumulator.  The values being compared remain unchanged.  The result of the comparison is shown by setting the flags of the PSW as follows: Gursharan Singh Tatla professorgstatla@gmail.com www.eazynotes.com 46 .

com 47 .eazynotes.Logical Instructions Opcode CPI Operand 8-bit data Description Compare immediate with accumulator  if (A) < data: carry flag is set  if (A) = data: zero flag is set  if (A) > data: carry and zero flags are reset  Example: CPI 89H Gursharan Singh Tatla professorgstatla@gmail.com www.

its address is specified by the contents of H-L pair. Gursharan Singh Tatla professorgstatla@gmail.  If the operand is a memory location. P are modified to reflect the result of the operation.  Example: ANA B or ANA M. Z.Logical Instructions Opcode ANA R M Operand Description Logical AND register or memory with accumulator  The contents of the accumulator are logically ANDed with the contents of register or memory.eazynotes.  S.com www.  CY is reset and AC is set.com 48 .  The result is placed in the accumulator.

eazynotes.  The result is placed in the accumulator.  CY is reset. P are modified to reflect the result. Gursharan Singh Tatla professorgstatla@gmail. Z.com www. AC is set.  Example: ANI 86H.  S.Logical Instructions Opcode ANI Operand 8-bit data Description Logical AND immediate with accumulator  The contents of the accumulator are logically ANDed with the 8-bit data.com 49 .

 Example: ORA B or ORA M. its address is specified by the contents of H-L pair. Z.  The result is placed in the accumulator.  If the operand is a memory location.Logical Instructions Opcode ORA R M Operand Description Logical OR register or memory with accumulator  The contents of the accumulator are logically ORed with the contents of the register or memory. Gursharan Singh Tatla professorgstatla@gmail.com 50 . P are modified to reflect the result.  S.  CY and AC are reset.com www.eazynotes.

com 51 .  S. Gursharan Singh Tatla professorgstatla@gmail.Logical Instructions Opcode ORI Operand 8-bit data Description Logical OR immediate with accumulator  The contents of the accumulator are logically ORed with the 8-bit data.  The result is placed in the accumulator.com www.eazynotes. P are modified to reflect the result.  Example: ORI 86H.  CY and AC are reset. Z.

com 52 .eazynotes. P are modified to reflect the result of the operation. Z.  The result is placed in the accumulator.  Example: XRA B or XRA M.com www. its address is specified by the contents of H-L pair.  S. Gursharan Singh Tatla professorgstatla@gmail.Logical Instructions Opcode XRA R M Operand Description Logical XOR register or memory with accumulator  The contents of the accumulator are XORed with the contents of the register or memory.  CY and AC are reset.  If the operand is a memory location.

 S. Z.com 53 .com www.  Example: XRI 86H. P are modified to reflect the result. Gursharan Singh Tatla professorgstatla@gmail.Logical Instructions Opcode XRI Operand 8-bit data Description XOR immediate with accumulator  The contents of the accumulator are XORed with the 8-bit data.  The result is placed in the accumulator.eazynotes.  CY and AC are reset.

 S.Logical Instructions Opcode RLC Operand None Description Rotate accumulator left  Each binary bit of the accumulator is rotated left by one position.  Bit D7 is placed in the position of D0 as well as in the Carry flag.com www. Gursharan Singh Tatla professorgstatla@gmail. AC are not affected.  CY is modified according to bit D7.eazynotes. Z.com 54 . P.  Example: RLC.

Z.com www. AC are not affected.com 55 .  Example: RRC.  CY is modified according to bit D0.Logical Instructions Opcode RRC Operand None Description Rotate accumulator right  Each binary bit of the accumulator is rotated right by one position. P.  Bit D0 is placed in the position of D7 as well as in the Carry flag.eazynotes. Gursharan Singh Tatla professorgstatla@gmail.  S.

AC are not affected. Z.  Bit D7 is placed in the Carry flag.eazynotes.com 56 .Logical Instructions Opcode RAL Operand None Description Rotate accumulator left through carry  Each binary bit of the accumulator is rotated left by one position through the Carry flag.  S. P. Gursharan Singh Tatla professorgstatla@gmail.  Example: RAL.com www.  CY is modified according to bit D7. and the Carry flag is placed in the least significant position D0.

Z. Gursharan Singh Tatla professorgstatla@gmail. AC are not affected.Logical Instructions Opcode RAR Operand None Description Rotate accumulator right through carry  Each binary bit of the accumulator is rotated right by one position through the Carry flag.com 57 .com www. P.  S. and the Carry flag is placed in the most significant position D7.eazynotes.  CY is modified according to bit D0.  Bit D0 is placed in the Carry flag.  Example: RAR.

com www.  No flags are affected.Logical Instructions Opcode CMA Operand None Description Complement accumulator  The contents of the accumulator are complemented. Gursharan Singh Tatla professorgstatla@gmail.com 58 .eazynotes.  Example: CMA.

 Example: CMC.com www.  No other flags are affected. Gursharan Singh Tatla professorgstatla@gmail.eazynotes.Logical Instructions Opcode CMC Operand None Description Complement carry  The Carry flag is complemented.com 59 .

 No other flags are affected. Gursharan Singh Tatla professorgstatla@gmail.Logical Instructions Opcode STC Operand None Set carry Description  The Carry flag is set to 1.com www.eazynotes.  Example: STC.com 60 .

Gursharan Singh Tatla professorgstatla@gmail.Branching Instructions  The branching instruction alter the normal sequential flow.  These instructions alter either unconditionally or conditionally.com 61 .eazynotes.com www.

Gursharan Singh Tatla professorgstatla@gmail.Branching Instructions Opcode JMP Operand 16-bit address Description Jump unconditionally  The program sequence is transferred to the memory location specified by the 16-bit address given in the operand.eazynotes.com 62 .com www.  Example: JMP 2034 H.

eazynotes. Gursharan Singh Tatla professorgstatla@gmail.com www.com 63 .Branching Instructions Opcode Jx Operand 16-bit address Description Jump conditionally  The program sequence is transferred to the memory location specified by the 16-bit address given in the operand based on the specified flag of the PSW.  Example: JZ 2034 H.

eazynotes.Jump Conditionally Opcode JC JNC JP JM JZ JNZ JPE JPO Gursharan Singh Tatla professorgstatla@gmail.com Description Jump if Carry Jump if No Carry Jump if Positive Jump if Minus Jump if Zero Jump if No Zero Jump if Parity Even Jump if Parity Odd Status Flags CY = 1 CY = 0 S=0 S=1 Z=1 Z=0 P=1 P=0 www.com 64 .

 Example: CALL 2034 H.com 65 . Gursharan Singh Tatla professorgstatla@gmail.com www.eazynotes.  Before the transfer.Branching Instructions Opcode CALL Operand 16-bit address Description Call unconditionally  The program sequence is transferred to the memory location specified by the 16-bit address given in the operand. the address of the next instruction after CALL (the contents of the program counter) is pushed onto the stack.

Branching Instructions Opcode Cx Operand 16-bit address Description Call conditionally  The program sequence is transferred to the memory location specified by the 16-bit address given in the operand based on the specified flag of the PSW.com 66 .eazynotes. the address of the next instruction after the call (the contents of the program counter) is pushed onto the stack.  Example: CZ 2034 H. Gursharan Singh Tatla professorgstatla@gmail.com www.  Before the transfer.

eazynotes.com Description Call if Carry Call if No Carry Call if Positive Call if Minus Call if Zero Call if No Zero Call if Parity Even Call if Parity Odd Status Flags CY = 1 CY = 0 S=0 S=1 Z=1 Z=0 P=1 P=0 www.com 67 .Call Conditionally Opcode CC CNC CP CM CZ CNZ CPE CPO Gursharan Singh Tatla professorgstatla@gmail.

and program execution begins at the new address.  The two bytes from the top of the stack are copied into the program counter.com www.eazynotes.com 68 .Branching Instructions Opcode RET Operand None Description Return unconditionally  The program sequence is transferred from the subroutine to the calling program.  Example: RET. Gursharan Singh Tatla professorgstatla@gmail.

 The two bytes from the top of the stack are copied into the program counter.eazynotes. and program execution begins at the new address.  Example: RZ.com 69 . Gursharan Singh Tatla professorgstatla@gmail.com www.Branching Instructions Opcode Rx Operand None Description Call conditionally  The program sequence is transferred from the subroutine to the calling program based on the specified flag of the PSW.

com Description Return if Carry Return if No Carry Return if Positive Return if Minus Return if Zero Return if No Zero Return if Parity Even Return if Parity Odd Status Flags CY = 1 CY = 0 S=0 S=1 Z=1 Z=0 P=1 P=0 www.Return Conditionally Opcode RC RNC RP RM RZ RNZ RPE RPO Gursharan Singh Tatla professorgstatla@gmail.eazynotes.com 70 .

 Example: RST 3.com www.  These are used as software instructions in a program to transfer program execution to one of the eight locations.Branching Instructions Opcode RST Operand 0–7 Description Restart (Software Interrupts)  The RST instruction jumps the control to one of eight memory locations depending upon the number.com 71 . Gursharan Singh Tatla professorgstatla@gmail.eazynotes.

Restart Address Table
Instructions RST 0 RST 1 RST 2 RST 3 RST 4 RST 5 RST 6 RST 7
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Restart Address 0000 H 0008 H 0010 H 0018 H 0020 H 0028 H 0030 H 0038 H

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Control Instructions
 The control instructions control the operation of

microprocessor.

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Control Instructions
Opcode NOP Operand None No operation Description

 No operation is performed.  The instruction is fetched and decoded but no

operation is executed.
 Example: NOP

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Control Instructions
Opcode HLT Operand None Halt Description

 The CPU finishes executing the current instruction

and halts any further execution.
 An interrupt or reset is necessary to exit from the halt

state.
 Example: HLT
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Control Instructions Opcode DI Operand None Description Disable interrupt  The interrupt enable flip-flop is reset and all the interrupts except the TRAP are disabled.com 76 .com www.  Example: DI Gursharan Singh Tatla professorgstatla@gmail.  No flags are affected.eazynotes.

eazynotes.com 77 .  No flags are affected.  Example: EI Gursharan Singh Tatla professorgstatla@gmail.com www.  This instruction is necessary to re-enable the interrupts (except TRAP).Control Instructions Opcode EI Operand None Enable interrupt Description  The interrupt enable flip-flop is set and all interrupts are enabled.

6.5 and read serial data input bit.  The instruction loads eight bits in the accumulator with the following interpretations.com 78 .5.eazynotes.com www.Control Instructions Opcode RIM Operand None Description Read Interrupt Mask  This is a multipurpose instruction used to read the status of interrupts 7. 5.  Example: RIM Gursharan Singh Tatla professorgstatla@gmail.5.

eazynotes.com www.com 79 .RIM Instruction Gursharan Singh Tatla professorgstatla@gmail.

Control Instructions Opcode SIM Operand None Description Set Interrupt Mask  This is a multipurpose instruction and used to implement the 8085 interrupts 7.5.5.com 80 .  The instruction interprets the accumulator contents as follows. 5.  Example: SIM Gursharan Singh Tatla professorgstatla@gmail.eazynotes.com www.5. 6. and serial data output.

SIM Instruction Gursharan Singh Tatla professorgstatla@gmail.com 81 .com www.eazynotes.

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