Design Considerations for an LLC Resonant Converter

Hangseok Choi Power Conversion Team

www.fairchildsemi.com

1. Introduction
ƒ Growing demand for higher power density and low profile in power converter has forced to increase switching frequency ƒ However, Switching Loss has been an obstacle to high frequency operation

High frequency operation

Overlap of voltage and current

Capacitive loss

Reverse recovery loss

2

1. Introduction ƒ Resonant converter: processes power in a sinusoidal manner and the switching devices are softly commutated 9 Voltage across the switch drops to zero before switch turns on (ZVS) • Remove overlap area between V and I when turning on • Capacitive loss is eliminated ƒ Series resonant converter / Parallel resonant converter 3 .

Introduction Series Resonant (SR) converter Q1 resonant network Ip Vd Lr Lm n:1 Ro + VO Cr Vin Q2 Ids2 ƒ The resonant inductor (Lr) and resonant capacitor (Cr) are in series ƒ The resonant capacitor is in series with the load 9 The resonant tank and the load act as a voltage dividerÆ DC gain is always lower than 1 (maximum gain happens at the resonant frequency) 9 The impedance of resonant tank can be changed by varying the frequency of driving voltage (Vd) 4 .1.

1. Introduction Series Resonant (SR) converter ƒ Advantages 9 Reduced switching loss and EMI through ZVS Æ Improved efficiency 9 Reduced magnetic components size by high frequency operation ƒ Drawbacks 9 Can optimize performance at one operating point. but not with wide range of input voltage and load variations 9 Can not regulate the output at no load condition 9 Pulsating rectifier current (capacitor output): limitation for high output current application 5 .

1. Introduction Parallel Resonant (PR) converter Q1 resonant network Ip Vd Llkp Cr n:1 Ro + VO - Vin Q2 Ids2 ƒ The resonant inductor (Lr) and resonant capacitor (Cr) are in series ƒ The resonant capacitor is in parallel with the load 9 The impedance of resonant tank can be changed by varying the frequency of driving voltage (Vd) 6 .

1. Introduction Parallel Resonant (PR) converter ƒ Advantages 9 No problem in output regulation at no load condition 9 Continuous rectifier current (inductor output): suitable for high output current application ƒ Drawbacks 9 The primary side current is almost independent of load condition: significant current may circulate through the resonant network. even at the no load condition 9 Circulating current increases as input voltage increases: limitation for wide range of input voltage 7 .

1. Introduction ƒ What is LLC resonant converter? 9 Topology looks almost same as the conventional LC series resonant converter 9 Magnetizing inductance (Lm) of the transformer is relatively small and involved in the resonance operation 9 Voltage gain is different from that of LC series resonant converter LC Series resonant converter Q1 LLC resonant converter resonant network Ip Vd Lr Lm n:1 Ro + VO Cr Q1 resonant network Ip Vd Lr Im Lm Cr n:1 ID Ro Io + VO - Vin Q2 Vin Q2 Ids2 Ids2 8 .

integrated transformer is used instead of discrete magnetic components 9 . Introduction ƒ Features of LLC resonant converter .1.Zero voltage switching even at no load condition .Reduced switching loss through ZVS: Improved efficiency .Narrow frequency variation range over wide load range .Typically.

Introduction ƒ Integrated transformer in LLC resonant converter 9 Two magnetic components are implemented with a single core (use the primary side leakage inductance as a resonant inductor) 9 One magnetic components (Lr) can be saved 9 Leakage inductance not only exists in the primary side but also in the secondary side 9 Need to consider the leakage inductance in the secondary side Q1 Q1 Integrated transformer Ip Vd Llkp Im Lm Cr n:1 Llks ID Ro Io + VO - Vin Vd Q2 Lr Lm Ids2 n:1 ID Ro Io + VO - Vin Q2 Cr Ids2 10 .1.

Q1 and Q2 with alternating 50% duty cycle for each switch.2. Llks. Rectifier network: produces DC voltage by rectifying AC current Ip Im ƒ Square wave generator Q1 resonant network Ip Vd Llkp Im Lm Cr n:1 Llks Rectifier network ID Ro Io + VO - Ids2 Vin Q2 ID Vd (Vds2) Vgs1 Vgs2 Vin Ids2 11 . Lm and Cr. The current lags the voltage applied to the resonant network which allows the MOSFET’s to be turned on with zero voltage. Operation principle and Fundamental Approximation ƒ ƒ Square wave generator: produces a square wave voltage. Resonant network: consists of Llkp. Vd by driving switches.

essentially only sinusoidal current is allowed to flow through the resonant network even though a square wave voltage (Vd) is applied to the resonant network. Thus. Fundamental approximation: assumes that only the fundamental component of the square-wave voltage input to the resonant network contributes to the power transfer to the output.2. Operation principle and Fundamental Approximation ƒ The resonant network filters the higher harmonic currents. The square wave voltage can be replaced by its fundamental component ƒ ƒ I p Vd Resonant net w or k I sec I p Vd Resonant net w or k I sec 12 .

2. The primary side circuit is replaced by a sinusoidal current source (Iac) and a square wave of voltage (VRI) appears at the input to the rectifier. the equivalent load resistance is different from actual load resistance. Operation principle and Fundamental Approximation ƒ ƒ Because the rectifier circuit in the secondary side acts as an impedance transformer. The equivalent load resistance is obtained as Iac I ac pk Io + + VRI Ro VO - ƒ Rac = 8 Vo 8 VRI VRI = = = Ro 2 2 F π Io π I ac I ac F F Iac VRIF VRI Vo I ac = π ⋅ Io 2 sin( wt ) VRI F = 4Vo π sin( wt ) 13 .

ωp = Lr Cr Lp = Lm + Llkp .Lr is measured in primary side with secondary winding short circuited .2.Lp is measured in primary side with secondary winding open circuited 14 . Operation principle and Fundamental Approximation ƒ AC equivalent circuit (L-L-L-C) Vd + Cr Llkp Llks + Lm VRI Ro + Vin VO sin(ωt ) VRO 2n ⋅ Vo n ⋅ VRI π M= F = = = F 4 Vin Vd Vd Vin sin(ωt ) π 2 F F 4n ⋅ Vo n:1 = Rac = 8n 2 ω2 ω2 2 jω ⋅ (1 − 2 ) ⋅ ( Lm + n Llks ) + Rac (1 − 2 ) ωo ωp 8n 2 ω 2 Lm Rac Cr π2 Ro n2Llks Rac = Rac π2 Ro 1 L p Cr Cr Llkp Lm VdF VROF ωo = 1 . Lr = Llkp + Lm //(n 2 Llks ) .

Operation principle and Fundamental Approximation ƒ Simplified AC equivalent circuit (L-L-C) Vd + Cr Llkp Llks + Lm n:1 2 + Assuming Llkp=n2Llks M= 2n ⋅ VO = Vin Vin VO Ro - VRI - ω2 k ( 2) ωp k +1 ω ω2 ω2 (k + 1) 2 j ( ) ⋅ (1 − 2 ) ⋅ Q + (1 − 2 ) ωo ωo ωp 2k + 1 Lr = Llkp + Lm //(n Llks ) = Llkp + Lm // Llkp L p = Llkp + Lm Cr Lr Lp-Lr 1: Lp L p − Lr Q= Lr / Cr Rac k= Lm Llkp Expressing in terms of Lp and Lr Rac VROF VinF M= .2.Lr is measured in primary side with secondary winding short circuited .Lp is measured in primary side with secondary winding open circuited 2n ⋅ VO = Vin ω 2 Lp − Lr ( 2) Lp ωp Lp ω ω2 ω2 + (1 − 2 ) j ( ) ⋅ (1 − 2 ) ⋅ Q Lr ωo ωo ωp 15 .

peak gain frequency moves to fo and the peak gain drops 1. 6 40 50 60 70 80 90 f r eq ( kH z) 100 110 120 130 140 16 . 2 9 Peak gain frequency exists between fo and fp 9 As Q decreases (as load decreases). 2 1. 8 Q = 0. 9 As Q increases (as load increases). 4 Q = 0. Operation principle and Fundamental Approximation ƒ Gain characteristics 9 Two resonant frequencies (fo and fp) exist 9 The gain is fixed at resonant frequency (fo) regardless of the load variation k +1 = k 2. 0 Q=1 M= k +1 = k Lp Lp − Lr 0. 6 1. 8 1. the peak gain frequency moves to fp and higher peak gain is obtained. 8 0.2 Q= Lr / Cr Rac Q= 1 Q = 0. 4 Q = 0. 0 fp LLC r esonant C onver t er fo Q=0.2. 6 G ai n M @ω =ωo = Lp Lp − Lr 1.

0 Peak Gain k=1.4 0.2 1.2.4 2.75 1.2 2.4 1.8 1 1.6 k=2 k=2.2 1 Q 17 .5 1.2 0.5 1.4 k=3 k=4 k=5 k=7 k=9 0. Operation principle and Fundamental Approximation ƒ Peak gain (attainable maximum gain) versus Q for different k values 2.8 k=1.6 0.

DC link capacitor of PFC output: 100uF PFC Q1 DC/DC ID Ip Vd Q2 Llkp Im Lm Ids2 Cr Np:Ns Llks VO + Ro VDL CDL 18 .Output: 24V/5A (120W) .Input voltage: 380Vdc (output of PFC stage) .Holdup time requirement: 17ms . Design procedure ƒ Design example .3.

Design procedure [STEP-1] Define the system specifications 9 Estimated efficiency (Eff) 9 Input voltage range: hold up time should be considered for minimum input voltage Vin min = VO.3. PFC 2 − 2 PinTHU CDL 19 .

1~1.3. which results in a gain of 1.it is typical to set k to be 5~10.36 for Vinmin Mmin 1.14 k fo fs 20 .14 for Vinmax M= k +1 = 1. Design procedure [STEP-2] Determine the maximum and minimum voltage gains of the resonant network by choosing k ( k = Lm / Llkp ) .2 at fo M min VRO Lm + n 2 Llks Lm + Llkp k + 1 = max = = = Vin Lm Lm k 2 Gain (M) Peak gain (available maximum gain) M max Vin max min = min M Vin Mmax 1.

3. Design procedure [STEP-3] Determine the transformer turns ratio (n=Np/Ns) Vin max n= = ⋅ M min N s 2 (Vo + VF ) Np [STEP-4] Calculate the equivalent load resistance (Rac) 8n 2 Vo 2 Rac = 2 π Po 21 .

With k chosen in STEP-2. read proper Q from gain curves k = 7 . M max = 1.36 peak gain = 1.36 × 110% = 1.3.5 22 . Design procedure [STEP-5] Design the resonant network .

Design procedure [STEP-6] Design the transformer .Plot the gain curve and read the minimum switching frequency. Then.3. the minimum number of turns for the transformer primary side is obtained as N p min = n(Vo + VF ) 2 f s min ⋅ ΔB ⋅ Ae 23 .

3.Gap length of the core does not affect Lr much . Design procedure [STEP-7] Transformer Construction .Since LLC converter design results in relatively large Lr. Lp=998uH 24 .# of turns and winding configuration are the major factors determining Lr . usually sectional bobbin is typically used .Lp can be easily controlled with gap length Np=52T Ns1=Ns2=6T Bifilar Design value: Lr=234uH.

3. Design procedure [STEP-8] Select the resonant capacitor I Cr RMS n(V + 2 ⋅ VF ) 2 ≅ [ ] +[ o ] 2 2n 4 2 f o Lm 2 π Io VCr max Vin max 2 ⋅ I Cr RMS ≅ + 2 2 ⋅ π ⋅ f o ⋅ Cr 25 .

gain equation has been derived ƒ Leakage inductance in the secondary side is also considered (L-L-L-C model) for gain equation ƒ L-L-L-C equivalent circuit has been simplified as a conventional L-L-C equivalent circuit ƒ Practical design consideration has been presented 26 .4. Conclusion ƒ Using a fundamental approximation.

Over Current Protection (OCP).Appendix . Internal Thermal Shutdown (TSD) 27 . Abnormal Over Current Protection (AOCP).FSFR-series ƒ ƒ ƒ ƒ ƒ ƒ ƒ ƒ Variable frequency control with 50% duty cycle for half-bridge resonant converter topology High efficiency through zero voltage switching (ZVS) Internal Super-FETs with Fast Recovery Type Body Diode (trr=120ns) Fixed dead time (350ns) Up to 300kHz operating frequency Pulse skipping for Frequency limit (programmable) at light load condition Simple remote ON/OFF control Various Protection functions: Over Voltage Protection (OVP).

FSFR-series demo board 28 .Appendix .

FSFR-series demo board 29 .Appendix .

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