Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology

Pass Transistor Circuits

Dr DC Hendry

October 2007

Dr DC Hendry

Pass Transistor Circuits

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology

Outline I
1

Pass Transistor Circuits

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The CMOS Transmission Gate

3

Design Example

4

Transmission Gate Design Methodology

Dr DC Hendry

Pass Transistor Circuits

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology

Pass Transistor Circuits

We can view the complementary CMOS gate as switching the output pin to one of power or ground.

Dr DC Hendry

Pass Transistor Circuits

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology

Pass Transistor Circuits

We can view the complementary CMOS gate as switching the output pin to one of power or ground. A slightly more general gate is obtained if we switch the output to one of power; ground; or any of the input signals.

Dr DC Hendry

Pass Transistor Circuits

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology

Pass Transistor Circuits

We can view the complementary CMOS gate as switching the output pin to one of power or ground. A slightly more general gate is obtained if we switch the output to one of power; ground; or any of the input signals. In such designs the MOSFET is considered to be a pass transistor.

Dr DC Hendry

Pass Transistor Circuits

ground. In such designs the MOSFET is considered to be a pass transistor.Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Pass Transistor Circuits We can view the complementary CMOS gate as switching the output pin to one of power or ground. Dr DC Hendry Pass Transistor Circuits . When used as a pass transistor the device may conduct current in either direction. A slightly more general gate is obtained if we switch the output to one of power. or any of the input signals.

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Pass Transistor Truth Table A B X Dr DC Hendry Pass Transistor Circuits .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Pass Transistor Truth Table A 0 B 0 X Z A B X Dr DC Hendry Pass Transistor Circuits .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Pass Transistor Truth Table A B X A 0 0 B 0 1 X Z 0 Dr DC Hendry Pass Transistor Circuits .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Pass Transistor Truth Table A B X A 0 0 1 B 0 1 0 X Z 0 Z Dr DC Hendry Pass Transistor Circuits .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Pass Transistor Truth Table A B X A 0 0 1 1 B 0 1 0 1 X Z 0 Z 1 Dr DC Hendry Pass Transistor Circuits .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Properties of Pass Transistors For the n-channel pass transistor circuit note that: 1 “Z” in the truth table implies a floating node. Dr DC Hendry Pass Transistor Circuits .

VA ) Dr DC Hendry Pass Transistor Circuits . when A = B = 1. For the n-channel pass transistor. the output voltage at X is: Vx = min(VB − Vt .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Properties of Pass Transistors For the n-channel pass transistor circuit note that: 1 2 “Z” in the truth table implies a floating node.

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Properties of Pass Transistors For the n-channel pass transistor circuit note that: 1 2 “Z” in the truth table implies a floating node.6V then Vx = 2.3V and Vt = 0. VA ) 3 This if VA = VB = 3. when A = B = 1.7V . the output voltage at X is: Vx = min(VB − Vt . Dr DC Hendry Pass Transistor Circuits . For the n-channel pass transistor.

For the n-channel pass transistor. VA ) 3 4 This if VA = VB = 3. Dr DC Hendry Pass Transistor Circuits . when A = B = 1.6V then Vx = 2. This reduction in output voltage makes cascading of pass transistor circuits difficult.3V and Vt = 0.7V .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Properties of Pass Transistors For the n-channel pass transistor circuit note that: 1 2 “Z” in the truth table implies a floating node. the output voltage at X is: Vx = min(VB − Vt .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Cascaded Pass Transistors Vdd Vdd Vdd Vdd Vdd− Vt Vdd − 2Vt Vdd − 3Vt Figure: Cascaded pass transistors Dr DC Hendry Pass Transistor Circuits .

Dr DC Hendry Pass Transistor Circuits .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Cascaded Pass Transistors .2 1 With an n-channel transistor high voltages are degraded by one Vt .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Cascaded Pass Transistors . Similar circuits with a p-channel device “degrade” (by increasing) a logic zero by one Vt .2 1 With an n-channel transistor high voltages are degraded by one Vt . 2 Dr DC Hendry Pass Transistor Circuits .

So such circuits are normally confined to the internal circuitry of a gate.Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Cascaded Pass Transistors .2 1 With an n-channel transistor high voltages are degraded by one Vt . Similar circuits with a p-channel device “degrade” (by increasing) a logic zero by one Vt . 2 3 Dr DC Hendry Pass Transistor Circuits .

Similar circuits with a p-channel device “degrade” (by increasing) a logic zero by one Vt . So such circuits are normally confined to the internal circuitry of a gate.Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Cascaded Pass Transistors . 2 3 4 Dr DC Hendry Pass Transistor Circuits . Full logic levels can be regenerated with an inverter at the output of the gate.2 1 With an n-channel transistor high voltages are degraded by one Vt .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Two-to-One Mux A S B S Figure: Two-to-one Mux Z Dr DC Hendry Pass Transistor Circuits .

2 When S = 1 the output Z is connected to B Dr DC Hendry Pass Transistor Circuits .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Two-to-One Mux .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Two-to-One Mux .2 When S = 1 the output Z is connected to B When S = 0 the output Z is connected to A Dr DC Hendry Pass Transistor Circuits .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Two-to-One Mux .2 When S = 1 the output Z is connected to B When S = 0 the output Z is connected to A Note that the connection made is bidirectional Dr DC Hendry Pass Transistor Circuits .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology The CMOS Transmission Gate The CMOS transmission gate consists of two MOSFETs. Dr DC Hendry Pass Transistor Circuits . one n-channel responsible for correct transmission of logic zeros.

one n-channel responsible for correct transmission of logic zeros. and one p-channel. Dr DC Hendry Pass Transistor Circuits . responsible for correct transmission of logic ones.Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology The CMOS Transmission Gate The CMOS transmission gate consists of two MOSFETs.

A and B are connected. and one p-channel. C A C B Figure: CMOS Transmission Gate Circuit When C = 1. one n-channel responsible for correct transmission of logic zeros. responsible for correct transmission of logic ones. both logic zero and logic one are passed without degradation. Dr DC Hendry Pass Transistor Circuits .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology The CMOS Transmission Gate The CMOS transmission gate consists of two MOSFETs.

Dr DC Hendry Pass Transistor Circuits .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Transmission Gate Symbols Transmission gates are widely used and shorthand symbols are used.

The standard symbol (not used often) is: C A C B Dr DC Hendry Pass Transistor Circuits .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Transmission Gate Symbols Transmission gates are widely used and shorthand symbols are used.

The standard symbol (not used often) is: C A C B The most commonly used symbol is simply: A C B Dr DC Hendry Pass Transistor Circuits .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Transmission Gate Symbols Transmission gates are widely used and shorthand symbols are used.

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Design Example: A common design technique used with transmission gate structures is the use of multiplexor based architectures. Consider the Boolean function Dr DC Hendry Pass Transistor Circuits .

S1 + S2 S1 Dr DC Hendry Pass Transistor Circuits . Consider the Boolean function f = AS2 S1 + BS2 .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Design Example: A common design technique used with transmission gate structures is the use of multiplexor based architectures.

S1 + S2 S1 This may be rewritten as (the reason will become clear later): f = AS2 S1 + BS2 .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Design Example: A common design technique used with transmission gate structures is the use of multiplexor based architectures. Consider the Boolean function f = AS2 S1 + BS2 .S2 S1 Dr DC Hendry Pass Transistor Circuits .S1 + 1.S2 S1 + 0.

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Transmission Gate Implementation: A B 1 0 S1 S1 S2 S2 f Figure: Implementation with Transmission Gates Dr DC Hendry Pass Transistor Circuits .

S1 S2 .2 1 Note the need for the term 0.Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Transmission Gate Implementation . Dr DC Hendry Pass Transistor Circuits . If not present then when S1 = S2 = 1 the output f would float.

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Transmission Gate Implementation .2 1 Note the need for the term 0. If not present then when S1 = S2 = 1 the output f would float. 2 Dr DC Hendry Pass Transistor Circuits .S1 S2 . Each transmission gate may now be replaced with two transistors.

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Transmission Gate Implementation . 2 3 Dr DC Hendry Pass Transistor Circuits . Each transmission gate may now be replaced with two transistors.S1 S2 . If not present then when S1 = S2 = 1 the output f would float.2 1 Note the need for the term 0. Where lines connect only to logic 1 the nMOS devices may be omitted.

Where lines connect only to logic 1 the nMOS devices may be omitted.Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Transmission Gate Implementation . Each transmission gate may now be replaced with two transistors. If not present then when S1 = S2 = 1 the output f would float.S1 S2 . 2 3 4 Dr DC Hendry Pass Transistor Circuits . Where lines connect only to logic 0 the pMOS devices may be omitted.2 1 Note the need for the term 0.

If not present then when S1 = S2 = 1 the output f would float.Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Transmission Gate Implementation . Where lines connect only to logic 1 the nMOS devices may be omitted. Each transmission gate may now be replaced with two transistors.2 1 Note the need for the term 0. nMOS and pMOS devices may be grouped to minimise the number of wells required. Where lines connect only to logic 0 the pMOS devices may be omitted. 2 3 4 5 Dr DC Hendry Pass Transistor Circuits .S1 S2 .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Transistor Schematic Vdd A f B S2 S2 S1 S1 Figure: Transistor Level Schematic for Design Dr DC Hendry Pass Transistor Circuits .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Design Methodology A suitable design methodology. in addition to the correct logic output. must ensure: Dr DC Hendry Pass Transistor Circuits .

Dr DC Hendry Pass Transistor Circuits . must ensure: The output is always driven to logic 1 or logic 0.Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Design Methodology A suitable design methodology. in addition to the correct logic output.

There are no “sneak” paths. must ensure: The output is always driven to logic 1 or logic 0. in addition to the correct logic output. such as: A 1 0 B f Dr DC Hendry Pass Transistor Circuits .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Design Methodology A suitable design methodology.

Dr DC Hendry Pass Transistor Circuits .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Viable Approaches Viable design approaches are: Choose a number of inputs as mux select inputs and proceed as above.

Plot variables on K-maps.Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Viable Approaches Viable design approaches are: Choose a number of inputs as mux select inputs and proceed as above. Dr DC Hendry Pass Transistor Circuits .

Tabular methods such as modifications of Quine-McCluskey not covered here.Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Viable Approaches Viable design approaches are: Choose a number of inputs as mux select inputs and proceed as above. Plot variables on K-maps. Dr DC Hendry Pass Transistor Circuits .

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Plotting Variables ¯ + bc ¯ + acd f =¯ ab ¯d Dr DC Hendry Pass Transistor Circuits .

Plotting and we will look for a network using d and d the function on a K-Map gives: Dr DC Hendry Pass Transistor Circuits .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Plotting Variables ¯ + bc ¯ + acd f =¯ ab ¯d ¯ as inputs.

Plotting and we will look for a network using d and d the function on a K-Map gives: f 00 01 cd 11 10 ab 00 01 11 10 1 1 1 1 1 0 0 0 1 0 1 0 0 0 1 0 Dr DC Hendry Pass Transistor Circuits .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Plotting Variables ¯ + bc ¯ + acd f =¯ ab ¯d ¯ as inputs.

giving: Dr DC Hendry Pass Transistor Circuits .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Plotting again with d as input Now plot the K-Map using d as an input.

Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Plotting again with d as input Now plot the K-Map using d as an input. giving: f 0 ¯ d ¯ 0 1  d © ¨ © ¨ c 1  1 © 0 d d ©  ©  ¨ ab 00 01 11 10 ¨ ¨ Dr DC Hendry Pass Transistor Circuits .

d + ab ¯c f = 1.¯ ab ¯d ¯.0 + ¯ abc .Pass Transistor Circuits The CMOS Transmission Gate Design Example Transmission Gate Design Methodology Plotting again with d as input Now plot the K-Map using d as an input. giving: f 0 ¯ d ¯ 0 1  d © ¨ © ¨ c 1  1 © 0 d d ©  ©  ¨ ab 00 01 11 10 ¨ ¨ Giving the Boolean expression for f as: ¯ + bc ¯ + ac .0 Dr DC Hendry Pass Transistor Circuits .

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