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SBOS344C − SEPTEMBER 2005 − REVISED MAY 2012
4-20mA Current-Loop Transmitter
D D D D D D
LOW QUIESCENT CURRENT: 130μA 5V REGULATOR FOR EXTERNAL CIRCUITS LOW SPAN ERROR: 0.05% LOW NONLINEARITY ERROR: 0.003% WIDE-LOOP SUPPLY RANGE: 7.5V to 40V MSOP-8 AND DFN-8 PACKAGES
The XTR117 is a precision current output converter designed to transmit analog 4-20mA signals over an industry-standard current loop. It provides accurate current scaling and output current limit functions. The on-chip voltage regulator (5V) can be used to power external circuitry. A current return pin (IRET) senses any current used in external circuitry to assure an accurate control of the output current. The XTR117 is a fundamental building block of smart sensors using 4-20mA current transmission. The XTR117 is specified for operation over the extended industrial temperature range, −40°C to +125°C.
D TWO-WIRE, 4-20mA CURRENT LOOP D D D D D
TRANSMITTER SMART TRANSMITTER INDUSTRIAL PROCESS CONTROL TEST SYSTEMS CURRENT AMPLIFIER VOLTAGE-TO-CURRENT AMPLIFIER
RELATED 4-20mA PRODUCTS
XTR115 XTR116 5V regulator output and 2.5V reference output 5V regulator output and 4.096V reference output
NOTE: For 4-20mA complete bridge and RTO conditioner solutions, see the XTR product family website at www.ti.com.
XTR117 +5V Regulator V+ 7 B 6 Q1
I IN 2 A1 E IRET 3 R1 2.475kΩ R2 25Ω RLIM 5 IO = 100 VIN RIN 4
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2005−2006, Texas Instruments Incorporated www.ti.com
. . . . . . . . 2000V (Charged Device Model) . .com SBOS344C − SEPTEMBER 2005 − REVISED MAY 2012 ABSOLUTE MAXIMUM RATINGS(1) Power Supply. +50V Input Voltage. . . . . . . . (2) Connect thermal die pad to IRET or leave unconnected on PCB. . . . . . . . . . .ti. or see the TI web site at www. .XTR117 www. . . . 0V to V+ Output Current Limit . . Failure to observe proper handling and installation procedures can cause damage. . . . −55°C to +150°C Junction Temperature . . . . . . . 1000V (1) ELECTROSTATIC DISCHARGE SENSITIVITY This integrated circuit can be damaged by ESD. . .ti. . . . . . . . . . . . . . . . . . . . . Stresses above these ratings may cause permanent damage. PIN ASSIGNMENTS Top View XTR117 NC(1) IIN IRET IO 1 2 3 4 MSOP− 8 8 7 6 5 VREG V+ B (Base) E (Emitter) NC(1) I IN IRET IO 1 2 3 4 XTR117 8 Exposed Thermal Die Pad on Underside(2) 7 6 5 DFN−8 VREG V+ B (Base) E (Emitter) NOTES: (1) NC = No connection. . . ESD damage can range from subtle performance degradation to complete device failure. Exposure to absolute maximum conditions for extended periods may degrade device reliability. . . . . . . Short-Circuit . . . . . . 2 . . . . Continuous Operating Temperature Range . . . . (referenced to IRET pin) . . −55°C to +125°C Storage Temperature Range . . . . . . and functional operation of the device at these or any other conditions beyond those specified is not implied. . . . . . . . +165°C ESD Rating (Human Body Model) . . . . . . . . . . . . . . . . . . . . . . V+ (referenced to IO pin) . . . . . . . . . . . . . . . . . . . . . . Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. . . . . . . . Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. . . . . . . . . Leave unconnected on PCB. . . . . . . . . . . . . . . PACKAGE/ORDERING INFORMATION(1) PRODUCT XTR117 XTR117 (1) PACKAGE-LEAD MSOP 8 MSOP-8 DFN 8 DFN-8 PACKAGE DESIGNATOR DGK DRB PACKAGE MARKING BOZ BOY For the most current package and ordering information see the Package Option Addendum at the end of this document. . . . . . . . . . . . . Continuous VREG. These are stress ratings only. . . .com. . . . . .
13 100 ±0. Voltage measured with respect to IRET pin. 3 . TA = −40°C to +125°C.ti.5V to 40V 5 ±0.XTR117 www.05 ±3 ±0.1 −35 150 0.20 ILIM IMIN S IO = 200μA to 25mA TA = −40°C to +125°C IO = 200μA to 25mA VOS IIN = 40μA TA = −40°C to +125°C V+ = 7.1 ±0. and TIP29C external transistor.1 1 See Typical Characteristics 12 +24 +7. PARAMETER OUTPUT Output Current Equation Output Current.2 25 0.1Hz to 10Hz DYNAMIC RESPONSE Small-Signal Bandwidth Slew Rate VREG(2) Voltage Voltage Accuracy vs Temperature vs Supply Voltage.003 ±100 ±0.05 ±0. All specifications at TA = +25°C.com SBOS344C − SEPTEMBER 2005 − REVISED MAY 2012 ELECTRICAL CHARACTERISTICS: V+ = +24V Boldface limits apply over the temperature range. V+ vs Output Current Short-Circuit Current POWER SUPPLY Specified Voltage Range Operating Voltage Range Quiescent Current Over Temperature TEMPERATURE RANGE Specified Range Operating Range Storage Range Thermal Resistance MSOP DFN (1) (2) CONDITION IO MIN XTR117 TYP IO = IIN x 100 MAX UNITS 0. unless otherwise noted.02 ±500 ±6 +2 IB IREG = 0 TA = −40°C to +125°C V+ = 7. V+ Bias Current vs Temperature Noise: 0. RIN = 20kΩ. RL = 0 IREG = 0 32 0.7 +0.20 mA mA mA A/A % ppm/°C % μV μV/°C μV/V nA pA/°C μVPP kHz mA/μs V ±0. Linear Range Over-Scale Limit Under-Scale Limit SPAN Span (Current Gain) Error(1) vs Temperature Nonlinearity INPUT Offset Voltage (Op Amp) vs Temperature vs Supply Voltage.6 380 3.5 130 +40 200 250 +125 +125 +150 150 53 V mV/°C mV/V mA V V μA μA °C °C °C °C/W °C/W V+ IQ TA = −40°C to +125°C −40 −55 −55 qJA Does not include initial error or temperature coefficient of RIN. V+ = 24V.5V to 40V TA = −40°C to +125°C en CLOOP = 0.4 ±20 ±0.
7V to +5.XTR117 www. unless otherwise noted.5V − 50 − 25 0 25 50 75 100 125 Temperature (_ C) OVER− SCALE CURRENT vs TEMPERATURE 34 With External Transistor Over− Scale Current (mA) 33 32 V+ = 36V 31 30 29 28 − 75 − 50 − 25 0 25 50 75 100 125 Temperature (_ C) 4.5V V+ = 24V VREG Voltage (V) 5.0 Sinking Current 0 Sourcing Current 1 2 3 +125_ C 4 IREG Current (mA) SPAN ERROR vs TEMPERATURE 50 40 30 Span Error (m%) 10 0 − 10 − 20 − 30 − 40 − 75 − 50 − 25 0 25 50 75 100 125 − 50 Population 20 OFFSET VOLTAGE DISTRIBUTION Temperature (_ C) 4 − 500 − 450 − 400 − 350 − 300 − 250 − 200 − 150 − 100 − 50 0 50 100 150 200 250 300 350 400 450 500 Offset Voltage (μ V) .ti. RIN = 20kΩ. V+ = 24V. CURRENT GAIN vs FREQUENCY 45 40 Quiescent Current (μ A) 180 170 160 150 140 130 120 110 100 90 10 10k 100k Frequency (Hz) 1M 80 − 75 QUIESCENT CURRENT vs TEMPERATURE Gain (dB) 30 COUT = 0 RL = 0Ω COUT = 10nF RL = 250Ω V+ = 36V 20 V+ = 24V V+ = 7. and TIP29C external transistor.com SBOS344C − SEPTEMBER 2005 − REVISED MAY 2012 TYPICAL CHARACTERISTICS: V+ = +2.5 +125_ C VREG VOLTAGE vs VREG CURRENT − 55_ C +25_ C +25_ C − 55_ C 5.5V At TA = +25°C.5 −1 V+ = 7.
ti. A voltage input is converted to an input current with an external input resistor. thermal-induced errors. Full-scale inputs greater than 0. as shown in Figure 1. Its input current (pin 2) controls the output current. DEVICE REF3140 REF3130 REF3125 VOLTAGE 4. Heat produced by Q1 will still cause ambient temperature changes that can influence the XTR117 performance. The IRET pin is a local ground for input circuitry driving the XTR117.5V Possible choices for Q1 (see text): TYPE MJE3440 TIP41C MJD3340 PACKAGE SOT− 32 TO−220 D− PAK Use REF32xx for lower drift.com SBOS344C − SEPTEMBER 2005 − REVISED MAY 2012 APPLICATIONS INFORMATION BASIC OPERATION The XTR117 is a precision current output converter designed to transmit analog 4-20mA signals over an industry-standard current loop. Q1. The XTR117 is designed to use virtually any NPN transistor with sufficient voltage. A MOSFET transistor will not improve the accuracy of the XTR117 and is not recommended.096V 3. pin 3. Figure 1 shows basic circuit connections with representative simplified input circuitry. The remaining current flows in Q1. Basic Circuit Connections 5 . EXTERNAL TRANSISTOR The external transistor.8W with high loop voltage (40V) and 20mA output current. locate Q1 away from sensitive analog circuitry. including XTR117. A portion of the output current flows into the V+ power supply. Power dissipation in this transistor can approach 0. conducts the majority of the full-scale output current. (VREF) 5V IREG VREG 8 XTR117 +5V Regulator V+ 7 B 6 IIN IIN 2 A1 E IRET from I REG and IREF All return current 3 R1 2. current and power rating. The XTR117 is designed to use an external transistor to avoid on-chip. Typical full-scale input voltages range from 1V and upward.XTR117 www. The XTR117 is a current-input device with a gain of 100.0V 2.475kΩ R2 25Ω R LIM 5 COUT 10nF RL Q1 VLOOP IO Input Circuitry VIN RIN 20kΩ IO 4 I = 100 (IIN) Figure 1. The XTR117 is a two-wire current transmitter. Mount Q1 so that heat is conducted to the outside of the transducer housing. RIN. To minimize these effects. The input voltage at the IIN pin is zero (referred to the IRET pin). A current flowing into pin 2 produces IO = 100 x IIN. Several possible choices are listed in Figure 1. External input circuitry connected to the XTR117 can be powered from VREG.5V are recommend to minimize the effects of offset voltage and drift of A1. pin 7. Current drawn from these terminals must be returned to IRET. For improved precision use an external voltage reference. Case style and thermal mounting considerations often influence the choice for any given application.
com SBOS344C − SEPTEMBER 2005 − REVISED MAY 2012 MINIMUM OUTPUT CURRENT The quiescent current of the XTR117 (typically 130μA) is the lower limit of its output current. Zero input current (IIN = 0) will produce an IO equal to the quiescent current...XTR117 www.475kΩ Figure 2.. it is possible to cause internal damage with excessive current. Use lower voltage zener diodes with loop power − supply voltages < 30V for increased protection.. See Reverse− Voltage Protection.5kΩ 40μA IIN 2 0 to 160μA IRET 3 A1 R1 2. OFFSETTING THE INPUT A low-scale output of 4mA is produced by creating a 40μA input current... The bridge causes a two diode drop (approximately 1. XTR117 REVERSE-VOLTAGE PROTECTION The XTR117 low compliance voltage rating (minimum operating voltage) of 7.4V loss in loop supply voltage. V REG NOTE: (1) Some examples of zener diodes include: P6KE51 or 1N4755A.7V loss in loop supply voltage... See Over− voltage Surge Protection..8mA is available to power external circuitry while still allowing the output current to go below 4mA..475kΩ R2 25Ω R LIM I O = 100 V IN R IN 4 The diode bridge causes a 1. Reverse Voltage Operation and Over-Voltage Surge Protection 6 ..5V) or VREG . 8 RIN 62.. VREG can be used as shown in Figure 2 but will not have the temperature stability of a high quality reference such as the REF3125. This input current can be created with the proper value resistor from an external reference voltage (VREF) as shown in Figure 2. Figure 3 shows a diode bridge circuit which allows normal operation even when the voltage connection lines are reversed.4V) loss in loop supply voltage. MAXIMUM OUTPUT CURRENT The XTR117 provides accurate.ti. This voltage drop results in a compliance voltage of approximately 9V—satisfactory for most applications..5V permits the use of various voltage protection methods without compromising operating range. linear output up to 25mA. It is possible to extend the output current range of the XTR117 by connecting an external resistor from pin 3 to pin 5. Output current will not begin to increase until IIN > IQ/100. Figure 3. A diode can be inserted in series with the loop supply voltage and the V+ pin to protect against reverse output connection lines with only a 0.. Up to 3. Creating Low-Scale Offset XTR117 8 +5V Regulator V+ 7 B 6 R IN IIN 2 V IN IR E T 3 R1 2. Internal circuitry limits the output current to approximately 32mA to protect the transmitter and loop power/measurement circuitry.. Output currents greater than 45mA may cause permanent damage.. to change the current limit value. Current drawn from VREG will be added to this minimum output current.. Since all output current must flow through internal resistors.01μ F D 1(1 ) IN4148 Q1 Maximum V PS must be less than minimum voltage rating of the zener diode. VREF (2. A1 E 5 RL VL OO P 0..
Interference may also enter at the input terminals. Most surge protection zener diodes have a diode characteristic in the forward direction that will conduct excessive current. the interference more likely comes from the current loop connections. For integrated transmitter assemblies with short connections to the sensor. a series diode or diode bridge should be used for protection against reversed connections. It is prudent to limit the maximum surge voltage applied to the XTR117 to as low as practical.com SBOS344C − SEPTEMBER 2005 − REVISED MAY 2012 OVER-VOLTAGE SURGE PROTECTION Remote connections to current transmitters can sometimes be subjected to voltage surges. Absolute maximum power-supply rating on the XTR117 is specified at +50V. Various zener diode and surge clamping diodes are specially designed for this purpose.XTR117 www. If a surge protection diode is used.5V to 40V). Digital Control Methods 7 . VREG 8 XTR117 VO D/A RIN IIN 2 IRET 3 VREG 8 XTR117 Digital Control Optical Isolation IO D/A IIN 2 IRET 3 VREG 8 RFILTER RIN XTR117 Digital Control Optical Isolation μC PWM Out IIN 2 CFILTER IRET 3 Figure 4. RF interference can be rectified by the input circuitry of the XTR117 or preceding circuitry.ti. This effect generally appears as an unstable output current that varies with the position of loop supply or input wiring. Keep overvoltages and transients below +50V to ensure reliable operation when the supply returns to normal (7. Select a clamp diode with as low a voltage rating as possible for best protection. possibly damaging receiving-side circuitry if the loop connections are reversed. RADIO FREQUENCY INTERFERENCE The long wire lengths of current loops invite radio frequency (RF) interference.
Even with applications that have low power dissipation.com SBOS344C − SEPTEMBER 2005 − REVISED MAY 2012 VS P 0 ps i 50 Nonlinear Bridge Transducer PGA309 Linearization Circuit Ref Lin DAC 2. QFN/SON PCB Attachment (SLUA271) and Application Report. and improved electrical parasitics.XTR117 www. The DFN is a QFN package with lead contacts on only two sides of the bottom of the package. Figure 5. Complete 4-20mA Pressure Transducer Solution with PGA309 and XTR117 DFN PACKAGE The XTR117 is offered in a DFN-8 package (also known as SON). package shear.5V XTR117 VR E G 8 RIN 25kΩ RO S 125kΩ II N 2 A1 E 5 IR E T RL IM R1 2. The five holes in the landing pattern are optional. and are intended for use with thermal vias that connect the leadframe die pad to the heatsink area on the PCB.ti. the exposed pad must be soldered to the PCB to provide structural integrity and long-term stability. Mechanical drawings located at the end of this data sheet list the physical dimensions for the package and pad. The DFN package can be easily mounted using standard printed circuit board (PCB) assembly techniques. The exposed leadframe die pad on the bottom of the package should be connected to IRET or left unconnected. both available for download at www.com. LAYOUT GUIDELINES The exposed leadframe die pad on the DFN package should be soldered to a thermal pad on the PCB.475kΩ R2 25Ω IO = 100 VI N RIN 4 RL +5V Regulator V+ 7 B 6 Q1 VL O O P IO Analog Sensor Linearization Fault Monitor Auto−Zero PGA Over/Under Scale Limiter Linear V O U T (1) Analog Signal Conditioning +125_ C T − 40_ C Ext Temp Digital Int Temp Temperature Compensation Ext Temp Temp ADC Control Register Interface Circuitry 3 EEPROM (SOT23− 5) Digital Calibration NOTE: (1) PGA309 V O UT : 0.5V. Refinements to this layout may be required based on assembly process requirements.5V to 4. key push.ti. and similar board-level tests. DFN packages are physically small. A mechanical drawing showing an example layout is attached at the end of this data sheet. Additionally. Soldering the exposed pad significantly improves board-level reliability during temperature cycling. See Application Note. This leadless package maximizes board space and enhances thermal and electrical characteristics through an exposed pad. Quad Flatpack No-Lead Logic Packages (SCBA017). have a smaller routing area. improved thermal performance. 8 . the absence of external leads eliminates bent-lead issues.
PREVIEW: Device has been announced but is not in production.com 11-Apr-2013 PACKAGING INFORMATION Orderable Device COMBOSENSOR XTR117AIDGKR XTR117AIDGKRG4 XTR117AIDGKT XTR117AIDGKTG4 XTR117AIDRBR XTR117AIDRBRG4 XTR117AIDRBT XTR117AIDRBTG4 Status (1) Package Type Package Pins Package Drawing Qty 0 VSSOP VSSOP VSSOP VSSOP SON SON SON SON DGK DGK DGK DGK DRB DRB DRB DRB 8 8 8 8 8 8 8 8 2500 2500 250 250 3000 3000 250 250 Eco Plan (2) Lead/Ball Finish Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU MSL Peak Temp (3) Op Temp (°C) Top-Side Markings (4) Samples ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE TBD Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Call TI Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR Level-3-260C-168 HR -40 to 125 -40 to 125 -40 to 125 -40 to 125 -40 to 125 -40 to 125 -40 to 125 -40 to 125 BOZ BOZ BOZ BOZ BOY BOY BOY BOY (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package. Addendum-Page 1 . Samples may or may not be available. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible). including the requirement that lead not exceed 0. Pb-Free (RoHS Exempt). and a lifetime-buy period is in effect.please check http://www. or Green (RoHS & no Sb/Br) . Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances. NRND: Not recommended for new designs. or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Where designed to be soldered at high temperatures.The planned eco-friendly classification: Pb-Free (RoHS).com/productcontent for the latest availability information and additional product content details. Device is in production to support existing customers. (2) Eco Plan . Peak Temp.The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications. and peak solder temperature. OBSOLETE: TI has discontinued the production of the device.1% by weight in homogeneous material) (3) MSL. -.1% by weight in homogeneous materials.ti. TI Pb-Free products are suitable for use in specified lead-free processes. TBD: The Pb-Free/Green conversion plan has not been defined.PACKAGE OPTION ADDENDUM www.ti. LIFEBUY: TI has announced that the device will be discontinued. but TI does not recommend using this part in a new design. and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided.com 11-Apr-2013 (4) Multiple Top-Side Markings will be inside parentheses.ti. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Top-Side Marking for that device. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.PACKAGE OPTION ADDENDUM www. TI bases its knowledge and belief on information provided by third parties. and thus CAS numbers and other limited information may not be available for release. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. TI and TI suppliers consider certain information to be proprietary. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 .
1 P1 (mm) 8.4 12.3 3.4 12.3 3.0 8.0 180.com 24-Jul-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing VSSOP VSSOP SON SON DGK DGK DRB DRB 8 8 8 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.4 1.4 12.3 B0 (mm) 3.0 330.0 180.3 K0 (mm) 1.4 5.3 3.4 1.4 3.0 12.4 3.0 8.0 12.1 1.3 5.PACKAGE MATERIALS INFORMATION www.0 12.0 12.0 W Pin1 (mm) Quadrant 12.0 8.ti.0 Q1 Q1 Q2 Q2 XTR117AIDGKR XTR117AIDGKT XTR117AIDRBR XTR117AIDRBT 2500 250 3000 250 Pack Materials-Page 1 .
0 35.0 367.0 367.0 Width (mm) 367.0 210.ti.0 210.0 Height (mm) 35.0 185.0 35.0 185.0 35.0 Pack Materials-Page 2 .com 24-Jul-2013 *All dimensions are nominal Device XTR117AIDGKR XTR117AIDGKT XTR117AIDRBR XTR117AIDRBT Package Type VSSOP VSSOP SON SON Package Drawing DGK DGK DRB DRB Pins 8 8 8 8 SPQ 2500 250 3000 250 Length (mm) 367.PACKAGE MATERIALS INFORMATION www.
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