3.Array Processors | Parallel Computing | Central Processing Unit

Array Processors

Flynn’s Classification
Based on the multiplicity of Instruction streams – Data streams
1. 2. 3. 4. SISD SIMD MISD MIMD

Array Processor
• Synchronous parallel computer with multiple arithmetic logic units, called processing elements, that can operate in parallel. • The PEs are synchronized to perform the same function at the same time.

• Array processors are also known as SIMD computers. • SIMD computers appear in 2 basic architectural organizations: – Array processors, using RAM – Associative Array processors , using AM

Associative Array Processors
• It has an Associative Memory (AM) instead of a Random-Access-Memory (RAM) • AM is content-addressable, allowing parallel access of multiple words; • whereas RAM is sequentially accessed by specifying the word addresses

Associative Memory
• Data stored are addressed by their contents. • Capable of performing parallel search and parallel searching operations. • Major shortcoming : increased hardware cost. • AM array consists of n words with m bits per word. • Each bit cell in the nXm array consists of a F/F associated with some comparison logic gates for pattern match and read-write control. • The logic-in-memory structure allows parallel read and parallel write.

SIMD computer Organizations
• N synchronized PEs, all of which are under the control of 1 CU. • Each PE is an ALU with its own local memory. • CU has its own main memory. • User programs are loaded in a CU from an external source. • CU executes the scalar instructions and broadcasts the vector instructions among the PEs. • All PEs perform the same function synchronously.

• Configuration of SIMD using parallel memory modules shared by the PEs

Inter-PE communication
• • • • Operation mode Control Strategy Switching methodology Network topology

• The combination of all the four sets of design feature represent the inter-PE communication in the interconnection network.

Operation Mode
• Synchronous • Asynchronous • Combined

Control Strategy
• The interconnection network consists of:
– Switching elements – Interconnecting links

• The control setting function of the switching elements can be managed in either of the 2 ways or strategies:
– Centralized control – Distributed control

Switching Methodology
• Circuit Switching • Packet Switching • Integrated Switching

Network Topology
• Static : links between two processors are passive and dedicated buses cannot be reconfigured for direct connections to other processors. • Dynamic : links can be reconfigured by setting the network’s active switching elements.

SIMD interconnection Networks
• • • • • Static Vs Dynamic Networks Mesh-Connected Cube interconnection networks Barrel Shifter and Data Manipulator Shuffle-Exchange and Omega Networks

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