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140763272-Ee101-Basics-1|Views: 3|Likes: 0

Published by Mouhamedlemine Ould Sid'ahmed

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https://www.scribd.com/doc/190429803/140763272-Ee101-Basics-1

12/09/2013

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M. B. Patil

mbpatil@ee.iitb.ac.in Department of Electrical Engineering Indian Institute of Technology Bombay

M. B. Patil, IIT Bombay

Kirchhoﬀ’s laws

A i2 v2

α v4

v3 R2 i3 v6 R1 v1 i1

B i6 V0

v4 R3 i4 v5

C i5 I0

E

D

M. B. Patil, IIT Bombay

Kirchhoﬀ’s laws

A i2 v2

α v4

v3 R2 i3 v6 R1 v1 i1

B i6 V0

v4 R3 i4 v5

C i5 I0

E

D

* Kirchhoﬀ’s current law (KCL): P ik = 0 at each node.

M. B. Patil, IIT Bombay

e. −i3 + i6 + i4 = 0. M.. IIT Bombay .g.Kirchhoﬀ’s laws A i2 v2 α v4 v3 R2 i3 v6 R1 v1 i1 B i6 V0 v4 R3 i4 v5 C i5 I0 E D * Kirchhoﬀ’s current law (KCL): P ik = 0 at each node. Patil. at node B. B.

IIT Bombay . Patil.) M. −i3 + i6 + i4 = 0.. (We have followed the convention that current leaving a node is positive.g. at node B.Kirchhoﬀ’s laws A i2 v2 α v4 v3 R2 i3 v6 R1 v1 i1 B i6 V0 v4 R3 i4 v5 C i5 I0 E D * Kirchhoﬀ’s current law (KCL): P ik = 0 at each node. e. B.

B. at node B. (We have followed the convention that current leaving a node is positive..Kirchhoﬀ’s laws A i2 v2 α v4 v3 R2 i3 v6 R1 v1 i1 B i6 V0 v4 R3 i4 v5 C i5 I0 E D * Kirchhoﬀ’s current law (KCL): P ik = 0 at each node. IIT Bombay . −i3 + i6 + i4 = 0.g. M. e.) * Kirchhoﬀ’s voltage law (KVL): P vk = 0 for each loop. Patil.

. −i3 + i6 + i4 = 0. e. at node B. (We have followed the convention that current leaving a node is positive. B.) * Kirchhoﬀ’s voltage law (KVL): P vk = 0 for each loop.g.Kirchhoﬀ’s laws A i2 v2 α v4 v3 R2 i3 v6 R1 v1 i1 B i6 V0 v4 R3 i4 v5 C i5 I0 E D * Kirchhoﬀ’s current law (KCL): P ik = 0 at each node..g. e. IIT Bombay . v3 + v6 − v1 − v2 = 0. Patil. M.

v3 + v6 − v1 − v2 = 0. e. Patil.. IIT Bombay .g.g.. (We have followed the convention that current leaving a node is positive. −i3 + i6 + i4 = 0. B.) M.Kirchhoﬀ’s laws A i2 v2 α v4 v3 R2 i3 v6 R1 v1 i1 B i6 V0 v4 R3 i4 v5 C i5 I0 E D * Kirchhoﬀ’s current law (KCL): P ik = 0 at each node. at node B. e.) * Kirchhoﬀ’s voltage law (KVL): P vk = 0 for each loop. (We have followed the convention that voltage drop across a branch is positive.

Patil.Circuit elements Element Resistor Symbol v i Equation v =Ri v =L di dt dv dt Inductor i v Capacitor i v i =C v i C Diode BJT to be discussed to be discussed E B M. B. IIT Bombay .

β : dimensionless.Sources Element Independent Voltage source Current source Dependent VCVS VCCS CCVS CCCS Symbol v i v i v i v i v i v i Equation v (t ) = vs (t ) i (t ) = is (t ) v (t ) = α vc (t ) i (t ) = g vc (t ) v (t ) = r ic (t ) i (t ) = β ic (t ) * α. M. IIT Bombay . r : Ω. B. Patil. g : Ω−1 or (“mho”) * The subscript ‘c’ denotes the controlling voltage or current.

IIT Bombay . V2 . B. where V1 . M. are “node voltages” (measured with respect to a reference node). Patil. etc.Instantaneous power absorbed by an element i1 V1 VN iN i2 V2 V3 i3 P (t ) = V 1 (t ) i 1 (t ) + V 2 (t ) i 2 (t ) + · · · + V N (t ) i N (t ) .

Instantaneous power absorbed by an element i1 V1 VN iN i2 V2 V3 i3 P (t ) = V 1 (t ) i 1 (t ) + V 2 (t ) i 2 (t ) + · · · + V N (t ) i N (t ) . etc. are “node voltages” (measured with respect to a reference node). * two-terminal element: v V1 i1 i2 V2 P = V1 i 1 + V2 i 2 = V 1 i 1 + V 2 (− i 1 ) = [V 1 − V 2 ] i 1 = v i 1 M. where V1 . V2 . IIT Bombay . B. Patil.

are “node voltages” (measured with respect to a reference node). where V1 . * two-terminal element: v V1 i1 i2 V2 P = V1 i 1 + V2 i 2 = V 1 i 1 + V 2 (− i 1 ) = [V 1 − V 2 ] i 1 = v i 1 P = V B i B + V C i C + V E (− i E ) iC iE * three-terminal element: VC VB iB VE = V B i B + V C i C − V E (i B + i C ) = (VB − VE ) iB + (VC − VE ) iC = VBE iB + VCE iE M. Patil.Instantaneous power absorbed by an element i1 V1 VN iN i2 V2 V3 i3 P (t ) = V 1 (t ) i 1 (t ) + V 2 (t ) i 2 (t ) + · · · + V N (t ) i N (t ) . B. etc. V2 . IIT Bombay .

The energy “absorbed” by a resistor goes in heating the resistor and the rest of the world. M. Patil.Instantaneous power * A resistor can only absorb power (from the circuit) since v and i have the same sign. IIT Bombay . B. making P > 0.

a “heat sink” is provided to dissipate the thermal energy eﬀectively so that the device temperature does not become too high. IIT Bombay . The energy “absorbed” by a resistor goes in heating the resistor and the rest of the world.Instantaneous power * A resistor can only absorb power (from the circuit) since v and i have the same sign. Patil. making P > 0. M. * Often. B.

For example. IIT Bombay . a DC voltage source) can absorb or deliver power since the signs of v and i are independent. it absorbs energy which gets stored within. * A source (e. making P > 0. when a battery is charged.g. * Often. B. The energy “absorbed” by a resistor goes in heating the resistor and the rest of the world. Patil. a “heat sink” is provided to dissipate the thermal energy eﬀectively so that the device temperature does not become too high.. M.Instantaneous power * A resistor can only absorb power (from the circuit) since v and i have the same sign.

a “heat sink” is provided to dissipate the thermal energy eﬀectively so that the device temperature does not become too high. Similarly. When it is absorbing power. an inductor can store energy (in the form of magnetic ﬂux). making P > 0. * A capacitor can absorb or deliver power.Instantaneous power * A resistor can only absorb power (from the circuit) since v and i have the same sign. M. it absorbs energy which gets stored within. For example.. Patil. B. its charge builds up. * A source (e. when a battery is charged.g. The energy “absorbed” by a resistor goes in heating the resistor and the rest of the world. a DC voltage source) can absorb or deliver power since the signs of v and i are independent. IIT Bombay . * Often.

IIT Bombay . Patil.Resistors in series v1 A v2 R2 v3 B A v i B i R1 R3 R M. B.

Resistors in series v1 A v2 R2 v3 B A v i B i R1 R3 R v1 = i R1 . v2 = i R2 . IIT Bombay . v3 = i R3 . ⇒ v = v1 + v2 + v3 = i (R1 + R2 + R3 ) M. Patil. B.

v2 = i R2 . B. ⇒ v = v1 + v2 + v3 = i (R1 + R2 + R3 ) * The equivalent resistance is Req = R1 + R2 + R3 .Resistors in series v1 A v2 R2 v3 B A v i B i R1 R3 R v1 = i R1 . IIT Bombay . v3 = i R3 . Patil. M.

Req M. IIT Bombay . v3 = i R3 .Resistors in series v1 A v2 R2 v3 B A v i B i R1 R3 R v1 = i R1 . ⇒ v = v1 + v2 + v3 = i (R1 + R2 + R3 ) * The equivalent resistance is Req = R1 + R2 + R3 . Patil. B. * The voltage drop across Rk is v × Rk . v2 = i R2 .

IIT Bombay . Patil. B.Resistors in parallel v i1 A R1 B A v i B i i2 i3 R2 R3 R M.

⇒ i = i1 + i2 + i3 = (G1 + G2 + G3 ) v .Resistors in parallel v i1 A R1 B A v i B i i2 i3 R2 R3 R i1 = G1 v . i3 = G3 v . etc. Patil. i2 = G2 v . where G1 = 1/R1 . IIT Bombay . M. B.

Patil. M. ⇒ i = i1 + i2 + i3 = (G1 + G2 + G3 ) v . * The equivalent conductance is Geq = G1 + G2 + G3 . and the equivalent resistance is Req = 1/Geq . etc. IIT Bombay . B.Resistors in parallel v i1 A R1 B A v i B i i2 i3 R2 R3 R i1 = G1 v . i3 = G3 v . i2 = G2 v . where G1 = 1/R1 .

⇒ i = i1 + i2 + i3 = (G1 + G2 + G3 ) v . * The equivalent conductance is Geq = G1 + G2 + G3 . etc. where G1 = 1/R1 . * The current through Rk is i × Gk . B. i3 = G3 v . Geq M.Resistors in parallel v i1 A R1 B A v i B i i2 i3 R2 R3 R i1 = G1 v . IIT Bombay . i2 = G2 v . Patil. and the equivalent resistance is Req = 1/Geq .

i2 = G2 v . IIT Bombay . etc. Geq * If N = 2. Patil.Resistors in parallel v i1 A R1 B A v i B i i2 i3 R2 R3 R i1 = G1 v . where G1 = 1/R1 . and the equivalent resistance is Req = 1/Geq . B. we have R1 R2 R2 R1 Req = . i2 = i × . i1 = i × . * The equivalent conductance is Geq = G1 + G2 + G3 . R1 + R2 R1 + R2 R1 + R2 M. i3 = G3 v . ⇒ i = i1 + i2 + i3 = (G1 + G2 + G3 ) v . * The current through Rk is i × Gk .

we have R1 R2 R2 R1 Req = . * The equivalent conductance is Geq = G1 + G2 + G3 . i2 = i × . ⇒ i = i1 + i2 + i3 = (G1 + G2 + G3 ) v . B. i2 = G2 v . and the equivalent resistance is Req = 1/Geq . * The current through Rk is i × Gk . R1 + R2 R1 + R2 R1 + R2 * If Rk = 0. i3 = G3 v . Patil. all of the current will go through Rk . etc. Geq * If N = 2. where G1 = 1/R1 . M.Resistors in parallel v i1 A R1 B A v i B i i2 i3 R2 R3 R i1 = G1 v . i1 = i × . IIT Bombay .

5 2.Example i1 4Ω 3Ω 6V i2 2Ω 5 (a) 2.5 3Ω .

Example i1 4Ω 3Ω 6V i2 2Ω 5 (a) 2.5 3Ω .5 2.

5 2.Example i1 4Ω 3Ω 6V i2 2Ω i1 4 Ω i2 3Ω 5 2.5 (b) 2Ω 1Ω 3Ω 6V (a) 3Ω .

5 2.5 (b) 2Ω 1Ω 3Ω 6V (a) 3Ω .Example i1 4Ω 3Ω 6V i2 2Ω i1 4 Ω i2 3Ω 5 2.

Example

i1 4Ω 3Ω 6V i2

2Ω

i1 4 Ω i2 3Ω 5 2.5 2.5

(b)

2Ω 1Ω 3Ω

6V

(a)

3Ω

i1 4Ω 6V

(c)

i2 6 3

Example

i1 4Ω 3Ω 6V i2

2Ω

i1 4 Ω i2 3Ω 5 2.5 2.5

(b)

2Ω 1Ω 3Ω

6V

(a)

3Ω

i1 4Ω 6V

(c)

i2 6 3

Example

i1 4Ω 3Ω 6V i2

2Ω

i1 4 Ω i2 3Ω 5 2.5 2.5

(b)

2Ω 1Ω 3Ω

6V

(a)

3Ω i1 4Ω 6V i2 6 3

(d)

i1

4Ω 2Ω 6V

(c)

5 2. 4Ω+2Ω (c) .5 (b) 2Ω 1Ω 3Ω 6V (a) 3Ω i1 4Ω 6V i2 6 3 (d) i1 4Ω 2Ω 6V i1 = 6V = 1A.Example i1 4Ω 3Ω 6V i2 2Ω i1 4 Ω i2 3Ω 5 2.

5 (b) 2Ω 1Ω 3Ω 6V (a) 3Ω i1 4Ω 6V i2 6 3 (d) i1 4Ω 2Ω 6V i1 = 6V = 1A. i2 = i1 × 6Ω+3Ω 3 (c) M. IIT Bombay . Patil.Example i1 4Ω 3Ω 6V i2 2Ω i1 4 Ω i2 3Ω 5 2. B.5 2. 4Ω+2Ω 2 6Ω = A.

Example i1 4Ω 3Ω 6V i2 2Ω i1 4 Ω i2 3Ω 5 2. IIT Bombay . i2 = i1 × 6Ω+3Ω 3 (c) Home work: * Verify that KCL and KVL are satisﬁed for each node/loop. B. 4Ω+2Ω 2 6Ω = A.5 (b) 2Ω 1Ω 3Ω 6V (a) 3Ω i1 4Ω 6V i2 6 3 (d) i1 4Ω 2Ω 6V i1 = 6V = 1A. Patil. M.5 2.

Patil. M. i2 = i1 × 6Ω+3Ω 3 (c) Home work: * Verify that KCL and KVL are satisﬁed for each node/loop. 4Ω+2Ω 2 6Ω = A. B.5 (b) 2Ω 1Ω 3Ω 6V (a) 3Ω i1 4Ω 6V i2 6 3 (d) i1 4Ω 2Ω 6V i1 = 6V = 1A.5 2. * Verify that the total power absorbed by the resistors is equal to the power supplied by the source. IIT Bombay .Example i1 4Ω 3Ω 6V i2 2Ω i1 4 Ω i2 3Ω 5 2.

Nodal analysis V1 R1 R2 V2 R3 v3 k v3 I0 0 R4 V3 M. B. Patil. IIT Bombay .

V2 .Nodal analysis * Take some node as the “reference node” and denote the node voltages of the remaining nodes by V1 . etc. IIT Bombay . V1 R1 R2 V2 R3 v3 k v3 I0 0 R4 V3 M. B. Patil.

IIT Bombay .g.Nodal analysis * Take some node as the “reference node” and denote the node voltages of the remaining nodes by V1 . current leaving a node is positive. V2 . * Write KCL at each node in terms of the node voltages. V2 R3 v3 k v3 0 R4 V3 V1 R1 R2 I0 M. B. etc. Patil.. e. Follow a ﬁxed convention.

R1 1 1 1 (V 2 − V 1 ) + (V 2 − V 3 ) + (V 2 ) = 0 .g. Follow a ﬁxed convention. V2 R3 v3 k v3 0 R4 V3 V1 R1 R2 I0 1 ( V 1 − V 2 ) − I0 − k ( V 2 − V 3 ) = 0 . B. Patil. R3 R4 M. IIT Bombay . * Write KCL at each node in terms of the node voltages. R1 R3 R2 1 1 k (V 2 − V 3 ) + (V 3 − V 2 ) + (V 3 ) = 0 ..Nodal analysis * Take some node as the “reference node” and denote the node voltages of the remaining nodes by V1 . V2 . etc. e. current leaving a node is positive.

V2 . Patil.g.. etc. Follow a ﬁxed convention. IIT Bombay . M. R1 1 1 1 (V 2 − V 1 ) + (V 2 − V 3 ) + (V 2 ) = 0 . R3 R4 * Solve for the node voltages → branch voltages and currents. B. R1 R3 R2 1 1 k (V 2 − V 3 ) + (V 3 − V 2 ) + (V 3 ) = 0 .Nodal analysis * Take some node as the “reference node” and denote the node voltages of the remaining nodes by V1 . * Write KCL at each node in terms of the node voltages. current leaving a node is positive. V2 R3 v3 k v3 0 R4 V3 V1 R1 R2 I0 1 ( V 1 − V 2 ) − I0 − k ( V 2 − V 3 ) = 0 . e.

. Patil. V2 R3 v3 k v3 0 R4 V3 V1 R1 R2 I0 1 ( V 1 − V 2 ) − I0 − k ( V 2 − V 3 ) = 0 . B. R1 R3 R2 1 1 k (V 2 − V 3 ) + (V 3 − V 2 ) + (V 3 ) = 0 . M. * Remark: Nodal analysis needs to be modiﬁed if there are voltage sources. etc. e.g. V2 . R3 R4 * Solve for the node voltages → branch voltages and currents. current leaving a node is positive. Follow a ﬁxed convention.Nodal analysis * Take some node as the “reference node” and denote the node voltages of the remaining nodes by V1 . IIT Bombay . * Write KCL at each node in terms of the node voltages. R1 1 1 1 (V 2 − V 1 ) + (V 2 − V 3 ) + (V 2 ) = 0 .

IIT Bombay . Patil.Mesh analysis R1 R2 Vs i1 is R3 i2 r1 is M. B.

Patil. e.) M. B. (Note that is = i1 − i2 .Mesh analysis R1 R2 Vs i1 is R3 i2 r1 is * Write KVL for each loop in terms of the “mesh currents” i1 and i2 . Use a ﬁxed convention. voltage drop is positive. IIT Bombay .g..

) −Vs + i1 R1 + (i1 − i2 ) R3 = 0 . R2 i2 + r1 (i1 − i2 ) + (i2 − i1 ) R3 = 0 . B. (Note that is = i1 − i2 .. e. Use a ﬁxed convention.Mesh analysis R1 R2 Vs i1 is R3 i2 r1 is * Write KVL for each loop in terms of the “mesh currents” i1 and i2 .g. Patil. IIT Bombay . M. voltage drop is positive.

M..g. (Note that is = i1 − i2 . e. * Solve for i1 and i2 → compute other quantities of interest (branch currents and branch voltages). R2 i2 + r1 (i1 − i2 ) + (i2 − i1 ) R3 = 0 . Patil. Use a ﬁxed convention. B.Mesh analysis R1 R2 Vs i1 is R3 i2 r1 is * Write KVL for each loop in terms of the “mesh currents” i1 and i2 . voltage drop is positive. IIT Bombay .) −Vs + i1 R1 + (i1 − i2 ) R3 = 0 .

Patil. dependent sources.. the system of equations describing the circuit is linear.e. i. M. B.Linearity and superposition * A circuit containing independent sources. and resistors is linear. IIT Bombay .

i. * The dependent sources are assumed to be linear. e. and resistors is linear.. the system of equations describing the circuit is linear. IIT Bombay .Linearity and superposition * A circuit containing independent sources. dependent sources. v = a ic M. B. the resulting system will be no longer linear.g. if we have a CCVS with 2 + b . Patil.e..

g. IIT Bombay .e. dependent sources. e. B.. Patil. M. v = a ic * For a linear system. i. if we have a CCVS with 2 + b . the system of equations describing the circuit is linear. we can apply the principle of superposition.. the resulting system will be no longer linear. * The dependent sources are assumed to be linear.Linearity and superposition * A circuit containing independent sources. and resistors is linear.

.g. B. IIT Bombay . i. dependent sources. * The dependent sources are assumed to be linear. if we have a CCVS with 2 + b . Patil. superposition enables us to consider the independent sources one at a time. compute the desired quantity of interest in each case. * In the context of circuits. and get the net result by adding the individual contributions.e. the system of equations describing the circuit is linear. and resistors is linear. M. v = a ic * For a linear system.Linearity and superposition * A circuit containing independent sources.. the resulting system will be no longer linear. we can apply the principle of superposition. e.

e. and resistors is linear.. if we have a CCVS with 2 + b . e. dependent sources. superposition enables us to consider the independent sources one at a time. the system of equations describing the circuit is linear.Linearity and superposition * A circuit containing independent sources. and get the net result by adding the individual contributions. * Caution: Superposition cannot be applied to dependent sources. M. Patil. the resulting system will be no longer linear. we can apply the principle of superposition.. compute the desired quantity of interest in each case. v = a ic * For a linear system. B.g. * The dependent sources are assumed to be linear. i. * In the context of circuits. IIT Bombay .

B. M. Patil. IIT Bombay .Superposition * Superposition refers to superposition of response due to independent sources.

Patil. * We can consider one independent source at a time. B. IIT Bombay . M.Superposition * Superposition refers to superposition of response due to independent sources. deactivate all other independent sources.

replace the current source with an open circuit. M. * Deactivating a current source ⇒ is = 0. i. Patil.. B.Superposition * Superposition refers to superposition of response due to independent sources. * We can consider one independent source at a time. deactivate all other independent sources.e. IIT Bombay .

B. i.Superposition * Superposition refers to superposition of response due to independent sources. replace the voltage source with a short circuit. * Deactivating a current source ⇒ is = 0.. * We can consider one independent source at a time.e. * Deactivating a voltage source ⇒ vs = 0. IIT Bombay . deactivate all other independent sources. replace the current source with an open circuit.e. i. Patil.. M.

Example 2Ω i1 18 V 4Ω 3A .

Example Case 1: Keep Vs . 2Ω 2Ω i1 18 V 4Ω 3A 4Ω 18 V i1 . deactivate Is .

2Ω 2Ω i1 18 V 4Ω 3A 4Ω 18 V i1 (1) i1 = 3 A .Example Case 1: Keep Vs . deactivate Is .

deactivate Is .Example Case 1: Keep Vs . deactivate Vs . 2Ω 2Ω i1 18 V 4Ω 3A Case 2: Keep Is . 2Ω i1 4Ω 3A 4Ω 18 V i1 (1) i1 = 3 A .

Example Case 1: Keep Vs . deactivate Vs . 2Ω i1 4Ω 3A (2) i1 = 3 A × 2Ω = 1A 2Ω+4Ω 4Ω 18 V i1 (1) i1 = 3 A . deactivate Is . 2Ω 2Ω i1 18 V 4Ω 3A Case 2: Keep Is .

2Ω (1) (2) inet 1 = i1 + i1 = 3 + 1 = 4 A i1 4Ω 3A (2) i1 = 3 A × 2Ω = 1A 2Ω+4Ω 4Ω 18 V i1 (1) i1 = 3 A M. 2Ω 2Ω i1 18 V 4Ω 3A Case 2: Keep Is .Example Case 1: Keep Vs . IIT Bombay . deactivate Is . B. Patil. deactivate Vs .

Example i 1Ω 12 V v 3Ω 6A 2i .

i 1Ω i 1Ω 6A 2i 12 V v 3Ω 12 V v 3Ω 2i . deactivate Is .Example Case 1: Keep Vs .

Example Case 1: Keep Vs . i 1Ω i 1Ω 6A 2i 12 V v 3Ω 12 V v 3Ω KVL: − 12 + 3 i + 2 i + i = 0 ⇒ i = 2 A . v(1) = 6 V . 2i . deactivate Is .

deactivate Is . v(1) = 6 V . i 1Ω i 1Ω 6A 2i 12 V v 3Ω 12 V v 3Ω KVL: − 12 + 3 i + 2 i + i = 0 ⇒ i = 2 A . i 1Ω v 3Ω 6A 2i .Example Case 1: Keep Vs . 2i Case 2: Keep Is . deactivate Vs .

i 1Ω i 1Ω 6A 2i 12 V v 3Ω 12 V v 3Ω KVL: − 12 + 3 i + 2 i + i = 0 ⇒ i = 2 A . 2i . 2i Case 2: Keep Is . deactivate Vs . v(2) = (−3 + 6) × 3 = 9 V . i 1Ω v 3Ω KVL: i + (6 + i) 3 + 2 i = 0 6A ⇒ i = −3 A .Example Case 1: Keep Vs . v(1) = 6 V . deactivate Is .

Example Case 1: Keep Vs . Patil. 2i M. deactivate Is . deactivate Vs . IIT Bombay . i 1Ω i 1Ω 6A 2i 12 V v 3Ω 12 V v 3Ω KVL: − 12 + 3 i + 2 i + i = 0 ⇒ i = 2 A . v(1) = 6 V . B. vnet = v(1) + v(2) = 6 + 9 = 15 V i 1Ω v 3Ω KVL: i + (6 + i) 3 + 2 i = 0 6A ⇒ i = −3 A . 2i Case 2: Keep Is . v(2) = (−3 + 6) × 3 = 9 V .

Patil. IIT Bombay .Superposition: Why does it work? V1 R1 Vs 0 A R2 R3 V2 B Is M. B.

Patil. B. IIT Bombay . −Is + R3 M.Superposition: Why does it work? V1 R1 Vs 0 A R2 R3 V2 B Is KCL at nodes A and B: 1 1 1 (V 1 − V s ) + V1 + (V 1 − V 2 ) = 0 . R1 R2 R3 1 (V 2 − V 1 ) = 0 .

R1 R2 R3 1 (V 2 − V 1 ) = 0 .). we get (using G1 = 1/R1 . Patil. −Is + R3 Writing in a matrix form. B. » G1 + G2 + G3 −G3 −G3 G3 –» V1 V2 – = » G1 Vs Is – M. etc. IIT Bombay .Superposition: Why does it work? V1 R1 Vs 0 A R2 R3 V2 B Is KCL at nodes A and B: 1 1 1 (V 1 − V s ) + V1 + (V 1 − V 2 ) = 0 .

Superposition: Why does it work? V1 R1 Vs 0 A R2 R3 V2 B Is KCL at nodes A and B: 1 1 1 (V 1 − V s ) + V1 + (V 1 − V 2 ) = 0 . M. R1 R2 R3 1 (V 2 − V 1 ) = 0 .e. we get (using G1 = 1/R1 . IIT Bombay ..). » G1 + G2 + G3 −G3 » i. A V1 V2 – = » −G3 G3 G1 Vs Is – → –» V1 V2 V1 V2 – = » G1 Vs Is −1 – » – =A » G1 Vs Is – . −Is + R3 Writing in a matrix form. Patil. B. etc.

IIT Bombay . Patil. M.Superposition: Why does it work? V1 R1 Vs 0 A R2 R3 V2 B Is » V1 V2 – =A −1 » G1 Vs Is – ≡ » m11 m21 m12 m22 –» G1 Vs Is – . B.

M.Superposition: Why does it work? V1 R1 Vs 0 A R2 R3 V2 B Is » V1 V2 – =A −1 » G1 Vs Is – ≡ » m11 m21 m12 m22 –» G1 Vs Is – . B. » V1 V2 – = » m11 G1 m21 G1 m12 m22 –» Vs 0 – » m11 G1 + m21 G1 m12 m22 –» 0 Is – ≡ " V1 V2 (1) (1) # " + V1 V2 (2) (2) # . We are now in a position to see why superposition works. Patil. IIT Bombay .

Superposition: Why does it work? V1 R1 Vs 0 A R2 R3 V2 B Is » V1 V2 – =A −1 » G1 Vs Is – ≡ » m11 m21 m12 m22 –» G1 Vs Is – . M. We are now in a position to see why superposition works. IIT Bombay . The second vector is the response due to Is alone (and Vs deactivated). Patil. The ﬁrst vector is the response due to Vs alone (and Is deactivated). B. » V1 V2 – = » m11 G1 m21 G1 m12 m22 –» Vs 0 – » m11 G1 + m21 G1 m12 m22 –» 0 Is – ≡ " V1 V2 (1) (1) # " + V1 V2 (2) (2) # .

Superposition: Why does it work? V1 R1 Vs 0 A R2 R3 V2 B Is » V1 V2 – =A −1 » G1 Vs Is – ≡ » m11 m21 m12 m22 –» G1 Vs Is – . We are now in a position to see why superposition works. The second vector is the response due to Is alone (and Vs deactivated). B. » V1 V2 – = » m11 G1 m21 G1 m12 m22 –» Vs 0 – » m11 G1 + m21 G1 m12 m22 –» 0 Is – ≡ " V1 V2 (1) (1) # " + V1 V2 (2) (2) # . The ﬁrst vector is the response due to Vs alone (and Is deactivated). IIT Bombay . Patil. M. All other currents and voltages are linearly related to V1 and V2 ⇒ Any voltage (node voltage or branch voltage) or current can also be computed using superposition.

CCVS. voltage sources. current sources.Thevenin’s theorem Circuit (resistors. VCCS) A B . VCVS. CCCS.

IIT Bombay . CCVS. B. voltage sources. current sources.Thevenin’s theorem RTh Circuit (resistors. VCCS) A A VTh B B M. Patil. CCCS. VCVS.

Thevenin’s theorem RTh Circuit (resistors. CCVS. M. voltage sources. VCCS) A A VTh B B * VTh is simply VAB when nothing is connected on the other side. current sources. VTh = Voc . VCVS..e. IIT Bombay . i. Patil. CCCS. B.

current sources. CCCS. M. voltage sources. * RTh can be found by diﬀerent methods. VCCS) A A VTh B B * VTh is simply VAB when nothing is connected on the other side. IIT Bombay . VTh = Voc .. CCVS. i. Patil. VCVS.e. B.Thevenin’s theorem RTh Circuit (resistors.

VCVS.Thevenin’s theorem: RTh Method 1: Circuit (resistors. current sources. voltage sources. VCCS) RTh A A VTh B B * Deactivate all independent sources. CCVS. . CCCS.

Thevenin’s theorem: RTh Method 1: Circuit (resistors. current sources. VCVS. VCVS. CCVS. CCCS. voltage sources. CCCS. VCCS) RTh A A VTh B B Circuit (resistors. . voltage sources. CCVS. current sources. VCCS) RTh A A B B * Deactivate all independent sources.

CCVS. VCCS) RTh A A B B * Deactivate all independent sources. current sources.Thevenin’s theorem: RTh Method 1: Circuit (resistors. VCVS. voltage sources. * RTh can often be found by inspection. CCCS. VCVS. CCCS. voltage sources. . CCVS. current sources. VCCS) RTh A A VTh B B Circuit (resistors.

CCVS. current sources. CCCS. * RTh may be found by connecting a test source. . VCCS) RTh A A B B * Deactivate all independent sources. CCCS. VCVS. current sources. voltage sources.Thevenin’s theorem: RTh Method 1: Circuit (resistors. CCVS. VCCS) RTh A A A Is VTh Vs B B B Circuit (resistors. voltage sources. VCVS. * RTh can often be found by inspection.

. CCVS. * RTh may be found by connecting a test source. CCCS. VCCS) RTh A A A Is VTh Vs B B B Circuit (resistors.Thevenin’s theorem: RTh Method 1: Circuit (resistors. VCVS. voltage sources. CCVS. VCCS) RTh A A A Vs Is B B B * Deactivate all independent sources. CCCS. * RTh can often be found by inspection. current sources. voltage sources. VCVS. current sources.

IIT Bombay . * RTh can often be found by inspection. current sources. voltage sources. M. CCCS. CCVS. voltage sources. VCVS. B.Thevenin’s theorem: RTh Method 1: Circuit (resistors. VCCS) RTh A A A Is VTh Vs B B B Circuit (resistors. * RTh may be found by connecting a test source. VCVS. CCCS. VCCS) RTh A A A Vs Is B B B * Deactivate all independent sources. Patil. CCVS. current sources.

Thevenin’s theorem: RTh Method 2: A Voc B * Find Voc . .

IIT Bombay . M. B. * Find Isc . Patil.Thevenin’s theorem: RTh Method 2: A A Voc Isc B B * Find Voc .

Thevenin’s theorem: RTh Method 2: A A Voc Isc B B * Find Voc . IIT Bombay . Voc * RTh = . Patil. Isc M. B. * Find Isc .

IIT Bombay . Patil. B. M. Isc * Note: Sources are not deactivated.Thevenin’s theorem: RTh Method 2: A A Voc Isc B B * Find Voc . Voc * RTh = . * Find Isc .

Thevenin’s theorem: example 6Ω R1 3Ω 9V R2 R3 2Ω A RL B .

Thevenin’s theorem: example 6Ω R1 3Ω 9V R2 R3 2Ω A RTh A RL B ≡ VTh RL B .

Thevenin’s theorem: example 6Ω R1 3Ω 9V R2 R3 2Ω A RTh A RL B ≡ VTh RL B VTh : 6Ω 2Ω A 3Ω 9V Voc B .

Thevenin’s theorem: example 6Ω R1 3Ω 9V R2 R3 2Ω A RTh A RL B ≡ VTh RL B VTh : 6Ω 2Ω A 3Ω 9V Voc B Voc = 9 V × = 9V × 3Ω 6Ω+3Ω 1 = 3V 3 .

Thevenin’s theorem: example 6Ω R1 3Ω 9V R2 R3 2Ω A RTh A RL B ≡ VTh RL B VTh : 6Ω 2Ω A RTh : 6Ω 2Ω A 3Ω 9V Voc B 3Ω B Voc = 9 V × = 9V × 3Ω 6Ω+3Ω 1 = 3V 3 .

Thevenin’s theorem: example 6Ω R1 3Ω 9V R2 R3 2Ω A RTh A RL B ≡ VTh RL B VTh : 6Ω 2Ω A RTh : 6Ω 2Ω A 3Ω 9V Voc B 3Ω B Voc = 9 V × 3Ω 6Ω+3Ω RTh = (R1 R2 ) + R3 = (3 6) + 2 1 = 9V × = 3V 3 1×2 =3× +2 = 4Ω 1+2 .

Thevenin’s theorem: example 6Ω R1 3Ω 9V R2 R3 2Ω A RTh A 4Ω A RL B ≡ VTh RL R L B ≡ 3V RL B VTh : 6Ω 2Ω A RTh : 6Ω 2Ω A 3Ω 9V Voc B 3Ω B Voc = 9 V × 3Ω 6Ω+3Ω RTh = (R1 R2 ) + R3 = (3 6) + 2 1 = 9V × = 3V 3 1×2 =3× +2 = 4Ω 1+2 M. Patil. B. IIT Bombay .

voltage sources. current sources. VCCS) A iL RL B .Maximum power transfer Circuit (resistors. VCVS. CCCS. CCVS.

Maximum power transfer

Circuit

(resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS)

A

iL RL

* Power “transferred” to load is, 2R . PL = iL L

B

Maximum power transfer

Circuit

(resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS)

A

iL RL

* Power “transferred” to load is, 2R . PL = iL L * For a given black box, what is the value of RL for which PL is maximum?

B

Maximum power transfer

Circuit

(resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS)

A

iL RL

* Power “transferred” to load is, 2R . PL = iL L * For a given black box, what is the value of RL for which PL is maximum? * Replace the black box with its Thevenin equivalent.

B

Maximum power transfer

Circuit

(resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS)

A

iL RL

* Power “transferred” to load is, 2R . PL = iL L * For a given black box, what is the value of RL for which PL is maximum? * Replace the black box with its Thevenin equivalent.

B

RTh

A

iL VTh RL

B

Maximum power transfer

Circuit

(resistors, voltage sources, current sources, CCVS, CCCS, VCVS, VCCS)

A

iL RL

* Power “transferred” to load is, 2R . PL = iL L * For a given black box, what is the value of RL for which PL is maximum? * Replace the black box with its Thevenin equivalent.

B

RTh

A

iL VTh RL

* iL =

B

VTh , RTh + RL

2 × PL = VTh

RL . (RTh + RL )2

RTh + RL 2 × PL = VTh RL . RTh + RL = 2 RL ⇒ RL = RTh . B RTh A iL VTh RL * iL = B VTh . CCCS.Maximum power transfer Circuit (resistors. (RTh + RL )4 i. VCCS) A iL RL * Power “transferred” to load is. voltage sources. what is the value of RL for which PL is maximum? * Replace the black box with its Thevenin equivalent.e. . (RTh + RL )2 * For dPL = 0 . we need dRL (RTh + RL )2 − RL × 2 (RTh + RL ) = 0. CCVS. current sources.. 2R . VCVS. PL = iL L * For a given black box.

e. CCCS. VCCS) A iL RL * Power “transferred” to load is. RTh + RL PL Pmax L 2 × PL = VTh RL .Maximum power transfer Circuit (resistors. RTh + RL = 2 RL ⇒ RL = RTh . VCVS. 2R . B.. (RTh + RL )4 i. we need dRL (RTh + RL )2 − RL × 2 (RTh + RL ) = 0. PL = iL L * For a given black box. voltage sources. RL RL = RTh M. B RTh A iL VTh RL * iL = B VTh . (RTh + RL )2 * For dPL = 0 . CCVS. current sources. Patil. what is the value of RL for which PL is maximum? * Replace the black box with its Thevenin equivalent. IIT Bombay .

Maximum power transfer: example Find RL for which PL is maximum. 3Ω 2Ω R1 R3 6Ω 12 V R2 2A A RL B .

Maximum power transfer: example Find RL for which PL is maximum. 3Ω 2Ω R1 R3 6Ω 12 V R2 3Ω R1 2Ω 2A A RL B RTh : A R3 6Ω R2 B .

3Ω 2Ω R1 R3 6Ω 12 V R2 3Ω R1 2Ω 2A A RL B RTh : A R3 6Ω R2 B RTh = (R1 =3× R2 ) + R3 = (3 1×2 +2 = 4Ω 1+2 6) + 2 .Maximum power transfer: example Find RL for which PL is maximum.

Maximum power transfer: example Find RL for which PL is maximum. 3Ω 2Ω R1 R3 6Ω 12 V R2 3Ω R1 2Ω 2A A Voc : R1 3Ω 2Ω A R3 6Ω RL 12 V B R2 2A B RTh : A R3 6Ω R2 B RTh = (R1 =3× R2 ) + R3 = (3 1×2 +2 = 4Ω 1+2 6) + 2 .

3Ω 2Ω R1 R3 6Ω 12 V R2 3Ω R1 2Ω 2A A Voc : R1 3Ω 2Ω A R3 6Ω RL 12 V B R2 2A B RTh : A R3 6Ω R2 B Use superposition to ﬁnd Voc : 3Ω 2Ω A 3Ω R1 R2 B 2Ω A R1 12 V R2 R3 6Ω R3 6Ω 2A B RTh = (R1 R2 ) + R3 = (3 6) + 2 1×2 =3× +2 = 4Ω 1+2 .Maximum power transfer: example Find RL for which PL is maximum.

3Ω 2Ω R1 R3 6Ω 12 V R2 3Ω R1 2Ω 2A A Voc : R1 3Ω 2Ω A R3 6Ω RL 12 V B R2 2A B RTh : A R3 6Ω R2 B Use superposition to ﬁnd Voc : 3Ω 2Ω A 3Ω R1 R2 B 2Ω A R1 12 V R2 R3 6Ω R3 6Ω 2A B RTh = (R1 R2 ) + R3 = (3 6) + 2 1×2 =3× +2 = 4Ω 1+2 6 (1) Voc = 12 × = 8 V 9 .Maximum power transfer: example Find RL for which PL is maximum.

3Ω 2Ω R1 R3 6Ω 12 V R2 3Ω R1 2Ω 2A A Voc : R1 3Ω 2Ω A R3 6Ω RL 12 V B R2 2A B RTh : A R3 6Ω R2 B Use superposition to ﬁnd Voc : 3Ω 2Ω A 3Ω R1 R2 B 2Ω A R1 12 V R2 R3 6Ω R3 6Ω 2A B RTh = (R1 R2 ) + R3 = (3 6) + 2 1×2 =3× +2 = 4Ω 1+2 6 (1) Voc = 12 × = 8 V 9 (2) Voc = 4 Ω × 2 A = 8 V .Maximum power transfer: example Find RL for which PL is maximum.

3Ω 2Ω R1 R3 6Ω 12 V R2 3Ω R1 2Ω 2A A Voc : R1 3Ω 2Ω A R3 6Ω RL 12 V B R2 2A B RTh : A R3 6Ω R2 B Use superposition to ﬁnd Voc : 3Ω 2Ω A 3Ω R1 R2 B 2Ω A R1 12 V R2 R3 6Ω R3 6Ω 2A B RTh = (R1 R2 ) + R3 = (3 6) + 2 1×2 =3× +2 = 4Ω 1+2 6 (1) (2) Voc = 12 × = 8 V Voc = 4 Ω × 2 A = 8 V 9 (1) (2) Voc = Voc + Voc = 8 + 8 = 16 V .Maximum power transfer: example Find RL for which PL is maximum.

Patil. B M.Maximum power transfer: example Find RL for which PL is maximum. 3Ω 2Ω R1 R3 6Ω 12 V R2 3Ω R1 2Ω 2A A Voc : R1 3Ω 2Ω A R3 6Ω RL 12 V B R2 2A B RTh : A R3 6Ω R2 B Use superposition to ﬁnd Voc : 3Ω 2Ω A 3Ω R1 R2 B 2Ω A R1 12 V R2 R3 6Ω R3 6Ω 2A B RTh = (R1 R2 ) + R3 = (3 6) + 2 1×2 =3× +2 = 4Ω 1+2 RTh A 6 (1) (2) Voc = 12 × = 8 V Voc = 4 Ω × 2 A = 8 V 9 (1) (2) Voc = Voc + Voc = 8 + 8 = 16 V iL VTh RL PL is maximum when RL = RTh = 4 Ω ⇒ iL = VTh /(2 RTh ) = 2 A 2 Pmax L = 2 × 4 = 16 W . B. IIT Bombay .

Thevenin’s theorem: example 4Ω 6A 2Ω A B 4Ω 48 V 12 Ω 12 Ω .

Thevenin’s theorem: example 4Ω 6A 2Ω RTh : 4Ω A B 4Ω 48 V 12 Ω 12 Ω A B 4Ω 2Ω 12 Ω C 12 Ω .

Thevenin’s theorem: example 4Ω 6A 2Ω RTh : 4Ω A B 4Ω 48 V 12 Ω 12 Ω A B 4Ω 2Ω A B 12 Ω C 12 Ω 3Ω ≡ 4Ω C .

Thevenin’s theorem: example 4Ω 6A 2Ω RTh : 4Ω A B 4Ω 48 V 12 Ω 12 Ω A B 4Ω 2Ω A B 12 Ω C 12 Ω 3Ω ≡ 4Ω C ⇒ RTh = 7 Ω .

Thevenin’s theorem: example 4Ω 6A 2Ω RTh : 4Ω A B 4Ω 48 V Voc : 4Ω 12 Ω A B 4Ω 48 V 12 Ω Voc 12 Ω 12 Ω 2Ω 6A C i A B 4Ω 2Ω A B 12 Ω C 12 Ω 3Ω ≡ 4Ω C ⇒ RTh = 7 Ω .

Thevenin’s theorem: example 4Ω 6A 2Ω RTh : 4Ω A B 4Ω 48 V Voc : 4Ω 12 Ω A B 4Ω 48 V 12 Ω Voc 12 Ω 12 Ω 2Ω 6A C i A B 4Ω Note: i = 0 (since there is no return path). VAB = VA − VB = (VA − VC ) + (VC − VB ) = VAC + VCB = 24 V + 36 V = 60 V 2Ω A B 12 Ω C 12 Ω 3Ω ≡ 4Ω C ⇒ RTh = 7 Ω .

VAB = VA − VB = (VA − VC ) + (VC − VB ) = VAC + VCB = 24 V + 36 V = 60 V 2Ω A B 12 Ω C 12 Ω 3Ω ≡ 4Ω C ⇒ RTh = 7 Ω VTh = 60 V RTh = 7 Ω .Thevenin’s theorem: example 4Ω 6A 2Ω RTh : 4Ω A B 4Ω 48 V Voc : 4Ω 12 Ω A B 4Ω 48 V 12 Ω Voc 12 Ω 12 Ω 2Ω 6A C i A B 4Ω Note: i = 0 (since there is no return path).

IIT Bombay .Thevenin’s theorem: example 4Ω 6A 2Ω RTh : 4Ω A B 4Ω 48 V Voc : 4Ω 12 Ω A B 4Ω 48 V 12 Ω Voc 12 Ω 12 Ω 2Ω 6A C i A B 4Ω Note: i = 0 (since there is no return path). Patil. B. VAB = VA − VB = (VA − VC ) + (VC − VB ) = VAC + VCB = 24 V + 36 V = 60 V A B 2Ω A B 12 Ω C 12 Ω 3Ω ≡ 4Ω C ⇒ RTh = 7 Ω VTh = 60 V RTh = 7 Ω 7Ω 60 V M.

sqproj 4Ω 6A 2Ω A B 4Ω 48 V 12 Ω 12 Ω .Graphical method for ﬁnding VTh and RTh SEQUEL ﬁle: ee101 thevenin 1.

. Plot i versus v. Isc = intercept on the i-axis. 4Ω 6A 2Ω i v A B 4Ω 48 V 12 Ω 12 Ω Voc = intercept on the v-axis.sqproj 4Ω 6A 2Ω A B 4Ω 48 V 12 Ω 12 Ω Connect a voltage source between A and B.Graphical method for ﬁnding VTh and RTh SEQUEL ﬁle: ee101 thevenin 1.

. 4Ω 6A 2Ω i v A B 0 0 20 40 v (Volt) 60 4Ω 48 V 12 Ω 12 Ω Voc = intercept on the v-axis. Isc = intercept on the i-axis.sqproj 4Ω 6A 2Ω A B 4Ω 48 V i (Amp) 10 8 6 4 2 12 Ω 12 Ω Connect a voltage source between A and B. Plot i versus v.Graphical method for ﬁnding VTh and RTh SEQUEL ﬁle: ee101 thevenin 1.

. 4Ω 6A 2Ω i v A B 0 0 20 40 v (Volt) 60 4Ω 48 V 12 Ω Voc = 60 V.5714 A RTh = Vsc /Isc = 7 Ω 12 Ω Voc = intercept on the v-axis. Plot i versus v.sqproj 4Ω 6A 2Ω A B 4Ω 48 V i (Amp) 10 8 6 4 2 12 Ω 12 Ω Connect a voltage source between A and B. Isc = 8. Isc = intercept on the i-axis.Graphical method for ﬁnding VTh and RTh SEQUEL ﬁle: ee101 thevenin 1.

B. Isc = 8.Graphical method for ﬁnding VTh and RTh SEQUEL ﬁle: ee101 thevenin 1.sqproj 4Ω 6A 2Ω A B 4Ω 48 V i (Amp) 10 8 6 4 2 12 Ω 12 Ω Connect a voltage source between A and B. IIT Bombay . Patil. VTh = 60 V RTh = 7 Ω 7Ω 60 V M.5714 A RTh = Vsc /Isc = 7 Ω A B 12 Ω Voc = intercept on the v-axis. 4Ω 6A 2Ω i v A B 0 0 20 40 v (Volt) 60 4Ω 48 V 12 Ω Voc = 60 V. Plot i versus v. Isc = intercept on the i-axis.

Norton equivalent circuit RTh A VTh B .

Norton equivalent circuit RTh A A VTh B IN RN B .

.Norton equivalent circuit RTh A A VTh B IN RN B * Consider the open circuit case.

Norton equivalent circuit RTh A A VTh B IN RN B * Consider the open circuit case. Thevenin circuit: VAB = VTh . .

Norton circuit: VAB = IN RN . Thevenin circuit: VAB = VTh .Norton equivalent circuit RTh A A VTh B IN RN B * Consider the open circuit case. .

. ⇒ VTh = IN RN . Thevenin circuit: VAB = VTh .Norton equivalent circuit RTh A A VTh B IN RN B * Consider the open circuit case. Norton circuit: VAB = IN RN .

Norton circuit: VAB = IN RN . Thevenin circuit: VAB = VTh . * Consider the short circuit case. ⇒ VTh = IN RN . .Norton equivalent circuit RTh A A RTh A A RN VTh B IN RN B VTh Isc IN B Isc B * Consider the open circuit case.

Thevenin circuit: VAB = VTh . Thevenin circuit: Isc = VTh /RTh . Norton circuit: VAB = IN RN . * Consider the short circuit case.Norton equivalent circuit RTh A A RTh A A RN VTh B IN RN B VTh Isc IN B Isc B * Consider the open circuit case. ⇒ VTh = IN RN . .

Norton equivalent circuit RTh A A RTh A A RN VTh B IN RN B VTh Isc IN B Isc B * Consider the open circuit case. ⇒ VTh = IN RN . * Consider the short circuit case. Thevenin circuit: Isc = VTh /RTh . Norton circuit: VAB = IN RN . Norton circuit: Isc = IN . Thevenin circuit: VAB = VTh . .

IIT Bombay . ⇒ VTh = IN RN . Thevenin circuit: VAB = VTh . Norton circuit: VAB = IN RN .Norton equivalent circuit RTh A A RTh A A RN VTh B IN RN B VTh Isc IN B Isc B * Consider the open circuit case. ⇒ RTh = RN . Thevenin circuit: Isc = VTh /RTh . Norton circuit: Isc = IN . * Consider the short circuit case. B. M. Patil.

Example 5Ω 20 V i 1A 10 Ω .

Example A 5Ω 20 V B i 1A 10 Ω .

Example A 5Ω 20 V B i 1A RN = 5 Ω IN = 20 V = 4A 5Ω 10 Ω .

Example A 5Ω 20 V B A i 1A RN = 5 Ω IN = 20 V = 4A 5Ω 10 Ω 4A 5Ω B i 1A 10 Ω .

Example A 5Ω 20 V B A i 1A RN = 5 Ω IN = 20 V = 4A 5Ω 3A 5Ω i 10 Ω 10 Ω 4A 5Ω B i 1A 10 Ω .

Patil.Example A 5Ω 20 V B A i 1A RN = 5 Ω IN = 20 V = 4A 5Ω 3A 5Ω i 10 Ω 10 Ω 4A 5Ω B i 1A i = 3A × = 1A 5 5 + 10 10 Ω M. B. IIT Bombay .

Example A 5Ω 20 V B A i 1A RN = 5 Ω IN = 20 V = 4A 5Ω 3A 5Ω i 10 Ω 10 Ω 4A 5Ω B i 1A i = 3A × = 1A 5 5 + 10 10 Ω Home work: * Find i by superposition and compare. M. B. IIT Bombay . Patil.

B.Example A 5Ω 20 V B A i 1A RN = 5 Ω IN = 20 V = 4A 5Ω 3A 5Ω i 10 Ω 10 Ω 4A 5Ω B i 1A i = 3A × = 1A 5 5 + 10 10 Ω Home work: * Find i by superposition and compare. IIT Bombay . M. * Compute the power absorbed by each element and verify that P Pi = 0 . Patil.

BM6722DOC

H2510DOC

BM2550

BM2750

H3508DOC

D2630

B1250

G5810

M380

H7138

H2120

E5375

H2708DOC

R3140

BM6722DOC

B5570

E4065DOC

D1190

BE9861

H1028DOC

pulsar_ex_7_40_tech

Hazemeyer Tra

الحج و العمرة

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Structure_de_la_matière___Atomes_liaisons_chimi

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