EDC Lab manual

PART-A 1. Identification, Specification & Testing of R, L, C Components Aim: - To identify and test different components. Apparatus: S.No 1 2 3 4 5 Apparatus Resistors Capacitors Inductors Switches Type Different types Different types Different types Different types Requirement 1Each 1Each 1Each 1Each 1Each

Bread Board Different types

Theory:Resistors:Opposition to flow of current is called resistance. The elements having resistance are called resistors. They are of two types: 1. Fixed resistor 2. Variable resistor

Fixed resistor

Variable resistor

Resistor Color Code:The resistance value and tolerance of carbon resistor is usually indicated by color coding. Color bands are printed on insulating body. They consist of four color bands or 5 color bands & they are read from left to right.

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EDC Lab manual
A typical resistor with color bands is shown in figure

The above resistor has 4 color bands. The first band represents first digit The second band represent second digit The third band represents multiplier (this gives the no. of zeros after the 2 digits) The 4th band represents tolerance in %

The color codes: First digit for Second Color the 1st band digit for the 2nd band Black Brown Red Orange Yellow Green Blue Violet Gray White Gold Silver No color 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 10^0 10^1 10^2 10^3 10^4 10^5 10^6 10^7 10^8 10^9 10^-1 10^-2 ±1% ±2% ±3% ±5% ±10% ±20% Page 2 Multiplier digit Resistance tolerance for the 3rd band

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EDC Lab manual
If third band is gold the first two digit are multiplied by 10^-1 If the third band is silver the first two digits are multiplied by 10^-2 If the 4th band is gold the tolerance is ±5% If the 4th band is silver is the tolerance is ±10% If the 4th band is no color the tolerance is ±20% The numerical value associated with each color

B black 0

B brown 1

R red 2

O orange 3

Y Yellow 4

G green 5

B blue 6

V violet 7

G gray 8

W White 9

Examples:The resistor has a color band sequence green, blue, brown and silver identify the resistance value.

1st Band 1st digit 5

2nd band 2nd digit 6

3rd band multiplier 10^1

4th band tolerance ±10%

The resistance value=56x10^1±10% =560Ω±10% Therefore the resistance should be within the range of 555Ω to 565Ω

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Dielectric strength 9. Dielectric constant 8. Variable capacitor Fixed capacitor Variable capacitor Capacitor value identification:Most capacitors indicated with XYZK/M volts V. Leakage resistance 6. Frequency range 7. Eg: A capacitors indicated with 105k330 is identified as 10×105pF±10% with a working voltage of 330 V. Power factor 10. Stability Sasi Institute of Technology & Engineering Page 4 . where XYZ stands for the capacitance. They are three types 1.EDC Lab manual Capacitors:Capacitors are used to store energy in the form of electric field. Capacitor acts as open circuit for DC and acts as short circuit for AC. Voltage rating 4. Temperature coefficient 5. Disk capacitor 2. Similarly 103M100V = 10×103pF ±10% =0. Tolerance 3. K and M indicates the tolerance ± 10% and ± 20% and working voltage. Value of capacitance 2. Fixed capacitor 3.01μF Capacitor Specifications:1.

Capacitance 4. An inductor can be tested with continuity test. Current Rating 8. Power Losses 7. Resistance 3.EDC Lab manual Inductors:- Fixed inductor Variable inductor Inductance:The inductance is defined as the ability of an inductor which opposes the change in current. Quality Factor 6. It is denoted by the letter “L” and its unit is Henry (H). Frequency value 5. Electro Magnetic Radiations Sasi Institute of Technology & Engineering Page 5 . Inductance value 2. Inductor Specifications:1.

Sasi Institute of Technology & Engineering Page 6 . The name originates from the fact that early electrical circuits were actually wired on wood bread boards. It is used to connect an electronic circuit temporarily for testing and experimentation.EDC Lab manual Switches:SPST: Single pole single through SPDT: Single pole double through DPST: Double pole single through DPDT: Double pole double through SPST SPDT DPST DPDT Bread Board:An experimental version of a circuit generally layout on a flat board and assembled with temporary connections so that circuit elements may be easily substituted or changed. A typical bread board is shown in fig.

What is Bread board and what is its use? 9. Define passive components? 4. What are different types of resistors and list their specifications and applications? 3. What are the active components and mention active components? 11. Viva Questions:1. How can we identify the Transistors? Write the circuit symbol for different transistors? Sasi Institute of Technology & Engineering Page 7 . What are the specifications of 1N4007? 13.EDC Lab manual Procedure:Different components can be identified by using their different symbols. Define Inductance? What is the necessity of inductor? List different types of inductors? 7. What are the types of capacitors and list their specifications and applications? 6. What is transistor and list various types of transistors? 14. Define resistance? 2. What is a Diode and list different types of Diodes? 12. Define Switch and list various types of Switches? 8. Result:Components should be identified by using their symbols. Define capacitor? 5. What are the types of boards are used in soldering? 10.

To identify and test the active devices.No Apparatus 1 2 3 4 5 6 7 8 9 10 11 12 PN diode JFET MOSFET Power transistor LED LCD Type Requirement ------1 Each 1 Each 1 Each 1 Each 1 Each 1 Each 1 Each 1 Each 1 Each 1 Each 1 Each 1 Each Opto electronic device -SCR UJT DIAC TRIAC Linear and Digital ICs ------ Theory: Semiconductors:Semiconductors are partial conductors which conduct electricity partially through them. The conductivity of a semiconductor lies in a range of 10^5 and 10^-4 siemens/meter. Sasi Institute of Technology & Engineering Page 8 . Identification. They play major role in electronics. specifications and testing of active devices Aim: . The conductivity of a semiconductor lies between that of a conductor and an insulator.EDC Lab manual 2. 1 P-N Junction diode 2. These free electrons constitute of current under the influence of applied electric field. Apparatus: S. As gap is every small valence electron acquire required energy to go in to the conduction band. Zener diode Semiconductor is a material for which the width of the forbidden gap between the valence band conduction band is very small.

They are 1. Using the normal resistance ranges any of them will usually show open for any semiconductor junction since the meter does not apply enough voltage to reach the value of the forward drop. It should not read near 0 ohms (shorted) or open in both directions. Using this. Note.EDC Lab manual Diodes:Diodes have more priority now a days. Sasi Institute of Technology & Engineering Page 9 . So. A germanium diode will result in a higher scale reading (lower resistance) due to its lower voltage drop. They are mostly used in electronic systems. perhaps . For a germanium diode. any reading of this sort would be an indication of a bad device but the opposite is not guaranteed. however.4 V or so in the forward direction. there will usually be a diode test mode.8 V in the forward direction and open in reverse. use the low ohms scale. 2. it will be lower. On a (digital) DMM.5 to .2 to . A regular signal diode or rectifier should read a low resistance (typically 2/3 scale or a couple of hundred ohms) in the forward direction and infinite (nearly) resistance in the reverse direction. that a defective diode may indeed indicate resistances lower than infinity especially on the highest ohms range. a silicon diode should read between . P-N Junction diode(rectifier) Zener diode (voltage regulator) Circuit Symbols:- P-N Junction diode Zener diode Diode testing: On an (analog) VOM.

the other on the emitter. Connect the red meter lead to the emitter. A good PNP transistor will read OPEN. Reverse the meter leads and repeat the test. Place one meter lead on the collector.9v. Leave the black meter lead on the base and move the red lead to the collector. This time. FET: Field effect transistors again 2 types P-Channel FET N-Cannel FET 3. A good NPN transistor will read a Junction Drop voltage of between 0. Reverse the Sasi Institute of Technology & Engineering Page 10 .9v.45v and 0. Connect the black meter lead to the emitter.EDC Lab manual Transistors:They are of 4 types 1. The reading should be the same as the previous test. The meter should read OPEN. The reading should be the same as the previous test. 4. A good NPN transistor will read OPEN. Leave the red meter lead on the base and move the black lead to the collector. Connect the red meter lead to the base of the transistor. Depletion MOSFET: These are again classified into two types N-Channel MOSFET P-Channel MOSFET b. A good PNP transistor will read a Junction Drop voltage of between 0. Enhancement MOSFET: These are again classified into two types N-Channel MOSFET P-Channel MOSFET Testing of a transistor: Set the DMM to the diode test. JFET: Junction field effect transistors they similar to FET.45v and 0. connect the black meter lead to the base of the transistor. BJT: Bipolar junction transistor again 2 types NPN PNP 2. MOSFET: Metal oxide semiconductor field effect transistor These are of two types a.

 For DIACS and there is no gate terminal . The anode to cathode and gate to anode junctions should read open in both directions. The meter should read OPEN. MT1 to MT2 and gate to MT2 junctions should read open in both directions. This is the same for both NPN and PNP transistors.EDC Lab manual meter leads. Testing of SCR and TRIAC:  For SCRs. Sasi Institute of Technology & Engineering Page 11 . the gate to cathode should be tested like a diode on a multimeter.resistance should be infinite in both directions.  For TRIACS. the gate to main terminal 1 (MT1) should test like a diode junction in both directions.

No Apparatus 1 2 3 4 Theory: Soldering is a process for joining thin metal parts or wires with the aid of molten metal. A flux is used to remove this oxide from the area to be soldered. Wave soldering Solder Alloys:Tin lead. Soldering Practice.EDC Lab manual 3. Apparatus: S. Dip soldering 4. the connection could be Types of soldering: 1. Tin Zinc Soldering is an alloying process between two metals with which it divides some of the metal. a substance called flux is used. which means rotation of welding by preventing from oxidation? (iii)Assist in the transfer of heat to metal being soldered. Tin silver. (i)Remove the film of tarnish from the metal surface to be soldered. it is advisable to prefer Sn63/pb 37 for high quality inter connection because Flux: . Tin lead antimony. Iron soldering 2.Simple Circuits Using Active and Passive Components Aim: . when two metals are joined behave like a single solid metal by joining disconnected (or) physically attaching to each other. Soldering Of Solder Alloy:Even though the alloy Sb 60/pb 60 is cheaper and still finds a good market. with which it comes into contact. Mass soldering 3. Flux Various Components PCB Type 100 w ------Requirement 1 ----1 . tin antimony. (ii)To prevent the base metals from being re-exposed to oxygen in the air to be avoiding oxidation during heating. A soldering connection ensures metal continuity on the other hand. where the melting temperature is situated below that of material joined and where by the surface of part are coated without turn in becoming molten.To practice soldering of simple circuits using active and passive components. Flux has below three purposes.To aid the soldering process. Sasi Institute of Technology & Engineering Page 12 Soldering Iron Lead.

so that the stress on the component lead junction is minimized. Partial dissolution of some metals in the connection by solder.EDC Lab manual The soldering process involves 1. 3. The board to be assembled is held in a suitable frame and the components are kept in trays or bins. In this process of removal and replacement of electronic devices. 2. Melting of the solder which makes the higher flux and brings the impurities suspended in it to the surface. Procedure: The electronic components are carefully assembled as per the circuit design. The assembling of electronic components on a PCB involves the following steps. Manual Assembly of Components: The components to be assembled on a PCB are arranged conveniently. The Sasi Institute of Technology & Engineering Page 13 . Testing of component replacing of the component found defective. 4. Components dissipating more heat should be separated from the board surface. Suitable bending tools may be used for perfect bending. The lead bending radius should be approximately two times the diameter of the lead. IC‟s etc. It is necessary to remove a component from the printed circuit board and carryout the requisite tests on it. is determined at the time of PCB design. Leads are bent and assembled on board in such a way that the polarity symbols are seen after mounting the component. Component Mounting: Components are mounted on one side of the board and leads are soldered on the other side of the board. Components Lead Preparation: Components such as capacitors have leads and are bent carefully to mount on PCB. The bent leads should fit into the holes perpendicular to the board. capacitors. Cooling and fusing solder with the metal quest often for locating a problem in the functioning of the circuit. The process of repair usually involves disassembly of a particular component. The components are oriented both horizontally in vertically but uniformity in reading directions must be maintained. The uniformity in orientation of diodes. the process of soldering is employed. Specific gravity of Sn63/ pb 37 is also lesser than that of Sn60/p 40 that makes the equipment lighter. transistors.

Hence. Inspection and Testing: The components assembled on the PCB are tested before they are soldered to the board. The performance and reliability of the solder joints are best if lead cutting is carried before soldering so that the lead end gets protected. An assembly inspector is located at the end of the assembly line for inspection. usually chemicals such as acetone and alcohols are used. The contaminants include flux and chips of plastics. PCB Cleaning: The soldering PCB may have contaminants that could cause trouble during the functioning of the circuit. The work is divided depending on number of parts to be assembled and the size of each part. Sasi Institute of Technology & Engineering Page 14 . The inspection includes verifying component polarity. if required must be kept in the easy reach of the worker. It is a practice to have the assembled boards checked prior to soldering. The excess lead is cut after soldering. metals. the PCB must be cleaned before use.EDC Lab manual insertion tools. orientation. A wide range of cleaning media is available. and other materials. this is not practiced in hand soldering. Result: Thus the soldering of active and passive components was practiced. The number of different components for one worker should be more than 20. However. value and physical mounting. Soldering and Lead Cutting: The components are soldered on the PCB.

Apparatus: . Holes are drilled at appropriate points on the track so that each component can be inserted from the non-copper side of the board.EDC Lab manual 4.To study the single layer and multi layer PCBs. Sasi Institute of Technology & Engineering Page 15 . Single layer and Multi layer PCBs Aim: . as shown in figure . ending with military machines and space ships. Multilayer PCB It is a very important hardware element and it is almost certain you will find one in a wide array of devices starting from a mobile phone and TV. Basically. In modern day electronics space is one of the most important factors. multilayer PCB saves space because it can hold electronic components on both sides. Single Layer PCB A single-sided PCB contains copper tracks on one side of the board only. A PCB is an abbreviation of printed circuit board. It is a board consisting of printed circuit of electronic equipment on it and is used for the designing of circuit. Connection is ensured using thin conductive copper traces printed on a board made of non-conductive material. Printed circuit boards are divided into single layer and multilayer PCB. It is hardware used in electronics and many other industries to connect the electronic components of a scheme and mechanically support them.Each pin is then soldered to the copper track. as shown in figure.PCB Theory:The design of PCB is considered as the last step in electronic design as well as the major step in the production of PCB.

It provides all the information about the circuit. Art work 3. which has to drawn on PCB. Pattern transfer (photo/screen printing) 5. Spray etching Laminate etching Splash etching (Configured force by rotating in centre).EDC Lab manual In multi-layer PCB's. Types of copper plating:      Copper plating Nickel plating Gold plating Tin plating Tin lead plating Etching means to draw on board by the action of acid. Etching 7. Film master production 4. especially by coating the surface with wax and letting the acid cast into the lines or area laid bar with needle. Layout planning 2. These layers are laminated under heat and high pressure. Mechanical matching operations The layout is the work done before the art work in the PCB. each side contains several Layers of track patterns which are insulated from one another. The double sided Sasi Institute of Technology & Engineering Page 16 . Generally. A multi-layer PCB is shown in figure The steps for designing PCB are 1. Plasting 6. it is done with gold. Protection of copper tracks is very much essential Plasting is such processes which forms a thin layer over copper tracks and protect them.

Single Layer and Multilayer PCB‟s are studied Sasi Institute of Technology & Engineering Page 17 . contacts are made by soldering the component lead on both sides of board when required and jumper wires are added. In no plated through holes.EDC Lab manual PCB‟s are made with or without plated through holes. There should be minimum solder joints on the component sides. Two types: (i) Plated through holes (ii) No plated through holes. In plated through holes. the total no. Result: . Fabrication of plated through holes type boards is very expensive. Replacing of such components is different. of holes is kept minimum for economy and reliability.

EDC Lab manual 5. Overload protection circuit of constant self restoring type is provided to prevent the unit as well as the circuit under use. The current limit has good stability. These are useful for high regulation laboratory power supplies. Sasi Institute of Technology & Engineering Page 18 . function generator. Function Generator. Apparatus: S. Outputs are protected against overload and short circuit damages.To study and operation of multimeters. The power supplies are specially designed and developed for well regulated DC output. particularly suitable for experimental setup and circuit development in R&D.No Apparatus 1 2 3 Multimeter Function generator Regulated power supply Type Analog and Digital 1MHz 0-30V Requirement 1Each 1Each 1Each Theory:Regulated Power Supply:Power supplies provided by a regulated DC voltage facilities fine and coarse adjustments and monitoring facilities for voltage and current. They will work in constant voltage and current mode depending on current limit and output load. Regulated Power Supplies Aim: . load and line regulations. Study and Operation of Multimeters. They are available in single and dual channel models with different voltage and current capacities. and regulated power supply.

5%. triangular and saw tooth shapes. frequency modulation and amplitude modulation. Square wave duty 49% to 51%. square. These waveforms can be either repetitive or singleshot (which requires an internal or external trigger source). triangles. cycle 8 Differential linearity 0. Other important features of the function generator are continuous tuning over wide bands with max-min frequency ratios of 10:1 or more.1 HZ to 100 HZ harmonics Modulation showed down fundamental for 100KHz to 1MHz 4 5 6 7 Offset Frequency range Output impedance Continuously variable 10V 0. a flat output amplitude and modulation capabilities like frequency sweeping. TTL square waves 0-20V for all the functions Less than 1% from 0. S.No 1 2 3 Designation Wave form Amplitude Sine distortion Specifications Sine. squares.1 HZ to 1Μhz in ranges 600 ohms. a wide range of frequencies from a few Hz to a few MHz.EDC Lab manual Function Generator:A different types of electrical waveforms over a wide range of frequencies.5% Sasi Institute of Technology & Engineering Page 19 . Some of the most common Function Generator is usually a piece of electronic test equipment or software used to generate waveforms produced by the function generator are the sine.

It is continuously variable for ±5V.C offset controls.Multiplying the setting of this dial to the frequency range selected gives the output frequency of the wave forms at the 600ohms. Function selectors:. The frequency is determined by the range selected and the setting of frequency dial. Offset Control:-Control the DC offset of the output. Fine frequency dial:. which applies for all functions. It is used to measure the d.EDC Lab manual Range selectors:. The change in frequency is directly proportional to input voltage. A digital multimeters essentially consists of an analog to digital converters.Selected desired output wave form which appears at 600Ω output. ±100V. The liquid crystal display system is generally employed. which appears at 600ohms.A TTL square wave is available at this jack. TTL output:. Actually all the functions in DMM depend on the voltage measurements by the converter and comparator circuits Sasi Institute of Technology & Engineering Page 20 . VCO input:. It converters analog values in the input to an equivalent binary forms.c voltages and resistance values.Decode frequency by multiplying the range selected with the frequency indicated by dial gives the output frequency. This output is independent of amplitude and D.c and a. Amplitude Control:-Control the amplitude of the output signal. Multimeter:Digital Multimeter:A Multimeter is a versatile instrument and is also called Volt-Ohm-Milliammeter (VOM).An external input will vary the output frequency. These values are processed by digital circuits to be shown on the visual display with decimal values.

and Regulated Power Supply are studied Sasi Institute of Technology & Engineering Page 21 . function generator.EDC Lab manual Result:.The operation of multimeters.

O The main parts are 1. Electron gun: .R. AC-DC Ground:-It selects coupling of AC-DC ground signal to vertical amplifier. time period and frequency for given waveforms and also find phase by using the Lissajous figures. The heart of C. Focus: It controls sharpness of trace a slight adjustment of focus is done after changing intensity of trace.To observe front panel control knobs and to find amplitude.R.R.It deflects the electron both in horizontal and vertical plan. Front Panel:On-Power: Toggle switch for switching on power. Sasi Institute of Technology & Engineering Page 22 .C. When beam of electrons are incident on it the other side of tube is coated with phosphorus material.It is used to produce sharply focused beam of electron accelerated to very high velocity. connecting wires.O is and the rest is the circuitry to operate C. Theory: . Square:-This provides square wave 2v (p-p) amplitude and enables to check y calibration of scope. 3. function generator.The screen which produces. spot of visible light. 2. Study and Operation of CRO Aim: . Apparatus: .O is a versatile instrument used for display of wave forms and is a fast x-y plotter.EDC Lab manual 6. X-Mag: It expands length of time base from 1-5 times continuously and to maximum time base to 40 ns/cm.Cathode Ray Oscilloscope. Intensity: Controls trace intensity from zero to maximum. Deflection system: . Florescent screen: .

It allows time base range to be extended.It is control on panel electrostatic ally in accordance with waveforms to be displayed.It selects mode of triggering. Sign Selector: . Vernier: .EDC Lab manual Sawtooth Waveform:. of vertical divisions × Volts/div.This controls or selects sweep speeds. Y-Input: .This control the fine adjustments associated with time base sweep. Ext SYN: it connects external signal to trigger circuit for synchronization.It connects input signal to vertical amplifier through AC-DC ground coupling switch Calibration: .15mv-150mv dc signal depending on position selection is applied to vertical amplifier.It selects different options of INT/EXT.It connects external signal to horizontal amplifier. Sasi Institute of Technology & Engineering Page 23 .Switch adjusts sensitivity. Time Base: . Observations:Amplitude = no. DC Balance: . Stab: .Present on panel Exit CAD: . Horizontal Section:X-Position: This control enables movement of display along x-axis.This provides saw tooth wave form output coincident to sweep speed with an output of saw tooth wave (p-p) Vertical Section (y position): -This enables movement of display along y-axis. Triggering Level:. NORM/TO. Horizontal Input: . Volts/Cm: .

sin -1(Y1/Y2) Page 24 . Time period taken on horizontal section(x) Model Wave Forms:- Measurement of Phase:- Y2 Y1 x1 Y2 Y1 X2  = sin -1 (Y1/Y2) = sin -1 (X1/X2) Applications of CRO:1. Measurement of current 2. Measurement of power Sasi Institute of Technology & Engineering  = 180. Frequency=1/T Amplitude taken on vertical section (y). of horizontal divisions× Time/div. Measurement of voltage 3.EDC Lab manual Time period = no.

To trace visual display of sine waves. Measurement of phase angle 6. amplitude and phase. Measurement of frequency 5. To see transistor curves 7. Sasi Institute of Technology & Engineering Page 25 . 8. frequency.EDC Lab manual 4. To trace and measuring signals of RF. Result: -To calculated the given waveform. IF and AF in radio and TV.

EDC Lab manual
PART-B 1. Frequency Measurement using Lissajous Figures Aim:-a) To measure phase difference between two waveforms using CRO. b) To measure an unknown frequency from Lissajous figures using CRO.

Apparatus:-

S.No 1 2 3 4 5 6

Apparatus CRO Function generators Bread Board Resistance Capacitance Connecting wires

Type 20MHz 1MHz --1KΩ 0.1μF ---

Requirement 1 2 1 1 1 ---

Theory: (a) Measurement of Phase: Since sine waves are based on circular motion they illustrate phase difference very well. One complete cycle of a sine wave relates to one complete circle and therefore to 360°.This means that the phase angle of a sine wave can be represented using degrees. Figure shows how a complete sine wave cycle relates directly to 360°.

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EDC Lab manual
A Complete Sine wave

Phase shift describes the timing difference between two otherwise similar signals. The e x a m p l e i n f i g u r e b e l o w s h o w s t w o s i m i l a r s i n e w a v e s o f t h e s a m e f r e q u e n c y . „ T ‟ denotes the period of one complete cycle (10 cm on screen), and„t‟ signifies the time between the zero transition point of both signals (3 cm on screen).

Phase Shift Example

The phase difference in degrees is calculated from:

( b ) Measurement of Frequency using CRO: A simple method of determining the frequency of a signal is to estimate its periodic time from the trace on the screen of a CRT. However this method has limited accuracy, and should only be used where other methods are not available. To calculate the frequency of the observed signal, one has to measure the period, i.e. the time taken for 1 complete cycle, using the calibrated sweep scale. The period could be calculated by T = (no. of squares in cm) x ( selected Time/cm scale ) Once the period T is known, the frequency is given by f (Hz)= 1/T(sec)

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EDC Lab manual
Using Lissajous Patterns: If a well calibrated CRO time base is not available, a signal generator can be used to measure the frequency of an unknown sinusoidal signal. It is connected to the vertical channel (or horizontal) and the calibrated signal source is fed to the horizontal channel (or vertical).The frequency of the signal generator is adjusted so that a steady Lissajous pattern is obtained. The frequency relationship between the horizontal and vertical inputs is given by

Fv/Fh = No. of tangencies (vertical)/ No. of tangencies (horizontal) Precautions: 1. Connections should be tight. 2. There should be no short circuiting in the circuit. Procedure: 1. Switch on the CRO. Rotate the intensity control clockwise. After some time you will see either a bright spot or a line on screen. If you see none, adjust X-POS and Y-POS controls to get the display in the centre of the screen. 2. Operate the INTEN and FOCUS controls and observe the effect on the spot (or line). Adjust them suitably. 3 . To measure the voltage of the signal generator, adjust the vertical amplifier sensitivity suitably, so as to get a sufficiently large display. Read on the calibrated graticule, the vertical length of the display. This corresponds to the peak -to-peak value of the signal. Multiply this length by the sensitivity (in V/cm). Dividing this result by 2√2 gives the rms value of the signal voltage. Repeat the measurement procedure for two or three other values of the output signal voltages. 4. For measuring the frequency of the signal feed the unknown signal (taken from the signal generator) to the Y-Input terminals. Take a standard signal generator, and connect its output to the X-Input terminals of the CRO. Put the Time-Base or Horizontal amplifier knob at EXT position. Change the frequency of the standard signal generator till you get a stable Lissajous pattern. For the various frequency ratios, fv/fh, the Lissajous patterns are shown in Fig. The unknown frequency can thus be determined using the relationship:

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of tangencies (horizontal) Where f v is the unknown frequency 5 . of Horizontal Tangencies Pattern obtained Unknown frequency= f h/ fv . Measure the lengths YI and Y 2 (or X 1 and X 2). of vertical tangencies 1 2 3 Sasi Institute of Technology & Engineering Page 29 No.EDC Lab manual fv = No. Adjust the vertical and horizontal amplifier gains (sensitivities) so as to get an ellipse of suitable size. of tangencies (vertical) f h = No. Sin Ө = Y1/Y2= X1/X2 Observations: Known S. T o m e a s u r e p h a s e s h i f t i n t r o d u c e d b y a n RC phase-shift network. Put the Time-Base control at EXT position.No frequency No. as shown in Fig. Y1 = Y2 = cm cm Calculate the phase difference between the two waves using the relation. make connections as shown in Fig.

Measured frequency is __________. Sasi Institute of Technology & Engineering Page 30 . Measured phase angle is _________.EDC Lab manual Results: 1. 2.

The reverse bias current is due to minority charge carriers.No Apparatus 1 2 P-N Diode Regulated Power supply Type 1N4007 0-30V 1KΩ 0-100mA/µA 0-20 V Requirement 1 1 3 4 5 Resistor Ammeters Voltmeter 1 1 Each 1 6 7 Theory:- Bread board Connecting wires ----- 1 --- A p-n junction diode conducts only in one direction. Therefore. The potential barrier is reduced and the diode is in the forward biased condition. circuit is open and the potential barrier does not allow the current to flow. Sasi Institute of Technology & Engineering Page 31 . The current increases with increasing forward voltage. static.type (cathode) is connected to –ve terminal of the supply voltage.EDC Lab manual 2. Apparatus:S. When N-type (cathode) is connected to +ve terminal and P-type (Anode) is connected –ve terminal of the supply voltage is known as reverse bias and the potential barrier across the junction increases. The diode is said to be in OFF state. The V-I characteristics of the diode is a curve between voltage across the diode and current through the diode. the circuit current is zero. the junction resistance becomes very high and a very small current (reverse saturation current) flows in the circuit. At some forward voltage. dynamic and reverse bias resistance. When P-type (Anode is connected to +ve terminal and n.(1)To plot the V-I characteristics of a P-N Junction diode (2) To find the cut-in voltage. Therefore. P-N Junction diode characteristics Aim:. the potential barrier altogether eliminated and current starts flowing through the diode and also in the circuit. The diode is said to be in ON state. it is known as forward bias. When external voltage is zero.

EDC Lab manual Circuit Diagram:- Forward Bias: Reverse Bias:- Model Graph:- Sasi Institute of Technology & Engineering Page 32 .

7. 6. 4. 2.1V up to 1V and note down the corresponding forward current. 2. Increase the forward voltage in Steps of 0. 5. Keep the current control knob at maximum and voltage control knob at minimum position before turning ON the power supply. Identify cut-in voltage and calculate static resistance from the graph. Procedure:Forward Bias:1. There should not be any loose connections.For forward bias.EDC Lab manual Precautions:1. Repeat the step 4 for different values of VF and record the corresponding IF. Connections are made as per the circuit diagram. Readings should be taken without parallax errors.No Forward Voltage (Volts) 1 2 3 4 5 6 7 8 9 10 Forward Current (mA) Sasi Institute of Technology & Engineering Page 33 . Observations:- S. 3. the RPS +ve is connected to the anode of the diode and –ve is connected to the cathode of the diode. Plot the graph VF vs IF.

6. Plot the graph VR vs IR.EDC Lab manual Reverse Bias:1. Connections are made as per the circuit diagram. For reverse bias. Calculate reverse resistance Observations:- S.No 1 2 3 4 5 6 7 8 9 10 Calculations:Cut in voltage = Static resistance = V/I = Dynamic resistance =∆V/∆I = Reverse voltage (Volts) Reverse current (μA) Result: - Sasi Institute of Technology & Engineering Page 34 . Switch ON the power supply and increase the reverse voltage in steps of 1V upto5V and note down the corresponding reverse current. the RPS +ve is connected to the cathode of the diode and –ve is connected to the anode of the diode. Keep the current control knob at maximum and voltage control knob at minimum position before turning ON the power supply 3. 2. 4. 5.

.EDC Lab manual 3.No 1 2 3 4 5 6 7 Apparatus Zener diode Regulated Power supply Resistor Ammeters Voltmeter Bread board Connecting wires Type BZX5V1 0-30V 1KΩ 0-100mA/µA 0-20 V ----Requirement 1 1 1 1 Each 1 1 --- Theory:A Zener diode is heavily doped p-n junction diode. we connect a resistor in series with Zener diode. High current through the diode can permanently damage the device To avoid high current.a) To plot the V-I characteristics of a Zener diode in the forward and reverse bias b) To verify the Zener as a regulator. This voltage is called Break down Voltage. at a particular voltage it starts conducting heavily. specially made to operate in the break down region. Sasi Institute of Technology & Engineering Page 35 . Apparatus: S. But if the reverse bias is increased. A p-n junction diode normally does not conduct when reverse biased.e. i. it has very low dynamic resistance. Once the diode starts conducting it maintains almost constant voltage across the terminals whatever may be the current through it. Zener diode characteristics and Zener as a regulator Aim: . The terminals of the Zener diode should be properly identified 2. Precautions:1. It is used in voltage regulators. Parallax error should be avoided while taking the readings.

Sasi Institute of Technology & Engineering Page 36 . Increase the forward voltage in steps of 0. 5. 3. Keep the current control knob at maximum and voltage control knob at minimum position before turning ON the regulated power supply. Repeat the step 3 for different values of forward voltage and tabulate the Iz values. Identify the cut-in voltage and calculate the static resistance and dynamic resistance from the graph. 4. Plot the graph VF vs Iz 6. 2. Connections are made as per the circuit diagram.1V and note down the corresponding forward current values.EDC Lab manual Circuit Diagram:Forward Bias:- Reverse Bias:- Procedure:Forward bias:1.

Sasi Institute of Technology & Engineering Page 37 . 5. 6.5V until breakdown occurs and note down the corresponding Zener current values. 4. 2.No Forward voltage (volts) Forward current (mA) 1 2 3 4 5 6 7 8 9 10 Reverse bias:1. Plot the graph between Zener current (IR) and Zener voltage (VR). Increase the reverse voltage in steps of 0. 3. Keep the current control knob at maximum and voltage control knob at minimum position before turning ON the regulated power supply. Identify the reverse saturation current and breakdown voltage Vz of the Zener diode. Repeat the step 3 for different values of reverse voltage and tabulate the readings. Connections are made as per the circuit diagram.EDC Lab manual Observations:S.

EDC Lab manual Observations:Reverse Bias:- S.No Reverse voltage(volts) 1 2 3 4 5 6 7 8 9 10 Reverse current(mA) Model Graph:- Sasi Institute of Technology & Engineering Page 38 .

EDC Lab manual Calculations (forward and reverse bias):Static resistance (forward bias) = V/I= Dynamic resistance (forward bias) = ∆V/∆I= (V2-V1)/ (I2-I1) = Static resistance (reverse bias) = Dynamic resistance (reverse bias) = Result:- Sasi Institute of Technology & Engineering Page 39 .

there will be less chance for recombination within the base region. VEB=f1 (VCB. the E-B junction is forward biased and C-B junction is reverse biased. In CB configuration. Transistor CB characteristics (Input and Output) & h-Parameter Calculations Aim: . Then. IE is +ve. Apparatus:- S. the base is common to both input and output. IE) and IC=f2 (VCB. So.EDC Lab manual 4. IC is –ve and IB is –ve. α= ∆IC/ ∆IE Output resistance is the ratio of change of collector emitter voltage ΔVCE. base. The current amplification factor of CB configuration is given by. With increase of charge gradient with in the base region. Sasi Institute of Technology & Engineering Page 40 .To plot the input and output characteristics of a transistor connected in common base configuration. To calculate the h parameters of the given transistor.1A 0-20V 0-100mA 1KΩ ----- Requirement 1 1 1 1 2 1 --- Theory:A transistor is a three terminal active device. IB) With an increasing the reverse collector voltage. the space-charge width at the output junction increases and the effective base width „W‟ decreases. In CB configuration. to change in collector current ΔIC with constant IB. The terminals are emitter.1. collector. 2.No 1 2 3 4 5 6 7 Apparatus Transistor Regulated power supply Voltmeter Ammeters Resistor Bread board Connecting wires Type BC 107 0-30V. For normal operation. This phenomenon is known as “Early effect”. the current of minority carriers injected across the emitter junction increases.

Connections are made as per the circuit diagram. 3. 4. 3. Repeat the above step keeping VCB at 1V. Sasi Institute of Technology & Engineering Page 41 . 2. 2. 2. Vary the collector to base voltage VCB from -0. Set IE to 1mA by varying VEB and keep it constant. Output Characteristics:1. A graph is drawn between VEB and IE for constant VCB. Set VCB to 0V. Circuit Diagram:- Procedure:Input Characteristics:1. Meters should be connected properly according to their polarities. The supply voltages should not exceed the rating of the transistor.1V and later in steps of 1V up to 10V and note down the collector current IC.EDC Lab manual Input Impedance hie = ΔVEB / ΔIE at VCB constant Output impedance hoe = ΔVCB / ΔIC at IE constant Reverse Transfer Voltage Gain hre = ΔVEB / ΔVCB at IE constant Forward Transfer Current Gain hfe = ΔIC / ΔIE at constant VCB Precautions:1. 2V. vary the input voltage VEB and note down the emitter current IE. Connections are made as per the circuit diagram.5V to 0 in steps of 0. and 3V.

Observations:Input Characteristics:- S.EDC Lab manual 4. and 4mA. A graph is drawn between VCB and Ic for constant IE.No 1 2 3 4 5 6 7 8 9 10 11 VCB(V) IC(mA) IE= VCB(V) IC(mA) IE = VCB(V) IC(mA) Sasi Institute of Technology & Engineering Page 42 . 5. 3 mA. Repeat the steps 2 and 3 for constant values of IE at 2 mA.NO VCB= VEB(V) IE(mA) VCB= VEB(V) IE(mA) VCB= VEB(V) IE(mA) 1 2 3 4 5 6 7 8 9 10 Output Characteristics:- IE= S.

EDC Lab manual Model Graph:Input Characteristics:- Output Characteristics:- Calculations:1. Input Impedance hie =VEB/IE= 2. Output conductance hoe ==∆IC/=∆VCB = Result:- Sasi Institute of Technology & Engineering Page 43 . Forward Current Gain hfe =∆IC/=∆IE= 4. Reverse Voltage Gain hre =∆VCB/∆VEB= 3.

No 1 2 3 4 5 6 7 Apparatus Transistor Resistor Ammeter Voltmeter Regulated power supply Bread Board Connecting wires Type BC 107 10KΩ. In common emitter configuration. After this the collector current becomes almost constant. input voltage is applied between base and emitter terminals and output is taken across the collector and emitter terminals.1KΩ 0-200mA/μA 0-15V 0-30V ----Requirement 1 1Each 2 2 2 1 --- Theory:A transistor is a three terminal device. The transistor always operated in the region above Knee voltage.EDC Lab manual 5. Sasi Institute of Technology & Engineering Page 44 . The terminals are emitter. The output characteristics are drawn between Ic and VCE at constant IB. To calculate the h parameters of the given transistor. base. Apparatus:S. The input characteristics resemble that of a forward biased diode curve. The current amplification factor of CE configuration is given by β = ΔIC/ΔIB. Therefore input resistance of CE circuit is higher than that of CB circuit. The collector current varies with VCE up to few volts only. This is expected since the Base-Emitter junction of the transistor is forward biased. and independent of VCE.To plot the input and output characteristics of transistor connected in CE configuration 2. Therefore the emitter terminal is common to both input and output. As compared to CB arrangement IB increases less rapidly with VBE. collector. IC is always constant and is approximately equal to IE. Transistor CE characteristics(Input and Output) &h-Parameter Calculations Aim: -1. The value of VCE up to which the collector current changes with VCE is known as Knee voltage.

For low values of the VCE the IC increases rapidly with a small increase in VCE. Output resistance is the ratio of change of collector to emitter voltage ΔVCE .EDC Lab manual The transistor always operates in the active region. The transistor is said to be working in saturation region. Input Impedance hie = ΔVBE / ΔIB at VCE constant Output impedance hoe = ΔVCE / ΔIC at IB constant Voltage Gain hre = ΔVCE / ΔVBE at IB constant Current Gain hfe = ΔIC / ΔIB at constant VCE Precautions:1. Meters should be connected properly according to their polarities Circuit Diagram:- Sasi Institute of Technology & Engineering Page 45 . The supply voltage should not exceed the rating of the transistor 2. to change in collector current ΔIC with constant IB.e. i. the collector current IC increases with VCE very slowly.

No VBE(V) 1 2 3 4 5 6 7 8 IB(μA) VBE(V) IB(μA) VBE(V) IB(μA) VCE = VCE = Sasi Institute of Technology & Engineering Page 46 . 1. Set IB to 20 μA by varying VBE and kept it constant. 3. Plot the graph between VCE and IC for constant IB Observations:Input Characteristics:VCE = S. 5. 2. Connections are made as per the circuit diagram. Repeat the above step by keeping VCE at 1V and 2V and tabulate IB values.EDC Lab manual Procedure:Input Characteristics:1. Repeat the above step for constant values of IB at 40 μA . Vary the VCE and record the values of IC. Plot the graph between VBE and IB for constant VCE Output Characteristics:1 Connections are made as per the circuit diagram. The output voltage VCE is kept constant at 0V and vary the input voltage VBE and note down the values of base current IB. 4. 60 μA and tabulate the values of IC. 3. 2.

EDC Lab manual Output Characteristics:IB = S.NO VCE(V) 1 2 3 4 5 6 7 8 9 10 11 12 IC(mA) VCE(V) IC(mA) VCE(V) IC(mA) IB = IB = Model Graphs:Input Characteristics:- Sasi Institute of Technology & Engineering Page 47 .

Output Impedance hoe =∆VCE/∆IC= Result:- Sasi Institute of Technology & Engineering Page 48 . Input Impedance hie = 2. Current Gain hfe = ΔIC / ΔIB at constant VCE 4.EDC Lab manual Output Characteristics:- Calculations:1. Voltage Gain hre = 3.

the diode is reverse biased and there is no current through the circuit i.EDC Lab manual 6. (b) To find ripple factor and regulation without and with Filter. 3.O Ammeter Bread Board Connecting wires Type 1N 4007 100. 2. The net result is that only the +ve half cycle of the input voltage appears across the load. first full load should be applied and then it should be decremented in steps Sasi Institute of Technology & Engineering Page 49 .. 330. While determining the % regulation. Hence the current produces an output voltage across the load resistor RL.R. Precautions:1.No 1 2 3 4 5 6 7 8 Apparatus Diode Resistors Electrolytic capacitor Transformer C. 470 μF 12-0-12 20MHz DTO 0-200 mA ----- Requirement 1 1Each 1 1 1 1 1 --- Theory: During positive half-cycle of the input voltage. The average value of the half wave rectified o/p voltage is the value measured on dc voltmeter.(a) To observe the input and output waveforms of a half-rectifier. During the negative half-cycle of the input voltage. the diode D1 is in forward bias and conducts through the load resistor RL. the voltage across RL is zero. The polarities of the diode and electrolytic capacitor should be carefully identified. Apparatus:- S. The primary and secondary sides of the transformer should be carefully identified.e. Half wave Rectifier with & without filter Aim: . which has the same shape as the +ve half cycle of the input voltage. 820 1K Ω.

Find the theoretical of dc voltage by using the formula. 4. Connections are made as per the circuit diagram. Regulation Characteristics:1. (Vrms=output ac voltage. Draw a graph between load voltage (VL) and load current ( IL ) taking VL on X-axis and IL on y-axis 5. Vm=2Vrms. 3. the %regulation is calculated using the formula. Circuit Diagram without Filter:- Sasi Institute of Technology & Engineering Page 50 . ac and dc voltage at the output of the rectifier. measure the ac input voltage of the rectifier and.EDC Lab manual Procedure:1. 2. By increasing the value of the rheostat. 3. 2. Connect the primary side of the transformer to ac mains and the secondary side to the rectifier input. Vdc=Vm/π Where. the voltage across the load and current flowing through the load are measured. 4. By the multimeter.) The Ripple factor is calculated by using the formula r=ac output voltage/dc output voltage. From the value of no-load voltages. The reading is tabulated. Connections are made as per the circuit diagram.

No RL Ω 1 2 Vm V IL mA Vrms= Vm/2√3 Vdc=Vm Ripplefactor =Vrms/Vdc %Regulation =(VNL-VFL)/VFL ×100 Result:Sasi Institute of Technology & Engineering Page 51 .EDC Lab manual With Filter:- Model waveforms: - Observations & calculations:-:Without filter:VNL = S.No RL Ω 1 2 Vm V IL mA Vrms= Vm/2 Vdc=Vm/π Ripplefactor =√[(Vrms/Vdc) -1] 2 %Regulation =(VNL-VFL)/VFL ×100 With filter:S.

Apparatus:S.EDC Lab manual 7. Now. The primary and secondary side of the transformer should be carefully identified 2. Full wave Rectifier without & with filter Aim:-To find the Ripple factor and regulation of a Full-wave Rectifier with and without filter. Procedure:1. Precautions: 1. During negative half cycle. The polarities of all the diodes should be carefully identified. The difference between full wave and half wave rectification is that a full wave rectifier allows unidirectional (one way) current to the load during the entire 360 degrees of the input signal and half-wave rectifier allows this only during one half cycle (180 degree). 2. Measure the ac voltage at the input side of the rectifier. The diode D1 conducts and current flows through load resistor RL.No 1 2 Apparatus Experimental Board Transformer 6-0-6v 1No Type Requirement 3 4 5 6 PN Diodes Multimeters Filter Capacitor Load resistor lN4007 --100μF/25v 1KΩ 2 Nos 2Nos 1No 1No Theory:The circuit of a center-tapped full wave rectifier uses two diodes D1&D2. diode D2 becomes forward biased and D1 reverse biased. 3. During positive half cycle of secondary voltage (input voltage). D2 conducts and current flows through the load resistor RL in the same direction. the diode D1 is forward biased and D2is reverse biased. There is a continuous current flow through the load resistor RL. Connections are made as per the circuit diagram. during both the half cycles and will get unidirectional current as show in the model graph. Connect the ac mains to the primary side of the transformer and the secondary side to the rectifier. Sasi Institute of Technology & Engineering Page 52 .

EDC Lab manual 4. The practical values are compared with theoretical values. Connect the filter capacitor across the load resistor and measure the values of Vac and Vdc at the output. 6. 7. The theoretical values of Ripple factors with and without capacitor are calculated. Circuit diagram:Without Filter: With Filter: - Sasi Institute of Technology & Engineering Page 53 . 5. From the values of Vac and Vdc practical values of Ripple factors are calculated. Find the theoretical value of the dc voltage by using the formula Vdc=2Vm/П. Measure both ac and dc voltages at the output side the rectifier.

EDC Lab manual Model waveforms: Without filter:- With filter: - Observations & calculations: With Out Filter: VNL = S.No RL Ω Vm V IL mA Vrms= Vm/√2 Vdc=2Vm/π Ripplefactor =√[(Vrms/Vdc)2-1] %Regulation =(VNL-VFL)/VFL ×100 1 2 With Filter: VNL = S.No RL Ω Vm V IL mA Vrms= Vm/√2 Vdc=Vm Ripplefactor =Vrms/Vdc %Regulation =(VNL-VFL)/VFL ×100 1 2 Result:- Sasi Institute of Technology & Engineering Page 54 .

b). With increase in ID the ohmic voltage drop between the source and the channel region reverse biases the junction and the conducting position of the channel begins to remain constant. the Gate to Source junction of the FET s always reverse biased.a). To draw the drain and transfer characteristics of a given FET. the FET is always used in the region beyond the pinch-off. and the drain current increases linearly with VDS. IDS=IDSS(1-VGS/VP)^2 Sasi Institute of Technology & Engineering Page 55 . the n-type bar acts as sample resistor. In response to small applied voltage from drain to source. In amplifier application. To find the drain resistance (rd) amplification factor (μ) and transconductance (gm) of the given FET. the pinch off voltage ill is decreased. FET characteristics Aim: .560 Ώ ----Requirement 1 1 1 1 1Each 1 1 Theory: A FET is a three terminal device. The VDS at this instant is called “pinch of voltage”. Apparatus: S. If the gate to source voltage (VGS) is applied in the direction to provide additional reverse bias.No Apparatus 1 2 3 4 5 6 7 FET Regulated power supply Voltmeter Ammeter Resistors Bread board Connecting wires Type BFW-11 0-30V 0-20V 0-100 mA 100 Ώ.EDC Lab manual 8. having the characteristics of high input impedance and less noise.

Voltages exceeding the ratings of the FET should not be applied. 5. calculate the values of dynamic resistance (rd) by using the formula rd = ∆VDS/∆ID 11. 2. From drain characteristics.EDC Lab manual Precautions:1. calculate the value of transconductance (gm) by using the formula Sasi Institute of Technology & Engineering Page 56 . Vary the VDD and change VDS in steps of 0. 8. plot the transfer characteristics. Switch ON the power supply VGG. Practically FET contains four terminals. Circuit Diagram: Procedure: 1. Repeat the above step3 for different values of VGS at -1V and -2V. 9. 3. 7.5V and note down the values of ID. 2. substrate. All the connections are made as per the circuit diagram. Vary VGG and change the values of VGS in steps of 0. VGS Vs ID keep VDS constant 10. 4. Gate. 3. The three terminals of the FET must be carefully identified. Repeat steps 6 and 7 for different values of VDS at 2 V and 3V. which are called source. To plot the transfer characteristics. From transfer characteristics. drain. Plot the drain characteristics VDS vs ID for constant VGS 6.2V up to 1V and later in steps of 1V up to 7V and note down the values of ID. and set VGS = 0V. keep VDS constant at 1V. Source and case should be short circuited. 4.

Amplification factor μ = gmrd = ∆VDS/∆VGS Observations:Drain Characteristics:S.NO VDS(V) 1 2 3 4 5 6 7 8 9 10 11 12 VGS= ID(mA) VDS(V) VGS= ID(mA) VDS(V) VGS = ID(mA) Sasi Institute of Technology & Engineering Page 57 .EDC Lab manual gm = ∆ID/∆VGS 12.

EDC Lab manual Transfer Characteristics:VDS= S.NO 1 2 3 4 5 6 7 8 9 10 11 VGS (V) ID(mA) VDS= VGS (V) ID(mA) VDS = VGS (V) ID(mA) Model Graph:Drain characteristics:- Sasi Institute of Technology & Engineering Page 58 .

EDC Lab manual Transfer Characteristics:- Result:- Sasi Institute of Technology & Engineering Page 59 .

no voltage is applied at the gate due to reverse bias of the junction J2 no current flows through R2 and hence SCR is at cut off. So gate current starts flowing.No 1 2 3 4 5 6 7 Apparatus SCR Regulated Power Supply Resistors Ammeter Voltmeter Breadboard Connecting Wires Type 2P4M 0-30V 3. When gate is open. and a gate G. cathode K. J3.EDC Lab manual 9. 1kΩ (0-50) µA (0-10V) ----Requirement 1 2 1Each 1 1 1 --- Theory: It is a four layer semiconductor device with alternate P-type and N-type silicon. It consists of 3 junctions J1. Electrons from N-type material move across junction J3 towards gate while holes from P-type material moves across junction J3 towards cathode. Now most of the supply voltage appears across the load Sasi Institute of Technology & Engineering Page 60 .3kΩ. The operation of SCR can be studied when the gate is open and when the gate is positive with respect to cathode. SCR Characteristics Aim:-To draw the V-I Characteristics of SCR Apparatus: S. When the gate positive. anode current increase is extremely small. When gate is open thee break over voltage is determined on the forward voltage at which SCR conducts heavily. with respect to cathode J3 junction is forward biased and J2 is reverse biased. Junction J2 break down and SCR conducts heavily. When anode voltage is increased J2 tends to breakdown.The J1 and J3 operate in forward direction and J2 operates in reverse direction and three terminals called anode A. J2.

when break over occurs. Circuit Diagram: Procedure: 1.EDC Lab manual resistance. 4.No VAK(Volts) 1 2 3 4 5 6 7 IAK( µA) IG= VAK(Volts) IAK( µA) Sasi Institute of Technology & Engineering Page 61 . Keep the gate supply voltage at some constant value 3. The holding current is the maximum anode current gate being open. 2. Vary the anode to cathode supply voltage and note down the readings of voltmeter and ammeter. A graph is drawn between VAK and IAK . Connections are made as per circuit diagram. Keep the gate voltage at standard value. Observations: IG= S.

EDC Lab manual Model Waveform:- Result: Sasi Institute of Technology & Engineering Page 62 .

This reduction in resistance means that the emitter junction is more forward biased. 330Ω Requirement 1 2 2 4 Resistors 1 Each 5 6 Breadboard Connecting Wires ----- ----- Theory: A Uni Junction Transistor (UJT) is a semiconductor device with only one junction. current will begin to flow from the emitter into the base region.EDC Lab manual 10. is a simple device that is essentially a bar of N type semiconductor material into which P type material has been diffused somewhere along its length. The resistance between B1 and B2. The emitter is of p-type and it is heavily doped. This causes a potential drop along the length of the device.No Apparatus 1 2 3 UJT Regulated Power Supply Multimeters Type 2N2646 0-30V. the effect is a negative resistance at Sasi Institute of Technology & Engineering Page 63 . 1A MC 10kΩ. 47Ω. and so even more current is injected. the additional current (actually charges in the base region) causes (conductivity modulation) which reduces the resistance of the base between the emitter junction and the B2 terminal. Apparatus: S. UJT Characteristics Aim: To draw the characteristics of UJT and to calculate the Intrinsic Stand-Off Ratio (η). when the emitter is open-circuit is called inter base resistance. The base is formed by lightly doped n-type bar of silicon. The UJT is biased with a positive voltage between the two bases. The UJT has three terminals viz emitter (E) and two bases (B1 and B2). When the emitter voltage is driven approximately one diode voltage above the voltage at the point where the P diffusion (emitter) is. Overall. Because the base region is very lightly doped. or UJT. Two ohmic contacts B1 and B2 are attached at its ends. The 2N2646 is the most commonly used version of the UJT. The original Uni Junction Transistor.

Beyond the valley point.RB1 reaches minimum value and in this region. This is represented by negative slope in the characteristics and is referred to as the negative resistance region. Sasi Institute of Technology & Engineering Page 64 .EDC Lab manual the emitter terminal. 2. the current starts to increase and the emitter voltage starts to decrease. All the readings are tabulated and Intrinsic Stand-Off ratio is calculated using η = (Vp-VD) / VBB 5. VEB proportional to IE. When the emitter voltage reaches Vp. A graph is plotted between VEE and IE for different values of VBE. Circuit Diagram:- Procedure: 1. This is what makes the UJT useful. 4. Connection is made as per circuit diagram. in oscillator circuits. This procedure is repeated for different values of output voltages. 3. Output voltage is fixed at a constant level and by varying input voltage corresponding emitter current values are noted down.

No VE(V) 1 2 3 4 5 6 7 8 9 10 11 Calculations:VP = ηVBB + VD η = (VP-VD) / VBB When VBB = .VD= η= Result:IE(mA) VBB= VE(V) IE(mA) Sasi Institute of Technology & Engineering Page 65 .Vp= .EDC Lab manual Model Graph:- Observations:VBB= S.

When +ve half-cycle is fed to the input circuit. The emitter-base circuit is forward biased.No 1 2 3 4 5 Apparatus Transistor BC-107 Type BC107 Requirement 1 1 1 20MHz 1KΩ.1.2. it decreases the voltage more –ve. The collector current is controlled by the base current rather than emitter current.1A Function Generator CRO Resistors Theory:The CE amplifier provides high gain & wide frequency response. 10KΩ. CE AMPLIFIER Aim: . increases the forward bias of the circuit.EDC Lab manual Additional Experiments 11. Sasi Institute of Technology & Engineering Page 66 . The emitter lead is common to both input & output circuits and is grounded. To plot the frequency response of the CE amplifier 2.100KΩ. 6 7 8 Capacitors Bread Board Connecting Wires 10 µF. To Measure the voltage gain and bandwidth of a CE amplifier Apparatus:S. The input signal is applied to base terminal of the transistor and amplifier output is taken across collector terminal.100 µF ----2Each 1 --1 1Each Regulated power Supply 0-30V. Thus when input cycle varies through a -ve half-cycle. it opposes the forward bias of the circuit which causes the collector current to decrease.2KΩ. which causes the collector current to increases thus the output signal is common emitter amplifier is in out of phase with the input signal. A very small change in base current produces a large change in collector current.

BW= (f2-f1) Hz Where f1 lower cut-off frequency and f2 upper cut-off frequency 7. The bandwidth product of the amplifier is calculated using the expression Gain Bandwidth product=3 dB mid band gain × Bandwidth Sasi Institute of Technology & Engineering Page 67 . The band width of the amplifier is calculated from the graph using the expression. Bandwidth. Connect the circuit as shown in circuit diagram 2. For plotting the frequency response the input voltage is kept Constant at 20mV peak-to-peak 6. Apply the input of 40mV peak-to-peak and 1 KHz frequency using Function Generator 3. A graph is drawn by taking frequency on x-axis and gain in dB on y-axis on Semi-log graph. voltage gain in dB is calculated by using the expression Av=20 log10 (V0/Vi) 5. 4. Increase the input signal frequency in steps and note the corresponding output voltage from CRO and record in the tabular form.EDC Lab manual Circuit Diagram:- Procedure:1.

EDC Lab manual Observations:Frequency Response: Vi=40mv (constant) S.No Frequency (Hz) Output Voltage (v0) Gain in dB Av=20 log10 (v0/vi) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 Sasi Institute of Technology & Engineering Page 68 .

EDC Lab manual Model Frequency Response:- Result: Sasi Institute of Technology & Engineering Page 69 .

EDC Lab manual 12. The voltage gain is less than unity. The input impedance of the CC amplifier is very high and output impedance is low. Apparatus:S.2kΩ. In this amplifier. Here the collector is at ac ground and the capacitors used must have a negligible reactance at the frequency of operation. there is no phase inversion between input and output. bandwidth. 33kΩ. and input resistance.470µF 2 Theory: In common-collector amplifier the input is given at the base and the output is taken at the emitter.10 kΩ 1Each Requirement 1 1 1 1 6 Capacitors.No Apparatus 1 2 3 4 5 Regulated Power Supply CRO Function Generator Transistor Resistors Type 0-30V DC (0-20) MHz (0-1) MHz BC107 1 kΩ. This circuit is also known as emitter follower.2. COMMON COLLECTOR AMPLIFIER Aim: To plot the frequency response curve of the CC amplifier & calculate cutoff frequencies. This amplifier is used for impedance matching and as a buffer amplifier. Sasi Institute of Technology & Engineering Page 70 .

All the readings are tabulated and voltage gain in dB is calculated by using the expression Av in dB =20 log10 (V0/Vi) .5V peak-to-peak and 1 KHz frequency using Function Generator 3. Bandwidth BW=f2-f1 Where f1 lower cut-off frequency. 5. Keeping the input voltage constant vary the input frequency from 100Hz to 1MHz in regular steps and note down the corresponding output voltage for each frequency 4. A graph is drawn by taking frequency on x-axis and gain in dB on y-axis on Semi-log graph. and f2 upper cut-off frequency Voltage gain = Output Voltage (VO) / Source Voltage (VS) Sasi Institute of Technology & Engineering Page 71 . Apply the input of 0. Connect the circuit as shown in circuit diagram 2. The band width of the amplifier is calculated from the graph using the expression. Tabulate the readings in the tabular form.EDC Lab manual Circuit Diagram:- Procedure:1. 6.

No Frequency Output (Hz) Voltage V0) Gain Gain in dB AV=(V0/Vi) Av=20log10 (V0/Vi) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Sasi Institute of Technology & Engineering Page 72 .EDC Lab manual Observations:- Vi= 0.5V (constant) S.

EDC Lab manual Model Graph: - Result: - Sasi Institute of Technology & Engineering Page 73 .