Transient Analysis: Series RLC Circuit

+
-
SW
V
R
L
C

+ + dt i
C dt
di
L R i V
1
i
Current in an RLC circuit like shown
Is governed y the e!uation
We will analyse the situations with and
without The source "V#$ The stored
energy in C or L will %orce the current
V
t
V
C
&nce the switch "SW# is closed' a%ter so(e oscillatory )eriod' current
And voltage will settle$ In steady state' Ca)acitor voltage "V
C
# will a))roach V
Sajjad Haidar
LT S*IC+ Si(ulation: Adding co()onents
A%ter adding the co()onent and co()onents values ' add the SPICE DIRECTIVE
At ti(e' t,-' I ,-
At ti(e t ,-' V
C
,-
Considering there is no
stored energy in the
inductor "L# or Ca)acitor' C
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Run: Si(ulation
.$ Si(ulation/ +dit Si(ulation
0$ R12
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Run: Si(ulation
V
C
,V"n--3#
i
Running the si(ulation and )lacing the
voltage )roe at 2ode' n--3 and clicking we
%ind ca)acitor voltage and clicking the current
)roe either on R or L' we %ind current i
Current i
Ca)acitor voltage' V
C
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SW
R
L
i
C
Stored +nergy in Ca)acitor "C#: 2o *ower Source
0
1
+ +

dt i
C dt
di
L R i
0
2
2
+ +
C
i
t d
i d
R
t d
i d
L
t
o
i
When the ca)acitor is charged and
connected as shown' energy will
e e4changed ack and %orth in-
etween the inductor and
ca)acitor$ 5owever the resistor will
start dissi)ating the energy$ The
resulting current is governed y the
e!uation
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Si(ulation: Stored Ca)acitor in the Ca)acitor "C#: 2o *ower Source
*ut initial conditions using s)ice
directive$ $IC V"2--0#,.- (eans
initial ca)acitor voltage is .- V
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Run Si(ulation
Current
Capacitor voltage
R12
Running the si(ulation and )lacing the current
*roe on either the resistor or the inductor' we
%ind the oscillatory current as shown
*lacing the voltage )roe at node:2--0 and
Clicking we %ind the ca)acitor voltage wave%or(
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*ower dissi)ated in resistor R
LTS)ice to %ind *ower and energy
*ress down ALT and )ut the cursor on R. "6ou will
See a ther(o(eter icon# and click
6ou will get the )ower data as shown
*ress down CTRL and )lace
the cursor on V"2--.#7R. as
shown and click
6ou will get the
window like this
Sajjad Haidar
+
-
R
C
L
R
L
V
Stored +nergy in Inductor "L#: 2o *ower Source
. 0
i
i
L
When the switch in )osition .' (a4i(u(
current V8R
L
reaches in steady state$ 2ow
the switch is )laced in )osition 0' the stored
energy in the inductor will cause the current
to oscillate in the LRC circuit$
In )ractice: Whenever the switch is
aout to release %ro( )osition .' there
will e aru)t change in current'
causes a high voltage to develo)
governed y the e!uation: V
L
=Ldi/dt$
The stored energy in the inductor
".80LI
0
# will e lost at the switch
9unction ".# "high voltage/
Ioni:ation/arching "heat##$ 5owever
y electronic devices it is )ossile to
release inductor-energy into an LRC
circuit$ I ho)e to discuss it later
0
2
2
+ +
C
i
t d
i d
R
t d
i d
L
5owever Let us consider an
idealised situation that when the
switch is in )osition 0 the energy
".80LI
0
# is released in the LRC
circuit
2ature o% current can e e4)ressed y the e!uation
Sajjad Haidar
LT S*IC+ Si(ulation: Adding co()onents
Rotate resistor R. twice' which will
give you the current in )ositive
direction
2ow initial inductor current is .
A()$ and the ca)acitor
voltage is - V
Set the s)ice directive
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R12: Si(ulation
Current
Ca)acitor voltage
Run the si(ulation
We get current and ca)acitor voltage as shown:
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LTS)ice to %ind *ower and energy
*ress down ALT and )ut the cursor on R. "6ou will
See a ther(o(eter icon# and click
6ou will get the )ower data as shown
*ress down CTRL and )lace
the cursor on V"2--.#7R. as
shown and click
6ou will get the
window like this
Sajjad Haidar
1nder' over and Critically da()ed oscillation in LRC circuit
0
2
2
+ +
C
i
t d
i d
R
t d
i d
L
SW
R
L
i
C
Let us consider:
st
e A i
.
0
*utting e!uation 0 in .:
0
2
+ +
C
i
e A S R e A S L
St St
0
1
2

1
]
1

+ +
C
RS LS Ae
st
This is the characteristic e!uation
Which deter(ines the circuit ehaviour
Roots o% this e!uation:
LC L
R
L
R
S
1
2 2
2
1

,
_

+
LC L
R
L
R
S
1
2 2
2
1

,
_

LC L
R 1
2
2
>
,
_

LC L
R 1
2
2
<
,
_

LC L
R 1
2
2

,
_

Overdamped
Underdamped
Critically damped
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0
2
2
+ +
C
i
t d
i d
R
t d
i d
L
The solutions o% the di%%erential e!uation %or these three conditions:
Overdamped
LC L
R 1
2
2
>
,
_

Let us consider'
L
R
2

And
LC
1
0

2
0
2
>
t s t s
Be Ae t i
2 1
) ( +
Where'
2
0
2
2 1
, t S S
Underdamped
2
0
2
<
( ) t B t A e t i
t

sin cos ) ( +

Where
2 2

o
Critically damped
2
0
2

( )
t
e t B A t i

+ ) (
t
i
t
i
t
i
1nder' over and Critically da()ed oscillation in LRC circuit
Sajjad Haidar
SW
R
L
i
C
. F
. (5
.-

,
_

2
2L
R

LC
1
0;4.-
<
.4.-
=
As'
LC L
R 1
2
2
<
,
_

It is a case o% underda()ed oscillation as we %ound e%ore

( ) t B t A e t i
t

sin cos ) ( +

Simulation - Undedamped LTSpice
t
e

2 2

o
T
,3.00>$== Rad8sec
Ti(e )eriod' T ,

2
, 0-.$0 s
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Simulation - Overdamped LTSpice
Let us consider' R,0--

,
_

2
2L
R

LC
1
.4.-
=
. 4 .-
.-

LC L
R 1
2
2
>
,
_

Running LTS)ice si(ulation the sa(e way as

?e%orewe %ind the overda()ed ehaviour as shown
t s t s
Be Ae t i
2 1
) ( +
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Simulation - Critically Damped LTSpice
0
2
2
+ +
C
i
t d
i d
R
t d
i d
L
( )
t
e t B A t i

+ ) (
2
0
2

LC L
R 1
2
2

,
_

&r
In our case with' L ,.(5' C,.F:
245 . 63 R
To %ind the ti(e at which the current reaches the )eak' we should di%%erentiate i"t# and e!uate to -:
( )
0
di
t di
R
L
t
c
2 1

*utting 245 . 63 R
s t
c
62 . 31
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Simulation - Critically Damped LTSpice
tc
Running the si(ulation gives us the current res)onse' i(t)as shown
The i()ortance o%
critically da()ed
circuit is' currently
!uickly reaches -
without oscillating
s t
c
62 . 31
Sajjad Haidar