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TECHNICAL DATA

ILA8138A 5.1V +12V REGULATOR WITH DISABLE AND RESET


The ILA8138A is a monolithic dual positive voltage regulator designed to provide fixed precision output voltages of 5.1V and 12V at currents up to 1A. Output 2 can be disabled by TTL input. Short circuit and thermal protections are included in all the versions. Output currents up to 1 A Fixed precision OUTPUT 1 voltages 5.1 V 2% Fixed precision OUTPUT 2 voltages 12 V 2% OUTPUT 1 with RESET facility OUTPUT 2 with DISABLE by TTL input Short circuit protection at both outputs Thermal protection Low drop output voltage TO-220AB/7
HEPTAWAT (Plastic Package)

ORDERING INFORMATION ILA8138A IZ8138A Plastic Package chip TJ = -0 to 130C

PIN ASSIGNMENT
7 6 5 4 3 2 1 OUTPUT 1 OUTPUT 2 N.C. GROUND DISABLE INPUT 2 INPUT 1

BLOCK DIAGRAM
INPUT 1 INPUT 2 2 1

REFERENCE

OUT 1

7 OUT 1

PROTECTION

DISABLE 3

DISABLE

OUT 2

6 OUT 2

INTEGRAL

ILA8138A

MAXIMUM RATINGS *
Symbol VIN1 VIN2 VDIS IO1,2 Tstg TJ
*

Parameter DC Input Voltage Pin 1 DC Input Voltage Pin 2 Disable Input Voltage Pin 3 Output Currents Storage Temperature Junction Temperature

Min 0 0 0 0 -65 0

Max 20 20 20 1.6 150 150

Unit V V V A C C

Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions.

RECOMMENDED OPERATING CONDITIONS


Symbol VIN1 VIN2 VDIS IO1,2 TJ DC Input Voltage Pin 1 DC Input Voltage Pin 2 Disable Input Voltage Pin 3 Output Currents Junction Temperature Parameter Min 7.0 14 0 0 0 Max 16 18 7.0 1.6 130 Unit V V V A C

THERMAL DATA
Symbol Rth (j-c) Rth (j-a) Parameter Maximum Thermal Resistance Junction-case Maximum Thermal Resistance Junction-ambient Vlalue 6 60 Unit
o o

C/W C/W

INTEGRAL

ILA8138A
ELECTRICAL CHRACTERISTICS (VIN1 = 7 V, VIN2 = 14 V, TJ = 25C, unless otherwise specified)
Symbol VO1 VO2 VO1 VO2 VO1 LI VO2 LI VO1 LO VO2 LO VIO1 Dropout Voltage Load Regulation Line Regulation Parameter Output Voltage Test Conditions VIN1 = 7 V, IO1= -10 mA VIN1 = 7 V, VIN2 = 14 V, IO2= -10 mA -5 mA IO2 -750 mA, 7 V VIN1 14 V -5 mA IO2 -750 mA, 14 V VIN2 18 V, VIN1 = 7 V 7 V VIN2 14 V, IO1 = -200 mA 14 V VIN2 18 V, IO1 = -200 mA, VIN1 = 7 V VIN1 = 7 V, -5 mA IO1 -0.6 mA VIN1 = 7 V, VIN2 = 14 V, -5 mA IO2 -0.6 mA VIN1 = 7 V, IO1 = -750 mA VIN1 = 7 V, IO1 = -1.0 mA VIO2 Dropout Voltage VIN1 = 7 V, VIN2 = 14 V, IO1 = -750 mA VIN1 = 7 V, VIN2 = 14 V, IO1 = -1.0 mA IQ IO1,2 SC Quiescent Current Short Circuit Output Current Disable Bias Current Disable Voltage High (out 2 active) Disable Voltage Low (out 2 disabled) VIN1 = 7 V, VIN2 = 14 V, VDIS = 0.8 V, IO1= -10 mA VIN1 = 7 V, VIN2 = 14 V VIN1 = 16 V, VIN2 = 16 V 0 V VDIS 7 V, VIN1 = 7 V, VIN2 = 14 V VIN1 = 7 V, VIN2 = 14 V VIN1 = 7 V, VIN2 = 14 V -100 2 0.8 Guaranteed Limit Min 5.0 11.76 4.9 11.5 Max 5.2 12.24 5.3 12.5 50 120 100 250 1.4 2.0 1.4 2.0 2.0 1.6 1.0 2.0 A V V mA A V V mV V V V V mV Unit

IDIS VDISH VDISL

TYPICAL APPLICATION
C1 to C4 = 10 F
NC (05)

INPUT 1 (01)

OUTPUT 1 (07)

ILA8138A
INPUT 2 (02) C3 C1 C2 C4 OUTPUT 2 (06)

DISABLE (03)

GROUND (04)

INTEGRAL

ILA8138A

INTEGRAL

ILA8138A

CHIP PAD DIAGRAM


Chip marking 8138 20

09 08 10 2.0 + 0.03 11 12 01 07 06

02

03 Y (0,0) X

04

05

2.4 + 0.03

Location of marking (mm): left lower corner x=0.100, y=1.854. Chip thickness: 0.35 0.02 mm. PAD LOCATION Pad No 01 02 03 04 05 06 07 08 09 10 11 12 Symbol GND OUTPUT 2 OUTPUT 1 INPUT 1 INPUT 2 DISABLE Location (left lower corner), mm X Y 0.105 0.740 0.105 0.425 0.105 0.110 0.825 0.110 2.110 0.110 2.110 1.675 0.795 1.635 0.505 1.605 0.110 1.605 0.105 1.385 0.105 1.205 0.105 1.025 Pad size, mm 0.18 x 0.18 0.18 x 0.18 0.18 x 0.18 0.18 x 0.18 0.18 x 0.18 0.18 x 0.18 0.18 x 0.18 0.18 x 0.18 0.18 x 0.18 0.10 x 0.10 0.10 x 0.10 0.10 x 0.10

Note: Pad location is given as per passivation layer

INTEGRAL

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