LODE 200

Registers

Topic Objective:

Use shift registers in serial data transfer, serial/parallel conversion, arithmetic functions, and delay elements.

Register
Is a group of binary cells suitable for holding binary information.  A group of flip-flops constitutes a register, since each flip-flop is a binary cell capable of storing one bit of information.  n-bit register has a group of n flip-flops and is capable of storing any binary information containing n bits.

Shift Registers
A register that is capable of shifting data one bit at a time is called a shift register.  The logical configuration of a serial shift register consists of a chain of flip-flops connected in cascade, with the output of one flip-flop being connected to the input of its neighbor.

Operation of Shift Registers
Synchronous, thus each flip-flop is connected to a common clock.  Registers using D flip-flops forms the simplest type of shift-registers.  All the flip-flops are driven by a common clock, and all are set or reset simultaneously.

The basic data movements possible within a fourbit shift register is shown:

4-bit Serial-In Serial-Out Register

A basic four-bit shift register can be constructed using four D flip-flops, as shown below.

 

The register is first cleared, forcing all four outputs to zero. The input data is then applied sequentially to the D input of the first flip-flop on the left (FF0). During each clock pulse, one bit is transmitted from left to right. Assume a data word to be 1001. The least significant bit of the data has to be shifted through the register from FF0 to FF3.

4-bit Serial-In Parallel-Out Register

Once the data are stored, each bit appears on its respective output line, and all bits are available simultaneously. A construction of a four-bit serial in - parallel out register is shown below.

Parallel-In Serial-Out Register
 

A four-bit parallel in - serial out shift register is shown below. The circuit uses D flip-flops and NAND gates for entering data (ie writing) to the register.

Parallel-In Parallel-Out Register

All data bits appear on the parallel outputs immediately following the simultaneous entry of the data bits.

Problem #1:

The content of a 4-bit register is initially 1101. The register is shifted six times to the right with the serial input being 101101. What is the content of the register after each shift?

Answer to Q#1:
1110  0111  1011  1101  0110  1011

Problem #2:

The content of a 8-bit register is initially 11000001. The register is rotated four times to the left. What is the content of the register after each rotation?

Course Work for Final Period:
Design a counter that would count from 09 using seven segment decoder.  Use: counter, register, decoder

Ref/E-references:

Digital Design by Morris Mano  http://scitec.uwichill.edu.bb/cmp/online/P10F/s  http://www.eelab.usyd.edu.au/digital_tutorial/p

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