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Date: Feb 14, 2014

M.Tech (VLSI Design and Embedded systems) Mixed signal IC Design (SVE-500T)

This homework asignment is due on Monday, February 24, 2014. Implement the COMB filter shown below in SPICE. Plot and comment on the magnitude and phase response of the filter. Note that the transmission line shown in figure has a delay of 5 ns.

You may use any SPICE simulator (Cadence, Mentor etcetra are already in VLSI lab). Please mail me your code and your results at by the due date. The students are advised to write their own code and solution/observation to avoid plagiarizing the contents.