This action might not be possible to undo. Are you sure you want to continue?
of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 1
1a. CLIPPING AND CLAMPING CIRCUITS
AIM: To study the working of positive clipper, double ended clipper and positive clamper
using diodes.
COMPONENTS REQUIRED: Diode (IN914 / IN4007), Resistors1 KO & 100kO, DC
regulated power supply (for Vref), Signal generator (for Vi) and CRO.
CIRCUIT DIAGRAM OF POSITIVE CLIPPER
Fig.1 a Positive clipper Circuit b. Transfer Characteristics
Clippers clip off a portion of the input signal without distorting the remaining part of
the waveform. In the positive clipper shown above the input waveform above Vref is clipped
off. If Vref = 0V, the entire positive half of the input waveform is clipped off.
Plot of input Vi (along Xaxis) versus output Vo (along Yaxis) called transfer
characteristics of the circuit can also be used to study the working of the clippers.
For stiff clipper: 100R
B
< R
S
< 0.01R
L
, Where R
B
is bulk resistance of the diode. For
diode IN914, value of R
B
is 30O.Series resistor R
S
must be 100times greater than bulk
resistance R
B
and 100 times smaller than load resistance R
L
.
If R
B
=30O, select R
S
=1kO and R
L
=100kO.
PROCEDURE:
1. Before making the connections check all components using multimeter.
2. Make the connections as shown in circuit diagram.
3. Using a signal generator (V
i
) apply a sine wave of 1KHz frequency and a peakto
peak amplitude of 10V to the circuit. (Square wave can also be applied.)
4. Keep the CRO in dual mode, connect the input (Vi) signal to channel 1 and output
waveform (Vo) to channel 2. Observe the clipped output waveform which is as shown
in fig. 2. Also record the amplitude and time data from the waveforms.
5. Now keep the CRO in XY mode and observe the transfer characteristic waveform.
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 2
Note:
1. Vary Vref and observe the variation in clipping level. For this use variable DC power
supply for Vref.
2. Change the direction of diode and Vref to realize a negative clipper.
3. For doubleended clipping circuit, make the circuit connections as shown in fig.3 and
the output waveform observed is as shown in figure 5.
4. Adjust the ground level of the CRO on both channels properly and view the ouput in
DC mode (not in AC mode) for both clippers and clampers.
WAVEFORMS
Fig. 2. Input and output waveform for positive Clipper
RESULT: Output voltage V
0
=__________ during positive half cycle
=__________ during negative half cycle
DOUBLE ENDED CLIPPER
Fig.3 Double ended clipper Circuit b. Transfer Characteristics
Apply V
i
= 10 Vpp at 1kHz
V
1
= 2V
V
2
= 2V
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 3
WAVE FORMS
Fig. 4. Input and output waveform for doubleended clipping circuit
RESULT: Output voltage V
0
=__________ during positive half cycle
=__________ during negative half cycle
Note: The above clipper circuits are realized using the diodes in parallel with the load (at the
output), hence they are called shunt clippers. The positive (and negative) clippers can also be
realized in the series configuration wherein the diode is in series with the load. These circuits
are called series clippers.
POSITIVE CLAMPER
COMPONENTS REQUIRED: Diode (IN 914/BY127), Resistor of 100 KO, Capacitor  1
µF, DC regulated power supply, Signal generator, CRO
Fig. 5 Positive Clamper
The clamping network is one that will “clamp” a signal to a different DC level. The
network must have a capacitor, a diode and a resistive element, but it can also employ an
independent DC supply (V
ref
) to introduce an additional shift. The magnitude of R and C
must be chosen such that time constant τ = R
L
C is large enough to ensure the voltage across
capacitor does not discharge significantly during the interval of the diode is nonconducting.
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 4
DESIGN:
For proper clamping, τ >100T where T is the time period of input waveform
If frequency is 1 kHz with peakpeak input voltage of 10V, T=1ms
τ = R
L
.C=100×T = 100ms
Let C=1μF
R
L
= 100×10
3
=100kΩ
1×10
6
Select C =1uF and R
L
=100 kΩ
PROCEDURE:
1. Before making the connections check all components using multimeter.
2. Make the connections as shown in circuit diagram (fig. 5).
3. Using a signal generator apply a square wave input (Vi) of peaktopeak amplitude of
10V (and frequency greater than 50Hz) to the circuit. (Sine wave can also be applied)
4. Observe the clamped output waveform on CRO which is as shown in Fig. 6.
Note: 1.For clamping circuit with reference voltage V
ref
, the output waveform is observed as
shown in Fig. 7. For without reference voltage, Keep V
ref
= 0V.
2. CRO in DUAL mode and DC mode. Also the grounds of both the channels can be
made to have the same level so that the shift in DC level of the output can be observed.
3. For negative clampers reverse the directions of both diode and reference voltage.
Fig. 6 Input and output waveform for positive clamper without reference voltage.
Fig. 7 Input and output waveform for positive clamper circuit with reference voltage = 2V
RESULT:
With Vref =0, output voltage V
0
=_________
With Vref =2, output voltage V
0
=_________
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 5
2a. CE AMPLIFIER
AIM: To determine the frequency response, input impedance, output impedance and
bandwidth of a CE amplifier.
COMPONENTS REQUIRED: Transistor SL100, Resistors 33 KO, 6.8 KO, 470O,
2.2kO, 10kO Capacitors  47 µF, 10 µF, DC regulated power supply, Signal generator, CRO
PROCEDURE:
1. Before making the connections check all components using multimeter.
2. Make the connections as shown in circuit diagram.
3. Using a signal generator apply a sinusoidal input waveform of peaktopeak
amplitude 5mV (V
in
) to the circuit and observe the output signal on the CRO.
4. Vary the frequency of input from 50Hz to 1MHz range and note down corresponding
output voltage V
O
in the tabular column.
Note: When the input frequency is being changed the input amplitude (i.e., around 20
mV) should remain constant.
Adjust the amplitude of V
in
(in mV) such that the output Vo does not get clipped (i.e.,
saturated) when the frequency is in the mid range say 1kHz.
5. After the frequency has been changed from 50 Hz to 1MHz and the readings are
tabulated in a tabular column, calculate gain of the amplifier (in dB) using the
formula,
Gain in dB = 20 log
10
(V
o
/V
in
)
6. Plot the graph of gain versus frequency on a semi log sheet and hence determine the
bandwidth as shown in Fig. 3. Bandwidth = B = f
2
f
1
To find input impedance, set the input DRBI to a minimum value and DRBO to a
maximum value (say, 10k) as shown in figure 2. Now apply an input signal using signal
generator, say a sine wave whose peaktopeak amplitude is 5mV with a frequency of 10
KHz. Observe the output on CRO. Note this value of output with DRBI = 0 as V
0
max.
Now increase the input DRBI value till the output voltage V
0
= (1/2) V
0
max. The
corresponding DRBI value gives input impedance.
To find output impedance, set DRBO which is connected across the output to a
maximum value as shown in figure 2, with the corresponding DRBI at the minimum
position. Apply the input signal using signal generator, say a sine wave whose peakto
peak amplitude is 50mV with a frequency of 10 KHz. Observe the output on CRO. Note
this value of output with DRBI = 0 as V
0
max. Now decrease the DRBO value till the
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 6
output voltage V
0
= (1/2) V0max. The corresponding DRBO value gives output
impedance.
Note: DRBI is connected between the signal generator and the input coupling capacitor.
DRBO is connected across the output (across the CRO terminals).
The ground symbol in the circuit diagram implies a common point. In some of the power
supplies, there will be three terminals  + (plus),  (minus) and GND (ground). Never
connect this GND terminal to the circuit.
TABULAR COLUMN
V
i
= 5 mV (PP)
f
in Hz
V
0 PP
volts
A
V
=
i
V
V
0
Power Gain = 20 log
10
A
v
in dB
50 Hz


1 MHz
Fig. 1 : Transistor as a CE amplifier circuit diagram
Values
R
1
= 33kΩ
R
2
= 6.8kΩ
R
C
= 2.2kΩ
R
E
= 470Ω
R
L
= 10kΩ
C
C1
= C
C2
=10μF
C
E
=47μF
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 7
Fig. 2: CE Amplifier with DRBs connected at both input and output
WAVEFORMS:
FREQUENCY RESPONSE:
Fig. 3 Frequency response plotted on semilog graph (Xaxis is log scale)
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 8
RESULT:
1. BANDWIDTH = Hz
2. INPUT IMPEDANCE = Ω
3. OUTPUT IMPEDANCE = Ω
Note: Maximum gain occurs in mid frequency region. This is also called mid band gain.
Gainbandwidth product = Midband gain x Bandwidth
THEORY:
The frequency response of an amplifier is the graph of its gain versus the frequency.
Fig. 3 shows the frequency response of an ac amplifier. In the middle range of frequencies,
the voltage gain is maximum. The amplifier is normally operated in this range of frequencies.
At low frequencies, the voltage gain decreases because the coupling (C
C
in Fig.1) and bypass
(C
E
) capacitors no longer act like short circuits; instead some of the ac signal voltage is
attenuated. The result is a decrease of voltage gain as we approach zero hertz. At high
frequencies, voltage gain decreases because the internal (parasitic) capacitances across the
transistor junctions provide bypass paths for ac signal. So as frequency increases, the
capacitive reactance becomes low enough to prevent normal transistor action. The result is a
loss of voltage gain.
Cutoff frequencies (f
1
& f
2
in Fig. 3) are the frequencies at which the voltage gain
equals 0.707 of its maximum value. It is also referred to as the half power frequencies
because the load power is half of its maximum value at these frequencies.
DESIGN:
Given: 10 , 50 & 2 , 10 = = = = S mA I V V
C CC
Assume V
RE
=V
CC
/10, V
CE
= V
CC
/2.
Apply KVL to the output circuit of transistor.
V
CC
=I
C
R
C
+ V
CE
+ V
RE
V
RC
= V
CC
 V
RE
 V
CE
=1015 = 4v
R
C
= V
RC
/I
C
= 2000 Ω.
Select R
C
= 2.2kΩ.
To find R
E
, let V V R I V
CC E E RE
1
10
1
= = = , and
C E
I I ~
Hence O = = = = 500
2
1
ma I
V
I
V
R
C
RE
E
RE
E
.
Choose R
E
= 470 Ω.
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 9
Voltage across resistor R2 is
V
R2
= V
CC
R
2
/ R
1+
R
2
 1
Stability factor S = 1+B/1+B(R
E
/ R
E
+ R
B
)  2
Substitute all the values in the above equation and calculate R
B
.
R
B
= 5.6k Ω.
But RB
=
R1R2/R1+R2. 3
From the circuit V
R2
= V
BE
+ VRE =0.7 V+1.0V = 1.7v
From Eq 1
1.7V = 10* R2/R1+R2.  4
From Eq 3
RB = 5.6kΩ = R1R2/R1+R2.  5
Using Equation 4&5 calculate R
1
and R
2
R
1
= 33kΩ
R
2
=6.8kΩ
To find the bypass capacitor C
E
: Let X
CE
= R
E
/10 at f = 75Hz
Hence
10 2
1
E
E
CE
R
fC
X = =
Substituting all the values, C
E
=45 µF.
Choose C
E
=47 µF and the coupling capacitors C
C1
= C
C2
= 10 µF.
Input impedance (Z
i
) = R
B
 βr
e
`
Where r
e
` = 25 mv/I
E
= 25 x 10
3
/2 x 10
3
= 22.7 Ω
Out impedance (Z
0
) of the CE amplifier is the thevenin’s impedance
Z
o
= R
C
 R
L
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 10
3a. CHARACTERISTICS OF AN ENHANCEMENT MODE MOSFET
AIM: To determine the drain characteristics and Tranconductance characteristics of an
enhancement mode MOSFET.
COMPONENTS REQUIRED: MOSFET (1RF 740), Resistor (1kΩ), Voltmeters (030V
range and 010V range), Ammeter (0 25mA range) and Regulated power supply (2 nos. –
variable power supply)
CIRCUIT DIAGRAM:
Enhancement MOSFET
Characteristics
Fig. 2a. Drain Characteristics and b.Tranconductance characteristics
PROCEDURE:
1. Make the connections as shown in the corresponding circuit diagram. Special care to
be taken in connecting the voltmeters and ammeters according to the polarity shown
in circuit diagram.
2. Repeat the procedure for finding drain and Transconductance characteristics of
Enhancement MOSFET.
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 11
3. Tabulate the readings in separate tabular columns as shown below.
4. Plot the drain characteristics (I
D
versus V
DS
for different values of gate voltages V
GS
).
Take I
D
along the Yaxis and V
DS
along the Xaxis in the plot.
5. From this plot of drain characteristics find the drain resistance
D
DS
d
I
V
r
A
A
= .
6. Similarly plot the Tranconductance characteristics with I
D
along the Yaxis and V
GS
along the Xaxis in the graph for one value of V
DS
, say V
DS
= 5V.
7. From this plot find the mutual conductance or transconductance
GS
D
m
V
I
g
A
A
=
8. Lastly find the amplification factor,
m d
g r • =
Procedure for finding the Tran conductance Characteristics:
1. Switch on the power supplies, with both V
2
and V
1
at zero voltage.
2. Initially set V
1
=V
GS
= 0V. Now set V
2
= V
DS
= 5V (constant). Vary the power
supply V
1
i.e., V
GS
and note down the corresponding current I
D
(in mA)
(Simultaneously note down the V
GS
value from the voltmeter connected at the gate
terminal).
3. Repeat the above procedure for a different value of V
DS
, say 10V.
Note: In the above procedure V
DS
(i.e., the power supply V
2
) is kept constant and the power
supply V
1
(=V
GS
) is varied.
Drain Characteristics:
1. Initially set V
1
= V
GS
=4V (constant), slowly vary V
2
and note down the
corresponding current I
D
. Simultaneously note down in the tabular column the
voltmeter reading V
GS
.
2. Repeat the above procedure for different values of V
GS
and note down the current
I
D
for corresponding V
1
= V
DS.
3. Plot the graph of I
D
versus V
DS
for different values of gate voltages.
Note: In the above procedure V
DS
(i.e., the power supply V
2
) is varied and the power supply
V
1
(=V
GS
) is kept constant.
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 12
READINGS TABULATED IN TABULAR COLUMN
Drain Characteristics
V
GS
=+2V V
GS
=+4V V
GS
=+6V
V
DS
(V)
I
D
ma
V
DS
(V)
I
D
ma
V
DS
(V)
I
D
ma
0
2
.
.
.
.
10
0
2
.
.
.
.
10
0
2
.
.
.
.
10
Transconductance Characteristics
V
DS
= 5 V V
DS
= 10 V
V
GS
Volts
I
D
ma
V
GS
Volts
I
D
ma
0
.
.
.
.
.
10
0
.
.
.
.
.
10
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 13
4 a. SCHMITT TRIGGER
AIM: To design and implement a Schmitt trigger circuit using opamp for the given UTP and
LTP values.
COMPONENTS REQUIRED: IC μA 741, Resistor of 10KΩ, 100KΩ, DC regulated power
supply, Signal generator, CRO
DESIGN: From theory of Schmitt trigger circuit using opamp, we have the trip points,
k kandR R
select R R
R R R
R R
v R
v
R R V R UTP
v f V Design
V
R
R R LTP UTP
V
k K R K R
R R V
R R
V R
LTP UTP
R R
V R
LTP UTP
V R R
R R
V R
R R
V R
LTP
V V
R R
V R
R R
V R
UTP
sat
sat
ref
sat
sat
ref
ref
sat
ref
cc sat
ref
sat
33 2 2 . 8 1
1 4 2
1 5 2 1
10 *
2
/ 1
0 Re V ; 2V LTP & 2V UTP 10V, Let : 2
33 . 3
2 2
) )( (
have we (1) equation From
100 90 then , 10 Let
9 yields (2) equation then 2V, LTP & 4V UTP 10V, Let : 1 Design
(2)     
2
(1)     
. 2 2
used. is design following the values, & , the find to values UTP & LTP given the Hence
&
of 90% opamp the of saturation positive the is where
2 1
1
2 1
2 1
2 1
1 2
2 1
1
2 1
2 1
2 1
1
2 1
2
2 1
2
2 1
1
= =
=
= +
+
=
+ =
= ÷ = = =
=
+ +
=
O ~ O = O =
= = = =
+
= ÷
+
= +
+
÷
+
=
=
+
+
+
=
PROCEDURE:
1. Before doing the connections, check all the components using multimeter.
2. Make the connection as shown in circuit diagram.
3. Using a signal generator apply the sinusoidal input waveform of peaktopeak
amplitude of 10V, frequency 1 kHz.
4. Keep the CRO in dual mode; apply input (V
in
) signal to the channel 1 and observe the
output (V
o
) on channel 2 which is as shown in the waveform below. Note the
amplitude levels from the waveforms.
5. Now keep CRO in XY mode and observe the hysteresis curve.
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 14
Circuit diagram
Circuit Diagram of Schmitt Trigger Circuit
Waveforms: Design1
CRO in DUAL mode
Hysteresis curve
CRO in XY mode showing the Hysteresis curve
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 15
Waveforms: Design2:
Hysteresis curve
THEORY:
Schmitt Trigger converts an irregular shaped waveform to a square wave or pulse.
Here, the input voltage triggers the output voltage every time it exceeds certain voltage levels
called the upper threshold voltage V
UTP
and lower threshold voltage V
LTP
. The input voltage
is applied to the inverting input. Because the feedback voltage is aiding the input voltage, the
feedback is positive. A comparator using positive feedback is usually called a Schmitt
Trigger. Schmitt Trigger is used as a squaring circuit, in digital circuitry, amplitude
comparator, etc.
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 16
5a. OPAMP AS A RELAXATION OSCILLATOR
AIM: To design and implement a rectangular waveform generator (opamp relaxation
oscillator) for a given frequency.
COMPONENTS REQUIRED: Opamp μA 741, Resistor of 1KΩ, 10KΩ, 20 kΩ
Potentiometer, Capacitor of 0.1 μF, Regulated DC power supply, CRO
DESIGN:
The period of the output rectangular wave is given as


.

\

÷
+
=
1
1
ln 2RC T (1)
Where,
2 1
1
R R
R
+
= is the feedback fraction
If R
1
= R
2
, then from equation (1) we have T = 2RC ln(3)
Another example, if R
2
=1.16 R
1
, then T = 2RC (2)
Design for a frequency of 1 kHz (implies ms
f
T 1 10
10
1 1
3
3
= = = =
÷
)
Use R
2
=1.16 R
1,
for equation (2) to be applied.
Let R
1
= 10kΩ, then R
2
= 11.6kΩ (use 20kΩ potentiometer as shown in circuit figure)
Choose next a value of C and then calculate value of R from equation (2).
Let C=0.1µF (i.e., 10
7
), then O =
×
= =
÷
÷
K
C
T
R 5
10 2
10
2
7
3
. Select R=4.7KΩ
The voltage across the capacitor has a peak voltage of
sat c
V
R R
R
V
2 1
1
+
=
PROCEDURE:
1. Before making the connections check all the components using multimeter.
2. Make the connections as shown in figure and switch on the power supply.
3. Observe the voltage waveform across the capacitor on CRO.
4. Also observe the output waveform on CRO. Measure its amplitude and frequency.
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 17
Circuit Diagram & actual connections
WAVEFORMS
RESULT:
The frequency of the oscillations = ___ Hz.
THEORY:
OpAmp Relaxation Oscillator is a simple Square wave generator which is also called as a
Free running oscillator or Astable multivibrator or Relaxation oscillator. In this figure the
opamp operates in the saturation region. Here, a fraction (R1/ (R1+R2)) of output is fed back
to the noninverting input terminal. Thus reference voltage is (R1/ (R1+R2)) Vo. And may
take values as + (R1/ (R1+R2)) Vsat or  (R1/ (R1+R2)) Vsat. The output is also fed back to
the inverting input terminal after integrating by means of a lowpass RC combination. Thus
whenever the voltage at inverting input terminal just exceeds reference voltage, switching
takes place resulting in a square wave output.
Values
C=0.1μF
R
1
= 10kΩ, R
2
= 11.6 kΩ,R = 4.7k/5.1kΩ
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 18
6. ASTABLE MULTIVIBRATOR USING 555 TIMERS
AIM: To design and implement an astable multivibrator using 555 Timer for a given
frequency and duty cycle.
COMPONENTS REQUIRED: 555 Timer IC, Resistors of 3.3KΩ, 6.8KΩ, Capacitors of
0.1 μF, 0.01 μF, Regulated power supply, CRO
DESIGN: Given frequency (f) = 1 KHz and duty cycle = 60% (=0.6)
The time period T =1/f = 1ms = t
H
+
tL
Where t
H
is the time the output is high and
tL
is the time the output is low.
From the theory of astable multivibrator using 555 Timer (refer Malvino), we have
t
H
= 0.693 R
B
C (1)
t
L
= 0.693 (R
A
+ R
B
)C (2)
T = t
H
+
tL
= 0.693 (R
A
+2 R
B
) C
Duty cycle = t
H
/ T = 0.6. Hence t
H
= 0.6T = 0.6ms and t
L
= T – t
H
= 0.4ms.
Let C=0.1μF and substituting in the above equations,
R
B
= 5.8KΩ (from equation 1) and RA = 2.9KΩ (from equation 2 & R
B
values).
The Vcc determines the upper and lower threshold voltages (observed from the capacitor
voltage waveform) as
CC LT CC UT
V V V V
3
1
&
3
2
= = .
Note: The duty cycle determined by R
A
& R
B
can vary only between 50 & 100%. If R
A
is
much smaller than R
B
, the duty cycle approaches 50%.
Design 2: frequency = 1 kHz and duty cycle =75%, R
A
= 7.2kΩ & R
B
=3.6kΩ, choose R
A
=
6.8kΩ and R
B
= 3.3kΩ.
Circuit Diagram and actual connections
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 19
PROCEDURE:
1. Before making the connections, check the components using multimeter.
2. Make the connections as shown in figure and switch on the power supply.
3. Observe the capacitor voltage waveform at 6
th
pin of 555 timer on CRO.
4. Observe the output waveform at 3
rd
pin of 555 timer on CRO (shown below).
5. Note down the amplitude levels, time period and hence calculate duty cycle.
RESULT: t
H
=
t
L
= 
T = 
The frequency of the oscillations = 1/T= ___ Hz.
%Duty cycle (DC) = t
H/T*100 = 
WAVEFORMS
T 
THEORY:
Multivibrator is a form of oscillator, which has a nonsinusoidal output. The output
waveform is rectangular. The multivibrators are classified as: Astable or free running
multivibrator: It alternates automatically between two states (low and high for a rectangular
output) and remains in each state for a time dependent upon the circuit constants. It is just an
oscillator as it requires no external pulse for its operation. Monostable or one shot
multivibrator: It has one stable state and one quasi stable. The application of an input pulse
triggers the circuit time constants. After a period of time determined by the time constant, the
circuit returns to its initial stable state. The process is repeated upon the application of each
trigger pulse. Bistable Multivibrators: It has both stable states. It requires the application of
an external triggering pulse to change the output from one state to other. After the output has
changed its state, it remains in that state until the application of next trigger pulse. Flip flop is
an example.
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 20
SI MULATI ON
POSITIVE CLIPPER
AIM: To build and simulate the positive clipper, doubleended clipper and positive clamper
circuits using a simulation package
Waveforms
Type of analysis: TIME DOMAIN (TRANSIENT)
Run to time: 5msec step size:0.01msec
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 21
DOUBLE ENDED CLIPPER
Type of analysis: TIME DOMAIN (TRANSIENT)
Run to time: 5msec step size:0.01msec
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 22
POSITIVE CLAMPER (without reference)
Type of analysis: TIME DOMAIN (TRANSIENT)
Run to time: 5msec step size:0.01msec
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 23
POSITIVE CLAMPER WITH REFERENCE
Type of analysis: TIME DOMAIN (TRANSIENT)
Run to time: 5msec step size:0.01msec
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 24
COMMON EMITTER AMPLIFIER
AIM: To build the CE amplifier circuit using a simulation package and determine the voltage
gain for two different values of supply voltage and for two different values of emitter
resistance.
Type of analysis: Ac Sweep Sweep type: logrithemic
Start frequency: 10 Hz End frequency: 100Meg points per decade: 40
Result: parametric Analysis (must be used in conjunction with Ac Sweep) to verify
the change in output with variation in source Vcc or emitter resistance R
E.
Step 1: To change the value of emitter resistance R
E
a) Select the emitter resister and change the value to { R
val
}
b) Select PARAM from special library
c) Double click on the parameter, write name 1 = R
val
and initial value = 470 ohms
d) Click on analysis icon on the screen Select set up
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 25
Select parametric analysis
Select sweep variables as shown
• Global parameter Name: R
val
Start value = 470
End value = 660
Increment = 200
• Sweep type: linear
• Click ok
e) Check the variation in gain on the display
Voltage gain with V
CC
= 10V and emitter resistor R
E
= 470 ohms is _________
Voltage gain with V
CC
= 10V and emitter resistor R
E
= 660 ohms is _________
Step 2: To change V
CC
from 10 V – 12 V in steps of 2 V along with ac sweep
use parametric analysis
a) Click on analysis icon on the screen Select set up
Select parametric analysis
Select sweep variables as shown
• Sweep variable type: Voltage source Name: V
1
• Sweep type: linear Start value = 10
End value = 12
Increment = 2
• Click ok
b) Check the variation in gain on the display
Voltage gain with V
CC
= 10V and emitter resistor R
E
= 470 ohms is _________
Voltage gain with V
CC
= 12V and emitter resistor R
E
= 470 ohms is _________
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 26
CMOS INVERTER
AIM: To implement a CMOS inverter using a simulation package and verify its truth table.
Type of analysis: TIME DOMAIN (TRANSIENT)
Run to time: 100usec step size:0.1usec
Skip the initial transients
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 27
SCHMITT TRIGGER
AIM: To implement a Schmitt trigger using OpAmp using a simulation package for two sets
of UTP and LTP values.
Type of analysis: TIME DOMAIN (TRANSIENT)
Run to time: 40msec step size: 0.1msec
On the display window select settings, click on Xaxis and select axis variable.
Type input voltage on Xaxis. Next click on Trace icon, select Add trace and write output
voltage on Y axis. Observe Hystersis curve on the display and measure Hystersis voltage V
H.
Repeat for two values of UTP and LTP
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 28
RELAXSATI ON OSCILLATOR
AIM: To implement a rectangular waveform generator (OpAmp relaxation oscillator) using
a simulation package and observe the change in frequency when all resistor values are
doubled.
TYPE OF ANALYSIS : TIME DOMAIN
RUN TO TIME : 4ms
MAXIMUM STEP SIZE: 0.01ms
Result: 1. the time/frequency of output waveform is 
2. Double all the resister values and measure the time/frequency of output
Waveform .
Dept. of CSE Electronic Circuits Lab Manual
Bangalore Institute of Technology, Bangalore 29
REGULATED POWER SUPPLY
AIM: To implement a +5V regulated power supply using fullwave rectifier and 7805 IC regulator in
simulation package. Find the output ripple for different values of load current.
V
R1
220
V
D 2
D 1N 4002
C 1
47uf
D 5
D 1N 4002
0
D 4
D 1N 4002
D 1
D 1N 750
R2
1K
V1
F REQ = 60H z
VAMPL = 10V
VOF F = 0V
D 3
D 1N 4002
TYPE OF ANALYSIS : TIME DOMAIN
RUN TO TIME : 100ms
MAXIMUM STEP SIZE: 0.1ms
This action might not be possible to undo. Are you sure you want to continue?
We've moved you to where you read on your other device.
Get the full title to continue listening from where you left off, or restart the preview.