QUESTION: Is there a sample program available for using the integrated counter in the S7 CPU 31xC?

ANSWER: The integrated counter in the S7 CPU 31xC is controlled via the SFB 47 system function block. In addition to the inputs for controlling the counter, parameters (e.g. hysteresis, comparator value) can also be assigned to the counter via SFB 47, and the configured data can also be scanned via this block. Parameters are assigned to the counter via a job (job number) and the associated value. The job is then activated. A new job or a new parameter can only be set or scanned when the previous job is processed. When a job is finished, this is indicated via the status register. The function block (FB 1) which is provided here makes it much easier to assign parameters to the counter via SFB 47. The write and read jobs are initiated via initiation bits and are automatically reset once the job is complete. The status displays can be reset via a shared input. The function block calls SFB 47 internally. The parameters which are required for calling SFB 47 can be derived from the call parameters for FB 1. The following call interface is available via FB 1: Input parameters Module_address Type WORD Description I/O address of the counter module in hexadecimal form, as set in the HWCONFIG (default: W#16#300) Number of the channel used. The number of channels available is dependent on the CPU Controls the software gate Enables the output for manual control Direct activation of the digital output Description Internal gate status display Counting forwards Counting backwards Latch input status display Hardware gate status display Digital output status display Comparison criteria are or have been met (note the setting in the STEP 7 HWCONFIG) Overflow has occurred

Channel_number SW_Gate Enable_output Control_output Output parameters STS_Gate STS_Up STS_Down STS_Latch STS_Hardware_gate STS_Output STS_Comparator STS_Overflow


overflow. The value being written for the activated job is transferred at the "WR_Job_value" input. the block also resets the active bit. the activation bit is reset again and the job value is defined as "0". Resetting the status bits: A "1" at the "Reset_Status" parameter serves to reset the status displays (e. zerocrossing.STS_Underflow STS_Zero_mark Counter_value Latch_value Job_error Error_number Input / Output parameters Reset_status WR_Count_value WR_Load_value WR_Comparator_value WR_Hysteresis WR_Pulse_width WR_Job_value RD_Load_value RD_Comparator_value RD_Hystersis RD_Pulse_width RD_Read_value BOOL BOOL DINT DINT BOOL WORD Type BOOL BOOL BOOL BOOL BOOL BOOL DINT BOOL BOOL BOOL BOOL DINT Underflow has occurred Zero-crossing has occurred Current channel counter status Current latch value (last measurement) Error display in a read or write job Job error number (in "job error = 1") Description Reset the status bits for comparator. The return value is designed as an input/output parameter so as to enable the value to be set to "0" by the calling program as well. and the "Job_error" bit is . the initiation bit is reset.g. Error handling: If an error occurs during a write and read job. Only one job value may be set at a time. Once the write job has ended. Read jobs are treated identically to write jobs. overflow and underflow "Write count value" job initiation "Write load value" job initiation "Write comparator value" job initiation "Write hysteresis" job initiation "Write pulse width" job initiation Value for the current write job "Read current load value" job initiation "Read current comparator value" job initiation "Read current hysteresis" job initiation "Read current pulse width" job initiation Return value for the current read job Table 1: FB1 interface description Using the write and read jobs: The write jobs are triggered via a "1" on the associated initiation bit (WR_). Once all the status bits have been reset. The returned value is output at the "RD_Read_value" parameter. underflow). The job activation is set and is then reset again by the block once it is completed.

Further information / Manuals: "Programmable Logic Controller S7-300 CPU 31xC Technological Functions". In addition. order no. The following table lists the components which have been used to create this entry and verify the functions described: Test environment PC platform PC operating system STEP 7 Optional packages S7-CPU Version Pentium III. The block can be used directly in the LAD/FBD/STL program. there is no need to change the program code in the block for a typical application. 260 MB main memory Microsoft Windows XP V5. An error code is displayed at the "Error number" output to facilitate further diagnostics. part of the documentation package.exe" file into a separate folder and then start the file with a doubleclick. 6ES7 398-8FA10-8AA. refer to the online help or to the manual mentioned below. Entry ID 12429336 Download: The attached download contains the STEP 7 project with the FB1 function block for calling SFB 47. The block is programmed and annotated in STL. This is dependent on the mode. Runnability and test environment: The sample program can be used on all the CPU models in the CPU 31xC compact series. However.1 SP1 STEP 7 V5. The error code is identical to the error code that is output by SFB 47. In order to find out the meanings of the error codes.exe ( 304 KB ) Copy the "FBCount31xC.2 SP1 CPU 314C 2PtP (314-6BF00-0AB0) . The STEP 7 project is extracted automatically and can then be opened or processed.set. 800MHz. FBCount31xC. The job error and the error code are reset if a job is executed correctly. the only block that has to be loaded from the standard library is SFB 47.

Sign up to vote on this title
UsefulNot useful