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Parameter Max. Units
I
D
@ T
C
= 25C Continuous Drain Current, V
GS
@ 10V 11
I
D
@ T
C
= 100C Continuous Drain Current, V
GS
@ 10V 7.0 A
I
DM
Pulsed Drain Current Q 44
P
D
@T
C
= 25C Power Dissipation 170 W
Linear Derating Factor 1.3 W/C
V
GS
Gate-to-Source Voltage 30 V
dv/dt Peak Diode Recovery dv/dt S 6.9 V/ns
T
J
Operating Junction and -55 to + 150
T
STG
Storage Temperature Range
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
C
Mounting torqe, 6-32 or M3 screw 10 lbfin (1.1Nm)
3/30/99
PD- 91809B
TO-220AB
SMPS MOSFET
HEXFET

Power MOSFET
Switch Mode Power Supply ( SMPS )
Uninterruptable Power Supply
High speed power switching
Benefits
Applications
Low Gate Charge Qg results in Simple
Drive Requirement
Improved Gate, Avalanche and dynamic
dv/dt Ruggedness
Fully Characterized Capacitance and
Avalanche Voltage and Current
V
DSS
Rds(on) max I
D
500V 0.52 11A
Applicable Off Line SMPS Topologies:
Two Transistor Forward
Half & Full Bridge
IRFB11N50A
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G S D
Notes Q through U are on page 8
Power Factor Correction Boost
Absolute Maximum Ratings
IRFB11N5OA
2 www.irf.com
Parameter Min. Typ. Max. Units Conditions
g
fs
Forward Transconductance 6.1 S V
DS
= 50V, I
D
= 6.6A
Q
g
Total Gate Charge 52 I
D
= 11A
Q
gs
Gate-to-Source Charge 13 nC V
DS
= 400V
Q
gd
Gate-to-Drain ("Miller") Charge 18 V
GS
= 10V, See Fig. 6 and 13 T
t
d(on)
Turn-On Delay Time 14 V
DD
= 250V
t
r
Rise Time 35 I
D
= 11A
t
d(off)
Turn-Off Delay Time 32 R
G
= 9.1
t
f
Fall Time 28 R
D
= 22,See Fig. 10 T
C
iss
Input Capacitance 1423 V
GS
= 0V
C
oss
Output Capacitance 208 V
DS
= 25V
C
rss
Reverse Transfer Capacitance 8.1 pF = 1.0MHz, See Fig. 5
C
oss
Output Capacitance 2000 V
GS
= 0V, V
DS
= 1.0V, = 1.0MHz
C
oss
Output Capacitance 55 V
GS
= 0V, V
DS
= 400V, = 1.0MHz
C
oss
eff. Effective Output Capacitance 97 V
GS
= 0V, V
DS
= 0V to 400V U
Parameter Min. Typ. Max. Units Conditions
V
(BR)DSS
Drain-to-Source Breakdown Voltage 500 V V
GS
= 0V, I
D
= 250A
R
DS(on)
Static Drain-to-Source On-Resistance 0.52 V
GS
= 10V, I
D
= 6.6A T
V
GS(th)
Gate Threshold Voltage 2.0 4.0 V V
DS
= V
GS
, I
D
= 250A
25
A
V
DS
= 500V, V
GS
= 0V
250 V
DS
= 400V, V
GS
= 0V, T
J
= 150C
Gate-to-Source Forward Leakage 100 V
GS
= 30V
Gate-to-Source Reverse Leakage -100
nA
V
GS
= -30V
Static @ T
J
= 25C (unless otherwise specified)
I
GSS
I
DSS
Drain-to-Source Leakage Current
Dynamic @ T
J
= 25C (unless otherwise specified)
ns
Parameter Typ. Max. Units
E
AS
Single Pulse Avalanche EnergyR 275 mJ
I
AR
Avalanche CurrentQ 11 A
E
AR
Repetitive Avalanche EnergyQ 17 mJ
Avalanche Characteristics
S
D
G
Parameter Min. Typ. Max. Units Conditions
I
S
Continuous Source Current MOSFET symbol
(Body Diode)

showing the
ISM Pulsed Source Current integral reverse
(Body Diode) Q

p-n junction diode.
V
SD
Diode Forward Voltage 1.5 V T
J
= 25C, I
S
= 11A, V
GS
= 0V T
t
rr
Reverse Recovery Time 510 770 ns T
J
= 25C, I
F
= 11A
Q
rr
Reverse RecoveryCharge 3.4 5.1 C di/dt = 100A/s

T
t
on
Forward Turn-On Time Intrinsic turn-on time is negligible (turn-on is dominated by L
S
+L
D
)
Diode Characteristics
11
44
A
Parameter Typ. Max. Units
R
JC
Junction-to-Case 0.75
R
CS
Case-to-Sink, Flat, Greased Surface 0.50 C/W
R
JA
Junction-to-Ambient 62
Thermal Resistance
IRFB11N50A
www.irf.com 3
Fig 4. Normalized On-Resistance
Vs. Temperature
Fig 2. Typical Output Characteristics Fig 1. Typical Output Characteristics
Fig 3. Typical Transfer Characteristics
0.1
1
10
100
0.1 1 10 100
20s PULSE WIDTH
T = 25 C J

TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I



,


D
r
a
i
n
-
t
o
-
S
o
u
r
c
e

C
u
r
r
e
n
t

(
A
)
DS
D
4.5V
1
10
100
1 10 100
20s PULSE WIDTH
T = 150 C J

TOP
BOTTOM
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
V , Drain-to-Source Voltage (V)
I



,


D
r
a
i
n
-
t
o
-
S
o
u
r
c
e

C
u
r
r
e
n
t

(
A
)
DS
D
4.5V
-60 -40 -20 0 20 40 60 80 100 120 140 160
0.0
0.5
1.0
1.5
2.0
2.5
3.0
T , Junction Temperature ( C)
R












,

D
r
a
i
n
-
t
o
-
S
o
u
r
c
e

O
n

R
e
s
i
s
t
a
n
c
e
(
N
o
r
m
a
l
i
z
e
d
)
J
D
S
(
o
n
)

V =
I =
GS
D
10V
11A
0.1
1
10
100
4.0 5.0 6.0 7.0 8.0 9.0
V = 50V
20s PULSE WIDTH
DS
V , Gate-to-Source Voltage (V)
I



,


D
r
a
i
n
-
t
o
-
S
o
u
r
c
e

C
u
r
r
e
n
t

(
A
)
GS
D
T = 150 C
J

T = 25 C
J

IRFB11N5OA
4 www.irf.com
Fig 8. Maximum Safe Operating Area
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 7. Typical Source-Drain Diode
Forward Voltage
0 10 20 30 40 50
0
4
8
12
16
20
Q , Total Gate Charge (nC)
V





,

G
a
t
e
-
t
o
-
S
o
u
r
c
e

V
o
l
t
a
g
e

(
V
)
G
G
S
FOR TEST CIRCUIT
SEE FIGURE
I = D
13
6.6A
V = 100V
DS
V = 250V
DS
V = 400V
DS
0.1
1
10
100
0.0 0.4 0.8 1.2 1.6
V ,Source-to-Drain Voltage (V)
I





,

R
e
v
e
r
s
e

D
r
a
i
n

C
u
r
r
e
n
t

(
A
)
SD
S
D
V = 0 V
GS
T = 25 C
J

T = 150 C
J

0
400
800
1200
1600
2000
2400
1 10 100 1000
C
,

C
a
p
a
c
i
t
a
n
c
e

(
p
F
)
DS
V , Drai n-to-Source Voltage (V)
A
V = 0V, f = 1MHz
C = C + C , C SHORTED
C = C
C = C + C
GS
iss gs gd ds
rss gd
oss ds gd
C
i s s
C o s s
C r s s
11A
0.1
1
10
100
1000
10 100 1000 10000
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
Single Pulse
T
T
= 150 C
= 25 C

J
C
V , Drain-to-Source Voltage (V)
I



,

D
r
a
i
n

C
u
r
r
e
n
t

(
A
)
I



,

D
r
a
i
n

C
u
r
r
e
n
t

(
A
)
DS
D
10us
100us
1ms
10ms
IRFB11N50A
www.irf.com 5
Fig 10a. Switching Time Test Circuit
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
Fig 10b. Switching Time Waveforms
V
DS
Pulse Width 1 s
Duty Factor 0.1 %
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current Vs.
Case Temperature
25 50 75 100 125 150
0
2
4
6
8
10
12
T , Case Temperature ( C)
I



,

D
r
a
i
n

C
u
r
r
e
n
t

(
A
)

C
D
0.01
0.1
1
0.00001 0.0001 0.001 0.01 0.1 1
Notes:
1. Duty factor D = t / t
2. Peak T = P x Z + T
1 2
J DM thJC C
P
t
t
DM
1
2
t , Rectangular Pulse Duration (sec)
T
h
e
r
m
a
l

R
e
s
p
o
n
s
e
(
Z








)
1
t
h
J
C
0.01
0.02
0.05
0.10
0.20
D = 0.50
SINGLE PULSE
(THERMAL RESPONSE)
IRFB11N5OA
6 www.irf.com
Q
G
Q
GS
Q
GD
V
G
Charge
D.U.T.
V
DS
I
D
I
G
3mA
V
GS
.3F
50K
.2F
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
10 V
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
Fig 12b. Unclamped Inductive Waveforms
Fig 12a. Unclamped Inductive Test Circuit
t
p
V
(BR)DSS
I
AS
R
G
I
AS
0.01 t
p
D.U.T
L
V
DS
+
-
V
D D
DRIVER
A
1 5V
20V
Fig 12d. Typical Drain-to-Source Voltage
Vs. Avalanche Current
5 8 0
6 0 0
6 2 0
6 4 0
6 6 0
0. 0 1. 0 2. 0 3. 0 4. 0 5. 0 6. 0 7. 0
A
D
S
a
v
av
I , Aval anche Current (A)
V










,

A
v
a
l
a
n
c
h
e

V
o
l
t
a
g
e

(
V
)
25 50 75 100 125 150
0
100
200
300
400
500
600
Starting T , Junction Temperature ( C)
E





,

S
i
n
g
l
e

P
u
l
s
e

A
v
a
l
a
n
c
h
e

E
n
e
r
g
y

(
m
J
)
J
A
S

I
D
TOP
BOTTOM
4.9A
7.0A
11A
IRFB11N50A
www.irf.com 7
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P.W.
Period
+
-
+
+
+ -
-
-
Fig 14. For N-Channel HEXFETS
* V
GS
= 5V for Logic Level Devices
Peak Diode Recovery dv/dt Test Circuit
S
T
R
R
G
V
DD
dv/dt controlled by R
G
Driver same type as D.U.T.
I
SD
controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
Q
*
IRFB11N5OA
8 www.irf.com
LEAD ASSIGNMENT S
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
- B -
1 .32 (. 052)
1 .22 (. 048)
3 X
0.5 5 (.0 22)
0.4 6 (.0 18)
2.9 2 (.11 5)
2.6 4 (.10 4)
4 .69 ( .1 85 )
4 .20 ( .1 65 )
3X
0.93 (.03 7)
0.69 (.02 7)
4.0 6 (.16 0)
3.5 5 (.14 0)
1.15 (.04 5)
MIN
6 .47 (.2 55)
6 .10 (.2 40)
3 .78 ( .149 )
3 .54 ( .139 )
- A -
10.5 4 (.4 15)
10.2 9 (.4 05) 2.87 (.11 3)
2.62 (.10 3)
15 .24 ( .6 00 )
14 .84 ( .5 84 )
14 .09 ( .555 )
13 .47 ( .530 )
3X
1 .40 ( .0 55)
1 .15 ( .0 45)
2.54 (.10 0)
2X
0.3 6 (.01 4) M B A M
4
1 2 3
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5 M, 19 82. 3 OUTLINE CONF ORMS T O J EDEC OUT LINE T O-2 20 AB.
2 CONTROLLING DIMENSION : INCH 4 HEATSINK & LEAD MEASUREMENTS DO N OT INCLUDE BURRS.
Part Marking Information
TO-220AB
Package Outline
TO-220AB Outline
Dimensions are shown in millimeters (inches)
PART NUMBER INTERNATIONAL
RECTI FIER
LOGO
EXAMPLE : THIS IS AN IRF1010
WITH ASSEMBLY
LOT CODE 9B1M
ASSEMBLY
LOT CODE
DATE CODE
(YYWW)
YY = YEAR
WW = WEEK
9246
IRF1010
9B 1M
A
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 15 Lincoln Court, Brampton, Ontario L6T3Z2, Tel: (905) 453 2200
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 1 Kim Seng Promenade, Great World City West Tower, 13-11, Singapore 237994 Tel: ++ 65 221 8371
IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936
http://www.irf.com/ Data and specifications subject to change without notice 3/99
Q Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
S I
SD
11A, di/dt 140A/s, V
DD
V
(BR)DSS
,
T
J
150C
Notes:
R Starting T
J
= 25C, L = 4.5mH
R
G
= 25, I
AS
= 11A. (See Figure 12)
T Pulse width 300s; duty cycle 2%.
U C
oss
eff. is a fixed capacitance that gives the same charging time
as C
oss
while V
DS
is rising from 0 to 80% V
DSS

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