Quanta Zqa - Rev 1a

1 2 3 4 5 6 7 8
ZQA SOLE UMA SYSTEM DIAGRAM

Danube Platform
CPU THERMAL PWM FAN SCH. (Main Stream)
DDR3- SODIMM1 DDR3 channel A AMD Champlain SENSOR
CPU (PROCHOT)
E.C. (CPUFAN#)
PAGE 5 S1G4 Processor (Reserve Only)
25MHz 32.768KHz
A
PAGE 4 PAGE 33
35mm X 35mm A
DDR3- SODIMM2 DDR3 channel B 638P (PGA) 35W

PAGE 2,3,4 CPU_CLK CLK_PCI_775
PAGE 5 NBGFX_CLK From SB
CLK GEN
NBGPP_CLK SB820M PCLK_DEBUG
CPU SideBand TemperatureSense I2C SBLINK_CLK
PCB STACK UP HT3 PAGE 10
1.8GHz
LAYER 1 : TOP ATI EXT HDMI HDMI PAGE 23
LAYER 2 : GND PCI-Express 16X Park XT
EXT CRT
LAYER 3 : IN1 PCI-Expresss 128-bit M2 Pkg CRT PAGE 22
LAYER 4 : IN2 NORTH BRIDGE 29mm X 29mm
EXT LVDS
LAYER 5 : VCC P0 P2 PAGE 16,17,18,19,20,21 LVDS
RS880M GFX Engine: 500MHz PAGE 22
LAYER 6 : BOT
LAN Mini PCI-E
BROADCOM Card A11 VRAM DDR3
B IV@ -----> iGPU EV@ -----> dGPU PCIE-LAN 64MX16X4,64 bit B
BCM57780 (Wireless LAN) 21mm X 21mm, 528pin BGA PAGE 21
SPE@ -----> Option Notice 800MHz
(10/100/1000) INT HDMI
TDP: 13W
PAGE 24 PAGE 26 0.95 ~ 1.1V INT CRT
25MHz
PAGE 6,7,8,9 INT LVDS
RJ45
A-LINK
PAGE 25
SOUTH BRIDGE
SATA - HDD SATA0 150MB SB820M
3 Gb/s
PAGE 27 P0 P9 P13
FFC
A12
USB2.0 Port Blue Tooth Web-Camera
C SATA - ODD SATA1 150MB on board x1 C
CHARGER (ISL88731A) 23mm X 23mm, 605pin BGA
3 Gb/s PAGE 31 PAGE 31 PAGE 22 USB BOARD
PAGE 35 PAGE 27
P4 P10 USB2.0 Ports x3
No PCI I/F
AMD CPU CORE (ISL6265) PAGE 31
CPU Mini Card CardReader
PAGE 37
PCLK_DEBUG WLAN & Debug AU6347
TDP: 4.9W
PAGE 20 PAGE 30
NB_CORE (UP6111AQDD) PAGE 10,11,12,13, 14
PAGE 39 NB
LPC Azalia
12MHz
0.9V/DDR 1.5V(RT8207) CLK_PCI_775
PAGE 40 Winbond KBC Audio CODEC
NPCE781L RTL ALC272X
CPU SideBand TemperatureSense I2C
SYSTEM 5V/3V (RT8206) PAGE 34 PAGE 28
PAGE 36
D D
1.1V(UP6111AQDD)
PAGE 38
Keyboard SPI ROM Digital MIC AUDIO CONN Speaker CN PROJECT : ZQA
TouchPad (H.P./ MIC)
Quanta Computer Inc.
Discharge /Thermal protec
PAGE 33 PAGE 34 PAGE 28 PAGE 29 PAGE 29 Size Document Number Rev
PAGE 44 1A
Block Diagram
Date: Monday, May 31, 2010 Sheet 1 of 48
1 2 3 4 5 6 7 8
5 4 3 2 1
+2.5V W/S= 15 mil/20mil +CPUVDDA

S1G4 (CPU) CPU_LDT_RST# 300/F_4 R396
2
+1.5V
L69 BLM21PG221SN1D(220_2A)_8 +CPUVDDA
CPU_LDT_REQ#_CPU *300/F_4 R392
+1.1V 1.1V@1.5A +1.1V_VLDT 2.5V@250mA C661 LS0805-100M-N C656 C650 C653 C658 CPU_LDT_STOP# 300/F_4 R106
4.7U/6.3V_6 4.7U/6.3V_6 .22u/6.3V_4 3900p/25V_4
CPU CLK
*10u/6.3V_8
A19 +CPUVDDA
Keep trace from resisor to CPU within 0.6" 250mA U22D
R355 *SHORT_PAD keep trace from caps to CPU within 1.2"
U22A W/S= 15 mil/20mil
+CPUVDDA F8 M11
C591 10u/6.3V_8 +1.1V_VLDT +1.1V_VLDT 10u/6.3V_8 C597 CLK_CPU_BCLKP_C R402 169/F_4 CLK_CPU_BCLKN_C +CPUVDDA VDDA1 VSS
D1 VLDT_A0 HT LINK VLDT_B0 AE2 F9 VDDA2 RSVD11 W18
C608 10u/6.3V_8 +1.1V_VLDT D2 AE3 +1.1V_VLDT .22u/6.3V_4 C605
D C604 .22u/6.3V_4 +1.1V_VLDT VLDT_A1 VLDT_B1 +1.1V_VLDT 180p/50V_4 C607 C642 3900p/25V_4 CLK_CPU_BCLKP_C CPU_SVC D
D3 VLDT_A2 VLDT_B2 AE4 [10] CLK_CPU_BCLKP_PR A9 CLKIN_H SVC A6
C606 180p/50V_4 +1.1V_VLDT D4 AE5 +1.1V_VLDT C639 3900p/25V_4 CLK_CPU_BCLKN_C A8 A4 CPU_SVD
VLDT_A3 VLDT_B3 [10] CLK_CPU_BCLKN_PR CLKIN_L SVD
HT_CADINP0 E3 AD1 HT_CADOUTP0 CPU_LDT_RST# B7
[6] HT_CADINP0 L0_CADIN_H0 L0_CADOUT_H0 HT_CADOUTP0 [6] [10] CPU_LDT_RST# RESET_L
HT_CADINN0 E2 AC1 HT_CADOUTN0 CPU_PWRGD A7
[6] HT_CADINN0 L0_CADIN_L0 L0_CADOUT_L0 HT_CADOUTN0 [6] [10,37] CPU_PWRGD PWROK
HT_CADINP1 E1 AC2 HT_CADOUTP1 CPU_LDT_STOP# F10 AF6 CPU_THERMTRIP_L#
[6] HT_CADINP1 L0_CADIN_H1 L0_CADOUT_H1 HT_CADOUTP1 [6] [8,10] CPU_LDT_STOP# LDTSTOP_L THERMTRIP_L
HT_CADINN1 F1 AC3 HT_CADOUTN1 CPU_LDT_REQ#_CPU C6 AC7 CPU_PROCHOT_L#
[6] HT_CADINN1 L0_CADIN_L1 L0_CADOUT_L1 HT_CADOUTN1 [6] LDTREQ_L PROCHOT_L
HT_CADINP2 G3 AB1 HT_CADOUTP2 AA8
[6] HT_CADINP2 L0_CADIN_H2 L0_CADOUT_H2 HT_CADOUTP2 [6] MEMHOT_L
HT_CADINN2 G2 AA1 HT_CADOUTN2 AF4
[6] HT_CADINN2 L0_CADIN_L2 L0_CADOUT_L2 HT_CADOUTN2 [6] [4] CPU_SIC SIC
HT_CADINP3 G1 AA2 HT_CADOUTP3 AF5
[6] HT_CADINP3 L0_CADIN_H3 L0_CADOUT_H3 HT_CADOUTP3 [6] [4] CPU_SID SID
HT_CADINN3 H1 AA3 HT_CADOUTN3 CPU_ALERT# AE6 W7 H_THRMDC
[6] HT_CADINN3 L0_CADIN_L3 L0_CADOUT_L3 HT_CADOUTN3 [6] T146 ALERT_L THERMDC T60
HT_CADINP4 J1 W2 HT_CADOUTP4 W8 H_THRMDA
[6] HT_CADINP4 L0_CADIN_H4 L0_CADOUT_H4 HT_CADOUTP4 [6] THERMDA T63
HT_CADINN4 K1 W3 HT_CADOUTN4 R102 44.2/F_4 CPU_HTREF0 R6
[6] HT_CADINN4 L0_CADIN_L4 L0_CADOUT_L4 HT_CADOUTN4 [6] HT_REF0
HT_CADINP5 L3 V1 HT_CADOUTP5 +1.1V_VLDT R103 44.2/F_4 CPU_HTREF1 P6
[6] HT_CADINP5 L0_CADIN_H5 L0_CADOUT_H5 HT_CADOUTP5 [6] HT_REF1
HT_CADINN5 L2 U1 HT_CADOUTN5 place them to CPU within 1.5"
[6] HT_CADINN5 L0_CADIN_L5 L0_CADOUT_L5 HT_CADOUTN5 [6]
HT_CADINP6 L1 U2 HT_CADOUTP6 F6 W9 VDDIO_FB_H
[6] HT_CADINP6 L0_CADIN_H6 L0_CADOUT_H6 HT_CADOUTP6 [6] [37] CPU_VDD0_FB_H VDD0_FB_H VDDIO_FB_H T66
HT_CADINN6 M1 U3 HT_CADOUTN6 E6 Y9 VDDIO_FB_L
[6] HT_CADINN6 L0_CADIN_L6 L0_CADOUT_L6 HT_CADOUTN6 [6] [37] CPU_VDD0_FB_L VDD0_FB_L VDDIO_FB_L T68
HT_CADINP7 N3 T1 HT_CADOUTP7
[6] HT_CADINP7 L0_CADIN_H7 L0_CADOUT_H7 HT_CADOUTP7 [6]
HT_CADINN7 N2 R1 HT_CADOUTN7 Y6 H6
[6] HT_CADINN7 L0_CADIN_L7 L0_CADOUT_L7 HT_CADOUTN7 [6] [37] CPU_VDD1_FB_H VDD1_FB_H VDDNB_FB_H CPU_VDDNB_FB_H [37]
HT_CADINP8 E5 AD4 HT_CADOUTP8 AB6 G6
[6] HT_CADINP8 L0_CADIN_H8 L0_CADOUT_H8 HT_CADOUTP8 [6] T70 VDD1_FB_L VDDNB_FB_L CPU_VDDNB_FB_L [37]
HT_CADINN8 F5 AD3 HT_CADOUTN8
HT_CADINP9 F3 AD5 HT_CADOUTP9 CPU_DBRDY G10
[6] HT_CADINP9 L0_CADIN_H9 L0_CADOUT_H9 HT_CADOUTP9 [6] T72 DBRDY
HT_CADINN9 F4 AC5 HT_CADOUTN9 CPU_TMS AA9 E10 CPU_DBREQ# R153 300/F_4 +1.5VSUS
[6] HT_CADINN9 L0_CADIN_L9 L0_CADOUT_L9 HT_CADOUTN9 [6] T73 TMS DBREQ_L
HT_CADINP10 G5 AB4 HT_CADOUTP10 CPU_TCK AC9
[6] HT_CADINP10 L0_CADIN_H10 L0_CADOUT_H10 HT_CADOUTP10 [6] T154 TCK
HT_CADINN10 H5 AB3 HT_CADOUTN10 CPU_TRST# AD9 AE9 CPU_TDO
[6] HT_CADINN10 L0_CADIN_L10 L0_CADOUT_L10 HT_CADOUTN10 [6] T156 TRST_L TDO T157
HT_CADINP11 H3 AB5 HT_CADOUTP11 CPU_TDI AF9
[6] HT_CADINP11 L0_CADIN_H11 L0_CADOUT_H11 HT_CADOUTP11 [6] T155 TDI
HT_CADINN11 H4 AA5 HT_CADOUTN11
HT_CADINP12 K3 Y5 HT_CADOUTP12 CPUTEST23 AD7 J7
[6] HT_CADINP12 L0_CADIN_H12 L0_CADOUT_H12 HT_CADOUTP12 [6] TEST23 TEST28_H
HT_CADINN12 K4 W5 HT_CADOUTN12 H8
[6] HT_CADINN12 L0_CADIN_L12 L0_CADOUT_L12 HT_CADOUTN12 [6] TEST28_L
HT_CADINP13 L5 V4 HT_CADOUTP13 CPUTEST18 H10
C [6] HT_CADINP13 L0_CADIN_H13 L0_CADOUT_H13 HT_CADOUTP13 [6] TEST18 C
HT_CADINN13 M5 V3 HT_CADOUTN13 CPUTEST19 G9 D7 CPUTEST17
[6] HT_CADINN13 L0_CADIN_L13 L0_CADOUT_L13 HT_CADOUTN13 [6] TEST19 TEST17 T76
HT_CADINP14 M3 V5 HT_CADOUTP14 E7 CPUTEST16
[6] HT_CADINP14 L0_CADIN_H14 L0_CADOUT_H14 HT_CADOUTP14 [6] TEST16 T74
HT_CADINN14 M4 U5 HT_CADOUTN14 +1.5VSUS R159 510/F_4 CPUTEST25H E9 F7 CPUTEST15
[6] HT_CADINN14 L0_CADIN_L14 L0_CADOUT_L14 HT_CADOUTN14 [6] TEST25_H TEST15 T71
HT_CADINP15 N5 T4 HT_CADOUTP15 R152 510/F_4 CPUTEST25L E8 C7 CPUTEST14
[6] HT_CADINP15 L0_CADIN_H15 L0_CADOUT_H15 HT_CADOUTP15 [6] TEST25_L TEST14 T78
HT_CADINN15 P5 T3 HT_CADOUTN15 place them to CPU within 1.5"
CPUTEST21 AB8 C3
HT_CLKINP0 HT_CLKOUTP0 CPUTEST20 TEST21 TEST7
[6] HT_CLKINP0 J3 Y1 HT_CLKOUTP0 [6] AF7 K8
HT_CLKINN0 L0_CLKIN_H0 L0_CLKOUT_H0 HT_CLKOUTN0 CPUTEST24 TEST20 TEST10
[6] HT_CLKINN0 J2 W1 HT_CLKOUTN0 [6] AE7
HT_CLKINP1 L0_CLKIN_L0 L0_CLKOUT_L0 HT_CLKOUTP1 CPUTEST22 TEST24
[6] HT_CLKINP1 J5 Y4 HT_CLKOUTP1 [6] AE8 C4
HT_CLKINN1 L0_CLKIN_H1 L0_CLKOUT_H1 HT_CLKOUTN1 CPUTEST12 TEST22 TEST8
[6] HT_CLKINN1 K5 Y3 HT_CLKOUTN1 [6] AC8
L0_CLKIN_L1 L0_CLKOUT_L1 R406 1K_4 CPUTEST27 TEST12
+1.5VSUS AF8
HT_CTLINP0 HT_CTLOUTP0 TEST27 CPUTEST29H
[6] HT_CTLINP0 N1 R2 HT_CTLOUTP0 [6] C9
HT_CTLINN0 L0_CTLIN_H0 L0_CTLOUT_H0 HT_CTLOUTN0 R403 *300/F_4 TEST29_H
[6] HT_CTLINN0 P1 R3 HT_CTLOUTN0 [6] C2 C8
HT_CTLINP1 L0_CTLIN_L0 L0_CTLOUT_L0 HT_CTLOUTP1 TEST9 TEST29_L
[6] HT_CTLINP1 P3 L0_CTLIN_H1 L0_CTLOUT_H1 T5 HT_CTLOUTP1 [6] AA6 TEST6
HT_CTLINN1 P4 R5 HT_CTLOUTN1 R155
[6] HT_CTLINN1 L0_CTLIN_L1 L0_CTLOUT_L1 HT_CTLOUTN1 [6]
A3 H18 80.6/F_4
RSVD1 RSVD10
FOX PZ63826-284R-41F A5
RSVD2 RSVD9
H19
DG0^8000004 IC SOCKET SMD 638P S1(P1.27,H3.2) SOCKET_638_PIN B3 AA7 CPUTEST29L
RSVD3 RSVD8
B5 D5
MLX 47296-4131 C1
RSVD4 RSVD7
C5
DG0^8000003 IC SOCKET SMD 638P S1(P1.27,H3.2) RSVD5 RSVD6
TYC 4-1903401-2
SOCKET_638_PIN
DG0^8000005 IC SOCKET SMD 638P S1(P1.27,H3.2)
+3V
CNTR_VREF
CNTR_VREF [4] Serial VID VFIX MODE VID Override Circuit
C627 .1u/10V_4
B B
R119 20K/F_4 R389 34.8K/F_4 R398 300/F_4
SVC SVD Voltage Output
+1.5V
+1.5VSUS R382 1K_4 0 0 1.1V

+1.5VSUS R395 1K_4 0 1 1.0V
1 0 0.9V
CPU_SVC
CPU_SVD
CPU_SVC [37] 1 1 0.8V
CPU_SVD [37]
CPU_PWRGD
+1.5VSUS R367 10K_4
R390 *220_4
+1.5VSUS R381 300/F_4
Q12 R388 *220_4
2
MMBT3904
R399 *220_4
CPU_PROCHOT_L# 1 3
+1.5VSUS PM_THERM# [33]
CPUTEST24 R397 1K_4

HDT Connector
3
CPUTEST23 R391 1K_4

CPUTEST20 R394 1K_4
CPU_PROCHOT# [10]
CPUTEST22 R401 1K_4
2 Q16 CPUTEST12 R136 1K_4
[34] HWPG
BSS138_NL/SOT23 CPUTEST15 R138 *300/F_4
CPUTEST14 R149 *300/F_4
CPUTEST19 R135 1K_4
A CPUTEST18 R140 1K_4 A
1
R405 CPUTEST21 R139 1K_4

1K_4
+1.5VSUS
R387 1K_4 PROJECT : ZQA

2
Q15
CPU_THERMTRIP_L#
MMBT3904 Quanta Computer Inc.
1 3 SYS_SHDN# [36,44]
Size Document Number Rev
S1G4 HT,CTL I/F 1/3 1A

5 4 3 2 1
A B C D E
35W CPU support 0.9V VDDR=> 0.9V support 1066 / 800 DDR
45W CPU support 1.05V VDDR= >1.05V support 1333 / 1066 / 800 DDR
VDDR=>1.75A CPU_VDDR CPU_VDDR

[5] M_B_DQ[0..63]
Processor Memory Interface
CPU_VDDR U22B
+1.5VSUS
PLACE THEM CLOSE TO D10 VDDR1 MEM:CMD/CTRL/CLKVDDR5 W 10 U22C
CPU WITHIN 1" C10 VDDR2 VDDR6 AC10 M_A_DQ[0..63] [5]
B10 AB10 MEM:DATA
VDDR3 VDDR7 R144 M_B_DQ0 M_A_DQ0
AD10 VDDR4 VDDR8 AA10 C11 MB_DATA0 MA_DATA0 G12
+1.5VSUS A10 M_B_DQ1 A11 F12 M_A_DQ1
R410 39.2/F_4 M_ZP VDDR9 1K/F_4 M_B_DQ2 MB_DATA1 MA_DATA1 M_A_DQ2
AF10 MEMZP A14 MB_DATA2 MA_DATA2 H14
R408 39.2/F_4 M_ZN AE10 Y10 CPU_VTT_SENSE R141 *0_4 M_B_DQ3 B14 G14 M_A_DQ3
4 MEMZN VDDR_SENSE M_B_DQ4 MB_DATA3 MA_DATA3 M_A_DQ4 4
G11 MB_DATA4 MA_DATA4 H11
C655 H16 W 17 MEMVREF_CPU M_B_DQ5 E11 H12 M_A_DQ5
[5] M_A_RST# MA_RESET_L MEMVREF MB_DATA5 MA_DATA5
10u/6.3V_8 M_B_DQ6 D12 C13 M_A_DQ6
M_B_DQ7 MB_DATA6 MA_DATA6 M_A_DQ7
[5] M_A_ODT0 T19 MA0_ODT0 MB_RESET_L B18 M_B_RST# [5] A13 MB_DATA7 MA_DATA7 E13
V22 R143 M_B_DQ8 A15 H15 M_A_DQ8
[5] M_A_ODT1 MA0_ODT1 MB_DATA8 MA_DATA8
U21 W 26 M_B_DQ9 A16 E15 M_A_DQ9
MA1_ODT0 MB0_ODT0 M_B_ODT0 [5] MB_DATA9 MA_DATA9
V19 W 23 C231 C230 1K/F_4 M_B_DQ10 A19 E17 M_A_DQ10
MA1_ODT1 MB0_ODT1 M_B_ODT1 [5] MB_DATA10 MA_DATA10
Y26 .1u/10V_4 1000P/50V_4 M_B_DQ11 A20 H17 M_A_DQ11
MB1_ODT0 M_B_DQ12 MB_DATA11 MA_DATA11 M_A_DQ12
[5] M_A_CS#0 T20 MA0_CS_L0 C14 MB_DATA12 MA_DATA12 E14
U19 V26 M_B_DQ13 D14 F14 M_A_DQ13
[5] M_A_CS#1 MA0_CS_L1 MB0_CS_L0 M_B_CS#0 [5] MB_DATA13 MA_DATA13
U20 W 25 M_B_DQ14 C18 C17 M_A_DQ14
MA1_CS_L0 MB0_CS_L1 M_B_CS#1 [5] MB_DATA14 MA_DATA14
V20 U22 M_B_DQ15 D18 G17 M_A_DQ15
MA1_CS_L1 MB1_CS_L0 M_B_DQ16 MB_DATA15 MA_DATA15 M_A_DQ16
D20 MB_DATA16 MA_DATA16 G18
J22 J25 M_B_DQ17 A21 C19 M_A_DQ17
[5] M_A_CKE0 MA_CKE0 MB_CKE0 M_B_CKE0 [5] MB_DATA17 MA_DATA17
J20 H26 M_B_DQ18 D24 D22 M_A_DQ18
[5] M_A_CKE1 MA_CKE1 MB_CKE1 M_B_CKE1 [5] MB_DATA18 MA_DATA18
M_B_DQ19 C25 E20 M_A_DQ19
[5] M_A_CLKP1 N19 MA_CLK_H5 MB_CLK_H5 P22 M_B_CLKP1 [5] B20 MB_DATA20 MA_DATA20 E18
N20 R22 M_B_DQ21 C20 F18 M_A_DQ21
[5] M_A_CLKN1 MA_CLK_L5 MB_CLK_L5 M_B_CLKN1 [5] MB_DATA21 MA_DATA21
E16 A17 M_B_DQ22 B24 B22 M_A_DQ22
MA_CLK_H1 MB_CLK_H1 M_B_DQ23 MB_DATA22 MA_DATA22 M_A_DQ23
F16 MA_CLK_L1 MB_CLK_L1 A18 C24 MB_DATA23 MA_DATA23 C23
Y16 AF18 M_B_DQ24 E23 F20 M_A_DQ24
MA_CLK_H7 MB_CLK_H7 M_B_DQ25 MB_DATA24 MA_DATA24 M_A_DQ25
AA16 MA_CLK_L7 MB_CLK_L7 AF17 E24 MB_DATA25 MA_DATA25 F22
P19 R26 M_B_DQ26 G25 H24 M_A_DQ26
[5] M_A_CLKP2 MA_CLK_H4 MB_CLK_H4 M_B_CLKP2 [5] MB_DATA26 MA_DATA26
P20 R25 M_B_DQ27 G26 J19 M_A_DQ27
[5] M_A_CLKN2 MA_CLK_L4 MB_CLK_L4 M_B_CLKN2 [5] MB_DATA27 MA_DATA27
M_B_DQ28 C26 E21 M_A_DQ28
M_A_A0 M_B_A0 M_B_DQ29 MB_DATA28 MA_DATA28 M_A_DQ29
N21 MA_ADD0 MB_ADD0 P24 D26 MB_DATA29 MA_DATA29 E22
M_A_A1 M20 N24 M_B_A1 M_B_DQ30 G23 H20 M_A_DQ30
M_A_A2 MA_ADD1 MB_ADD1 M_B_A2 M_B_DQ31 MB_DATA30 MA_DATA30 M_A_DQ31
N22 MA_ADD2 MB_ADD2 P26 G24 MB_DATA31 MA_DATA31 H22
M_A_A3 M19 N23 M_B_A3 M_B_DQ32 AA24 Y24 M_A_DQ32
3 M22 MA_ADD4 MB_ADD4 N26 AA23 MB_DATA33 MA_DATA33 AB24 3
M_A_A5 L20 L23 M_B_A5 M_B_DQ34 AD24 AB22 M_A_DQ34
M24 MA_ADD6 MB_ADD6 N25 AE24 MB_DATA35 MA_DATA35 AA21
M_A_A7 L21 L24 M_B_A7 M_B_DQ36 AA26 W 22 M_A_DQ36
L19 MA_ADD8 MB_ADD8 M26 AA25 MB_DATA37 MA_DATA37 W 21
M_A_A9 K22 K26 M_B_A9 M_B_DQ38 AD26 Y22 M_A_DQ38
R21 MA_ADD10 MB_ADD10 T26 AE25 MB_DATA39 MA_DATA39 AA22
M_A_A11 L22 L26 M_B_A11 M_B_DQ40 AC22 Y20 M_A_DQ40
K20 MA_ADD12 MB_ADD12 L25 AD22 MB_DATA41 MA_DATA41 AA20
M_A_A13 V24 W 24 M_B_A13 M_B_DQ42 AE20 AA18 M_A_DQ42
K24 MA_ADD14 MB_ADD14 J23 AF20 MB_DATA43 MA_DATA43 AB18
M_A_A15 K19 J24 M_B_A15 M_B_DQ44 AF24 AB21 M_A_DQ44
[5] M_A_A[0..15] MA_ADD15 MB_ADD15 M_B_A[0..15] [5] MB_DATA44 MA_DATA44
M_B_DQ45 AF23 AD21 M_A_DQ45
[5] M_A_BANK0 R20 MA_BANK0 MB_BANK0 R24 M_B_BANK0 [5] AC20 MB_DATA46 MA_DATA46 AD19
R23 U26 M_B_DQ47 AD20 Y18 M_A_DQ47
[5] M_A_BANK1 MA_BANK1 MB_BANK1 M_B_BANK1 [5] MB_DATA47 MA_DATA47
J21 J26 M_B_DQ48 AD18 AD17 M_A_DQ48
[5] M_A_BANK2 MA_BANK2 MB_BANK2 M_B_BANK2 [5] MB_DATA48 MA_DATA48
M_B_DQ49 AE18 W 16 M_A_DQ49
[5] M_A_RAS# R19 MA_RAS_L MB_RAS_L U25 M_B_RAS# [5] AC14 MB_DATA50 MA_DATA50 W 14
T22 U24 M_B_DQ51 AD14 Y14 M_A_DQ51
[5] M_A_CAS# MA_CAS_L MB_CAS_L M_B_CAS# [5] MB_DATA51 MA_DATA51
T24 U23 M_B_DQ52 AF19 Y17 M_A_DQ52
[5] M_A_WE# MA_W E_L MB_W E_L M_B_WE# [5] MB_DATA52 MA_DATA52
M_B_DQ53 AC18 AB17 M_A_DQ53
AF16 MB_DATA54 MA_DATA54 AB15
SOCKET_638_PIN M_B_DQ55 AF15 AD15 M_A_DQ55
AF13 MB_DATA56 MA_DATA56 AB13
CPU_VDDR M_B_DQ57 AC12 AD13 M_A_DQ57
Place close to socket M_B_DQ58 AB11
MB_DATA57 MA_DATA57
Y12 M_A_DQ58
Y11 MB_DATA59 MA_DATA59 W 11
M_B_DQ60 AE14 AB14 M_A_DQ60
AF14 MB_DATA61 MA_DATA61 AA14
C339 C652 C269 C346 C367 C356 C302 C259 M_B_DQ62 AF11 AB12 M_A_DQ62
2
*4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 .22u/6.3V_4 .22u/6.3V_4 .22u/6.3V_4 .22u/6.3V_4 M_B_DQ63 MB_DATA62 MA_DATA62 M_A_DQ63 2
[5] M_B_DM[0..7] AD11 MB_DATA63 MA_DATA63 AA12 M_A_DM[0..7] [5]
CPU_VDDR M_B_DM0 A12 E12 M_A_DM0
M_B_DM1 MB_DM0 MA_DM0 M_A_DM1
B16 MB_DM1 MA_DM1 C15
M_B_DM2 A22 E19 M_A_DM2
E25 MB_DM3 MA_DM3 F24
M_B_DM4 AB26 AC24 M_A_DM4
C351 C365 C325 C315 C317 C283 C327 C244 M_B_DM5 MB_DM4 MA_DM4 M_A_DM5
AE22 MB_DM5 MA_DM5 Y19
1000P/50V_4 1000P/50V_4 1000P/50V_4 1000P/50V_4 180p/50V_4 180p/50V_4 180p/50V_4 180p/50V_4 M_B_DM6 AC16 AB16 M_A_DM6
AD12 MB_DM7 MA_DM7 Y13
[5] M_B_DQSP0 C12 MB_DQS_H0 MA_DQS_H0 G13 M_A_DQSP0 [5]

[5] M_B_DQSN0 B12 MB_DQS_L0 MA_DQS_L0 H13 M_A_DQSN0 [5]
[5] M_B_DQSP1 D16 MB_DQS_H1 MA_DQS_H1 G16 M_A_DQSP1 [5]
[5] M_B_DQSN1 C16 MB_DQS_L1 MA_DQS_L1 G15 M_A_DQSN1 [5]
[5] M_B_DQSP2 A24 MB_DQS_H2 MA_DQS_H2 C22 M_A_DQSP2 [5]
[5] M_B_DQSN2 A23 MB_DQS_L2 MA_DQS_L2 C21 M_A_DQSN2 [5]
[5] M_B_DQSP3 F26 MB_DQS_H3 MA_DQS_H3 G22 M_A_DQSP3 [5]
[5] M_B_DQSN3 E26 MB_DQS_L3 MA_DQS_L3 G21 M_A_DQSN3 [5]
[5] M_B_DQSP4 AC25 MB_DQS_H4 MA_DQS_H4 AD23 M_A_DQSP4 [5]
[5] M_B_DQSN4 AC26 MB_DQS_L4 MA_DQS_L4 AC23 M_A_DQSN4 [5]
[5] M_B_DQSP5 AF21 MB_DQS_H5 MA_DQS_H5 AB19 M_A_DQSP5 [5]
[5] M_B_DQSN5 AF22 MB_DQS_L5 MA_DQS_L5 AB20 M_A_DQSN5 [5]
[5] M_B_DQSP6 AE16 MB_DQS_H6 MA_DQS_H6 Y15 M_A_DQSP6 [5]
[5] M_B_DQSN6 AD16 MB_DQS_L6 MA_DQS_L6 W 15 M_A_DQSN6 [5]
[5] M_B_DQSP7 AF12 MB_DQS_H7 MA_DQS_H7 W 12 M_A_DQSP7 [5]
[5] M_B_DQSN7 AE12 MB_DQS_L7 MA_DQS_L7 W 13 M_A_DQSN7 [5]
1 SOCKET_638_PIN 1
PROJECT : ZQA
S1G4 DDRIII MEMORY I/F 2/3 1A

A B C D E
5 4 3 2 1
U22F
AA4 VSS1 VSS66 J6
U22E AA11 VSS2 VSS67 J8
+VCORE +VCORE AA13 J10
VSS3 VSS68
AA15 J12
G4
H2
VDD_1 VDD_24 P8
P10
AA17
AA19
VSS4
VSS5
VSS69
VSS70 J14
J16
BOTTOM SIDE DECOUPLING
VDD_2 VDD_25 VSS6 VSS71 +VCORE
J9 VDD_3 VDD_26 R4 AB2 VSS7 VSS72 J18
J11 VDD_4 VDD_27 R7 AB7 VSS8 VSS73 K2
D K6 T2 AB25 K11 + D
VDD_7 VDD_30 VSS11 VSS76 PC52 C208 C253 C634 C265 C292 C305 C228
K10 VDD_8 VDD_31 T6 AC11 VSS12 VSS77 K13
K12 T8 AC13 K15 *330u/2V_7343 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 .22u/6.3V_4 .01u/16V_4 180p/50V_4
VDD_9 VDD_32 VSS13 VSS78
K14 VDD_10 VDD_33 T10 AC15 VSS14 VSS79 K17
L4 VDD_11 VDD_34 T12 AC17 VSS15 VSS80 L6
L7 VDD_12 VDD_35 T14 AC19 VSS16 VSS81 L8
L9 VDD_13 VDD_36 U7 AC21 VSS17 VSS82 L10
L11 U9 AD6 L12 +VCORE
L13 VDD_15 VDD_38 U11 AD8 VSS19 VSS84 L14
L15 VDD_16 VDD_39 U13 AD25 VSS20 VSS85 L16
M2 VDD_17 VDD_40 U15 AE11 VSS21 VSS86 L18
M6 VDD_18 VDD_41 V6 AE13 VSS22 VSS87 M7
M8 V8 AE15 M9 C303 C637 C278 C643 C241 C226 C207 C256
VDD_19 VDD_42 VSS23 VSS88 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 10u/6.3V_8 .22u/6.3V_4 .01u/16V_4 180p/50V_4 .01u/16V_4
M10 VDD_20 VDD_43 V10 AE17 VSS24 VSS89 AC6
N7 VDD_21 VDD_44 V12 AE19 VSS25 VSS90 M17
+CPU_VDDNB_CORE N9 V14 AE21 N4
N11 VDD_23 VDD_46 W4 AE23 VSS27 VSS92 N8
Y2 B4 N10
3A K16 VDDNB_1
VDD_47
VDD_48 AC4
+1.5VSUS
B6
VSS28
VSS29
VSS93
VSS94 N16 +CPU_VDDNB_CORE +1.5VSUS
M16 VDDNB_2 VDD_49 AD2 B8 VSS30 VSS95 N18
P16 VDDNB_3 B9 VSS31 VSS96 P2
+1.5VSUS T16 Y25 B11 P7
VDDNB_4 VDDIO27 VSS32 VSS97
V16 V25 B13 P9
VDDNB_5 VDDIO26
VDDIO25 V23 1.5V@2A B15
VSS33
VSS34
VSS98
VSS99 P11 C306
10u/6.3V_8
C326 C287
10u/6.3V_8 10u/6.3V_8
C390
10u/6.3V_8
C401
10u/6.3V_8
C379
.22u/6.3V_4
C331
.22u/6.3V_4
C406
180p/50V_4
C300
180p/50V_4
H25 VDDIO1 VDDIO24 V21 B17 VSS35 VSS100 P17
J17 VDDIO2 VDDIO23 V18 B19 VSS36 VSS101 R8
K18 VDDIO3 VDDIO22 U17 B21 VSS37 VSS102 R10
C K21 VDDIO4 VDDIO21 T25 B23 VSS38 VSS103 R16 C
K23 VDDIO5 VDDIO20 T23 B25 VSS39 VSS104 R18
K25 VDDIO6 VDDIO19 T21 D6 VSS40 VSS105 T7
L17 VDDIO7 VDDIO18 T18 D8 VSS41 VSS106 T9
M18 VDDIO8 VDDIO17 R17 D9 VSS42 VSS107 T11
M21 P25 D11 T13
M23
M25
VDDIO9
VDDIO10
VDDIO16
VDDIO15 P23
P21
D13
D15
VSS43
VSS44
VSS108
VSS109 T15
T17
DECOUPLING BETWEEN PROCESSOR AND DIMMs
VDDIO11 VDDIO14 VSS45 VSS110
N17 P18 D17 U4
VDDIO12 VDDIO13
D19
D21
VSS46
VSS47
VSS111
VSS112 U6
U8
PLACE CLOSE TO PROCESSOR AS POSSIBLE
SOCKET_638_PIN VSS48 VSS113
D23 VSS49 VSS114 U10
D25 U12 +1.5VSUS
+1.5VSUS VSS50 VSS115
E4 VSS51 VSS116 U14
F2 VSS52 VSS117 U16
[2] CNTR_VREF F11 VSS53 VSS118 U18
F13 VSS54 VSS119 V2
F15 V7 C396 C375 C376 C383 C374 C400
VSS55 VSS120 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 4.7U/6.3V_6 .22u/6.3V_4 .22u/6.3V_4
F17 VSS56 VSS121 V9
R374 R372 F19 V11
Q13 1K_4 1K_4 VSS57 VSS122
F21 VSS58 VSS123 V13
2
BSS138_NL/SOT23 F23 V15 +1.5VSUS

VSS59 VSS124
F25 VSS60 VSS125 V17
CPU_SMBCLK 3 1 H7 W6
[34] CPU_SMBCLK CPU_SIC [2] VSS61 VSS126
H9 VSS62 VSS127 Y21
H21 VSS63 VSS128 Y23
H23 N6 C392 C398 C322 C373 C301
Q14 VSS64 VSS129 .22u/6.3V_4 .22u/6.3V_4 .01u/16V_4 .01u/16V_4 180p/50V_4
B J4 VSS65 B
2
BSS138_NL/SOT23
SOCKET_638_PIN
CPU_SMBDATA 3 1
[34] CPU_SMBDATA CPU_SID [2]
PROCESSOR POWER AND GROUND
A A
PROJECT : ZQA
S1G4 PWR & GND 3/3 1A

5 4 3 2 1
5 4 3 2 1
[3] M_A_A[0..15] +1.5VSUS M_A_DQ[0..63] [3] [3] M_B_A[0..15] +1.5VSUS M_B_DQ[0..63] [3]
100
105
106
111
112
117
118
123
124
100
105
106
111
112
117
118
123
124
75
76
81
82
87
88
93
94
99
75
76
81
82
87
88
93
94
99
CN11 CN15
M_A_A0 98 5 M_A_DQ1 +1.5VSUS M_B_A0 98 5 M_B_DQ4
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
M_A_A1 A0 DQ0 M_A_DQ0 M_B_A1 A0 DQ0 M_B_DQ5
97 7 97 7
96 15 96 15
M_A_A3 95
A2 DQ2
17 M_A_DQ7 +SMDDR_VREF +VREF_CA_B M_B_A3 95
A2 DQ2
17 M_B_DQ6 Place these Caps near So-Dimm H=8.
M_A_A4 A3/A4 DQ3 M_A_DQ4 M_B_A4 A3/A4 DQ3 M_B_DQ0
92 4 92 4
M_A_A5 A4/A3 DQ4 M_A_DQ5 R210 M_B_A5 A4/A3 DQ4 M_B_DQ1
91 6 91 6
M_A_A6 A5/A6 DQ5 M_A_DQ3 *1K/F_4 M_B_A6 A5/A6 DQ5 M_B_DQ3
90 16 90 16
86 18 86 18
M_A_A8 A7/A8 DQ7 M_A_DQ9 R207 *Short_4 M_B_A8 A7/A8 DQ7 M_B_DQ9 +1.5VSUS
89 21 89 21
85 23 85 23
M_A_A10 A9 DQ9 M_A_DQ15 M_B_A10 A9 DQ9 M_B_DQ15 C448 C433 C446 C445 C434
D 107 33 107 33 D
M_A_A11 A10/AP DQ10 M_A_DQ11 M_B_A11 A10/AP DQ10 M_B_DQ14 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4
84 35 84 35
M_A_A12 A11 DQ11 M_A_DQ13 C450 C444 R211 M_B_A12 A11 DQ11 M_B_DQ12
83 22 83 22
M_A_A13 A12_BC# DQ12 M_A_DQ12 .1u/10V_4 2.2U/6.3V_6 *1K/F_4 M_B_A13 A12_BC# DQ12 M_B_DQ13 C438
119 24 119 24
M_A_A14 A13 DQ13 M_A_DQ10 M_B_A14 A13 DQ13 M_B_DQ10 10u/6.3V_6
80 34 80 34
78 36 78 36
A15/BA3 DQ15 M_A_DQ17 A15/BA3 DQ15 M_B_DQ17
39 39
M_A_BANK0 DQ16 M_A_DQ21 M_B_BANK0 DQ16 M_B_DQ16 C449 C436 C447 C443 C437
109 41 109 41
M_A_BANK1 BA0/BA1 DQ17 M_A_DQ18 M_B_BANK1 BA0/BA1 DQ17 M_B_DQ18 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4
108 51 108 51
M_A_BANK2 BA1/BA0 DQ18 M_A_DQ19 M_B_BANK2 BA1/BA0 DQ18 M_B_DQ23
[3] M_A_BANK[0..2] 79 53 [3] M_B_BANK[0..2] 79 53
BA2 DQ19 M_A_DQ20 BA2 DQ19 M_B_DQ21
40 40
M_A_DM0 DQ20 M_A_DQ16 M_B_DM0 DQ20 M_B_DQ20
11 42 11 42
M_A_DM1 DM0 DQ21 M_A_DQ23 M_B_DM1 DM0 DQ21 M_B_DQ19
28 50 28 50
46 52 46 52
M_A_DM3 63
DM2 DQ23
57 M_A_DQ28 M_B_DM3 63
DM2 DQ23
57 M_B_DQ29 Place these Caps near So-Dimm H=4.
136 59 136 59
153 67 153 67
M_A_DM6 DM5 DQ26 M_A_DQ31 M_B_DM6 DM5 DQ26 M_B_DQ31 +1.5VSUS
170 69 170 69
[3] M_A_DM[0..7] 187 56 [3] M_B_DM[0..7] 187 56
DM7 DQ28 M_A_DQ25 DM7 DQ28 M_B_DQ25 C394 C382 C425 C426 C377
58 58
DQ29 M_A_DQ30 DQ29 M_B_DQ26 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4
[3] M_A_DQSP0 12 68 [3] M_B_DQSP0 12 68
DQS0 DQ30 M_A_DQ26 DQS0 DQ30 M_B_DQ27
[3] M_A_DQSP1 29 70 [3] M_B_DQSP1 29 70
DQS1 DQ31 M_A_DQ37 DQS1 DQ31 M_B_DQ32 C387
[3] M_A_DQSP2 47 129 [3] M_B_DQSP2 47 129
[3] M_A_DQSP3 64 131 [3] M_B_DQSP3 64 131
DDR3 SO-DIMM
DDR3 SO-DIMM
DQS3 DQ33 M_A_DQ33 DQS3 DQ33 M_B_DQ39 10u/6.3V_6
[3] M_A_DQSP4 137 141 [3] M_B_DQSP4 137 141
[3] M_A_DQSP5 154 143 [3] M_B_DQSP5 154 143
DQS5 DQ35 M_A_DQ32 DQS5 DQ35 M_B_DQ36 C432 C405 C397 C435 C427
[3] M_A_DQSP6 171 130 [3] M_B_DQSP6 171 130
DQS6 DQ36 M_A_DQ36 DQS6 DQ36 M_B_DQ37 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4
[3] M_A_DQSP7 188 132 [3] M_B_DQSP7 188 132
140 140
DQ38 M_A_DQ34 DQ38 M_B_DQ38
[3] M_A_DQSN0 10 142 [3] M_B_DQSN0 10 142
DQS0# DQ39 M_A_DQ40 DQS0# DQ39 M_B_DQ44
[3] M_A_DQSN1 27 147 [3] M_B_DQSN1 27 147
DQS1# DQ40 DQS1# DQ40
(Standard )
(Standard )
C 45 149 M_A_DQ41 45 149 M_B_DQ40 C
[3] M_A_DQSN2 DQS2# DQ41 [3] M_B_DQSN2 DQS2# DQ41
62 157 M_A_DQ46 62 157 M_B_DQ47
[3] M_A_DQSN3 DQS3# DQ42 [3] M_B_DQSN3 DQS3# DQ42
[3] M_A_DQSN4 135
DQS4# DQ43
159 M_A_DQ47 Standard [3] M_B_DQSN4 135
DQS4# DQ43
159 M_B_DQ46
[3] M_A_DQSN5 152
DQS5# DQ44
146 M_A_DQ44
[3] M_B_DQSN5 152
DQS5# DQ44
146 M_B_DQ45 Standard
[3] M_A_DQSN6 169
DQS6# DQ45
148 M_A_DQ45 Connector [3] M_B_DQSN6 169
DQS6# DQ45
148 M_B_DQ41
[3] M_A_DQSN7 186
DQS7# DQ46
158 M_A_DQ42
[3] M_B_DQSN7 186
DQS7# DQ46
158 M_B_DQ43 Connector +1.5VSUS +1.5VSUS
DQ47
160 M_A_DQ43 1 DQ47
160 M_B_DQ42
DQ48
163 M_A_DQ52
DQ48
163 M_B_DQ53 1
101 165 M_A_DQ53 101 165 M_B_DQ52
[3] M_A_CLKP1 [3] M_B_CLKP1
1
CK0 DQ49 CK0 DQ49

2
3
5 4
6
M_A_DQ54 M_B_DQ55 + C418 + C439

7
8
103 175 103 175

9
10
11
[3] M_A_CLKN1 [3] M_B_CLKN1

12 1
CK0# DQ50 2 CK0# DQ50

13 2
14 3
15 5 4
16 6
M_A_DQ55 M_B_DQ54
17 7
102 177 102 177

18 8
19 9
20 10
21 11
[3] M_A_CLKP2 [3] M_B_CLKP2

22 12
CK1 DQ51 CK1 DQ51 2

23 24 13
25 14
26 15
27 16
M_A_DQ48 M_B_DQ48 *330u/2V_7343 *330u/2V_7343

28 17
29 18
104 164 104 164

30 19
31 20
32 21
[3] M_A_CLKN2 [3] M_B_CLKN2

33 22
CON_SODIMM200_STD_V1
CK1# DQ52 CK1# DQ52
34 23 24
35 25
36 26
37 27
M_A_DQ49 M_B_DQ49
38 28
166 166
39 29
40 30
31
32
33
CON_SODIMM200_STD_V1
DQ53 DQ53
34
35
36
37
M_A_DQ50 M_B_DQ50
38
39
73 174 73 174
40
41
[3] M_A_CKE0 [3] M_B_CKE0

42
CKE0 DQ54 CKE0 DQ54

43
44
45
46
M_A_DQ51 M_B_DQ51
47 48
49
74 176 74 176
50
51
52 41
[3] M_A_CKE1 [3] M_B_CKE1

53 42
CKE1 DQ55 CKE1 DQ55

54 43
55 44
56 45
57 46
M_A_DQ61 M_B_DQ60
58 47 48
181 181
59 49
60 50
61 51
62 52
63 53
DQ56 DQ56
64 54
65 55
67 66 56
68 57
M_A_DQ60 M_B_DQ61
69 58
Place on each DIMM Connector

70 59
110 183 110 183

71 60
72 61
73 62
[3] M_A_RAS# [3] M_B_RAS#

74 63
RAS# DQ57 RAS# DQ57

75 64
76 65
77 67 66
78 68
M_A_DQ63 M_B_DQ58
79 69
115 191 115 191

80 70
81 71
82 72
83 84 73
[3] M_A_CAS# [3] M_B_CAS#

85 74
CAS# DQ58 CAS# DQ58

86 75
87 76
88 77
89 78
M_A_DQ62 M_B_DQ59
90 79
91 80
113 193 113 193

92 81
93 82
94 83 84
[3] M_A_WE# [3] M_B_WE#

95 85
WE# DQ59 WE# DQ59

96 86
97 87
98 88
99 89
M_A_DQ56 M_B_DQ57
100 90
101 91
114 180 114 180

103 102 92
104 93
105 94
[3] M_A_CS#0 [3] M_B_CS#0

106 95
S0# DQ60 S0# DQ60

107 96
108 97
109 98
110 99
M_A_DQ57 M_B_DQ56
111 100
121 182 121 182

112 101
113 103 102
114 104
115 105
[3] M_A_CS#1 [3] M_B_CS#1

116 106
S1# DQ61 S1# DQ61

117 107
118 108
119 120 109
121 110
M_A_DQ58 M_B_DQ62
122 111
123 112
192 192
124 113
125 114
126 115
127 116
DQ62 DQ62
128 117
129 118
130 119 120
131 121
M_A_DQ59 M_B_DQ63
132 122
116 194 116 194

133 123
134 124
135 125
136 126
[3] M_A_ODT0 [3] M_B_ODT0

137 127
ODT0 DQ63 ODT0 DQ63

139 138 128
140 129
141 130
142 131
143 132
144 133
120 120
145 134
146 135
147 136
[3] M_A_ODT1 [3] M_B_ODT1

148 137
ODT1 ODT1
149 139 138
150 140
151 141
152 142
153 143
154 144
155 145
157 156 146
158 147
159 148
160 149
161 150
162 151
163 152
DIM1_SA0 DIM2_SA0
164 153
197 77 197 77
165 154
200
166 155
167 157 156
199
168 158
169 159
SA0 NC1 SA0 NC1

170 160
171 161
172 162
173 163
DIM1_SA1 DIM2_SA1
175 174 164
176 165
201 122 201 122

200
177 166
178 167
199
179 168
180 169
SA1 NC2 SA1 NC2

181 170
182 171
183 172
184 173
MEM_MA_TEST MEM_MB_TEST
185 175 174
125 125
186 176
187 177
188 178
189 179
T82 T83
190 180
TEST TEST
191 181
192 182
193 194 183
195 184
PDAT_SMB
196 185
197 186
200 200
198 187
199 188
200 189
[11,26] PDAT_SMB
190
SDA SDA
191
192
193 194
195
PCLK_SMB
196
197
202 202
198
199
200
[11,26] PCLK_SMB SCL SCL

C403 C670
B .01u/16V_4 .01u/16V_4 B
+3V 199 196 +3V 199 196
VDDspd VSS51 VDDspd VSS51
195 195
VSS50 VSS50
[3] M_A_RST# 30 190 [3] M_B_RST# 30 190
RST# VSS49 RST# VSS49
189 189
VSS48 VSS48
198 185 198 185
EVENT# VSS47 EVENT# VSS47 +1.5VSUS
184 184
VSS46 +1.5VSUS VSS46
+0.75VSMVREF_SUSA 1 179 +0.75VSMVREF_SUSB 1 179
VREF VSS45 oVREF VSS45
178 178
VSS44 VSS44
+VREF_CA_A 126 173 +VREF_CA_B 126 173
VrefCA VSS43 VrefCA VSS43 R192
172 172
VSS42 R416 VSS42
+0.75V_DDR_VTT 203 168 +0.75V_DDR_VTT 203 168 1K/F_4
VTT1 VSS41 VTT1 VSS41 +0.75VSMVREF_SUSB
204 167 1K/F_4 204 167
VTT2 VSS40 +0.75VSMVREF_SUSA VTT2 VSS40
162 162
VSS39 VSS39
2 161 2 161
C424 C671 C422 VSS0 VSS38 C442 C440 C441 VSS0 VSS38
3 156 3 156
*10u/6.3V_6 .1u/10V_4 1000P/50V_4 VSS1 VSS37 *10u/6.3V_6 .1u/10V_4 1000P/50V_4 VSS1 VSS37
8 155 8 155
VSS2 VSS36 VSS2 VSS36
9 151 9 151
13 150 13 150
14 145 14 145
19 144 19 144
20 139 20 139
VSS7 VSS31 C668 C667 VSS7 VSS31 C430 C428 R194
25 138 25 138
VSS8 VSS30 R415 VSS8 VSS30 .1u/10V_4
26 134 26 134 1K/F_4
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS9 VSS29 .1u/10V_4 VSS9 VSS29
31 133 1K/F_4 31 133
32 128 32 128
VSS11 VSS27 2.2U/6.3V_6 VSS11 VSS27 2.2U/6.3V_6
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
+1.5VSUS
A
+SMDDR_VREF +VREF_CA_A H=8
DDR3_SO-DIMM_H=8_1.5V_Standard H=4 DDR3_SO-DIMM_H=4_1.5V_Standard
A
R178
*1K/F_4
R418 10K_4 DIM1_SA0 DIM2_SA0 R180 10K_4
+3V
R183 *Short_4
R417 10K_4 DIM1_SA1 DIM2_SA1 R186 10K_4
PROJECT : ZQA
SMbus address A0
C409
.1u/10V_4
C411
2.2U/6.3V_6
R182
*1K/F_4
SMbus address A2 Quanta Computer Inc.
DDR2 SODIMMS: A/B CHANNEL 1A

5 4 3 2 1
5 4 3 2 1
U16A
HT_CADOUTP0 HT_CADINP0
6
[2] HT_CADOUTP0 Y25 HT_RXCAD0P HT_TXCAD0P D24 HT_CADINP0 [2]
HT_CADOUTN0 Y24 PART 1 OF 6 D25 HT_CADINN0
[2] HT_CADOUTN0 HT_RXCAD0N HT_TXCAD0N HT_CADINN0 [2]
HT_CADOUTP1 V22 E24 HT_CADINP1
[2] HT_CADOUTP1 HT_RXCAD1P HT_TXCAD1P HT_CADINP1 [2]
HT_CADOUTN1 V23 E25 HT_CADINN1
HT_CADOUTP2 V25 F24 HT_CADINP2
HT_CADOUTN2 V24 F25 HT_CADINN2
HT_CADOUTP3 U24 F23 HT_CADINP3
HT_CADOUTN3 U25 F22 HT_CADINN3
HT_CADOUTP4 T25 H23 HT_CADINP4
HT_CADOUTN4 T24 H22 HT_CADINN4
HT_CADOUTP5 P22 J25 HT_CADINP5
HYPER TRANSPORT CPU I/F

HT_CADOUTN5 P23 J24 HT_CADINN5
HT_CADOUTP6 P25 K24 HT_CADINP6
D [2] HT_CADOUTP6 HT_RXCAD6P HT_TXCAD6P HT_CADINP6 [2] D
HT_CADOUTN6 P24 K25 HT_CADINN6
HT_CADOUTP7 N24 K23 HT_CADINP7
HT_CADOUTN7 N25 K22 HT_CADINN7
HT_CADOUTP8 AC24 F21 HT_CADINP8
HT_CADOUTN8 AC25 G21 HT_CADINN8
HT_CADOUTP9 AB25 G20 HT_CADINP9
HT_CADOUTN9 AB24 H21 HT_CADINN9
HT_CADOUTP10 AA24 J20 HT_CADINP10
HT_CADOUTN10 AA25 J21 HT_CADINN10
HT_CADOUTP11 Y22 J18 HT_CADINP11
HT_CADOUTN11 Y23 K17 HT_CADINN11
HT_CADOUTP12 W 21 L19 HT_CADINP12
HT_CADOUTN12 W 20 J19 HT_CADINN12
HT_CADOUTP13 V21 M19 HT_CADINP13
HT_CADOUTN13 V20 L18 HT_CADINN13 Signals RS880 RX880
HT_CADOUTP14 U20 M21 HT_CADINP14
HT_CADOUTN14 U21 P21 HT_CADINN14
HT_CADOUTP15 U19 P18 HT_CADINP15 HT_TXCALP
HT_CADOUTN15 U18 M18 HT_CADINN15 Ra Ra
301 ohm 1% 1.21k ohm 1%
HT_CLKOUTP0 T22 H24 HT_CLKINP0 HT_TXCALN
[2] HT_CLKOUTP0 HT_RXCLK0P HT_TXCLK0P HT_CLKINP0 [2]
HT_CLKOUTN0 T23 H25 HT_CLKINN0
[2] HT_CLKOUTN0 HT_RXCLK0N HT_TXCLK0N HT_CLKINN0 [2]
HT_CLKOUTP1 AB23 L21 HT_CLKINP1
[2] HT_CLKOUTP1 HT_RXCLK1P HT_TXCLK1P HT_CLKINP1 [2]
HT_CLKOUTN1 AA22 L20 HT_CLKINN1 HT_RXCALP
[2] HT_CLKOUTN1 HT_RXCLK1N HT_TXCLK1N HT_CLKINN1 [2]
Rb Rb
HT_CTLOUTP0 M22 M24 HT_CTLINP0 1.21k ohm 1%
[2] HT_CTLOUTP0
HT_CTLOUTN0 HT_RXCTL0P HT_TXCTL0P HT_CTLINN0
HT_CTLINP0 [2] 301 ohm 1%
[2] HT_CTLOUTN0 M23 HT_RXCTL0N HT_TXCTL0N M25 HT_CTLINN0 [2] HT_RXCALN
HT_CTLOUTP1 R21 P19 HT_CTLINP1
[2] HT_CTLOUTP1 HT_RXCTL1P HT_TXCTL1P HT_CTLINP1 [2]
C HT_CTLOUTN1 R20 R18 HT_CTLINN1 C
[2] HT_CTLOUTN1 HT_RXCTL1N HT_TXCTL1N HT_CTLINN1 [2]
R349 301/F_4 HT_RXCALP C23 B24 HT_TXCALP R350 301/F_4
HT_RXCALN HT_RXCALP HT_TXCALP HT_TXCALN
A24 HT_RXCALN HT_TXCALN B25 RES CHIP 1.21K 1/16W +-1%(0402)
P/N : CS21212FB18
RS880/RX881
Ra Rb
This block is for Side-Port only
U16D
PAR 4 OF 6
AB12 MEM_A0(NC) MEM_DQ0/DVO_VSYNC(NC) AA18
AE16 MEM_A1(NC) MEM_DQ1/DVO_HSYNC(NC) AA20
V11 MEM_A2(NC) MEM_DQ2/DVO_DE(NC) AA19
AE15 MEM_A3(NC) MEM_DQ3/DVO_D0(NC) Y19
AA12 MEM_A4(NC) MEM_DQ4(NC) V17
B
AB16 MEM_A5(NC) MEM_DQ5/DVO_D1(NC) AA17 B
AB14 MEM_A6(NC) MEM_DQ6/DVO_D2(NC) AA15
AD14 MEM_A7(NC) MEM_DQ7/DVO_D4(NC) Y15
AD13 MEM_A8(NC) MEM_DQ8/DVO_D3(NC) AC20
AD15 MEM_A9(NC) MEM_DQ9/DVO_D5(NC) AD19
SBD_MEM/DVO_I/F
AC16 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) AE22

AE13 MEM_A11(NC) MEM_DQ11/DVO_D7(NC) AC18
AC14 MEM_A12(NC) MEM_DQ12(NC) AB20
Y14 MEM_A13(NC) MEM_DQ13/DVO_D9(NC) AD22
MEM_DQ14/DVO_D10(NC) AC22
AD16 MEM_BA0(NC) MEM_DQ15/DVO_D11(NC) AD21
AE17 MEM_BA1(NC)
AD17 MEM_BA2(NC) MEM_DQS0P/DVO_IDCKP(NC) Y17
MEM_DQS0N/DVO_IDCKN(NC) W 18
W 12 MEM_RASb(NC) MEM_DQS1P(NC) AD20
Y12 MEM_CASb(NC) MEM_DQS1N(NC) AE21
AD18 MEM_W Eb(NC)
AB13 MEM_CSb(NC) MEM_DM0(NC) W 17
AB18 MEM_CKE(NC) MEM_DM1/DVO_D8(NC) AE19
V14 MEM_ODT(NC)
IOPLLVDD18(NC) AE23 +1.8V 15mA
V15 MEM_CKP(NC) IOPLLVDD(NC) AE24 +1.1V 26mA
W 14 MEM_CKN(NC)
IOPLLVSS(NC) AD23
AE12 MEM_COMPP(NC)
AD12 MEM_COMPN(NC) MEM_VREF(NC) AE18
RS880/RX881
A A
PROJECT : ZQA
RS880M-HT LINK I/F 1/4 1A

5 4 3 2 1
5 4 3 2 1
RS880 Display Port Support (muxed on GFX)

PEG_RXP[15..0] PEG_TXP[15..0]
[15] PEG_RXP[15..0] [15] PEG_TXP[15..0]
PEG_RXN[15..0] PEG_TXN[15..0] GFX_TX0,TX1,TX2 and TX3
[15] PEG_RXN[15..0] [15] PEG_TXN[15..0]
DP0
U16B AUX0 and HPD0
PEG_RXP15 D4 A5 PEG_TXP15_C C568 EV@.1u/10V_4 PEG_TXP15
PEG_RXN15 GFX_RX0P GFX_TX0P PEG_TXN15_C C570 EV@.1u/10V_4 PEG_TXN15
PEG_RXP14
C4 GFX_RX0N PART 2 OF 6 GFX_TX0N B5
PEG_TXP14_C C561 EV@.1u/10V_4 PEG_TXP14 GFX_TX4,TX5,TX6 and TX7
D
A3 GFX_RX1P GFX_TX1P A4 D
PEG_RXN14 B3 B4 PEG_TXN14_C C562 EV@.1u/10V_4 PEG_TXN14 DP1
PEG_RXP13 GFX_RX1N GFX_TX1N PEG_TXP13_C C557 EV@.1u/10V_4 PEG_TXP13 AUX1 and HPD1
C2 GFX_RX2P GFX_TX2P C3
PEG_RXN13 C1 B2 PEG_TXN13_C C559 EV@.1u/10V_4 PEG_TXN13
PEG_RXP12 GFX_RX2N GFX_TX2N PEG_TXP12_C C553 EV@.1u/10V_4 PEG_TXP12
E5 GFX_RX3P GFX_TX3P D1
PEG_RXN12 F5 D2 PEG_TXN12_C C556 EV@.1u/10V_4 PEG_TXN12
G5 GFX_RX4P GFX_TX4P E2
PEG_RXN11 G6 E1 PEG_TXN11_C C552 EV@.1u/10V_4 PEG_TXN11
H5 GFX_RX5P GFX_TX5P F4
PEG_RXN10 H6 F3 PEG_TXN10_C C548 EV@.1u/10V_4 PEG_TXN10
J6 GFX_RX6P GFX_TX6P F1
PEG_RXN9 J5 F2 PEG_TXN9_C C540 EV@.1u/10V_4 PEG_TXN9
J7 GFX_RX7P GFX_TX7P H4
PEG_RXN8 J8 H3 PEG_TXN8_C C536 EV@.1u/10V_4 PEG_TXN8
PCIE I/F GFX

L5 GFX_RX8P GFX_TX8P H1
PEG_RXN7 L6 H2 PEG_TXN7_C C539 EV@.1u/10V_4 PEG_TXN7
M8 GFX_RX9P GFX_TX9P J2
PEG_RXN6 L8 J1 PEG_TXN6_C C525 EV@.1u/10V_4 PEG_TXN6
P7 GFX_RX10P GFX_TX10P K4
PEG_RXN5 M7 K3 PEG_TXN5_C C526 EV@.1u/10V_4 PEG_TXN5
C P5 GFX_RX11P GFX_TX11P K1 C
PEG_RXN4 M5 K2 PEG_TXN4_C C529 EV@.1u/10V_4 PEG_TXN4
R8 GFX_RX12P GFX_TX12P M4
PEG_RXN3 P8 M3 PEG_TXN3_C C521 EV@.1u/10V_4 PEG_TXN3
R6 GFX_RX13P GFX_TX13P M1
PEG_RXN2 R5 M2 PEG_TXN2_C C531 EV@.1u/10V_4 PEG_TXN2
P4 GFX_RX14P GFX_TX14P N2
PEG_RXN1 P3 N1 PEG_TXN1_C C519 EV@.1u/10V_4 PEG_TXN1
T4 GFX_RX15P GFX_TX15P P1
PEG_RXN0 T3 P2 PEG_TXN0_C C533 EV@.1u/10V_4 PEG_TXN0
GFX_RX15N GFX_TX15N
AE3 AC1 PCIE_TXP0_C C546 .1u/10V_4
[24] PCIE_RX1+ GPP_RX0P GPP_TX0P PCIE_TX1+ [24]
AD4 AC2 PCIE_TXN0_C C545 .1u/10V_4
[24] PCIE_RX1-
AE2
GPP_RX0N
GPP_RX1P
GPP_TX0N
GPP_TX1P AB4
PCIE_TX1- [24] LAN
AD3 GPP_RX1N GPP_TX1N AB3
AD1 AA2 PCIE_TXP2_C C543 .1u/10V_4
[26] PCIE_RXP2
[26] PCIE_RXN2 AD2
GPP_RX2P
GPP_RX2N PCIE I/F GPP
GPP_TX2P
GPP_TX2N AA1 PCIE_TXN2_C C544 .1u/10V_4
PCIE_TXP2 [26]
PCIE_TXN2 [26]
WLAN
V5 GPP_RX3P GPP_TX3P Y1
W6 GPP_RX3N GPP_TX3N Y2
B T33 U5 GPP_RX4P GPP_TX4P Y4 T32 B
T34 U6 GPP_RX4N GPP_TX4N Y3 T96
U8 GPP_RX5P GPP_TX5P V1
U7 GPP_RX5N GPP_TX5N V2
AA8 AD7 A_TXP0_C C573 .1u/10V_4 A_TXP0 [10]

[10] A_RXP0 SB_RX0P SB_TX0P
Y8 AE7 A_TXN0_C C569 .1u/10V_4 A_TXN0 [10]
[10] A_RXN0 SB_RX0N SB_TX0N
AA7 AE6 A_TXP1_C C560 .1u/10V_4
[10]
[10]
A_RXP1
A_RXN1 Y7
SB_RX1P
SB_RX1N
SB_TX1P
SB_TX1N AD6 A_TXN1_C C563 .1u/10V_4
A_TXP1
A_TXN1
[10]
[10]
SB
AA5 PCIE I/F SB AB6 A_TXP2_C C555 .1u/10V_4 A_TXP2 [10]
AA6 AC6 A_TXN2_C C558 .1u/10V_4 A_TXN2 [10]
W5 AD5 A_TXP3_C C547 .1u/10V_4 A_TXP3 [10]
Y5 AE5 A_TXN3_C C551 .1u/10V_4 A_TXN3 [10]
AC8 NB_PCIECALRP R326 1.27K/F_4
PCE_CALRP(PCE_BCALRP) NB_PCIECALRN R330 2K/F_4
PCE_CALRN(PCE_BCALRN) AB8 +1.1V
RS880/RX881
INT HDMI
A PEG_TXP15_C C76 IV@.1u/10V_4 A
IV_TX2_HDMI+ [23]
PEG_TXN15_C C78 IV@.1u/10V_4
PEG_TXP14_C
PEG_TXN14_C
C73
C75
IV@.1u/10V_4
IV@.1u/10V_4
IV_TX2_HDMI-
IV_TX1_HDMI+
[23]
[23] PROJECT : ZQA
PEG_TXP13_C
PEG_TXN13_C
C68 IV@.1u/10V_4
IV_TX1_HDMI-
IV_TX0_HDMI+
[23]
[23]
C71 IV@.1u/10V_4
IV_TX0_HDMI- [23]
PEG_TXP12_C C64 IV@.1u/10V_4 Size Document Number Rev
IV_TXC_HDMI+ [23]
PEG_TXN12_C C67 IV@.1u/10V_4 RS880M-PCIE I/F 2/4 1A
IV_TXC_HDMI- [23]
5 4 3 2 1
5 4 3 2 1
U16C
8
110mA +3V_AVDD_NB F12 A22
For Check list JTAG +1.8V_AVDDDI_NB
E12
AVDD1(NC)
AVDD2(NC) PART 3 OF 6
TXOUT_L0P(NC)
TXOUT_L0N(NC) B22
LA_DATAP0 [22]
LA_DATAN0 [22]
20mA F14 AVDDDI(NC) TXOUT_L1P(NC) A21 LA_DATAP1 [22]
R325 *4.7K_4 NB_PWRGD_IN G15 B21 LA_DATAN1 [22]
+1.8V_AVDDQ_NB AVSSDI(NC) TXOUT_L1N(NC)
4mA H15 AVDDQ(NC) TXOUT_L2P(NC) B20 LA_DATAP2 [22]
+3V R59 *4.7K_4 INT_EDIDDATA H14 A20 LA_DATAN2 [22]
AVSSQ(NC) TXOUT_L2N(DBG_GPIO0)
TXOUT_L3P(NC) A19
R60 *4.7K_4 INT_EDIDCLK E17 B19
CRT/TVOUT
C_Pr(DFT_GPIO5) TXOUT_L3N(DBG_GPIO2)
F17 Y(DFT_GPIO2)
+3V R58 *4.7K_4 IV_HDMI_DDC_DATA F15 B18
COMP_Pb(DFT_GPIO4) TXOUT_U0P(NC)
TXOUT_U0N(NC) A18
[22] INT_CRT_RED G18 RED(DFT_GPIO0) TXOUT_U1P(PCIE_RESET_GPIO3) A17
R74 IV@140/F_4 G17 B17
REDb(NC) TXOUT_U1N(PCIE_RESET_GPIO2)
[22] INT_CRT_GRE E18 GREEN(DFT_GPIO1) TXOUT_U2P(NC) D20
D R77 IV@150/F_4 F18 D21 D
GREENb(NC) TXOUT_U2N(NC)
[22] INT_CRT_BLU E19 BLUE(DFT_GPIO3) TXOUT_U3P(PCIE_RESET_GPIO5) D18
R79 IV@150/F_4 F19 D19
BLUEb(NC) TXOUT_U3N(NC)
[22] INT_CRT_HSYNC INT_CRT_HSYNC A11 B16 LA_CLK [22]

INT_CRT_VSYNC DAC_HSYNC(PWM_GPIO4) TXCLK_LP(DBG_GPIO1)
[22] INT_CRT_VSYNC B11 DAC_VSYNC(PWM_GPIO6) TXCLK_LN(DBG_GPIO3) A16 LA_CLK# [22]
[22] INT_DDCDATA E8 DAC_SDA(PCE_TCALRN) TXCLK_UP(PCIE_RESET_GPIO4) D16
[22] INT_DDCCLK F8 DAC_SCL(PCE_RCALRN) TXCLK_UN(PCIE_RESET_GPIO1) D17
VGA R80 715/F_4 DAC_RSET_NB G14 DAC_RSET(PWM_GPIO1) +1.8V_VDDLTP18_NB
+1.1V_PLLVDD VDDLTP18(NC) A13 15mA
A12 PLLVDD(NC) VSSLTP18(NC) B13
+1.8V_PLLVDD18 D14
LVTM
PLLVDD18(NC) +1.8V_VDDLT_18_NB
B12 A15 300mA
PLL PWR
+1.8V PLLVSS(NC) VDDLT18_1(NC)
VDDLT18_2(NC) B15
20mA +1.8V_VDDA18HTPLL H17 A14
VDDA18HTPLL VDDLT33_1(NC)
VDDLT33_2(NC) B14
120mA +1.8V_VDDA18PCIEPLL D7 VDDA18PCIEPLL1
E7 VDDA18PCIEPLL2 VSSLT1(VSS) C14
R21 D15
300/F_4 VSSLT2(VSS)
[10,34] A_RST#_SB D8 SYSRESETb VSSLT3(VSS) C16
[11,14] NB_PWRGD_IN A10 POWERGOOD VSSLT4(VSS) C18
NB_LDT_STOP# C10 C20
PM
NB_ALLOW_LDTSTOP LDTSTOPb VSSLT5(VSS)
C12 ALLOW_LDTSTOP VSSLT6(VSS) E20
VSSLT7(VSS) C22
[10] CLK_NB_HTREFP_PR C25 HT_REFCLKP
[10] CLK_NB_HTREFN_PR C24 HT_REFCLKN
For A11 version [10] CLK_NB_REF_CLKP
CLK_NB_REF_CLKP E11 REFCLK_P/OSCIN(OSCIN)
CLOCKs
CLK_NB_REF_CLKN F11 E9
[10] CLK_NB_REF_CLKN REFCLK_N(PWM_GPIO3) LVDS_DIGON(PCE_TCALRP) INT_LVDS_DIGON [22]
(02/10) Don’t need 49.9 ohm PD. R48 4.7K_4 NBGFX_CLKP LVDS_BLON(PCE_RCALRP) F7 INT_DPST_PWM [22]
T2 GFX_REFCLKP LVDS_ENA_BL(PWM_GPIO2) G12 INT_LVDS_BLON [22]
R47 4.7K_4 NBGFX_CLKN T1 GFX_REFCLKN
GPP_REFCLKP U1
T97 GPP_REFCLKP
C
GPP_REFCLKN U2 C
T95 GPP_REFCLKN
R53 *49.9/F_4 CLK_SBLINKP
[10] CLK_SBLINKP V4 GPPSB_REFCLKP(SB_REFCLKP)
R55 *49.9/F_4 CLK_SBLINKN V3
[10] CLK_SBLINKN GPPSB_REFCLKN(SB_REFCLKN)
[22] INT_EDIDDATA A9 I2C_DATA

[22] INT_EDIDCLK
IV_HDMI_DDC_DATA
B9
B8
I2C_CLK MIS. TMDS_HPD(NC) D9
D10
INT_HDMI_HPD [23]
[23] IV_HDMI_DDC_DATA DDC_DATA/AUX0N(NC) HPD(NC)
[23] IV_HDMI_DDC_CLK A8 DDC_CLK/AUX0P(NC)
B7 D12 SUS_STAT#_NB R324 *Short_4
AUX1P(NC) TVCLKIN(PWM_GPIO5) SUS_STAT# [11]
DDC_DATA & DDC_CLK Not applicable to RX881 A7 AUX1N(NC)
THERMALDIODE_P AE8
+NB_CORE_ON B10 AD8 R329 Made provision for external pull-down which is not
[39] +NB_CORE_ON STRP_DATA THERMALDIODE_N
*3K_4 installed by default. Pulled up externally for
G11 D13 TEST_EN
RSVD TESTMODE bypassing EEPROM strapping and using default
RS880_AUX_CAL C8 R68 values.
T35 AUX_CAL(NC) 1.8K/F_4
RS880/RX881
RS880M --- ADD

+1.1V +1.8V
+3V
L23 +3V_AVDD_NB L56 +1.1V_PLLVDD L19 +1.8V_VDDLTP18_NB

STRAP_DEBUG_BUS_GPIO_ENABLEb BLM18PG221SN1D(220_1.4A)_6 BLM18PG221SN1D(220_1.4A)_6 BLM18PG221SN1D(220_1.4A)_6
AVDD-DAC Analog PLLVDD - Graphics PLL C91 VDDLTP18 - LVDS or DVI/HDMI PLL
not applicable to RX780 not applicable to RX780 2.2U/6.3V_6 not applicable to RX780
Enables the Test Debug Bus using GPIO. C118 C88 C576
solve CRTflicker 22u/6.3V_8 2.2U/6.3V_6 2.2U/6.3V_6
RS880M
L57
1 Disable V INT_CRT_VSYNC R64 3K_4 +1.8V_VDDLT_18_NB
B +3V +1.8V +1.8V B
0 Enable BLM21PG221SN1D(220_2A)_8
VDDLT18 - LVDS or DVI/HDMI digital
+1.8V_AVDDDI_NB L20 +1.8V_PLLVDD18 C578 C577 not applicable to RX780
BLM18PG221SN1D(220_1.4A)_6
AVDDI-DAC Digital PLLVDD18 - Graphics PLL 4.7U/6.3V_6 .1u/10V_4
C105
not applicable to RX780 not applicable to RX780
.1u/10V_4 C93
RS880M: Enables Side port memory C113 4.7U/6.3V_6
RS880M:INT_CRT_HSYNC 10u/6.3V_8
L21 +1.8V_AVDDQ_NB
Selects if Memory SIDE PORT is available or not BLM18PG221SN1D(220_1.4A)_6
AVDDQ-DAC Bandgap Reference
C100 not applicable to RX780
1 = Memory Side port Not available 2.2U/6.3V_6
0 = Memory Side port available
Register Readback of strap: NB_CLKCFG:CLK_TOP_SPARE_D[1]

+1.8V +1.8V
20mils width DDR3 based CPU : Level shifted to 1.8 V on the
VDDA18PCIEPLL -PCIE PLL +1.8V 9/16 need modify PN Northbridge side using an open-drain buffer and
pulled up to 1.8V_S0 through a 2.2k Ohm 5% resistor
INT_CRT_HSYNC R66 3K_4 +3V L18 +1.8V_VDDA18PCIEPLL R323 on the Northbridge side.
BLM18PG221SN1D(220_1.4A)_6 2.2K_4
5
+ U15
C104 2 Open 4 NB_LDT_STOP#

[2,10] CPU_LDT_STOP#
2.2U/6.3V_6 Drain
- 74LVC07
3
RS780/RX780/RS880 R332 1K_4

A For extrnal EEPROM Debug only VDDA18HTPLL -HT LINK PLL
+1.8V A
20mils width
L22 +1.8V_VDDA18HTPLL
BLM18PG221SN1D(220_1.4A)_6 R331 *Short_4 NB_ALLOW_LDTSTOP
[10] ALLOW_LDTSTOP
+NB_CORE_ON R328 2K/F_4
C112
2.2U/6.3V_6
Display Port interface from PCIeGraphics (RS880/rs880M only) PROJECT : ZQA

The RS880 family does not support CLMC architecture
The LDTREQ# connection from the CPU to ALLOW_LDTSTOP
of the Northbridge is no longer required. Size Document Number Rev
RS880_AUX_CAL R57 *150/F_4 RS880M-SYSTEM I/F 3/4 1A

5 4 3 2 1
5 4 3 2 1
AE14
AC3
AC4
M11
AA4
AB5
AB1
AB7
AE1
AE4
AB2
D11
E14
E15
K14
L15
J15
J12
W1
W2
W4
W7
W8
M6
G1
G2
G4
G8
D3
D5
H7
R7
N4
R1
R2
R4
U4
A2
B1
E4
P6
V7
V8
V6
Y6
L1
L2
L4
L7
J4
U16F
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
D D
PART 6/6
GROUND
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
A25
D23
E22
G22
G24
G25
H19
J22
L17
L22
L24
L25
M20
N22
P20
R19
R22
R24
R25
H20
U22
V19
W22
W24
W25
Y21
AD25
L12
M14
N13
P12
P15
R11
R14
T12
U14
U11
U15
V12
W11
W15
AC12
AA14
Y18
AB11
AB15
AB17
AB19
AE20
AB21
K11
+1.1V
C +1.1V 2A for RS880M C
0.68A L27 *Short_8 +1.1V_VDDHT

U16E
+1.1V_VDD_PCIE
1.1A R65 *Short_8
J17 VDDHT_1 VDDPCIE_1 A6 +1.1V
K16 VDDHT_2 PART 5/6 VDDPCIE_2 B6
L16 VDDHT_3 VDDPCIE_3 C6
C136 C108 C107 C110 M16 D6 C81 C80 C87 C79 C84 VDDPCIE - PCIE-E Main power
4.7U/6.3V_6 .1u/10V_4 .1u/10V_4 .1u/10V_4 VDDHT_4 VDDPCIE_4 .1u/10V_4 .1u/10V_4 1U/6.3V_4 1U/6.3V_4 4.7U/6.3V_6
P16 VDDHT_5 VDDPCIE_5 E6
R16 VDDHT_6 VDDPCIE_6 F6
T16 VDDHT_7 VDDPCIE_7 G7
H8
0.68A L28 *Short_8 +1.1V_VDDHTRX H18 VDDHTRX_1
VDDPCIE_8
VDDPCIE_9 J9
G19 VDDHTRX_2 VDDPCIE_10 K9
F20 VDDHTRX_3 VDDPCIE_11 M9
C135 C128 C125 C132 E21 L9
4.7U/6.3V_6 .1u/10V_4 .1u/10V_4 .1u/10V_4 VDDHTRX_4 VDDPCIE_12
D22 VDDHTRX_5 VDDPCIE_13 P9
B23 VDDHTRX_6 VDDPCIE_14 R9
A23 T9
L61 *Short_8
2A +1.1V_VDDHTTX
VDDHTRX_7 VDDPCIE_15
VDDPCIE_16 V9
AE25 U9
+1.1V
AD24
VDDHTTX_1
VDDHTTX_2
VDDPCIE_17
0.95~1.1V@10A
AC23 VDDHTTX_3 VDDC_1 K12 +NB_CORE
C590 C116 C593 C598 C595 AB22 J14
4.7U/6.3V_6 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 VDDHTTX_4 VDDC_2
AA21 VDDHTTX_5 VDDC_3 U16
C102 C96 C89 C95 C579
VDDC - Core Logic power
Y20 VDDHTTX_6 VDDC_4 J11
W 19 K15 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 10u/6.3V_8
POWER
VDDHTTX_7 VDDC_5
V18 VDDHTTX_8 VDDC_6 M12
U17 VDDHTTX_9 VDDC_7 L14
T17 VDDHTTX_10 VDDC_8 L11
R17 VDDHTTX_11 VDDC_9 M13
P17 M15
B +1.8V 1A for RS780M+SB700 M17
VDDHTTX_12 VDDC_10
N12
B
VDDHTTX_13 VDDC_11
N14
+1.8V L17
BLM21PG221SN1D(220_2A)_8
0.7A +1.8V_VDDA18PCIE J10 VDDA18PCIE_1
VDDC_12
VDDC_13 P11 C106
.1u/10V_4
C97
.1u/10V_4
C94
.1u/10V_4
C575
10u/6.3V_8
P10 VDDA18PCIE_2 VDDC_14 P13
K10 VDDA18PCIE_3 VDDC_15 P14
C85 C99 C86 C82 C101 C92 M10 R12
4.7U/6.3V_6 4.7U/6.3V_6 .1u/10V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 VDDA18PCIE_4 VDDC_16
L10 VDDA18PCIE_5 VDDC_17 R15
W9 VDDA18PCIE_6 VDDC_18 T11
C313 W/I SP W/O SP
H9 VDDA18PCIE_7 VDDC_19 T15
T10 VDDA18PCIE_8 VDDC_20 U12 (Ra) 0.1U 0 ohm
R10 VDDA18PCIE_9 VDDC_21 T14
Y9 J16
25mA AA9
VDDA18PCIE_10
VDDA18PCIE_11
VDDC_22
W/O sideport contect to GND No need side port
+1.8V R76 *Short_6 +1.8V_VDDG18_NB AB9 AE10
VDDA18PCIE_12 VDD_MEM1(NC)
AD9 VDDA18PCIE_13 VDD_MEM2(NC) AA11 VDD_MEM For UMA RS780 only
AE9 Y11
VDD18-RS880 I/O Transform U10
VDDA18PCIE_14 VDD_MEM3(NC)
AD10 Not applicable to RX780
C90 VDDA18PCIE_15 VDD_MEM4(NC)
VDD_MEM5(NC) AB10 memory I/O transform
1U/6.3V_4 F9 AC10
VDDG18_1(VDD18_1) VDD_MEM6(NC)
G9 VDDG18_2(VDD18_2)
AE11 H11 +3V_VDDG33 R83 *Short_4 +3V
VDD18_MEM1(NC) VDDG33_1(NC)
AD11 H12
VDD18_MEM For UMA RS880 only
VDD18_MEM2(NC)
RS880/RX881
VDDG33_2(NC) C124
.1u/10V_4
C121
.1u/10V_4
60mA 3.3V(0.03A)
Not applicable to RX780
memory I/O transform VDD33 - 3.3V I/O
Not applicable to RX780
A W/O side port A
-->stuff 0 Ohm
CS00002JB38
PROJECT : ZQA
RS880M-POWER4/4 1A

5 4 3 2 1
5 4 3 2 1
+3V_S5
C514 180p/50V_4 For AMD RST
PLACE CAPS VERY CLOSE TO C508 .1u/10V_4
BALL OF SB800M
5
NB & EC U14A
R287 A_RST#_SB
R296 33_4 PCIE_RST#_SB P1
SB800 Part 1 of 5
W2 PCI_CLK0 33_4 A_RST#_AND 4
2
[26,30] PCIE_RST# PCIE_RST# PCICLK0 T94 [15,24,26] A_RST#
[8,34] A_RST#_SB A_RST#_SB L1 W1 PCI_CLK1 PCI_CLK1 [14] 1
PCI CLKS
A_RST# PCICLK1/GPO36 SB_GPIO_PCIE_RST# [11]
W3 PCI_CLK2 PCI_CLK2 [14] C507
C554 .1u/10V_4 A_RX0P_C PCICLK2/GPO37 PCI_CLK3 U13
[7] A_RXP0 AD26 W4 PCI_CLK3 [14] GPU
3
C550 .1u/10V_4 A_RX0N_C A_TX0P PCICLK3/GPO38 PCI_CLK4 *10P/50V_4 TC7SH08FU
[7] A_RXN0 AD27 A_TX0N PCICLK4/14M_OSC/GPO39 Y1 PCI_CLK4 [14] MINI-PCIE
[7] A_RXP1 C542 .1u/10V_4 A_RX1P_C AC28
C538 .1u/10V_4 A_RX1N_C A_TX1P Card reader
[7] A_RXN1 AC29 A_TX1N PCIRST# V2
[7] A_RXP2 C517 .1u/10V_4 A_RX2P_C AB29
D
C516 .1u/10V_4 A_RX2N_C A_TX2P D
[7] A_RXN2 AB28 A_TX2N
[7] A_RXP3 C528 .1u/10V_4 A_RX3P_C AB26 AA1
C524 .1u/10V_4 A_RX3N_C A_TX3P AD0/GPIO0
[7] A_RXN3 AB27 A_TX3N AD1/GPIO1 AA4
AD2/GPIO2 AA3
A_TXP0 AE24 AB1 20mil
[7] A_TXP0 A_RX0P AD3/GPIO3
A_TXN0 AE23 AA5
[7] A_TXN0 A_RX0N AD4/GPIO4
PCI EXPRESS INTERFACES

A_TXP1 AD25 AB2
[7] A_TXP1 A_RX1P AD5/GPIO5 +3VPCU +AVBAT
A_TXN1 AD24 AB6
[7] A_TXN1 A_RX1N AD6/GPIO6 T102
A_TXP2 AC24 AB5
A_TXN2 AC25 AA6 20MIL D18
A_TXP3 AB25 AC2
A_TXN3 AB24 AC3 BOARD_ID0 BOARD_ID0 [12] +3VRTC R263 10/F_4 +3VRTC_1 R262 499/F_4
AC4 BOARD_ID1 BOARD_ID1 [12] VCCRTC_1
R315 590/F_4 PCIE_CALRP_SB AD11/GPIO11 BOARD_ID2
AD29 PCIE_CALRP AD12/GPIO12 AC1 BOARD_ID2 [12] 20MIL
R37 2K/F_4 PCIE_CALRN_SB AD28 AD1 BOARD_ID3 20MIL BAT54C
+1.1V_PCIE_VDDR PCIE_CALRN AD13/GPIO13 BOARD_ID4
BOARD_ID3 [12]
C498
AD14/GPIO14 AD2 BOARD_ID4 [12]
AA28 AC6 1U/6.3V_4
GPP_TX0P AD15/GPIO15
1
AA29 GPP_TX0N AD16/GPIO16 AE2
Y29 AE1 R267
GPP_TX1P AD17/GPIO17 T98
Y28 GPP_TX1N AD18/GPIO18 AF8 1K_4
Y26 GPP_TX2P AD19/GPIO19 AE3
Y27 AF1
2
GPP_TX2N AD20/GPIO20
W 28 GPP_TX3P AD21/GPIO21 AG1
W 29 GPP_TX3N AD22/GPIO22 AF2
AD23/GPIO23 AE9 AD23 [14]
AA22 GPP_RX0P AD24/GPIO24 AD9 AD24 [14]
Y21 GPP_RX0N AD25/GPIO25 AC11 AD25 [14] 20MIL
AA25 AF6 AD26 [14] R42 *Short_4
GPP_RX1P AD26/GPIO26 VDDR_1.05_EN [12]
AA24 GPP_RX1N AD27/GPIO27 AF4 AD27 [14]
C W 23 GPP_RX2P AD28/GPIO28 AF3 C
V24 GPP_RX2N AD29/GPIO29 AH2
W 24 AG2 CN6
GPP_RX3P AD30/GPIO30 +BAT
W 25 GPP_RX3N AD31/GPIO31 AH3 1 1
PCI INTERFACE
CBE0# AA8 2 2
CBE1# AD5
AD8 RTC_CONN
CBE2#
CBE3# AA10
FRAME# AE8 CR2032 (Non-Chargeable)
AB9
CLK_SBLINKP M23
DEVSEL#
AJ3
AHL03003003
[8] CLK_SBLINKP PCIE_RCLKP/NB_LNK_CLKP IRDY#
[8] CLK_SBLINKN CLK_SBLINKN P23 PCIE_RCLKN/NB_LNK_CLKN TRDY# AE7 AHL03003014
PAR AC5 AHL030M0009
[8] CLK_NB_REF_CLKP CLK_NB_REF_CLKP U29 AF5
CLK_NB_REF_CLKN NB_DISP_CLKP STOP#
[8] CLK_NB_REF_CLKN U28 NB_DISP_CLKN PERR# AE6
SERR# AE4
[8] CLK_NB_HTREFP_PR CLK_NB_HTREFP_PR T26 AE11
CLK_NB_HTREFN_PR NB_HT_CLKP REQ0#
[8] CLK_NB_HTREFN_PR T27 NB_HT_CLKN REQ1#/GPIO40 AH5 T112
REQ2#/CLK_REQ8#/GPIO41 AH4
[2] CLK_CPU_BCLKP_PR CLK_CPU_BCLKP_PR V21 AC12
CPU_HT_CLKP REQ3#/CLK_REQ5#/GPIO42 T29
[2] CLK_CPU_BCLKN_PR CLK_CPU_BCLKN_PR T21 AD12
CPU_HT_CLKN GNT0#
GNT1#/GPO44 AJ5 T103
[15] CLK_PCIE_VGAP 4 3 SLT_GFX_CLKP V23 AH6 dGPU_VRON [18]
SLT_GFX_CLKN SLT_GFX_CLKP GNT2#/GPO45
[15] CLK_PCIE_VGAN 2 1 T23 SLT_GFX_CLKN GNT3#/CLK_REQ7#/GPIO46 AB12 T25
RP1 EV@0_4P2R_4 AB11
CLKRUN# CLKRUN# [34]
[24] CLK_PCIE_LOM CLK_PCIE_LOM L29 AD7
GPP_CLK0P LOCK# T31
[24] CLK_PCIE_LOM# CLK_PCIE_LOM# L28 GPP_CLK0N
INTE#/GPIO32 AJ6 dGPU_PWROK [18]
N29 GPP_CLK1P INTF#/GPIO33 AG6
B
N28 GPP_CLK1N INTG#/GPIO34 AG4 For STRAPS B
INTH#/GPIO35 AJ4 dGPU_RST_GPIO [15]
[26] CLK_PCIE_WLANP_2 CLK_PCIE_WLANP_2 M29 GPP_CLK2P LPC_CLK0 [14]
[26] CLK_PCIE_WLANN_2 CLK_PCIE_WLANN_2 M28 GPP_CLK2N LPC_CLK1 [14]
CLOCK GENERATOR
T25 GPP_CLK3P
V25 H24 R281 22_4
GPP_CLK3N LPCCLK0 PCLK_DEBUG [26]
H25 R290 22_4
LPCCLK1 CLK_PCI_775 [34]
L24 GPP_CLK4P LAD0 J27 LPC_LAD0 [26,34]
L23 GPP_CLK4N LAD1 J26 LPC_LAD1 [26,34]
H29 C509 C505
LPC
LAD2 LPC_LAD2 [26,34]

P25 H28 *5.6p/50V_4 *22P/50V_4
GPP_CLK5P LAD3 LPC_LAD3 [26,34]
M25 GPP_CLK5N LFRAME# G28 LPC_LFRAME# [26,34]
J25 LDRQ0#_SB
LDRQ0# T19
P29 AA18 LDRQ1#_SB
GPP_CLK6P LDRQ1#/CLK_REQ6#/GPIO49 T22
P28 AB19 for EMI suggestion RTC_X1
GPP_CLK6N SERIRQ/GPIO48 IRQ_SERIRQ [34]
+3V_S5 Y3
N26 GPP_CLK7P
N27 GPP_CLK7N 2 3
G21 R18 *10K/F_4
ALLOW _LDTSTP/DMA_ACTIVE# ALLOW_LDTSTOP [8]
T29 GPP_CLK8P PROCHOT# H21 CPU_PROCHOT# [2]
T28 K19
CPU
GPP_CLK8N LDT_PG CPU_PWRGD [2,37]

G22 CPU_LDT_STOP# [2,8] RTC_X2 1 4
LDT_STP#
LDT_RST# J24 CPU_LDT_RST# [2]
CLK_14M_VGA L25 R276
T20 14M_25M_48M_OSC 32.768KHZ *20M_6
C1 RTC_X1 R269 20M_6
32K_X1
C515 27p/50V_4 25M_X1 L26 C2 RTC_X2
25M_X1 32K_X2 C499 C502
RTC
A D2 18p/50V_4 18p/50V_4 A
RTCCLK RTC_CLK [34]
2
B2 INTRUDER_ALERT# R280 *1M_4 +AVBAT

25MHz R297 25M_X2 INTRUDER_ALERT#
L27 25M_X2 VDDBT_RTC_G B1 +AVBAT
Y4 1M_4 INTRUDER_ALERT# Left not connected
1
G1
(Southbridge has 50-kohm internal
1
SB800 A12 *SHORT_ PAD1 C504

.1u/10V_4
pull-up to VBAT).
C512 27p/50V_4 PROJECT : ZQA
2
IC CTRL(528P) SB710 A14(218-0660017)

P/N : AJ066000T01 Quanta Computer Inc.
20mil
SB820-PCIE/PCI/CPU/LPC 1/4 1A

5 4 3 2 1
5 4 3 2 1
11
NC only ,Can't be install
USBCLK/41M_25M_48M_OSC pin is CLK input pin when EXT CLKGEN mode.
+3V_S5 It is output CLK source when INT CLKGEN mode.
R271 *2.2K_4 SB_TEST0

U14D
SB_PCI_PME# J2 A10 USB_14_48M
T12 PCI_PME#/GEVENT4# USBCLK/14M_25M_48M_OSC T90
R32 *2.2K_4 SB_TEST1 K1 RI#/GEVENT22# USB_RCOMP_SB R30 11.8K/F_6
D3 SPI_CS3#/GBE_STAT1/GEVENT21# USB_RCOMP G19
[34] SUSB# F1 SLP_S3#
R28 *2.2K_4 SB_TEST2 SUSC# H1
[34] SUSC# SLP_S5#
ACPI / WAKE UP EVENTS

[34] DNBSWON# F2
USB 1.1 USB MISC

D PW R_BTN# D
[14] SB_PWRGD_IN H5
G6
PW R_GOOD SB800 J10
[8] SUS_STAT# SUS_STAT# USB_FSD1P/GPIO186
SB_TEST0 B3 Part 4 of 5 H11
SB_TEST1 TEST0 USB_FSD1N
SCL0/SDATA0 is 3V tolerance. AMD datasheet define it SB_TEST2
C4 TEST1/TMS USB_FDS12P
F6 TEST2 USB_FSD0P/GPIO185 H9 T13
Clk Gen/ Robson/ TV tuner/ DDR2/ Thermal/ Accelerometer AD21 J8 USB_FSD12N
[34] SIO_A20GATE GA20IN/GEVENT0# USB_FSD0N T17
SIO_RCIN# AE21
[34] SIO_RCIN# KBRST#/GEVENT1#
EHCI3/ OHCI3
LANLINK_STATE# K2 B12
+3V T92 LPC_PME#/GEVENT3# USB_HSD13P USBP13+ [22]
[34] SIO_EXT_SMI# J29 LPC_SMI#/GEVENT23# USB_HSD13N A12 USBP13- [22] CAMERA
[34] SIO_EXT_SCI# H2 GEVENT5#
SYS_RST# J1 F11
T91 SYS_RESET#/GEVENT19# USB_HSD12P USBP12+ [31]
R49 2.2K_4 PCLK_SMB H6 E11 USBX3 board
[24] PCIE_WAKE# W AKE#/GEVENT8# USB_HSD12N USBP12- [31]
IR_RX1 F3
T89 IR_RX1/GEVENT20#
R51 2.2K_4 PDAT_SMB SB_THERMTRIP# J6 E14
T21 THRMTRIP#/SMBALERT#/GEVENT2# USB_HSD11P USBP11+ [31]
[8,14] NB_PWRGD_IN AC19 NB_PW RGD USB_HSD11N E12 USBP11- [31] USBX3 board
[34] ICH_RSMRST# G1 RSMRST# USB_HSD10P J12 USBP10+ [30]
SCL1/SDATA1 is 3V/S5 tolerance USB_HSD10N J14 USBP10- [30] Card reader
AD19 CLK_REQ4#/SATA_IS0#/GPIO64
AMD datasheet define it AA16 A13 USBP9+ [31]
SB_GPIO_PCIE_RST# CLK_REQ3#/SATA_IS1#/GPIO63 USB_HSD9P
+3V_S5 [10] SB_GPIO_PCIE_RST#
CLK_PCIE_LAN_REQ#
AB21 SMARTVOLT1/SATA_IS2#/GPIO50 USB_HSD9N B13 USBP9- [31] BLUETOOTH -1
[24] CLK_PCIE_LAN_REQ# AC18 CLK_REQ0#/SATA_IS3#/GPIO60
EHCI2/ OHCI2
[18] dGPU_PWR_EN AF20 SATA_IS4#/FANOUT3/GPIO55 USB_HSD8P D13 USBP8+ [31]
SB_GPIO59 AE19 C13 A04 BLUETOOTH -2
T30 SATA_IS5#/FANIN3/GPIO59 USB_HSD8N USBP8- [31]
R26 10K_4 SB_SMBCLK1 AF19
[28] SPKR SPKR/GPIO66
R25 10K_4 SB_SMBDATA1 PCLK_SMB AD22 G12
USB 2.0
[5,26] PCLK_SMB SCL0/GPIO43 USB_HSD7P
PDAT_SMB AE22 G14
[5,26] PDAT_SMB SDA0/GPIO47 USB_HSD7N
SB_SMBCLK1 F5
SB_SMBDATA1 SCL1/GPIO227
SCL2/SDATA2 is 3V/S5 tolerance. F4 SDA1/GPIO228 USB_HSD6P G16
C
[26] CLK_PCIE_2_REQ# AH21 G18 C
AMD datasheet define it AB18
CLK_REQ2#/FANIN4/GPIO62 USB_HSD6N
CLK_REQ1#/FANOUT4/GPIO61
GPIO
E1 IR_LED#/LLB#/GPIO184 USB_HSD5P D16
+3V_S5 AJ21 C16
SMARTVOLT2/SHUTDOW N#/GPIO51 USB_HSD5N
T93 H4 DDR3_RST#/GEVENT7#
D5 GBE_LED0/GPIO183 USB_HSD4P B14 USBP4+ [26]
R23 10K_4 SB_SCLK2 D7 A14 WLAN Min-Card
GBE_LED1/GEVENT9# USB_HSD4N USBP4- [26]
R22 10K_4 SB_SDATA2 G5 GBE_LED2/GEVENT10#
EHCI1/ OHCI1
K3 GBE_STAT0/GEVENT11# USB_HSD3P E18
E_SB_OSC AA20 E16
T28 CLK_REQG#/GPIO65/OSCIN USB_HSD3N
USB_HSD2P J16
+3V H3 J18
[31] OC_7# BLINK/USB_OC7#/GEVENT18# USB_HSD2N
[31] OC_6# D1 USB_OC6#/IR_TX1/GEVENT6#
SB_PM_THERM# E4 B17 USBP1+
USB OC
T3 USB_OC5#/IR_TX0/GEVENT17# USB_HSD1P T6
R31 4.7K_4 SUS_STAT# OC_4# D4 A17 USBP1-
T8 USB_OC4#/IR_RX0/GEVENT16# USB_HSD1N T2
Eliot (02/26) SB_JTAG_TDO E8
T1 USB_OC3#/AC_PRES/TDO/GEVENT15#
Current Agesa bios doesn’t SB_JTAG_TCK F7 A16
T10 USB_OC2#/TCK/GEVENT14# USB_HSD0P USBP0+ [31]
program ALERT_L and SB SB_JTAG_TDI E7 B16
T7 USB_OC1#/TDI/GEVENT13# USB_HSD0N USBP0- [31]
won’t process alert. SB_JTAG_RST# F8
+3V T11 USB_OC0#/TRST#/GEVENT12#
On Board USB Connector
HD audio interface is +3VS5 voltage
R54 8.2K_4 CLK_PCIE_LAN_REQ# Only USB Port0 can be
R56 8.2K_4 CLK_PCIE_2_REQ# ACZ_BCLK M3 D25 SB_SCLK2 configured as debug port.
ACZ_SDOUT AZ_BITCLK SCL2/GPIO193 SB_SDATA2
[14] ACZ_SDOUT N1 AZ_SDOUT SDA2/GPIO194 F23
ACZ_SDIN0 L2 B26 SB_GPIO195
HD AUDIO
AZ_SDIN0/GPIO167 SCL3_LV/GPIO195 SB_GPIO196
M2 AZ_SDIN1/GPIO168 SDA3_LV/GPIO196 E26
M1 AZ_SDIN2/GPIO169 EC_PW M0/EC_TIMER0/GPIO197 F25 T87
M4 AZ_SDIN3/GPIO170 EC_PW M1/EC_TIMER1/GPIO198 E22
ACZ_SYNC N2 F22 GPIO199 [14]
B
ACZ_RST# AZ_SYNC EC_PW M2/EC_TIMER2/GPIO199 B
P2 AZ_RST# EC_PW M3/EC_TIMER3/GPIO200 E21 GPIO200 [14]
KSI_0/GPIO201 G24
+3V_S5 R299 10K_4 GBE_COL T1 G25
R300 10K_4 GBE_CRS GBE_COL KSI_1/GPIO202
T4 GBE_CRS KSI_2/GPIO203 E28
L6 GBE_MDCK KSI_3/GPIO204 E29
R33 10K_4 GBE_MDIO L5 D29
GBE_MDIO KSI_4/GPIO205
T9 GBE_RXCLK KSI_5/GPIO206 D28
U1 GBE_RXD3 KSI_6/GPIO207 C29
U3 GBE_RXD2 KSI_7/GPIO208 C28
T2
GBE LAN
GBE_RXD1
U2 GBE_RXD0 KSO_0/GPIO209 B28
EMBEDDED CTRL
T5 GBE_RXCTL/RXDV KSO_1/GPIO210 A27
R301 10K_4 GBE_RXERR V5 B27
GBE_RXERR KSO_2/GPIO211
P5 GBE_TXCLK KSO_3/GPIO212 D26
M5 GBE_TXD3 KSO_4/GPIO213 A26
P9 C26
To Azalia T7
GBE_TXD2
GBE_TXD1
KSO_5/GPIO214
KSO_6/GPIO215 A24
P7 GBE_TXD0 KSO_7/GPIO216 B25
M7 A25
P4
GBE_TXCTL/TXEN
GBE_PHY_PD
KSO_8/GPIO217
KSO_9/GPIO218 D24 Check list
M9 GBE_PHY_RST# KSO_10/GPIO219 B24
ACZ_SDOUT R294 33_4 R302 10K_4 GBE_PHY_INTR V7 C24
ACZ_SDOUT_AUDIO [28] GBE_PHY_INTR KSO_11/GPIO220
B23 SB_GPIO195 R284 10K_4
C511 *10P/50V_4 ADP_PRES0 KSO_12/GPIO221
T9 E23 PS2_DAT/SDA4/GPIO187 KSO_13/GPIO222 A23
EMBEDDED CTRL
E24 PS2_CLK/SCL4/GPIO188 KSO_14/GPIO223 D22

F21 SPI_CS2#/GBE_STAT2/GPIO166 KSO_15/GPIO224 C22
ACZ_SYNC R295 33_4 G29 A22 SB_GPIO196 R283 10K_4
ACZ_SYNC_AUDIO [28] FC_RST#/GPO160 KSO_16/GPIO225
C513 *10P/50V_4
[02/22] AMD FAE and checklist request PL. KSO_17/GPIO226 B22
A D27 PS2KB_DAT/GPIO189
A
F28 PS2KB_CLK/GPIO190
F29 PS2M_DAT/GPIO191
ACZ_BCLK R291 33_4 E27
ACZ_BITCLK_AUDIO [28] PS2M_CLK/GPIO192
C510 *10P/50V_4
ACZ_RST# R298 33_4

SB800 A12 PROJECT : ZQA
ACZ_RST#_AUDIO [28]
ACZ_SDIN0 ACZ_SDIN0 [28] Size Document Number Rev
SB820-ACPI/GPIO/USB 2/4 1A

5 4 3 2 1
5 4 3 2 1
Max trace length: 6"
[27] SATA_TX0+
C567
C566
.01u/16V_4
.01u/16V_4
SATA_TX0+_C
SATA_TX0-_C
AH9
AJ9
U14B
SATA_TX0P
SB800
Part 2 of 5
FC_CLK AH28
AG28
T113 Check list
12
SATA HDD [27] SATA_TX0- SATA_TX0N FC_FBCLKOUT
AF26
T122
FC_FBCLKIN T120
DEBUG BUS IS MANDATORY

IF THERE IS NO IDE, TEST POINTS FOR
AJ8 TEMPIN0 R277 10K_4
[27] SATA_RX0- SATA_RX0N
[27] SATA_RX0+ AH8 SATA_RX0P FC_OE#/GPIOD145 AF28 T101
FC_AVD#/GPIOD146 AG29 T121
C565 .01u/16V_4 SATA_TX1+_C AH10 AG26 TEMPIN1 R274 10K_4
D [27] SATA_TX1+ SATA_TX1P FC_W E#/GPIOD148 T127 D
C564 .01u/16V_4 SATA_TX1-_C AJ10 AF27
[27] SATA_TX1- SATA_TX1N FC_CE1#/GPIOD149 T100
AE29
SATA ODD AG10
FC_CE2#/GPIOD150
AF29
T99
MB_THRMDA_SB R266 10K_4
[27] SATA_RX1- SATA_RX1N FC_INT1/GPIOD144 T111
[27] SATA_RX1+ AF10 SATA_RX1P FC_INT2/GPIOD147 AH27 T119
AG12 AJ27 SB_GPIO174 R264 10K_4
SATA_TX2P FC_ADQ0/GPIOD128 T104
AF12 SATA_TX2N FC_ADQ1/GPIOD129 AJ26 T114
AH25
SATA PORT 0,1,2,3 can support AHCI mode AJ12
FC_ADQ2/GPIOD130
AH24
T115
SB_GPIO175 R279 10K_4
SATA_RX2N FC_ADQ3/GPIOD131 T106
AH12 SATA_RX2P FC_ADQ4/GPIOD132 AG23 T107
FC_ADQ5/GPIOD133 AH23 T117
AH14 AJ22 SB_GPIO176 R268 10K_4
SATA_TX3P FC_ADQ6/GPIOD134 T118
Signal Name Explanation AJ14 SATA_TX3N FC_ADQ7/GPIOD135 AG21 T110
FC_ADQ8/GPIOD136 AF21 T109
AG14 SATA_RX3N FC_ADQ9/GPIOD137 AH22 T108
FLASH
SB800 A11: 800 ohm 1% resistor to GND. AF14 SATA_RX3P FC_ADQ10/GPIOD138 AJ23 T126
SATA_CALRP SB800 A12: 1K ohm 1% resistor to GND. FC_ADQ11/GPIOD139 AF23 T116
AG17 SATA_TX4P FC_ADQ12/GPIOD140 AJ24 T125
AF17 SATA_TX4N FC_ADQ13/GPIOD141 AJ25 T124
FC_ADQ14/GPIOD142 AG25 T105
SB800 A11: 931 ohm 1% resistor to VDDAN_11_SATA. AJ17 SATA_RX4N FC_ADQ15/GPIOD143 AH26 T123
SATA_CALRN
SERIAL ATA
SB800 A12: 931 ohm 1% resistor to VDDAN_11_SATA. AH17 SATA_RX4P
AJ18 SATA_TX5P
AH18 SATA_TX5N FANOUT0/GPIO52 W5
W6
E-SATA AH19
FANOUT1/GPIO53
Y9 BT_OFF#
SATA_RX5N FANOUT2/GPIO54 T27
AJ19 SATA_RX5P
W7 WWAN_DET#
+1.1V_AVDD_SATA FANIN0/GPIO56 T23
C V9 CPPE_NC1# C
FANIN1/GPIO57 T24
R39 1K/F_4 SATA_CALRP AB14 W8 CRD_REQ1#
SATA_CALRP FANIN2/GPIO58 T26
R40 931/F_4 SATA_CALRN AA14 SATA_CALRN TEMPIN0
TEMPIN0/GPIO171 B6
A6 TEMPIN1
TEMPIN1/GPIO172 MB_THRMDA_SB
[32] SATA_ACT# AD11 SATA_ACT#/GPIO67 TEMPIN2/GPIO173 A5
B5 SB_GPIO174
R52 10K_4 TEMPIN3/TALERT#/GPIO174 TEMP_COMM R29 *Short_4
+3V TEMP_COMM C7
A3 SB_GPIO175
HW MONITOR
C572 *27p/50V_4 SATA_X1 VIN0/GPIO175 SB_GPIO176
AD16 SATA_X1 VIN1/GPIO176 B4
A4 SIDE_PORT_ID0
VIN2/GPIO177
2
C5 SIDE_PORT_ID1
*25MHz R322 VIN3/GPIO178 MEM_1V5
PLACE SATA_CAL Y5 VIN4/GPIO179 A7
BOM check
*1M_4 B7 SB820_GPIO180 1 0
RES VERY CLOSE VIN5/GPIO180 T88
B8
1
VIN6/GBE_STAT3/GPIO181
TO BALL OF SB820 AC16 SATA_X2 VIN7/GBE_LED3/GPIO182 A8 SB820_GPIO182
T5
SATA_X2 +3V R311 *SP@10K_4 BOARD_ID0 R312 SP@10K_4 ID0
C571 *27p/50V_4
R316 EV@10K_4 BOARD_ID1 R317 IV@10K_4 ID1

SB_GPIO164 J5 G27
DIS UMA
T18 SPI_DI/GPIO164 NC1
SB_GPIO163 E2 Y2
SPI ROM
T4 SPI_DO/GPIO163 NC2
SB_GPIO162 K4 R313 *SP@10K_4 BOARD_ID2 R314 SP@10K_4 ID2
T14 SPI_CLK/GPIO162
SB_GPIO165 K9
T15 SPI_CS1#/GPIO165
SB_GPIO161 G2
T16 ROM_RST#/GPIO161 R318 *SP@10K_4 BOARD_ID3 R319 SP@10K_4 ID3
SB800 A12 R320 *SP@10K_4 BOARD_ID4 R321 SP@10K_4 ID4

B B
[10] BOARD_ID0 BOARD_ID0

+3V_S5 R275 *10K_4 SIDE_PORT_ID0 R278 *10K_4

+3V
R265 *10K_4 SIDE_PORT_ID1 R270 *10K_4
PC36
.1u/10V_4
U3
5
TC7SH08FU
MEM_1V5 2
4 VDDR_OPT [41]
[10] VDDR_1.05_EN 1
3
VDDR_1.05_EN:
A 1 : VDDR =1.05V A
0 : VDDR = 0.9V (Default)
PROJECT : ZQA
SB820-SATA/IDE/SPI 3/4 1A

5 4 3 2 1
5 4 3 2 1
VDDQ--3.3V I/O power
R50 *Short_6 +3V_VDDIO_PCIGP

131mA
AH1
U14C
PLACE ALL THE DECOUPLING CAPS ON
THIS SHEET CLOSE TO SB AS POSSIBLE.
SB800 Part 3 of 5
N13
510mA
VDD-- S/B CORE power
+1.1V_VDDCR R35 *Short_6 +1.1V
13
+3V VDDIO_33_PCIGP_1 VDDCR_11_1
V6 R15 U14E
VDDIO_33_PCIGP_2 VDDCR_11_2
1
Y19 N17
CORE S0
1
AE5 U13 C48 C45 C43 C50 C47
C66 C61 C56 C53 C49 AC21
U17 .1u/10V_4 .1u/10V_4 1U/6.3V_4 1U/6.3V_4 10u/6.3V_8 Y14
SB800 AJ2
2
10u/6.3V_8 10u/6.3V_8 .1u/10V_4 .1u/10V_4 .1u/10V_4 VDDIO_33_PCIGP_5 VDDCR_11_5 VSSIO_SATA_1 VSS_1
AA2 V12 Y16 A28
PCI/GPIO I/O
2
2
D VDDIO_33_PCIGP_6 VDDCR_11_6 VSSIO_SATA_2 VSS_2 D
AB4 VDDIO_33_PCIGP_7 VDDCR_11_7 V18 AB16 VSSIO_SATA_3 VSS_3 A2
AC8 VDDIO_33_PCIGP_8 VDDCR_11_8 W 12 AC14 VSSIO_SATA_4 VSS_4 E5
AA7 VDDIO_33_PCIGP_9 VDDCR_11_9 W 18 AE12 VSSIO_SATA_5 VSS_5 D23
AA9 VDDIO_33_PCIGP_10 AE14 VSSIO_SATA_6 VSS_6 E25
AF7 VDDIO_33_PCIGP_11 400 mA +1.1V_VDDAN_CLK L8 800A50T _8 +1.1V
AF9 VSSIO_SATA_7 VSS_7 E6
AA19 VDDIO_33_PCIGP_12 VDDAN_11_CLK_1 K28 AF11 VSSIO_SATA_8 VSS_8 F24
VDDAN_11_CLK_2 K29 AF13 VSSIO_SATA_9 VSS_9 N15
1
VDDAN_11_CLK_3 J28 AF16 VSSIO_SATA_10 VSS_10 R13
K26 C36 C34 C37 C35 C33 C29 AG8 R17
CLKGEN I/O
VDDAN_11_CLK_4 .1u/10V_4 .1u/10V_4 1U/6.3V_4 1U/6.3V_4 10u/6.3V_8 10u/6.3V_8 VSSIO_SATA_11 VSS_11
J21 AH7 T10
2
SB_VDDIO_18_FC VDDAN_11_CLK_5 VSSIO_SATA_12 VSS_12
AF22 J20 AH11 P10
FLASH I/O
VDDIO_18_FC_1 VDDAN_11_CLK_6 VSSIO_SATA_13 VSS_13
AE25 VDDIO_18_FC_2 VDDAN_11_CLK_7 K21 AH13 VSSIO_SATA_14 VSS_14 V11
AF24 VDDIO_18_FC_3 VDDAN_11_CLK_8 J22 AH16 VSSIO_SATA_15 VSS_15 U15
R46 AC22 AJ7 M18
VDDIO_18_FC_4 VSSIO_SATA_16 VSS_16
*Short_4 AJ11 VSSIO_SATA_17 VSS_17 V19
VDDRF_GBE_S V1 AJ13 VSSIO_SATA_18 VSS_18 M11
AJ16 L12
POWER VDDIO_33_GBE_S M10
VSSIO_SATA_19 VSS_19
VSS_20 L18
L14 +3V_VDDPLL_33_PCIE
43mA A9 VSSIO_USB_1 VSS_21 J7
AE28 B10 P3
GBE LAN
+3V VDDPL_33_PCIE VSSIO_USB_2 VSS_22
BLM18PG221SN1D(220_1.4A)_6 K11 V4
C72 C70 VSSIO_USB_3 VSS_23
B9 AD6
PCI EXPRESS
2.2U/6.3V_6 *.1u/10V_4 VSSIO_USB_4 VSS_24
+1.1V_PCIE_VDDR
U26 VDDAN_11_PCIE_1 VDDCR_11_GBE_S_1 L7 SB820 without GBE/ Connected to GND plane. D10 VSSIO_USB_5 VSS_25 AD4
V22 VDDAN_11_PCIE_2 VDDCR_11_GBE_S_2 L9 D12 VSSIO_USB_6 VSS_26 AB7
L15 800A50T _8
600mA V26 VDDAN_11_PCIE_3 D14 VSSIO_USB_7 VSS_27 AC9
+1.1V V27 VDDAN_11_PCIE_4 D17 VSSIO_USB_8 VSS_28 V8
V28 VDDAN_11_PCIE_5 VDDIO_GBE_S_1 M6 E9 VSSIO_USB_9 VSS_29 W9
1
1
V29 VDDAN_11_PCIE_6 VDDIO_GBE_S_2 P8 F9 VSSIO_USB_10 VSS_30 W 10
C55 C51 C54 C52 C77 C57 W 22 F12 AJ28
VDDAN_11_PCIE_7 VSSIO_USB_11 VSS_31
C W 26 F14 B29 C
2
2 VDDAN_11_PCIE_8 VSSIO_USB_12 VSS_32

10u/6.3V_8 10u/6.3V_8 1U/6.3V_4 .1u/10V_4 .1u/10V_4 .1u/10V_4 F16 U4
VSSIO_USB_13 VSS_33
C9 VSSIO_USB_14 VSS_34 Y18
L13 +3V_VDDPL_SATA
93mA G11 VSSIO_USB_15 VSS_35 Y10
32mA
GROUND
+3V AD14 VDDPL_33_SATA F18 VSSIO_USB_16 VSS_36 Y12
BLM18PG221SN1D(220_1.4A)_6 A21 +3V_VDDIO R24 *Short_6 +3V_S5 D9 Y11
VDDIO_33_S_1 VSSIO_USB_17 VSS_37
AJ20 VDDAN_11_SATA_1 VDDIO_33_S_2 D21 H12 VSSIO_USB_18 VSS_38 AA11
1
C63 C58 AF18 B21 H14 AA12
SERIAL ATA
VDDAN_11_SATA_4 VDDIO_33_S_3 C22 C25 C21 VSSIO_USB_19 VSS_39
AH20 K10 H16 G4
3.3V_S5 I/O
2.2U/6.3V_6 *.1u/10V_4 VDDAN_11_SATA_2 VDDIO_33_S_4 *.1u/10V_4 2.2U/6.3V_6 2.2U/6.3V_6 VSSIO_USB_20 VSS_40
AG19 L10 H18 J4
2
+1.1V_AVDD_SATA VDDAN_11_SATA_3 VDDIO_33_S_5 VSSIO_USB_21 VSS_41
AE18 VDDAN_11_SATA_5 VDDIO_33_S_6 J9 J11 VSSIO_USB_22 VSS_42 G8
L16 800A50T _8
567mA AD18 VDDAN_11_SATA_6 VDDIO_33_S_7 T6 J19 VSSIO_USB_23 VSS_43 G9
+1.1V AE16 VDDAN_11_SATA_7 VDDIO_33_S_8 T8 K12 VSSIO_USB_24 VSS_44 M12
K14 VSSIO_USB_25 VSS_45 AF25
1
K16 VSSIO_USB_26 VSS_46 H7

C74 C69 C65 C60 C62 C59 113mA K18 AH29
CORE S5
+1.1V_VDDCR_11 R27 *Short_6 VSSIO_USB_27 VSS_47
F26 +1.1V_S5 H19 V10
2
*10u/6.3V_8 10u/6.3V_8 .1u/10V_4 .1u/10V_4 1U/6.3V_4 1U/6.3V_4 VDDCR_11_S_1 VSSIO_USB_28 VSS_48

A18 VDDAN_33_USB_S_1 VDDCR_11_S_2 G26 VSS_49 P6
1
A19 VDDAN_33_USB_S_2 VSS_50 N4
A20 M8 +VDDIO_AZ C31 C27 Y4 L4
VDDAN_33_USB_S_3 VDDIO_AZ_S 1U/6.3V_4 1U/6.3V_4 EFUSE VSS_51
B18 197mA L8
2
+3.3V_VDDAN_USB VDDAN_33_USB_S_4 VSS_52
B19 VDDAN_33_USB_S_5 VDDCR_11_USB_S_1 A11 +1.2V_USB_PHY_R D8 VSSAN_HW M
658mA B20 B11
USB I/O
L55 VDDAN_33_USB_S_6 VDDCR_11_USB_S_2
+3V_S5 C18 VDDAN_33_USB_S_7 M19 VSSXL VSSPL_SYS M20
BLM18PG221SN1D(220_1.4A)_6 C20 VDDAN_33_USB_S_8
1
C501 C19 C26 C23

D18 VDDAN_33_USB_S_9 VDDPL_33_SYS M21 +3V_VDDPL 47mA
For support USB D19 VDDAN_33_USB_S_10 P21 VSSIO_PCIECLK_1 VSSIO_PCIECLK_14 H23
wakeup-->3V_S5 D20 L22 +1.1V_VDDPL 62mA P20 H26
2
10u/6.3V_8 10u/6.3V_8 1U/6.3V_4 1U/6.3V_4 VDDAN_33_USB_S_11 VDDPL_11_SYS_S VSSIO_PCIECLK_2 VSSIO_PCIECLK_15

E19 M22 AA21
PLL
VDDAN_33_USB_S_12 VSSIO_PCIECLK_3 VSSIO_PCIECLK_16

B VDDPL_33_USB_S F19 VDDPL_3.3V_USB 17mA M24 VSSIO_PCIECLK_4 VSSIO_PCIECLK_17 AA23 B
M26 VSSIO_PCIECLK_5 VSSIO_PCIECLK_18 AB23
L7 +1.1V_VDDAN_USB
xx mA C11 VDDAN_11_USB_S_1 VDDAN_33_HW M_S D6 +3V_HWM_VDDAN 5mA P22 VSSIO_PCIECLK_6 VSSIO_PCIECLK_19 AD23
+1.1V_S5 D11 VDDAN_11_USB_S_2 P24 VSSIO_PCIECLK_7 VSSIO_PCIECLK_20 AA26
If the VDDIO_AZ_S power rail BLM18PG221SN1D(220_1.4A)_6 L20 VDDXL_3.3V L10 +3V_S5 P26 AC26
VDDXL_33_S BLM18PG221SN1D(220_1.4A)_6 VSSIO_PCIECLK_8 VSSIO_PCIECLK_21
is configured for 1.5V_S5 T20 VSSIO_PCIECLK_9 VSSIO_PCIECLK_22 Y20
1
C24 C28 T22 W 21
then AZ_SDIN[3:0] can not be 2.2U/6.3V_6 .1u/10V_4 C40 C41 T24
VSSIO_PCIECLK_10 VSSIO_PCIECLK_23
W 20
connected to 3.3-V devices. SB800 A12 *.1u/10V_4 2.2U/6.3V_6 VSSIO_PCIECLK_11 VSSIO_PCIECLK_24
V20 AE26
2
VSSIO_PCIECLK_12 VSSIO_PCIECLK_25
J23 VSSIO_PCIECLK_13 VSSIO_PCIECLK_26 L21
VSSIO_PCIECLK_27 K20
+1.2V_S5
Part 5 of 5
+3V_S5 +VDDIO_AZ L53
+1.1V_S5 0_6 +1.2V_USB_PHY_R +3V +3V_VDDPL SB800 A12
L12
R34 *Short_6 L54 BLM18PG221SN1D(220_1.4A)_6
*0_6
1
1
C42 C44
C46 C506 C503 C500 *.1u/10V_4 2.2U/6.3V_6
2
2.2U/6.3V_6 .1u/10V_4 .1u/10V_4 10u/6.3V_8
2
+1.1V_S5
+3V_S5 +3V_HWM_VDDAN +1.1V_VDDPL +3V_S5 VDDPL_3.3V_USB
A A
L6 L11 L9 *Short_6
BLM18PG221SN1D(220_1.4A)_6 BLM18PG221SN1D(220_1.4A)_6
1
C20 C18 C38 C39 (0212) AMD FAE confirmed C32 C30
*.1u/10V_4 2.2U/6.3V_6 *.1u/10V_4 2.2U/6.3V_6 2.2U/6.3V_6 .1u/10V_4
PROJECT : ZQA
2

SB820-PWR/DECOUPLING 4/4 1A

5 4 3 2 1
5 4 3 2 1
OVERLAP COMMON PADS WHERE

REQUIRED STRAPS
SB820M is
supported
Gen.1 mode For internal clock GEN.
POSSIBLE FOR DUAL-OP RESISTORS.
14
only.
+3V_S5 +3V +3V +3V +3V +3V_S5 +3V_S5 +3V_S5
D D
R293 R304 R306 R310 R308 R289 R273 R272

*10K_4 *10K_4 *10K_4 *10K_4 10K_4 10K_4 *10K_4 *10K_4
[11] GPIO199
[11] GPIO200
[10] LPC_CLK1
[10] LPC_CLK0
[10] PCI_CLK4
[10] PCI_CLK3
[10] PCI_CLK2
[10] PCI_CLK1
[11] ACZ_SDOUT
1
R286 R285
R292 R303 R305 R309 R307 R282 2.2K_4 *2.2K_4
10K_4 10K_4 10K_4 10K_4 *10K_4 10K_4
2
AZ_SDOUT PCI_CLK1 PCI_CLK2 PCI_CLK3 PCI_CLK4 LPC_CLK0 LPC_CLK1 GPIO200 GPIO199
C LOW POWER ALLOW Watchdog USE non_Fusion EC CLKGEN H, H=Reserved C

PULL
HIGH MODE PCIE Gen2 Timer Enable DEBUG CLOCK MODE ENABLED ENABLED
H, L=SPI ROM
STRAPS
DEFAULT DEFAULT
PULL PERFORMANCE FORCE Watchdog IGNORE Fusion EC CLKGEN L, H=LPC ROM DEFAULT
LOW MODE PCIE Gen1 Timer Disable DEBUG CLOCK MODE DISABLED DISABLED
L, L=FWH ROM
STRAPS
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT
internal have
pull Hi 10K
DEBUG STRAPS
SB800 HAS 15K INTERNAL PU FOR PCI_AD[27:23]
B
[10] AD23 B
[10] AD24
[10] AD25
[10] AD26
[10] AD27 NB_PWRGD_IN:
RS880/RX881 = 1.8V;
1
Do NOT share it with SB_PWRGD when use Internal Clk Gen (Need SB PLL initialize firstly)
R43 R45 R36 R41 R44
*2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4 *2.2K_4
+3V_S5 R17 10K_4 R19 *Short_4 SB_PWRGD_IN
SB_PWRGD_IN [11]
2
C16
*2.2u/6.3V_6 NB/SB POWER GOOD CIRCUIT
+1.8V
D2 *BAS316 U2
PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 1 5 C17 *.1u/10V_4
[34,37,39] CPU_COREPG NC VCC
2
D3 BAS316 A
USE PCI DISABLE ILA USE FC USE DEFAULT DISABLE PCI
PULL 3 4 R20 *33_4
PLL AUTORUN PLL PCIE STRAPS MEM BOOT [34] PWROK_EC GND Y NB_PWRGD_IN [8,11]
HIGH *NL17SZ17DFT2G
DEFAULT DEFAULT DEFAULT DEFAULT DEFAULT SOT-353
AL17SZ17000 IC(5P) NL17SZ17DFT2G(SOT-353) SOT-353

PULL BYPASS ENABLE ILA BYPASS FC USE EEPROM ENABLE PCI
ALUC1G17000 IC OTHER(5P) SN74AUC1G17DBVR(SOT23-5) SOT23-5
LOW PCI PLL AUTORUN PLL PCIE STRAPS MEM BOOT
A A
PROJECT : ZQA
SB820-STRAPS 1A

5 4 3 2 1
5 4 3 2 1
[7] PEG_TXP[15..0] PEG_TXP[15..0]

U20A
15
PEG_TXN[15..0]
[7] PEG_TXN[15..0]
PEG_TXP0 AA38 Y33 PEG_RXP0_C C214 EV@.1u/10V_4 PEG_RXP0
PEG_TXN0 PCIE_RX0P PCIE_TX0P PEG_RXN0_C C206 EV@.1u/10V_4 PEG_RXN0
Y37 PCIE_RX0N PCIE_TX0N Y32
D D
PEG_RXP[15..0] PEG_TXP1 Y35 W33 PEG_RXP1_C C219 EV@.1u/10V_4 PEG_RXP1

[7] PEG_RXP[15..0] PCIE_RX1P PCIE_TX1P
PEG_TXN1 W36 W32 PEG_RXN1_C C216 EV@.1u/10V_4 PEG_RXN1
PCIE_RX1N PCIE_TX1N
PEG_RXN[15..0]
[7] PEG_RXN[15..0]
PEG_TXP2 W38 U33 PEG_RXP2_C C227 EV@.1u/10V_4 PEG_RXP2
V37 PCIE_RX2N PCIE_TX2N U32
PEG_TXP3 V35 U30 PEG_RXP3_C C229 EV@.1u/10V_4 PEG_RXP3

U36 PCIE_RX3N PCIE_TX3N U29
PEG_TXP4 U38 T33 PEG_RXP4_C C258 EV@.1u/10V_4 PEG_RXP4

T37 PCIE_RX4N PCIE_TX4N T32
PCI EXPRESS INTERFACE

PEG_TXP5 T35 T30 PEG_RXP5_C C264 EV@.1u/10V_4 PEG_RXP5
R36 PCIE_RX5N PCIE_TX5N T29
PEG_TXP6 R38 P33 PEG_RXP6_C C274 EV@.1u/10V_4 PEG_RXP6

C P37 PCIE_RX6N PCIE_TX6N P32 C
PEG_TXP7 P35 P30 PEG_RXP7_C C289 EV@.1u/10V_4 PEG_RXP7

N36 PCIE_RX7N PCIE_TX7N P29
PEG_TXP8 N38 N33 PEG_RXP8_C C297 EV@.1u/10V_4 PEG_RXP8

M37 PCIE_RX8N PCIE_TX8N N32
PEG_TXP9 M35 N30 PEG_RXP9_C C321 EV@.1u/10V_4 PEG_RXP9

L36 PCIE_RX9N PCIE_TX9N N29
PEG_TXP10 L38 L33 PEG_RXP10_C C323 EV@.1u/10V_4 PEG_RXP10

K37 PCIE_RX10N PCIE_TX10N L32
PEG_TXP11 K35 L30 PEG_RXP11_C C334 EV@.1u/10V_4 PEG_RXP11

J36 PCIE_RX11N PCIE_TX11N L29
PEG_TXP12 J38 K33 PEG_RXP12_C C347 EV@.1u/10V_4 PEG_RXP12

B H37 PCIE_RX12N PCIE_TX12N K32 B
PEG_TXP13 H35 J33 PEG_RXP13_C C353 EV@.1u/10V_4 PEG_RXP13

PEG_TXN13 PCIE_RX13P PCIE_TX13P PEG_RXN13_C C348 EV@.1u/10V_4 PEG_RXN13 +3V_D
G36 PCIE_RX13N PCIE_TX13N J32
PEG_TXP14 G38 K30 PEG_RXP14_C C358 EV@.1u/10V_4 PEG_RXP14

PEG_TXN14 PCIE_RX14P PCIE_TX14P PEG_RXN14_C C369 EV@.1u/10V_4 PEG_RXN14 R375
F37 PCIE_RX14N PCIE_TX14N K29
EV@10K/F_4
PEG_TXP15 F35 H33 PEG_RXP15_C C354 EV@.1u/10V_4 PEG_RXP15
PEG_TXN15 PCIE_RX15P PCIE_TX15P PEG_RXN15_C C357 EV@.1u/10V_4 PEG_RXN15 D22 EV@BAS316
E37 PCIE_RX15N PCIE_TX15N H32
PCIE_RST_VGA#
A_RST# [10,24,26]
D21 EV@BAS316
CLOCK
dGPU_RST_GPIO [10]
[10] CLK_PCIE_VGAP AB35 PCIE_REFCLKP
[10] CLK_PCIE_VGAN AA36 PCIE_REFCLKN
For Madison and Park CALIBRATION

AJ21 Y30 R137 EV@1.27K/F_4
the PWRGOOD ball must NC#1 PCIE_CALRP
AK21 NC#2
A be conneccted to ground R98 EV@10K_4 R142 EV@2K/F_4 A
AH16 PWRGOOD PCIE_CALRN Y29 +1V +1.0V
PCIE_RST_VGA# AA30
For Madison and Park PCIE_VDDC is 1.0V
PERSTB
PROJECT : ZQA
EV@Park_M2 Quanta Computer Inc.
Madison/Park-PCIE 1/6 1A

5 4 3 2 1
5 4 3 2 1
U20B
U20G
16
AU24 EV_TXC_HDMI+ [23]
TXCAP_DPA3P R9 EV@10K_4
AV23 EV_TXC_HDMI- [23]
TXCAM_DPA3N
AT25 LVDS CONTROL AK27
MUTI GFX TX0P_DPA2P EV_TX0_HDMI+ [23] VARY_BL EV_LVDS_BRIGHT [22]
AR24 EV_TX0_HDMI- [23] AJ27 EV_LVDS_VDDEN [22]
DPA TX0M_DPA2N DIGON
AU26 EV_TX1_HDMI+ [23]
TX1P_DPA1P
For Park-M2 NC TX1M_DPA1N
AV25 EV_TX1_HDMI- [23]
pin AR8 AT27 EV_TX2_HDMI+ [23] AK35
DVPCNTL_MVP_0 TX2P_DPA0P TXCLK_UP_DPF3P
AU8 AR26 EV_TX2_HDMI- [23] AL36
D DVPCNTL_MVP_1 TX2M_DPA0N TXCLK_UN_DPF3N D
AP8
DVPCNTL_0
AW8 AR30 AJ38
DVPCNTL_1 TXCBP_DPB3P TXOUT_U0P_DPF2P
AR3 AT29 AK37
DVPCNTL_2 TXCBM_DPB3N TXOUT_U0N_DPF2N
AR1
DVPCLK
AU1 AV31 AH35
GPU Power-on sequence [20] RAM_STRAP0
[20] RAM_STRAP1 AU3
AW3
DVPDATA_0
DVPDATA_1 DPB
TX3P_DPB2P
TX3M_DPB2N
AU30
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
AJ36
[20] RAM_STRAP2 DVPDATA_2
AP6 AR32 AG38
T135 DVPDATA_3 TX4P_DPB1P TXOUT_U2P_DPF0P
AW5 AT31 AH37
1 => +3V_D AU5
DVPDATA_4
DVPDATA_5
TX4M_DPB1N TXOUT_U2N_DPF0N
AR6 AT33 AF35
2 => +VGPU_CORE 1.8V GPIO AW6
DVPDATA_6
DVPDATA_7
TX5P_DPB0P
TX5M_DPB0N
AU32
TXOUT_U3P
TXOUT_U3N
AG36
AU6
DVPDATA_8
3 => +1V AT7
AV7
DVPDATA_9 TXCCP_DPC3P
AU14
AV13 LVTMDP
DVPDATA_10 TXCCM_DPC3N
4 => +1.5V_GPU AN7
AV9
DVPDATA_11
DVPDATA_12 TX0P_DPC2P
AT15
TXCLK_LP_DPE3P
AP34 EV_TXLCLKOUT+ [22]
AT9 AR14 AR34
5 => +1.8V_GPU AR10
DVPDATA_13
DVPDATA_14
TX0M_DPC2N TXCLK_LN_DPE3N EV_TXLCLKOUT- [22]
AW10 DPC AU16 AW37 EV_TXLOUT0+ [22]
6 => dGPU_PWROK AU10
AP10
DVPDATA_15
DVPDATA_16
TX1P_DPC1P
TX1M_DPC1N
AV15
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
AU35 EV_TXLOUT0- [22]
DVPDATA_17
AV11 AT17 AR37 EV_TXLOUT1+ [22]
DVPDATA_18 TX2P_DPC0P TXOUT_L1P_DPE1P
For Park-M2 NC AT11
DVPDATA_19 TX2M_DPC0N
AR16
TXOUT_L1N_DPE1N
AU39 EV_TXLOUT1- [22]
AR12
pin AW12
DVPDATA_20
AU20 AP35 EV_TXLOUT2+ [22]
DVPDATA_21 TXCDP_DPD3P TXOUT_L2P_DPE0P
DVPDATA_17 - AU12
DVPDATA_22 TXCDM_DPD3N
AT19
TXOUT_L2N_DPE0N
AR35 EV_TXLOUT2- [22]
AP12
DVPDATA_23
+3V_D DVPDATA_23
AT21 AN36
TX3P_DPD2P TXOUT_L3P
AR20 AP37
TX3M_DPD2N TXOUT_L3N
DPD AU22
TX4P_DPD1P
AV21
R89 R96 TX4M_DPD1N
EV@10K/F_4 EV@10K/F_4 I2C AT23
TX5P_DPD0P EV@Park_M2
AR22
TX5M_DPD0N
AK26
SCL
C AJ26 C
SDA
AD39 EXT_CRT_RED
GENERAL PURPOSE I/O R EXT_CRT_RED [22]
AD37
RB
[20] GPU_GPIO0 AH20
GPIO_0 EXT_CRT_GRN
[20] GPU_GPIO1 AH18 AE36 EXT_CRT_GRN [22]
GPIO_1 G
[20] GPU_GPIO2 AN16 AD35
GPIO_2 GB
[20] GPIO3_SMBDAT AH23
GPIO_3_SMBDATA EXT_CRT_BLU
[20] GPIO4_SMBCLK AJ23 AF37 EXT_CRT_BLU [22]
IO_VID1 GPIO_4_SMBCLK B
AH17 AE38
T55 IO_VID0 GPIO_5_AC_BATT DAC1 BB
AJ17
EV@150/F_4
EV@150/F_4
EV@150/F_4
T57 EV_LVDS_BLON GPIO_6
[22] EV_LVDS_BLON AK17 AC36 EXT_HSYNC [20,22]
SOUT_GPIO8 GPIO_7_BLON HSYNC
AJ13 AC38 EXT_VSYNC [20,22]
SIN_GPIO9 GPIO_8_ROMSO VSYNC
R118
R128
R131
T136 AH15
[20] SIN_GPIO9 GPIO_9_ROMSI
SCLK_GPIO10 AJ16
T65 GPIO_10_ROMSCK R134 EV@499/F_4
[20] GPU_GPIO11 AK16 AB34
GPIO_11 RSET
[20] GPU_GPIO12 AL16
GPIO_12 AVDD
[20] GPU_GPIO13 AM16 AD34
GPIO_13 AVDD +1.8V_GPU
AM14 AE34
T39 GPIO_14_HPD2 AVSSQ
3.3V GPIO [42] GPU_VID1 AM13
GPIO_15_PWRCNTL_0 (1.8V@70mA AVDD)
GPU_VID3 AK14 AC33 VDD1DI 120 ohm/300mA
T67 GPIO_16_SSIN VDD1DI AVDD L35 EV@SBY100505T-121Y-N/0.3A/120ohm_4
[20] ALT#_GPIO17 AG30 AC34
GPIO_17_THERMAL_INT VSS1DI EV@.1u/10V_4 EV@10U/6.3V_6
AN14
T37 GPIO_18_HPD3
AM17
T45 GPIO_19_CTF C170 C168 C167
[42] GPU_VID2 AL13 AC30
GPIO_20_PWRCNTL_1 R2 EV@1U/6.3V_4
AJ14 AC31
T62 SCS#_GPIO22 GPIO_21_BB_EN R2B
[20] SCS#_GPIO22 AK13
GPIO_22_ROMCSB
AN13 AD30
R108 EV@10K/F_4 GPIO24_TRSTB GPIO_23_CLKREQB G2
AM23
JTAG_TRSTB G2B
AD31 (1.8V@100mA VDD1DI)
T48 GPIO25_TDI AN23 120 ohm/300mA
T56 GPIO26_TCK JTAG_TDI VDD1DI L34 EV@SBY100505T-121Y-N/0.3A/120ohm_4
AK23 AF30
T54 GPIO27_TMS JTAG_TCK B2
AL24 AF31
T38 GPIO28_TDO JTAG_TMS B2B EV@.1u/10V_4 EV@10U/6.3V_6
AM24
JTAG_TDO C169 C173 C166
AJ19
GENERICA EV@1U/6.3V_4
AK19 AC32
GENERICB C
AJ20 AD32
GENERICC Y
AK20 AF32
GENERICD COMP
AJ24
B GENERICE_HPD4 DAC2 B
AH26
GENERICF T69
AH24 AD29
GENERICG H2SYNC
AC29 V2SYNC [20]
V2SYNC
EXT_HDMI_HPD AK24
[23] EXT_HDMI_HPD HPD1
AG31 VDD1DI
VDD2DI
AG32
VSS2DI
A2VDD
AG33 +3V_D (3.3V@130mA A2VDD)
AD33 A2VDDQ
R94 EV@499/F_4 VREFG A2VDDQ C119
+1.8V_GPU AH13
VREFG EV@.1u/10V_4
AF33
A2VSSQ
R104 C143
EV@249/F_4 AA29 R132 EV@715/F_4
EV@.1u/10V_4 R2SET
+1.8V(75mA)
120 ohm/300mA
+1.8V_GPU L25 EV@SBY100505T-121Y-N/0.3A/120ohm_4 DPLL_PVDD DDC/AUX AM26
PLL/CLOCK DDC1CLK EV_HDMI_DDCCK [23]
AN26
C126 C130 C134 DPLL_PVDD AM32
DPLL_PVDD
DDC1DATA EV_HDMI_DDCDAT [23]
HDMI
AN32 AM27
EV@10U/6.3V_6
EV@1U/6.3V_4
EV@.1u/10V_4 DPLL_PVSS AUX1P T47 +1.8V_GPU
AL27
AUX1N T43 (1.8V@2mA A2VDDQ)
DPLL_VDDC AN31 AM19 120 ohm/300mA
C145 EV@27p/50V_4 DPLL_VDDC DDC2CLK T41 A2VDDQ L67 EV@SBY100505T-121Y-N/0.3A/120ohm_4
AL19
DDC2DATA T42
+1.0V(125mA)
2
120 ohm/300mA XTALI_27M AV33 AN20 EV@1U/6.3V_4

L24 EV@SBY100505T-121Y-N/0.3A/120ohm_4 DPLL_VDDC Y1 R97 XTALO_27M XTALIN AUX2P T51 C613 C614
+1V AU34 AM20
XTALOUT AUX2N
EV@27MHZEV@1M_4 T50 EV@.1u/10V_4
C123 C129 C133 AL30
1
DDCCLK_AUX3P T46
AM30
EV@10U/6.3V_6
EV@1U/6.3V_4
EV@.1u/10V_4 C146 EV@27p/50V_4 DDCDATA_AUX3N T52
AL29
DDCCLK_AUX4P T53
[20] GPU_D+ AF29 AM29
DPLUS THERMAL DDCDATA_AUX4N T40
A
[20] GPU_D- AG29 A
DMINUS
+1.8V(5mA) DDCCLK_AUX5P
AN21 EV_LVDS_DDCCLK [22]
+1.8V_GPU
120 ohm/300mA
L31 EV@SBY100505T-121Y-N/0.3A/120ohm_4 TS_VDD T137 AK32
DDCDATA_AUX5N
AM21 EV_LVDS_DDCDAT [22] LVDS
TS_VDD TS_FDO
AJ32 AJ30 EV_CRTDCLK [22]
TSVDD DDC6CLK
C150 C151 AJ33
TSVSS DDC6DATA
AJ31 EV_CRTDDAT [22] CRT
EV@10U/6.3V_6 EV@.1u/10V_4 AK30
NC_DDCCLK_AUX7P T61
AK29
NC_DDCDATA_AUX7N T44
PROJECT : ZQA
EV@Park_M2 Quanta Computer Inc.
Madison/Park-HOST 2/6 1A

5 4 3 2 1
5 4 3 2 1
17
VMB_DQ[63..0]
[21] VMB_DQ[63..0]
VMB_DM[7..0]
[21] VMB_DM[7..0]
U20C U20D
DDR2 DDR2 VMB_RDQS[7..0] DDR2 DDR2
GDDR3/GDDR5 GDDR5/GDDR3 [21] VMB_RDQS[7..0] GDDR3/GDDR5 GDDR5/GDDR3
DDR3 DDR3 VMB_WDQS[7..0] DDR3 DDR3
[21] VMB_WDQS[7..0]
C37 G24 VMB_DQ0 C5 P8 VMB_MA0
DQA0_0/DQA_0 MAA0_0/MAA_0 VMB_DQ1 DQB0_0/DQB_0 MAB0_0/MAB_0 VMB_MA1
C35 J23 C3 T9
MEMORY INTERFACE A
D DQA0_1/DQA_1 MAA0_1/MAA_1 VMB_MA[13..0] VMB_DQ2 DQB0_1/DQB_1 MAB0_1/MAB_1 VMB_MA2 D
A35 H24 E3 P9
MEMORY INTERFACE B
DQA0_2/DQA_2 MAA0_2/MAA_2 [21] VMB_MA[13..0] DQB0_2/DQB_2 MAB0_2/MAB_2
E34 J24 VMB_DQ3 E1 N7 VMB_MA3
G32 H26 F1 N8
D33 J26 F3 N9
F32 H21 F5 U9
E32 G21 G4 U8
D31 H19 H5 Y9
F30 H20 H6 W9
C30 L13 J4 AC8
A30 G16 K6 AC9
F28 J16 K5 AA7
DQA0_12/DQA_12 MAA1_4/MAA_12 VMB_DQ13 DQB0_12/DQB_12 MAB1_4/MAB_12 VMB_BA2
C28 H16 L4 AA8 VMB_BA2 [21]
DQA0_13/DQA_13 MAA1_5/MAA_13_BA2 VMB_DQ14 DQB0_13/DQB_13 MAB1_5/BA2 VMB_BA0
A28 J17 M6 Y8 VMB_BA0 [21]
DQA0_14/DQA_14 MAA1_6/MAA_14_BA0 VMB_DQ15 DQB0_14/DQB_14 MAB1_6/BA0 VMB_BA1
E28 H17 M1 AA9 VMB_BA1 [21]
DQA0_15/DQA_15 MAA1_7/MAA_A15_BA1 VMB_DQ16 DQB0_15/DQB_15 MAB1_7/BA1
D27 M3
DQA0_16/DQA_16 VMB_DQ17 DQB0_16/DQB_16 VMB_DM0
F26 A32 M5 H3
DQA0_17/DQA_17 WCKA0_0/DQMA_0 VMB_DQ18 DQB0_17/DQB_17 WCKB0_0/DQMB_0 VMB_DM1
C26 C32 N4 H1
DQA0_18/DQA_18 WCKA0B_0/DQMA_1 VMB_DQ19 DQB0_18/DQB_18 WCKB0B_0/DQMB_1 VMB_DM2
A26 D23 P6 T3
F24 E22 P5 T5
C24 C14 R4 AE4
A24 A14 T6 AF5
E24 E10 T1 AK6
C22 D9 U4 AK5
DQA0_24/DQA_24 WCKA1B_1/DQMA_7 VMB_DQ25 DQB0_24/DQB_24 WCKB1B_1/DQMB_7
A22 V6
DQA0_25/DQA_25 GDDR5/DDR2/GDDR3 VMB_DQ26 DQB0_25/DQB_25 GDDR5/DDR2/GDDR3 VMB_RDQS0
F22 C34 V1 F6
DQA0_26/DQA_26 EDCA0_0/QSA_0/RDQSA_0 VMB_DQ27 DQB0_26/DQB_26 EDCB0_0/QSB_0/RDQSB_0 VMB_RDQS1
D21 D29 V3 K3
A20 D25 Y6 P3
F20
DQA0_29/DQA_29 EDCA0_3/QSA_3/RDQSA_3
E20 Y1
DQB0_29/DQB_29 EDCB0_3/QSB_3/RDQSB_3
V5 QSB[7..0]
D19 E16 VMB_DQ30 Y3 AB5 VMB_RDQS4
E18 E12 Y5 AH1
C18 J10 AA4 AJ9
A18 D7 AB6 AM5
DQA1_1/DQA_33 EDCA1_3/QSA_7/RDQSA_7 VMB_DQ34 DQB1_1/DQB_33 EDCB1_3/QSB_7/RDQSB_7
F18 AB1
DQA1_2/DQA_34 VMB_DQ35 DQB1_2/DQB_34 VMB_WDQS0
D17 A34 AB3 G7
DQA1_3/DQA_35 DDBIA0_0/QSA_0B/WDQSA_0 VMB_DQ36 DQB1_3/DQB_35 DDBIB0_0/QSB_0B/WDQSB_0 VMB_WDQS1
A16 E30 AD6 K1
F16 E26 AD1 P1
D15
DQA1_6/DQA_38 DDBIA0_3/QSA_3B/WDQSA_3
C20 AD3
DQB1_6/DQB_38 DDBIB0_3/QSB_3B/WDQSB_3
W4 QSB#[7..0]
C E14 C16 VMB_DQ39 AD5 AC4 VMB_WDQS4 C
F14 C12 AF1 AH3
D13 J11 AF3 AJ8
F12 F8 AF6 AM3
DQA1_10/DQA_42 DDBIA1_3/QSA_7B/WDQSA_7 VMB_DQ43 DQB1_10/DQB_42 DDBIB1_3/QSB_7B/WDQSB_7
A12 AG4
DQA1_11/DQA_43 VMB_DQ44 DQB1_11/DQB_43
D11 J21 AH5 T7 VMB_ODT0 [21]
DQA1_12/DQA_44 ADBIA0/ODTA0 VMB_DQ45 DQB1_12/DQB_44 ADBIB0/ODTB0
F10 G19 AH6 W7 VMB_ODT1 [21]
DQA1_13/DQA_45 ADBIA1/ODTA1 VMB_DQ46 DQB1_13/DQB_45 ADBIB1/ODTB1
A10 AJ4
DQA1_14/DQA_46 VMB_DQ47 DQB1_14/DQB_46 VMB_CLKP0
C10 H27 AK3 L9 VMB_CLKP0 [21]
DQA1_15/DQA_47 CLKA0 VMB_DQ48 DQB1_15/DQB_47 CLKB0 VMB_CLKN0
G13 G27 AF8 L8 VMB_CLKN0 [21]
DQA1_16/DQA_48 CLKA0B VMB_DQ49 DQB1_16/DQB_48 CLKB0B
H13 AF9
DQA1_17/DQA_49 VMB_DQ50 DQB1_17/DQB_49 VMB_CLKP1
J13 J14 AG8 AD8 VMB_CLKP1 [21]
DQA1_18/DQA_50 CLKA1 VMB_DQ51 DQB1_18/DQB_50 CLKB1 VMB_CLKN1
H11 H14 AG7 AD7 VMB_CLKN1 [21]
DQA1_19/DQA_51 CLKA1B VMB_DQ52 DQB1_19/DQB_51 CLKB1B
G10 AK9
DQA1_20/DQA_52 VMB_DQ53 DQB1_20/DQB_52 VMB_RAS0#
G8 K23 AL7 T10 VMB_RAS0# [21]
DQA1_21/DQA_53 RASA0B VMB_DQ54 DQB1_21/DQB_53 RASB0B VMB_RAS1#
K9 K19 AM8 Y10 VMB_RAS1# [21]
DQA1_22/DQA_54 RASA1B VMB_DQ55 DQB1_22/DQB_54 RASB1B
K10 AM7
DQA1_23/DQA_55 VMB_DQ56 DQB1_23/DQB_55 VMB_CAS0#
G9 K20 AK1 W10 VMB_CAS0# [21]
+1.5V_GPU DQA1_24/DQA_56 CASA0B VMB_DQ57 DQB1_24/DQB_56 CASB0B VMB_CAS1#
A8 K17 AL4 AA10 VMB_CAS1# [21]
DQA1_25/DQA_57 CASA1B +1.5V_GPU VMB_DQ58 DQB1_25/DQB_57 CASB1B
C8 AM6
DQA1_26/DQA_58 VMB_DQ59 DQB1_26/DQB_58 VMB_CS0#
E8 K24 AM1 P10 VMB_CS0# [21]
DQA1_27/DQA_59 CSA0B_0 VMB_DQ60 DQB1_27/DQB_59 CSB0B_0
A6 K27 AN4 L10
DQA1_28/DQA_60 CSA0B_1 VMB_DQ61 DQB1_28/DQB_60 CSB0B_1
C6 AP3
R166 DQA1_29/DQA_61 VMB_DQ62 DQB1_29/DQB_61 VMB_CS1#
E6 M13 AP1 AD10 VMB_CS1# [21]
EV@40.2/F_4 DQA1_30/DQA_62 CSA1B_0 R170 VMB_DQ63 DQB1_30/DQB_62 CSB1B_0
A5 K16 AP5 AC10
DQA1_31/DQA_63 CSA1B_1 EV@40.2/F_4 DQB1_31/DQB_63 CSB1B_1
MVREFDA L18 K21 U10 VMB_CKE0
MVREFDA CKEA0 CKEB0 VMB_CKE0 [21]
MVREFSA L20 J20 MVREFDB Y12 AA11 VMB_CKE1
MVREFSA CKEA1 MVREFDB CKEB1 VMB_CKE1 [21]
MVREFSB AA12
EV@100/F_4
EV@.1u/10V_4
R161 *EV@240/F_4 MVREFSB VMB_WE0#

L27 K26 N10
EV@100/F_4
EV@.1u/10V_4
MEM_CALRN0 WEA0B WEB0B VMB_WE0# [21]
R150 EV@240/F_4 N12 L15 +3V_D R129 *EV@10K_4 AB11 VMB_WE1#
MEM_CALRN1 WEA1B WEB1B VMB_WE1# [21]
C349
R123 *EV@240/F_4 AG12
MEM_CALRN2
R162
C312
R171
+1.5V_GPU
R157 EV@240/F_4 R126 EV@10K_4 TESTEN VMB_MA13 R151 *EV@4.7K_4
GDDR5
M12 H23 AD28 T8
GDDR5
MEM_CALRP1 MAA0_8 TESTEN MAB0_8 +1.5V_GPU
R154 *EV@240/F_4 M27 J19 W8
R107 *EV@240/F_4 AH12 MEM_CALRP0 MAA1_8 MAB1_8
AK10
MEM_CALRP2 CLKTESTA R85 EV@51_4
AL10 AH11 MEM_RST# [21]
+1.5V_GPU R100 CLKTESTB DRAM_RST
B B
+1.5V_GPU R90
TP1
*EV@0_4
AL31
RSVD
*EV@0_4
C137 R148
R163 EV@68p/50V_4
EV@40.2/F_4 EV@Park_M2 R168 EV@Park_M2 EV@10K_4
EV@40.2/F_4
For PARK
EV@100/F_4
EV@.1u/10V_4
MEM_CALRNP0
EV@100/F_4
EV@.1u/10V_4
R158
C314
R172
C350
MEM_CALRNP1 stuff
MEM_CALRNP2
DDR3/GDDR3 Memory Stuff Option Designator For M97-M2 For Mannhatton
GDDR5 GDDR3 DDR3

Ra 10K 10K
+1.5V_VGA 1.5V 1.8V/1.5V 1.5V
Rb 0R/Short 680R
Ra 40.2R 40.2R 40.2R
A
Rc DNI DNI A
Rb 100R 100R 100R

Ca 2.2nF 68pF
PROJECT : ZQA
Madison/Park-MEM 3/6 1A

5 4 3 2 1
5 4 3 2 1
U20E
U20F 18
AB39 A3
+1.5V_GPU MEM I/O +1.8V_GPU PCIE_VSS#1 GND#1
For DDR3, MVDDQ = 1.5V (1.5A) PCIE (1.8V@400mA PCIE_VDDR) 180 ohm/1.5A
E39
F34
PCIE_VSS#2 GND#2
A37
AA16
PCIE_VDDR L40 EV@HCB1608KF-181T15/180ohm/1.5A_6 PCIE_VSS#3 GND#3
AC7 AA31 F39 AA18
VDDR1#1 PCIE_VDDR#1 PCIE_VSS#4 GND#4
AD11 AA32 G33 AA2
AF7 AA33 G34 AA21
C284 C320 C651 C267 C657 VDDR1#3 PCIE_VDDR#3 C362 C202 C213 C364 C360 C363 C361 C366 PCIE_VSS#6 GND#6
AG10 AA34 H31 AA23
EV@10U/6.3V_6 EV@10U/6.3V_6 VDDR1#4 PCIE_VDDR#4 EV@.1u/10V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@10U/6.3V_6 PCIE_VSS#7 GND#7
AJ7 V28 H34 AA26
EV@10U/6.3V_6 EV@10U/6.3V_6 EV@10U/6.3V_6 VDDR1#5 PCIE_VDDR#5 EV@.1u/10V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 PCIE_VSS#8 GND#8
AK8 W29 H39 AA28
D VDDR1#6 PCIE_VDDR#6 PCIE_VSS#9 GND#9 D
AL9 W30 J31 AA6
G11 Y31 J34 AB12
G14 K31 AB15
VDDR1#9 PCIE_VSS#12 GND#12
G17 K34 AB17
VDDR1#10 +1V PCIE_VSS#13 GND#13
G20 G30 K39 AB20
C198 C329 C330 C255 C337 C316 VDDR1#11 PCIE_VDDC#1 PCIE_VSS#14 GND#14
G23
VDDR1#12 PCIE_VDDC#2
G31 (1.0V@1.1A PCIE_VDDC) L31
PCIE_VSS#15 GND#15
AB22
EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 G26 H29 L34 AB24
EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 VDDR1#13 PCIE_VDDC#3 PCIE_VSS#16 GND#16
G29 H30 M34 AB27
VDDR1#14 PCIE_VDDC#4 PCIE_VSS#17 GND#17
H10 J29 M39 AC11
VDDR1#15 PCIE_VDDC#5 C308 C288 C277 C262 C224 C296 C242 C221 PCIE_VSS#18 GND#18
J7 J30 N31 AC13
VDDR1#16 PCIE_VDDC#6 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@10U/6.3V_6 PCIE_VSS#19 GND#19
J9 L28 N34 AC16
VDDR1#17 PCIE_VDDC#7 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 PCIE_VSS#20 GND#20
K11 M28 P31 AC18
K13 N28 P34 AC2
K8 R28 P39 AC21
C318 C304 C340 C332 C236 C178 VDDR1#20 PCIE_VDDC#10 PCIE_VSS#23 GND#23
L12 T28 R34 AC23
EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 VDDR1#21 PCIE_VDDC#11 PCIE_VSS#24 GND#24
L16 U28 T31 AC26
EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 VDDR1#22 PCIE_VDDC#12 +VGPU_CORE PCIE_VSS#25 GND#25
L21 T34 AC28
VDDR1#23 PCIE_VSS#26 GND#26
L23
VDDR1#24 (30A or more) T39
PCIE_VSS#27 GND#27
AC6
L26 AA15 U31 AD15
VDDR1#25 CORE VDDC#1 PCIE_VSS#28 GND#28
L7 AA17 U34 AD17
VDDR1#26 VDDC#2 PCIE_VSS#29 GND#29
M11 AA20 V34 AD20
VDDR1#27 VDDC#3 C276 C188 C222 C201 C235 C217 C199 C252 C225 C204 PCIE_VSS#30 GND#30
N11 AA22 V39 AD22
C275 C338 C319 C313 C336 VDDR1#28 VDDC#4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 PCIE_VSS#31 GND#31
P7 AA24 W31 AD24
EV@.1u/10V_4 EV@.1u/10V_4 VDDR1#29 VDDC#5 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 PCIE_VSS#32 GND#32
R11 AA27 W34 AD27
EV@1U/6.3V_4 EV@.1u/10V_4 EV@.1u/10V_4 VDDR1#30 VDDC#6 PCIE_VSS#33 GND#33
U11 AB16 Y34 AD9
U7 AB18 Y39 AE2
Y11 AB21 AE6
VDDR1#33 VDDC#9 GND#36
Y7 AB23 AF10
VDDR1#34 VDDC#10 GND#37
AB26 AF16
VDDC#11 GND#38
AB28 AF18
VDDC#12 C196 C238 C209 C176 C215 C194 C273 C249 C211 C261 GND#39
AC17 AF21
LEVEL
VDDC#13
VDDC#14
VDDC#15
AC20
AC22
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4
EV@1U/6.3V_4 F15
GND#100
GND GND#40
GND#41
GND#42
AG17
AG2
(1.8V@110mA VDD_CT) TRANSLATION AC24 F17 AG20
VDDC#16 GND#101 GND#43
POWER
L32 EV@SBY100505T-121Y-N/0.3A/120ohm_4 VDDC_CT AF26 AC27 F19 AG22
+1.8V_GPU VDD_CT#1 VDDC#17 GND#102 GND#44
AF27 AD18 F21 AG6
VDD_CT#2 VDDC#18 GND#103 GND#45
AG26 AD21 F23 AG9
C152 C154 C153 VDD_CT#3 VDDC#19 GND#104 GND#46
C AG27 AD23 F25 AH21 C
EV@1U/6.3V_4 VDD_CT#4 VDDC#20 GND#105 GND#47
AD26 F27 AJ10
EV@10U/6.3V_6 EV@.1u/10V_4 VDDC#21 C268 C218 C192 C280 C203 C205 C266 C234 C191 C195 GND#106 GND#48
AF17 F29 AJ11
I/O VDDC#22 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 GND#107 GND#49
(3.3V@60mA)) VDDC#23
AF20 F31
GND#108 GND#50
AJ2
+3V_D AF23 AF22 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 F33 AJ28
VDDR3#1 VDDC#24 GND#109 GND#51
AF24 AG16 F7 AJ6
AG23 AG18 F9 AK11
C120 C185 C181 C182 VDDR3#3 VDDC#26 GND#111 GND#53
AG24 AG21 G2 AK31
EV@1U/6.3V_4 EV@1U/6.3V_4 VDDR3#4 VDDC#27 GND#112 GND#54
AH22 G6 AK7
EV@10U/6.3V_6 EV@1U/6.3V_4 VDDC#28 GND#113 GND#55
AH27 H9 AL11
VDDC#29 C179 C180 C210 C240 C271 C187 GND#114 GND#56
AF13 AH28 J2 AL14
VDDR4#4 VDDC#30 EV@10U/6.3V_6 EV@10U/6.3V_6 EV@10U/6.3V_6 GND#115 GND#57
AF15 M26 J27 AL17
120 ohm/300mA VDDR4#5 VDDC#31 EV@10U/6.3V_6 EV@10U/6.3V_6 EV@10U/6.3V_6 GND#116 GND#58
AG13 N24 J6 AL2
L62 VDDR4
EV@SBY100505T-121Y-N/0.3A/120ohm_4 VDDR4#7 VDDC#32 GND#117 GND#59
+1.8V_GPU AG15 N27 J8 AL20
R18 K14 AL21
R21 K7 AL23
C601 C610 VDDC#35 GND#120 GND#62
AD12 R23 L11 AL26
EV@.1u/10V_4 VDDR4#1 VDDC#36 GND#121 GND#63 R99
AF11 R26 L17 AL32
EV@1U/6.3V_4 VDDR4#2 VDDC#37 GND#122 GND#64
AF12 T17 L2 AL6
VDDR4#3 VDDC#38 GND#123 GND#65 *EV@0_4
AG11 T20 L22 AL8
T22 L24 AM11
T24 L6 AM31
T27 M17 AM9
U16 M22 AN11
T80 VDDC#43 GND#128 GND#70
M20
NC_VDDRHA VDDC#44
U18 M24
GND#129 GND#71
AN2 Pin AL21 to Ground
T81 M21 U21 N16 AN30
NC_VSSRHA VDDC#45 GND#130 GND#72 for Broadway
U23 N18 AN6
U26 N2 AN8
T75 VDDC#47 GND#132 GND#74
V12 V17 N21 AP11
T77 NC_VDDRHB VDDC#48 GND#133 GND#75
U12 V20 N23 AP7
NC_VSSRHB VDDC#49 GND#134 GND#76
V22 N26 AP9
V24 N6 AR5
V27 R15 AW34
Y16 R17 B11
120 ohm/300mA PLL VDDC#53 GND#138 GND#80
(1.8V@40mA PCIE_PVDD) VDDC#54
Y18 R2
GND#139 GND#81
B13
L68 EV@SBY100505T-121Y-N/0.3A/120ohm_4 PCIE_PVDD AB37 Y21 R20 B15
+1.8V_GPU PCIE_PVDD VDDC#55 GND#140 GND#82
Y23 R22 B17
MPV18 VDDC#56 GND#141 GND#83
H7 Y26 R24 B19
B
C624 C630 C633 MPV18#1 VDDC#57 GND#142 GND#84 B
H8 Y28 R27 B21
EV@1U/6.3V_4 MPV18#2 VDDC#58 GND#143 GND#85
R6 B23
EV@10U/6.3V_6 EV@.1u/10V_4 GND#144 GND#86
T11 B25
SPV18 GND#145 GND#87
AM10 T13 B27
120 ohm/300mA SPV18 GND#146 GND#88
(1.8V@150mA MPV18) VDDCI#1
AA13 T16
GND#147 GND#89
B29
L39 EV@SBY100505T-121Y-N/0.3A/120ohm_4 SPV10 AN9 AB13 T18 B31
+1.8V_GPU SPV10 VDDCI#2 GND#148 GND#90
AC12 T21 B33
VDDCI#3 C282 C263 C285 C248 C290 GND#149 GND#91
AN10 AC15 T23 B7
C344 C328 C335 SPVSS VDDCI#4 EV@1U/6.3V_4 EV@1U/6.3V_4 GND#150 GND#92
AD13 T26 B9
EV@1U/6.3V_4 VDDCI#5 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 GND#151 GND#93
AD16 U15 C1
EV@10U/6.3V_6 EV@.1u/10V_4 VDDCI#6 GND#153 GND#94
M15 U17 C39
VDDCI#7 +VGPU_CORE GND#154 GND#95
M16 U2 E35
VOLTAGE VDDCI#8 GND#155 GND#96
M18 U20 E5
120 ohm/300mA SENESE VDDCI#9 GND#156 GND#97
(1.8V@75mA SPV18) VDDCI#10
M23 U22
GND#157 GND#98
F11
L26 EV@SBY100505T-121Y-N/0.3A/120ohm_4 N13 +3V U24 F13
+1.8V_GPU VDDCI#11 GND#158 GND#99
T59 AF28 N15 U27
FB_VDDC VDDCI#12 C233 C270 C294 C307 C260 GND#159
N17 U6
C138 C139 VDDCI#13 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 GND#160
N20 V11
VDDCI#14 GND#161
1
EV@.1u/10V_4 T64 AG28 N22 EV@1U/6.3V_4 EV@1U/6.3V_4 V16
EV@10U/6.3V_6 FB_VDDCI ISOLATED VDDCI#15 GND#163
R12 V18
CORE I/O VDDCI#16 R13 R75 V21
GND#164
PowerXpress control signal for Park only
T58 VDDCI#17 GND#165
AH29 R16 2 V23 If not used, can be disconnected.
120 ohm/300mA FB_GND VDDCI#18 *EV@0_6 GND#166
(1.0V@120mA SPV10) VDDCI#19
T12 V26
GND#167 PX_EN = LOW, turn on
+1V L30 EV@SBY100505T-121Y-N/0.3A/120ohm_4 T15 W2
VDDCI#20 C665 C664 C291 Q5 EV@AO3413 GND#168 PX_EN = HIGH, turn off
VDDCI#21
V15 1A W6
GND#169 PX_EN is used to turn ON/OFF some
Y13 EV@10U/6.3V_6 Y15
3
C144 C149 VDDCI#22 EV@10U/6.3V_6 EV@10U/6.3V_6 GND#170 regulators for PowerXpress mode. An
+3V_D_EXT Y17
EV@.1u/10V_4 GND#171 output high ‘3.3V’ will turn the regulators
Y20
EV@10U/6.3V_6 EV@Park_M2 C111 C115 C114 GND#172 OFF. An output low ‘0V’ will turn the
Y22 A39
GND#173 VSS_MECH#1
Y24 AW1 regulators ON. PX_EN outputs low (0V)
EV@1U/6.3V_4 GND#174 VSS_MECH#2
Y27 AW39 by default.
EV@10U/6.3V_6 EV@.1u/10V_4 GND#175 VSS_MECH#3
U13 If this signal is unused, it can be NC (not
+3V GND#152
V13
GPU power enable GPU all PWROK GND#162 connected) or connected to ground.
GPU +3V_D power EV@Park_M2
+3V +3V +3V
R71
A Change from 100K to 4.7K EV@10K_4 R81 A
dGPU_VRON
1
2ms R72 R69 *EV@0_6
dGPU_PWREN EV@4.7K_4 EV@4.7K_4
dGPU_PWROK [10]
R78 R82
3
EV@10K_4 2
Q6 dGPU_PWREN R63 *EV@0_6
EV@2N7002K EV@0_4
[11] dGPU_PWR_EN dGPU_PWREN [42]
3
EV@BAS316 D5 2 Q7 EV@AO3413 1A
3
[10] dGPU_VRON
3
*EV@BAS316 D4 R61 2
+1.5V_GPU
*EV@0_4 EV@DTC144EUA
Q4
+3V_D
PROJECT : ZQA
C98 2 C83 C127 C131 C122
+1.8V_GPU
1
>1mS delay is required between all MXM power rail stable EV@.1u/10V_4
1
and MXM_PWREN(enables the module internal power) EV@1U/6.3V_4 EV@1U/6.3V_4

Q8 EV@10U/6.3V_6 EV@.1u/10V_4 Size Document Number Rev
1
EV@PDTC143TT Madison/Park (PWR/GND)4/6 1A

5 4 3 2 1
5 4 3 2 1
DPAB_VDD18
U20H
DP C/D POWER DP A/B POWER DPAB_VDD18

(1.8V@300mA DPAB_VDD18) L29 EV@BLM15BB121SS1
+1.8V_GPU
19
AP20 DPC_VDD18#1 DPA_VDD18#1 AN24
AP21 DPC_VDD18#2 DPA_VDD18#2 AP24
C147 C148 C140
DPAB_VDD10 DPAB_VDD10 EV@.1u/10V_4 EV@1U/6.3V_4 EV@10U/6.3V_6
D D
AP13 DPC_VDD10#1 DPA_VDD10#1 AP31

AT13 DPC_VDD10#2 DPA_VDD10#2 AP32
AN17 DPC_VSSR#1 DPA_VSSR#1 AN27

AP16 DPC_VSSR#2 DPA_VSSR#2 AP27
AP17 DPC_VSSR#3 DPA_VSSR#3 AP28
AW14 DPC_VSSR#4 DPA_VSSR#4 AW24
AW16 DPC_VSSR#5 DPA_VSSR#5 AW26
DPAB_VDD18 DPAB_VDD18
AP22 DPD_VDD18#1 DPB_VDD18#1 AP25

DPAB_VDD10 DPAB_VDD10 +1V

(1.0V@220mA DPAB_VDD10) L33 EV@BLM15BB121SS1
NOTE : DPD is NA on Park,Robson and Seymour. AP14 DPD_VDD10#1 DPB_VDD10#1 AN33
C163 C160 C155

EV@.1u/10V_4 EV@1U/6.3V_4 EV@10U/6.3V_6
C AN19 DPD_VSSR#1 DPB_VSSR#1 AN29 C
AP18 DPD_VSSR#2 DPB_VSSR#2 AP29
AP19 DPD_VSSR#3 DPB_VSSR#3 AP30
AW20 DPD_VSSR#4 DPB_VSSR#4 AW30
AW22 DPD_VSSR#5 DPB_VSSR#5 AW32
DP mode
(1.8V@300mA DPEF_VDD18)
R357 EV@150/F_4 DPCD_CALR AW18 AW28 DPAB_CALR R358 EV@150/F_4
LVDS mode DPCD_CALR DPAB_CALR
+1.8V_GPU (1.8V@440mA DPEF_VDD18) DPEF_VDD18 DPAB_VDD18
DP E/F POWER DP PLL POWER
L65 EV@BLM15BB121SS1 AH34 AU28
DPE_VDD18#1 DPA_PVDD
AJ34 DPE_VDD18#2 DPA_PVSS AV27
C157 C603 C602
EV@10U/6.3V_6 EV@1U/6.3V_4 EV@.1u/10V_4 DPEF_VDD10
AL33 DPE_VDD10#1 DPB_PVDD AV29

AM33 DPE_VDD10#2 DPB_PVSS AR28
AN34 DPE_VSSR#1 DPC_PVDD AU18

AP39 DPE_VSSR#2 DPC_PVSS AV17
B AR39 DPE_VSSR#3 B
AU37 DPE_VSSR#4
AW35 DPE_VSSR#5
DPD_PVDD AV19
DPEF_VDD18 AR18
DPD_PVSS
DP mode DPEF_VDD18
AF34 DPF_VDD18#1
(1.0V@220mA DPEF_VDD10) AG34 DPF_VDD18#2
LVDS mode DPE_PVDD AM37
+1V DPEF_VDD10 AN38
DPE_PVSS
(1.0V@240mA DPEF_VDD10)
L63 EV@BLM15BB121SS1 AK33 DPF_VDD10#1
AK34 DPF_VDD10#2
C596 C599 C600 AL38
EV@10U/6.3V_6 EV@1U/6.3V_4 EV@.1u/10V_4 NC_DPF_PVDD
NC_DPF_PVSS AM35
AF39 DPF_VSSR#1
AH39 DPF_VSSR#2
AK39 DPF_VSSR#3
AL34 DPF_VSSR#4
AM34 DPF_VSSR#5
A R363 EV@150/F_4 DPEF_CALR AM39 A

DPEF_CALR
EV@Park_M2
PROJECT : ZQA
Madison/Park (DP_PWR/GND)5/6 1A

5 4 3 2 1
5 4 3 2 1
20
PIN STRAPS Memory Aperture size
CONFIGURATION STRAPS
GPIO[13:11] Size ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED,
+3V_D THEY MUST NOT CONFLICT DURING RESET
R87 *EV@10K/F_4
[16] GPU_GPIO13 000 128MB STRAPS PIN DESCRIPTION OF DEFAULT SETTINGS DEFAULT REMARK
R101 *EV@10K/F_4
[16] GPU_GPIO12
001 256MB
R93 *EV@10K/F_4 TX_PWRS_ENB GPIO0 0 = 50% TX OUTPUT SWING 0
D [16] GPU_GPIO11 D
1 = FULL TX OUTPUT SWING
010 64MB
TX_DEEMPH_EN GPIO1 PCIE TRANSMITTER DE-EMPHASIS ENABLED 0
R91 *EV@10K/F_4 0 = TX DE-EMPHASIS DISABLED
[16] GPU_GPIO0
011 32MB 1 = TX DE-EMPHASIS ENABLED
R84 *EV@10K/F_4 ENABLE EXTERNAL BIOS ROM
[16] GPU_GPIO1
BIOS_ROM_EN GPIO_22_ROMCSB 0 = DISABLE 0
1 = ENABLE
ROMIDCFG(2:0) GPIO[13:11] SERIAL ROM TYPE OR MEMORY APERTURE SIZE SELECT

R88 *EV@10K/F_4 NUMONYX M25P10A : 101 000 See ROM table
[16] GPIO3_SMBDAT
R95 *EV@10K/F_4
[16] GPIO4_SMBCLK
BIF_GEN2_EN_A GPIO2 0 = PCIE DEVICE AS 2.5GT/S CAPABLE 0
ROM Table 1 = PCIE DEVICE AS 5GT/S CAPABLE
R92 *EV@10K/F_4
[16] SCS#_GPIO22
EXT_HSYNC EXT_VSYNC GPIO_8_ROMSO GPIO8
Discription H2SYNC H2SYNC Reserved Only 0
R359 *EV@10K/F_4 GPIO_21_BB_EN GPIO21
[16] GPU_GPIO2
0 0 No Audio AUD[1:0]
R130 EV@10K/F_4 AUD[1] HSYNC 00: NO AUDIO FUNCTION.
[16,22] EXT_HSYNC
R133 EV@10K/F_4 0 1 Any one by dectec AUD[0] VSYNC
01: AUDIO FOR DISPLAYPORT AND HDMI IF
See Audio table
[16,22] EXT_VSYNC ADAPTER IS DETECTED. 11
10: AUDIO FOR DISPLAYPORT ONLY.
R86 *EV@10K/F_4 1 0 DP only 11: AUDIO FOR BOTH DISPLAYPORT AND HDMI.
[16] SIN_GPIO9
R122 *EV@10K/F_4
[16] V2SYNC
1 1 Both DP & HDMI GPIO_9_ROMSI GPIO9 0 = VGA controller capacity enable 0
C C
VIP_DEVICE_STRAP_ENA V2SYNC 0 = DRIVER would ignore the value sample on VHAD_0 during RESET. 0
DDR3 Memory Aperture size

DDR3 Memory Aperture size
RAM_STRAP2 RAM_STRAP1 RAM_STRAP0
Vendor Vendor P/N STN B/S P/N Size
DVPDATA_2 DVPDATA_1 DVPDATA_0
512MB 1 1 0
Hynix AKD5LZGTW04
H5TQ1G63BFR-12C 1GB
(64M*16) 1 0 0
2GB 1 1 1
B B
512MB 0 1 0
AKD5LGGT506
K4W1G1646E-HC12 1GB
Thermal Sensor Samsung (64M*16) 0 0 0
K4W2G1646B-HC12 AKD5MGGT500 2GB 0 0 1
+3V_D_EXT
+3V_D_EXT
R105 R109
EV@10K_4 EV@10K_4 C161 EV@.1u/10V_4 Samsung-1GB +1.8V_GPU
U5
R354 *SP@10K/F_4
[16] RAM_STRAP2
A
[34] MXM_SMCLK12 8 SCLK VCC 1 GPU_D+ [16] R361 SP@10K/F_4 RAM_STRAP2 SET DDR3 Vendor A
C156
[34] MXM_SMDATA12 7
SDA DXP
2
RAM_STRAP[1:0] SET SIZE.
6 3 EV@2.2n/50V_4
[16] ALT#_GPIO17 ALERT# DXN R352 *SP@10K/F_4
GPU_D- [16] [16] RAM_STRAP1
[34] VGA_THERM# 4 5
OVERT# GND R362 SP@10K/F_4
PROJECT : ZQA
EV@G780-1P81U(MSOP)
R353 *SP@10K/F_4 Quanta Computer Inc.
Address ID: 98H [16] RAM_STRAP0
R360 SP@10K/F_4 Size Document Number Rev
Medison/Park Strip/Thermal 6/6 1A

5 4 3 2 1
5 4 3 2 1
CHANNEL B: 512MB DDR3 (64M*16*4pcs)

[17] VMB_DQ[63..0]
[17] VMB_DM[7..0]
[17] VMB_RDQS[7..0]
VMB_DQ[63..0]
VMB_DM[7..0]
VMB_RDQS[7..0]
VMB_WDQS[7..0]
QSA[7..0]
U7 U23
U6 U19
21
[17] VMB_WDQS[7..0] QSA#[7..0]
VREFC_VMB3 M8 E3 VMB_DQ63 VREFC_VMB4 M8 E3 VMB_DQ51
VREFC_VMB1 VMB_DQ5 VREFC_VMB2 VMB_DQ9 VREFD_VMB3 VREFCA DQL0 VMB_DQ57 VREFD_VMB4 VREFCA DQL0 VMB_DQ52
M8 E3 M8 E3 H1 F7 H1 F7
VREFD_VMB1 VREFCA DQL0 VMB_DQ3 VREFD_VMB2 VREFCA DQL0 VMB_DQ13 VREFDQ DQL1 VMB_DQ60 VREFDQ DQL1 VMB_DQ50
H1 F7 H1 F7 F2 F2
VREFDQ DQL1 VMB_DQ4 VREFDQ DQL1 VMB_DQ11 VMB_MA0 DQL2 VMB_DQ58 VMB_MA0 DQL2 VMB_DQ53
F2 F2 N3 F8 N3 F8
[17]
[17]
VMB_MA0
VMB_MA1
VMB_MA0
VMB_MA1
VMB_MA2
N3
P7
A0
A1
DQL2
DQL3
DQL4
F8
H3
VMB_DQ2
VMB_DQ7
VMB_DQ0 0
VMB_MA0
VMB_MA1
VMB_MA2
N3
P7
A0
A1
DQL2
DQL3
DQL4
F8
H3
VMB_DQ12
VMB_DQ10
VMB_DQ14
1 VMB_MA1
VMB_MA2
VMB_MA3
P7
P3
A0
A1
A2
DQL3
DQL4
DQL5
H3
H8
VMB_DQ62
VMB_DQ59
VMB_DQ61 7
VMB_MA1
VMB_MA2
VMB_MA3
P7
P3
A0
A1
A2
DQL3
DQL4
DQL5
H3
H8
VMB_DQ49
VMB_DQ54
VMB_DQ48
6
[17] VMB_MA2 P3 H8 P3 H8 N2 G2 N2 G2
VMB_MA3 A2 DQL5 VMB_DQ6 VMB_MA3 A2 DQL5 VMB_DQ8 VMB_MA4 A3 DQL6 VMB_DQ56 VMB_MA4 A3 DQL6 VMB_DQ55
[17] VMB_MA3 N2 G2 N2 G2 P8 H7 P8 H7
VMB_MA4 A3 DQL6 VMB_DQ1 VMB_MA4 A3 DQL6 VMB_DQ15 VMB_MA5 A4 DQL7 VMB_MA5 A4 DQL7
[17] VMB_MA4 P8 H7 P8 H7 P2 P2
D
VMB_MA5 A4 DQL7 VMB_MA5 A4 DQL7 VMB_MA6 A5 VMB_MA6 A5 D
[17] VMB_MA5 P2 P2 R8 R8
VMB_MA6 A5 VMB_MA6 A5 VMB_MA7 A6 VMB_DQ34 VMB_MA7 A6 VMB_DQ45
[17] VMB_MA6 R8 R8 R2 D7 R2 D7
VMB_MA7 A6 VMB_DQ24 VMB_MA7 A6 VMB_DQ21 VMB_MA8 A7 DQU0 VMB_DQ37 VMB_MA8 A7 DQU0 VMB_DQ41
[17] VMB_MA7 R2 D7 R2 D7 T8 C3 T8 C3
VMB_MA8 A7 DQU0 VMB_DQ31 VMB_MA8 A7 DQU0 VMB_DQ19 VMB_MA9 A8 DQU1 VMB_DQ33 VMB_MA9 A8 DQU1 VMB_DQ47
T8 C3 T8 C3 R3 C8 R3 C8
[17]
[17]
VMB_MA8
VMB_MA9
VMB_MA9
VMB_MA10
R3
L7
A8
A9
DQU1
DQU2
C8
C2
VMB_DQ25
VMB_DQ29
3
VMB_MA9
VMB_MA10
R3
L7
A8
A9
DQU1
DQU2
C8
C2
VMB_DQ23
VMB_DQ17
VMB_MA10
VMB_MA11
L7
R7
A9
A10/AP
DQU2
DQU3
C2
A7
VMB_DQ36
VMB_DQ32
4
VMB_MA10
VMB_MA11
L7
R7
A9
A10/AP
DQU2
DQU3
C2
A7
VMB_DQ42
VMB_DQ44 5
[17]
[17]
[17]
VMB_MA10
VMB_MA11
VMB_MA12
VMB_MA11
VMB_MA12
VMB_MA13
R7
N7
A10/AP
A11
A12/BC
DQU3
DQU4
DQU5
A7
A2
VMB_DQ26
VMB_DQ30
VMB_DQ28
VMB_MA11
VMB_MA12
VMB_MA13
R7
N7
A10/AP
A11
A12/BC
DQU3
DQU4
DQU5
A7
A2
VMB_DQ20
VMB_DQ16
VMB_DQ22
2 VMB_MA12
VMB_MA13
N7
T3
A11
A12/BC
A13
DQU4
DQU5
DQU6
A2
B8
VMB_DQ39
VMB_DQ35
VMB_DQ38
VMB_MA12
VMB_MA13
N7
T3
A11
A12/BC
A13
DQU4
DQU5
DQU6
A2
B8
VMB_DQ40
VMB_DQ46
VMB_DQ43
[17] VMB_MA13 T3 B8 T3 B8 T7 A3 T7 A3
A13 DQU6 VMB_DQ27 A13 DQU6 VMB_DQ18 A14 DQU7 A14 DQU7
T7 A3 T7 A3 M7 M7
A14 DQU7 A14 DQU7 A15 +1.5V_GPU A15 +1.5V_GPU
M7 M7
A15 +1.5V_GPU A15 +1.5V_GPU
VMB_BA0 M2 B2 VMB_BA0 M2 B2
VMB_BA0 VMB_BA0 VMB_BA1 BA0 VDD#B2 VMB_BA1 BA0 VDD#B2
[17] VMB_BA0 M2 B2 M2 B2 N8 D9 N8 D9
VMB_BA1 BA0 VDD#B2 VMB_BA1 BA0 VDD#B2 VMB_BA2 BA1 VDD#D9 VMB_BA2 BA1 VDD#D9
[17] VMB_BA1 N8 D9 N8 D9 M3 G7 M3 G7
VMB_BA2 BA1 VDD#D9 VMB_BA2 BA1 VDD#D9 BA2 VDD#G7 BA2 VDD#G7
[17] VMB_BA2 M3 G7 M3 G7 K2 K2
BA2 VDD#G7 BA2 VDD#G7 VDD#K2 VDD#K2
K2 K2 K8 K8
VDD#K2 VDD#K2 VDD#K8 VDD#K8
K8 K8 N1 N1
VDD#K8 VDD#K8 VMB_CLKP1 VDD#N1 VMB_CLKP1 VDD#N1
N1 N1 [17] VMB_CLKP1 J7 N9 J7 N9
VMB_CLKP0 VDD#N1 VMB_CLKP0 VDD#N1 VMB_CLKN1 CK VDD#N9 VMB_CLKN1 CK VDD#N9
[17] VMB_CLKP0 J7 N9 J7 N9 [17] VMB_CLKN1 K7 R1 K7 R1
VMB_CLKN0 CK VDD#N9 VMB_CLKN0 CK VDD#N9 VMB_CKE1 CK VDD#R1 VMB_CKE1 CK VDD#R1
[17] VMB_CLKN0 K7 R1 K7 R1 [17] VMB_CKE1 K9 R9 K9 R9
VMB_CKE0 CK VDD#R1 VMB_CKE0 CK VDD#R1 CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU
[17] VMB_CKE0 K9 R9 K9 R9
CKE VDD#R9 +1.5V_GPU CKE VDD#R9 +1.5V_GPU
VMB_ODT1 K1 A1 VMB_ODT1 K1 A1
[17] VMB_ODT1 ODT VDDQ#A1 ODT VDDQ#A1
VMB_ODT0 K1 A1 VMB_ODT0 K1 A1 VMB_CS1# L2 A8 VMB_CS1# L2 A8
[17] VMB_ODT0 ODT VDDQ#A1 ODT VDDQ#A1 [17] VMB_CS1# CS VDDQ#A8 CS VDDQ#A8
VMB_CS0# L2 A8 VMB_CS0# L2 A8 VMB_RAS1# J3 C1 VMB_RAS1# J3 C1
[17] VMB_CS0# CS VDDQ#A8 CS VDDQ#A8 [17] VMB_RAS1# RAS VDDQ#C1 RAS VDDQ#C1
VMB_RAS0# J3 C1 VMB_RAS0# J3 C1 VMB_CAS1# K3 C9 VMB_CAS1# K3 C9
[17] VMB_RAS0# RAS VDDQ#C1 RAS VDDQ#C1 [17] VMB_CAS1# CAS VDDQ#C9 CAS VDDQ#C9
VMB_CAS0# K3 C9 VMB_CAS0# K3 C9 VMB_WE1# L3 D2 VMB_WE1# L3 D2
[17] VMB_CAS0# CAS VDDQ#C9 CAS VDDQ#C9 [17] VMB_WE1# WE VDDQ#D2 WE VDDQ#D2
VMB_WE0# L3 D2 VMB_WE0# L3 D2 E9 E9
[17] VMB_WE0# WE VDDQ#D2 WE VDDQ#D2 VDDQ#E9 VDDQ#E9
E9 E9 F1 F1
VDDQ#E9 VDDQ#E9 VMB_RDQS7 VDDQ#F1 VMB_RDQS6 VDDQ#F1
F1 F1 F3 H2 F3 H2
VMB_RDQS0 VDDQ#F1 VMB_RDQS1 VDDQ#F1 VMB_RDQS4 DQSL VDDQ#H2 VMB_RDQS5 DQSL VDDQ#H2
F3 H2 F3 H2 C7 H9 C7 H9
VMB_RDQS3 DQSL VDDQ#H2 VMB_RDQS2 DQSL VDDQ#H2 DQSU VDDQ#H9 DQSU VDDQ#H9
C7 H9 C7 H9
DQSU VDDQ#H9 DQSU VDDQ#H9
VMB_DM7 E7 A9 VMB_DM6 E7 A9
VMB_DM0 VMB_DM1 VMB_DM4 DML VSS#A9 VMB_DM5 DML VSS#A9
E7 A9 E7 A9 D3 B3 D3 B3
VMB_DM3 DML VSS#A9 VMB_DM2 DML VSS#A9 DMU VSS#B3 DMU VSS#B3
D3 B3 D3 B3 E1 E1
DMU VSS#B3 DMU VSS#B3 VSS#E1 VSS#E1
C E1 E1 G8 G8 C
VSS#E1 VSS#E1 VMB_WDQS7 VSS#G8 VMB_WDQS6 VSS#G8
G8 G8 G3 J2 G3 J2
VMB_WDQS0 VSS#G8 VMB_WDQS1 VSS#G8 VMB_WDQS4 DQSL VSS#J2 VMB_WDQS5 DQSL VSS#J2
G3 J2 G3 J2 B7 J8 B7 J8
VMB_WDQS3 DQSL VSS#J2 VMB_WDQS2 DQSL VSS#J2 DQSU VSS#J8 DQSU VSS#J8
B7 J8 B7 J8 M1 M1
DQSU VSS#J8 DQSU VSS#J8 VSS#M1 VSS#M1
M1 M1 M9 M9
VSS#M1 VSS#M1 VSS#M9 VSS#M9
M9 M9 P1 P1
VSS#M9 VSS#M9 MEM_RST# VSS#P1 MEM_RST# VSS#P1
P1 P1 T2 P9 T2 P9
MEM_RST# VSS#P1 MEM_RST# VSS#P1 RESET VSS#P9 RESET VSS#P9
T2 P9 T2 P9 T1 T1
[17] MEM_RST# RESET VSS#P9 RESET VSS#P9 VMB_ZQ3 VSS#T1 VMB_ZQ4 VSS#T1
T1 T1 L8 T9 L8 T9
VMB_ZQ1 VSS#T1 VMB_ZQ2 VSS#T1 ZQ VSS#T9 ZQ VSS#T9
L8 T9 L8 T9
ZQ VSS#T9 ZQ VSS#T9
B1 B1
VSSQ#B1 VSSQ#B1
B1 B1 B9 B9
VSSQ#B1 VSSQ#B1 R112 VSSQ#B9 R377 VSSQ#B9
B9 B9 D1 D1
R164 VSSQ#B9 R409 VSSQ#B9 VSSQ#D1 VSSQ#D1
D1 D1 EV@240/F_4 D8 EV@240/F_4 D8
VSSQ#D1 VSSQ#D1 VSSQ#D8 VSSQ#D8
EV@240/F_4 D8 EV@240/F_4 D8 E2 E2
VSSQ#D8 VSSQ#D8 VSSQ#E2 VSSQ#E2
E2 E2 J1 E8 J1 E8
VSSQ#E2 VSSQ#E2 NC#J1 VSSQ#E8 NC#J1 VSSQ#E8
J1 E8 J1 E8 L1 F9 L1 F9
NC#J1 VSSQ#E8 NC#J1 VSSQ#E8 NC#L1 VSSQ#F9 NC#L1 VSSQ#F9
L1 F9 L1 F9 J9 G1 J9 G1
NC#L1 VSSQ#F9 NC#L1 VSSQ#F9 NC#J9 VSSQ#G1 NC#J9 VSSQ#G1
J9 G1 J9 G1 L9 G9 L9 G9
NC#J9 VSSQ#G1 NC#J9 VSSQ#G1 NC#L9 VSSQ#G9 NC#L9 VSSQ#G9
L9 G9 L9 G9
NC#L9 VSSQ#G9 NC#L9 VSSQ#G9 100-BALL 100-BALL
100-BALL 100-BALL SDRAM DDR3 SDRAM DDR3
SDRAM DDR3 SDRAM DDR3 EV@VRAM _DDR3 EV@VRAM _DDR3
EV@VRAM _DDR3 EV@VRAM _DDR3
BOT Down TOP Down TOP Up BOT Up
Group-B0 VREF Group-B1 VREF

+1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU +1.5V_GPU
B B
R160 R173 R404 R412 R115 R365 R380 R110

EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4
VREFC_VMB1 VREFD_VMB1 VREFC_VMB2 VREFD_VMB2 VREFC_VMB3 VREFD_VMB3 VREFC_VMB4 VREFD_VMB4
R156 C299 R165 C343 R407 C644 R411 C660 R114 C174 R368 C617 R376 C620 R111 C165
EV@.1u/10V_4 EV@.1u/10V_4 EV@.1u/10V_4 EV@.1u/10V_4 EV@.1u/10V_4 EV@.1u/10V_4 EV@.1u/10V_4 EV@.1u/10V_4
EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4 EV@4.99K/F_4
Group-B0 decoupling CAP Group-B1 decoupling CAP

MEM_B0 CLK MEM_B1 CLK
+1.5V_GPU +1.5V_GPU
VMB_CLKP1
VMB_CLKP0 VMB_CLKN1
C659 C641 C663 C654 C662 C352 C190 C164 C212 C615 C200 C626 C162 C159 C171
VMB_CLKN0 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4
EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 R373 R371
EV@56.2/F_4
R167 R169 EV@56.2/F_4
EV@56.2/F_4 +1.5V_GPU +1.5V_GPU
EV@56.2/F_4
A C618 A
C645 C186 C368 C355 C311 C647 C359 C197 C184 C141 C239 C158 C189 C177 C175 EV@.01u/16V_4
C345 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4
EV@.01u/16V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4 EV@1U/6.3V_4
+1.5V_GPU +1.5V_GPU
PROJECT : ZQA
C324 C370 C636 C638 C649 C142 C298 C631 C257 C632
EV@10U/6.3V_6 EV@10U/6.3V_6 EV@10U/6.3V_6 EV@10U/6.3V_6 Quanta Computer Inc.
EV@10U/6.3V_6 EV@10U/6.3V_6 EV@10U/6.3V_6 EV@10U/6.3V_6 EV@10U/6.3V_6 EV@10U/6.3V_6
MEMORY 2 channel B 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
CRT OPTION SIGNAL FROM NB to LVDS/CRT for UMA C640 .22u/6.3V_4

+5V 30V/ 1A 30V/ 0.5A
OPTION SIGNAL FROM NB to CRT for UMA F1 2 CRTVDD5_F D28 CRTVDD5
16
1 2 1
B0520WS-7-F CN9
SMD1206P100TF CRT
INT_DDCCLK RP2 3 4 IV@0_4P2R_4 CRTDCLK 6
[8] INT_DDCCLK
INT_DDCDATA 1 2 CRTDDAT VGA_RED_SYS L38 BLM18BA470SN1_6 CRT_R1 1 11 CRT_11 T79
[8] INT_DDCDATA
7
VGA_GRN_SYS L37 BLM18BA470SN1_6 CRT_G1 2 12 DDCDAT_1
INT_CRT_HSYNCRP5 3 4 IV@0_4P2R_4 HSYNC 8
[8] INT_CRT_HSYNC
INT_CRT_VSYNC 1 2 VSYNC VGA_BLU_SYS L36 BLM18BA470SN1_6 CRT_B1 3 13 CRTHSYNC
[8] INT_CRT_VSYNC
A
9 A
INT_CRT_RED R125 IV@0_4 VGA_RED_SYS 4 14 CRTVSYNC
[8] INT_CRT_RED
INT_CRT_GRE R121 IV@0_4 VGA_GRN_SYS R147 R146 C251 C237 C254 C281 C279 C293 10
[8] INT_CRT_GRE
INT_CRT_BLU R117 IV@0_4 VGA_BLU_SYS R145 5 15 DDCCLK_1
[8] INT_CRT_BLU
SP@140/F_4 150/F_4 150/F_4 10P/50V_4 10P/50V_4 10P/50V_4 10P/50V_4 10P/50V_4 10P/50V_4
17
EV_CRTDDAT RP3 3 4 EV@0_4P2R_4 CRTDDAT
[16] EV_CRTDDAT +3V +3V
EV_CRTDCLK 1 2 CRTDCLK U21
[16] EV_CRTDCLK
CRTVDD5 1 16 CRTVSYNC
VCC_SYNC SYNC_OUT2 CRTHSYNC
SYNC_OUT1 14
EXT_VSYNC RP4 3 4 EV@0_4P2R_4 VSYNC 7 C635 *.1u/10V_4 CRTVDD5
[16,20] EXT_VSYNC VCC_DDC
EXT_HSYNC 1 2 HSYNC C250 .22u/6.3V_4 CRT_BYP 8
[16,20] EXT_HSYNC BYP
C648 15 VSYNC R384 R385 C193 *10P/50V_4 CRTVSYNC
EXT_CRT_RED R124 EV@0_4 VGA_RED_SYS SYNC_IN2 HSYNC 2.7K_4 2.7K_4
[16] EXT_CRT_RED +3V 2 VCC_VIDEO SYNC_IN1 13
EXT_CRT_GRN R120 EV@0_4 VGA_GRN_SYS 0.1u/10V_4 C223 *10P/50V_4 CRTHSYNC
[16] EXT_CRT_GRN
EXT_CRT_BLU R116 EV@0_4 VGA_BLU_SYS C245
[16] EXT_CRT_BLU
CRT_R1 3 10 CRTDCLK C183 *10P/50V_4 DDCCLK_1
0.1u/10V_4 CRT_G1 VIDEO_1 DDC_IN1 CRTDDAT
4 VIDEO_2 DDC_IN2 11
CRT_B1 5 C646 *10P/50V_4 DDCDAT_1
VIDEO_3 DDCCLK_1 R383 2.7K_4 CRTVDD5
DDC_OUT1 9
6 12 DDCDAT_1 R386 2.7K_4
GND DDC_OUT2
CM2009-02QR
B B
OPTION LCDVCC SIGNAL FROM NB to LVDS for UMA
LVDS(LDS) OPTION SIGNAL FROM NB to LVDS for UMA VIN

L5 *0_6
LCD PW(LDS) +3V
LCDVCC L2 0_6 LCDVCC_L
L4 0_6 LCD_VIN C4 C9
C14 C11
INT_EDIDCLK RP12 1 2 IV@0_4P2R_4 LCD_EDIDCLK *10P/50V_4 *10P/50V_4
[8] INT_EDIDCLK
INT_EDIDDATA 3 4 LCD_EDIDDATA *10P/50V_4 *10P/50V_4 C8
[8] INT_EDIDDATA +3V
LA_CLK# RP14 1 2 IV@0_4P2R_4 TXLCLKOUT- L1 1U/6.3V_4 U1
[8] LA_CLK#
LA_CLK 3 4 TXLCLKOUT+ 0_6 40mil
[8] LA_CLK
LA_DATAN0 RP15 1 2 IV@0_4P2R_4 TXLOUT0- CCD_POWER 6 1 LCDVCC
[8] LA_DATAN0 [8] INT_LVDS_DIGON IN OUT
LA_DATAP0 3 4 TXLOUT0+ C10
[8] LA_DATAP0
LA_DATAN1 RP16 1 2 IV@0_4P2R_4 TXLOUT1- C15 *10P/50V_4 R3 IV@0_4 4 2
[8] LA_DATAN1 IN GND
LA_DATAP1 3 4 TXLOUT1+ *10P/50V_4
[8] LA_DATAP1
LA_DATAN2 RP17 1 2 IV@0_4P2R_4 TXLOUT2- R4 EV@0_4 LVDS_VDDEN 3 5 C5 C1 C6 C3
[8] LA_DATAN2 ON/OFF GND
LA_DATAP2 3 4 TXLOUT2+ CN5
[8] LA_DATAP2
LCD_VIN
1 1U/6.3V_4 *.1u/10V_4 .01u/16V_4 22u/6.3V_8
+3V 60mil 2
1 [16] EV_LVDS_VDDEN
IC(5P) G5243T11U
EV_LVDS_DDCDAT RP13 1 EV@0_4P2R_4 LCD_EDIDDATA LCDVCC_L 2 R2
2 3
[16] EV_LVDS_DDCDAT
EV_LVDS_DDCCLK 3 4 LCD_EDIDCLK 40mil 4
3
[16] EV_LVDS_DDCCLK 4
EV_TXLCLKOUT+ RP18 1 2 EV@0_4P2R_4 TXLCLKOUT+ 5 100K_4
[16] EV_TXLCLKOUT+ 5
EV_TXLCLKOUT- 3 4 TXLCLKOUT- 6
[16] EV_TXLCLKOUT- 6
EV_TXLOUT0+ RP19 1 2 EV@0_4P2R_4 TXLOUT0+ R10 2.2K_4 LCD_EDIDCLK 7
[16] EV_TXLOUT0+ 7
EV_TXLOUT0- 3 4 TXLOUT0- R11 2.2K_4 LCD_EDIDDATA 8
[16] EV_TXLOUT0- 8
EV_TXLOUT1+ RP20 1 2 EV@0_4P2R_4 TXLOUT1+ 9
[16] EV_TXLOUT1+ 9
EV_TXLOUT1- 3 4 TXLOUT1- TXLOUT0- 10
[16] EV_TXLOUT1- 10
EV_TXLOUT2+ RP21 1 2 EV@0_4P2R_4 TXLOUT2+ TXLOUT0+ 11
C [16] EV_TXLOUT2+
[16] EV_TXLOUT2-
EV_TXLOUT2- 3 4 TXLOUT2-
TXLOUT1-
12
11
12 A46 Backlight Control(LDS) C
13 13
TXLOUT1+ 14 32
14 32 +3V
15 15
VIN TXLOUT2- 16 33
+3V TXLOUT2+ 16 33
17 17
18 18
TXLCLKOUT- 19
C12 C13 L3 TXLCLKOUT+ 19
20 20
C2 C7 *DLW21HN900SQ2L 21 R13 R12
4.7u/25V_8 1000P/50V_4 USBP13- 21
[11] USBP13- 3 3 4 4 22 22
0.1u/10V_4 1000P/50V_4 2 2 USBP13+ 10K_4 10K_4
[11] USBP13+ 1 1 23 23 BL_ON D1
24 24 2 1 BAS316 LID591# [34]
25 25
CCD_POWER 26
R5 *EV@0_4 26
[16] EV_LVDS_BRIGHT 27 27 34 34
3
A05 28 28
3
R7 EV@0_4 LVDS_BRIGHT 29 31
[34] CONTRAST 29 31
BL_ON 30
R6 IV@0_4 30 BL#
[8] INT_DPST_PWM 2 2 EC_FPBACK# [34]
LVDS
3
Q1 Q2
R16 IV@0_4 2N7002K DTC144EUA
[8] INT_LVDS_BLON
1
1
R14 EV@0_4 LVDS_BLON 2
+3VPCU [16] EV_LVDS_BLON
Lid Switch (HSR) Q3
2N7002K
C495 1U/6.3V_4 R15
1
D R251 D
1
100K_4
*470K/F_4
LID591# 2 HE1
AH9249NTR-G1
SOT23_123-2_8-1_9
PROJECT : ZQA
3
PT3661-BB (PLC) : AL003661003

ME268-002 (FCE) : AL000268000
CRT/LVDS/LID 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
HDMI SDVO I2C Control HDMI HPD SENSE (HDM)

UMA
[8] IV_HDMI_DDC_DATA
Close to HDMI Connector
3 4 HDMI_DDCDATA
HDMI_DDCCLK
+3V_D
UMA use +3V for the detect pin
Dis use +3V_DELAY for the detect pin
R422
23
[8] IV_HDMI_DDC_CLK 1 2
EV@10K_4 +3V
IV@0_4P2R_4
RP6
D
DIS +3V +5V
[16] EXT_HDMI_HPD
R190
D
3
Q18 10K_4
R433 EV@2N7002K
*EV@4.7K_4
2
2
1 3 HDMI_DDCDATA
[16] EV_HDMI_DDCDAT
3
+3V
Q20
1
*EV@2N7002K
R432 2 HDMI_DET_R R423 200K/F_4 HDMI_DET
EV@0_4
R191 Q19 R421
+3V IV@10K_4 2N7002K 200K/F_4
+5V
1
[8] INT_HDMI_HPD
R438
3
*EV@4.7K_4
1 3 HDMI_DDCCLK
[16] EV_HDMI_DDCCK
2 HDMI_HPD_EC# [34]
Q21
*EV@2N7002K Q9
R437 IV@2N7002K
EV@0_4
HDMI (HDM)
1
C C
Close to HDMI Connector EMI reserve for HDMI(EMC)

Close connector
+5V HDMI_PL_MOS R440 EV@499/F_4 TX2_HDMI+

TX2_HDMI+ HDMI PORT (HDM)
R212
R441 EV@499/F_4 TX2_HDMI- *100/F_4 CN13
TX2_HDMI- 20
SHELL1
3
R435 EV@499/F_4 TX1_HDMI+ +5V +5V TX2_HDMI+ 1 22

Q17 TX1_HDMI+ D2+SHELL3
2 D2 Shield
2N7002K R434 EV@499/F_4 TX1_HDMI- TX2_HDMI- 3 D2-
2
2 R205 TX1_HDMI+ 4
R439 EV@499/F_4 TX0_HDMI+ *100/F_4 D12 D11 D1+
5 D1 Shield
TX1_HDMI- CH501H-40PT TX1_HDMI- 6
R436 EV@499/F_4 TX0_HDMI- CH501H-40PT TX0_HDMI+ D1-
7 D0+
TX0_HDMI+ 8
1
1
R431 EV@499/F_4 TXC_HDMI+ TX0_HDMI- D0 Shield
B 9 D0- B
R206 TXC_HDMI+ 10
R420 R430 EV@499/F_4 TXC_HDMI- *100/F_4 R428 R426 CK+
11 CK Shield
TX0_HDMI- TXC_HDMI- 12 CK-
Due to HDMI item7-2 is fail, 13 CE Remote
100K/F_4 TXC_HDMI+ 2K/F_4 2K/F_4 14
Change to CS16492FB13. +5V HDMI_DDCCLK NC
15 DDC CLK
R200 F2 HDMI_DDCDATA 16
UMA RS880M *100/F_4 SMD1206P100TF 17
DDC DATA
GND
Stuff 715 ohm CS17152FB17 TXC_HDMI- 2 1 +5V_HDMI_F D10 2
RSX101M-30
1 +5V_HDMI
HDMI_DET
18 +5V
19 HP DET
SHELL4 23
SHELL2 21
DIS Park-M2 30V/ 1A
for Layout concern QJ1119C-NK01-8F
Stuff 499 ohm CS14992FB24 ,placement close HDMI conn Becuase HDMI item7-11 is fail, C429
.22u/6.3V_4
Change to BC101M30Z00. C725
*1000P/50V_4
RP10 3 4 IV@0_4P2R_4 TX2_HDMI+
[7] IV_TX2_HDMI+
1 2 TX2_HDMI-
[7] IV_TX2_HDMI-
RP8 1 2 IV@0_4P2R_4 TX1_HDMI+ A17
[7] IV_TX1_HDMI+
3 4 TX1_HDMI-
[7] IV_TX1_HDMI-
RP9 1 2 IV@0_4P2R_4 TX0_HDMI+ C729
[7] IV_TX0_HDMI+
3 4 TX0_HDMI- *1000P/50V_4
[7] IV_TX0_HDMI-
RP7 1 2 IV@0_4P2R_4 TXC_HDMI+
[7] IV_TXC_HDMI+
3 4 TXC_HDMI-
A
[7] IV_TXC_HDMI- A
C695 EV@.1u/10V_4 TX2_HDMI+

[16] EV_TX2_HDMI+
C696 EV@.1u/10V_4 TX2_HDMI-
[16]
[16]
EV_TX2_HDMI-
EV_TX1_HDMI+
C691 EV@.1u/10V_4 TX1_HDMI+ PROJECT : ZQA
C690 EV@.1u/10V_4 TX1_HDMI-
[16]
[16]
EV_TX1_HDMI-
EV_TX0_HDMI+
C694
C693
EV@.1u/10V_4
EV@.1u/10V_4
TX0_HDMI+
TX0_HDMI-
[16] EV_TX0_HDMI-
C688 EV@.1u/10V_4 TXC_HDMI+ Size Document Number Rev
[16] EV_TXC_HDMI+
C687 EV@.1u/10V_4 TXC_HDMI- HDMI 1A
[16] EV_TXC_HDMI-
5 4 3 2 1
5 4 3 2 1
Giga-LAN BCM57780
U8
15mil
BIASVDD L42 BLM18AG601SN1_6
+3V_S5
24
+3V_S5 42 25
VDDO BIASVDDH C404 .1u/10V_4
VAUX_12 6
VDDC XTALVDD L71 BLM18AG601SN1_6
15 14
VDDC XTALVDDH C393 .1u/10V_4
D 41 D
L72 VDDC
15mil AVDDL 27 30 AVDDH L46 BLM18AG601SN1_6
VAUX_12 AVDDL AVDDH
C412 4.7U/6.3V_6 33
BLM18AG601SN1_6 C419 .1u/10V_4 39
AVDDL
AVDDL
BCM57780
7mm X 7mm AVDDH
36 C415 .1u/10V_4
48-Pin QFN C423 .1u/10V_4

L41
15mil GPHY_PLLVDD 24 37
GPHY_PLLVDDL TRD3_N LAN_TRD3N [25]
C389 4.7U/6.3V_6 38
TRD3_P LAN_TRD3P [25]
BLM18AG601SN1_6 C391 .1u/10V_4
35 LAN_TRD2N [25]
L70 TRD2_N
34
15mil PCIE_PLLVDD 18
TRD2_P LAN_TRD2P [25]
PCIE_PLLVDDL
31 LAN_TRD1N [25]
BLM18AG601SN1_6 C380 4.7U/6.3V_6 TRD1_N
32 LAN_TRD1P [25]
C384 .1u/10V_4 TRD1_P
21
PCIE_PLLVDDL
29 LAN_TRD0N [25]
TRD0_N
28 LAN_TRD0P [25]
TRD0_P
48 LAN_LINKLED#
LINKLED# LAN_LINKLED# [25]
47
SPD100LED#
46
SPD1000LED# LAN_ACTLED#
45 LAN_ACTLED# [25]
C385 .1u/10V_4 PCIE_RXP1_LAN_R 17 TRAFFICLED#
[7] PCIE_RX1+ PCIE_TXDP
C386 .1u/10V_4 PCIE_RXN1_LAN_R 16
[7] PCIE_RX1- PCIE_TXDN
22 5
[7] PCIE_TX1+ PCIE_RXDP MODE
23
[7] PCIE_TX1- PCIE_RXDN
[11] PCIE_WAKE# 4
C WAKE# C
2
[10,15,26] A_RST# PERST#
20
[10] CLK_PCIE_LOM PCIE_REFCLK_P
19
[10] CLK_PCIE_LOM# PCIE_REFCLK_N
44 BCM_EEC
EECLK
43 BCM_EED
R193 1K_4 VMA_PRES EEDATA VAUX_12
+3V 40
R187 4.7K_4 LOW_PWR VMAIN_PRSNT
1
LOW_PWR
L43 4.7uH
SR_LX
11
8
Don't route under Choke.
SR_VFB
C381 33p/50V_4 R177 200_4 XTALO 13
XTALI XTALO
12 10 +3V_S5
1
XTALI SR_VDDP
9
RDAC SR_VDD
1.2H Y2 R181 1.24K/F_4 26
RDAC
C678 C416 C420 C680
25MHz 10u/6.3V_6
4.7U/6.3V_6 .1u/10V_4 .1u/10V_4
2
C407 33p/50V_4
R188 *4.7K_4 3 7
+3V_S5 CLK_REQ# NC
R189 0_4 BCM_CLKREQ#

[11] CLK_PCIE_LAN_REQ#
GND
BCM57780
49
B B
EEPROM
LAN POWER
+3V_S5
+3V_S5 VAUX_12 20mil

R201 R196
*1K_4 1K_4
C675 4.7U/6.3V_6 C682 4.7U/6.3V_6 U9
BCM_EED 5 1
C683 .1u/10V_4 C677 .1u/10V_4 BCM_EEC SDA A0
6 2
SCL A1
3
C673 .1u/10V_4 A2
7
R203 R198 WP
C679 .1u/10V_4 1K_4 4 8 +3V_S5
*1K_4 GND VCC
*24LC02 C431
*.1u/10V_4
A A
EEPROM Strapping
EEPROM Type EECLK EEDATA
24LC02 1 1
PROJECT : ZQA
Internal 1 0 Quanta Computer Inc.
GLAN BCM57780 1A

5 4 3 2 1
1 2 3 4 5 6 7 8
TRANSFORMER
4/27 modify it
U24
25
1 TCT1 MCT1 24
LAN_TRD0P 2 23 X-TX0P
A [24] LAN_TRD0P TD1+ MX1+ A
LAN_TRD0N 3 22 X-TX0N
[24] LAN_TRD0N TD1- MX1-
C372 C395
4 TCT2 MCT2 21
.1u/10V_4 .1u/10V_4 LAN_TRD1P 5 20 X-TX1P
[24] LAN_TRD1P TD2+ MX2+
7 TCT3 MCT3 18
LAN_TRD2P 8 17 X-TX2P
C408 C414
10 TCT4 MCT4 15
.1u/10V_4 .1u/10V_4 LAN_TRD3P 11 14 X-TX3P
TRANSFORMER
R175 R176 R179 R184

75/F_8 75/F_8 75/F_8 75/F_8
4/21 change Part number

B DB0Z06LAN00 (follow Z08) B
C371
1500p/3KV_18
For EMI
LAN_TRD0P C378 *10P/50V_4

RJ45 Conn LAN_ACTLED# CN10 LAN_TRD0N C388 *10P/50V_4
C [24] LAN_ACTLED# C
9 YELLOW_N
+3V_S5 R413 220_8 LAN_ACT_LED_PWR 10 LAN_TRD1P C399 *10P/50V_4
YELLOW_P
14 R185 *0_6 LAN_TRD1N C402 *10P/50V_4
X-TX0P GND2 R174 *0_6
1 0+ GND1 13
X-TX0N 2 LAN_TRD2P C410 *10P/50V_4
X-TX1P 0-
3 1+
X-TX2P 4 LAN_TRD2N C413 *10P/50V_4
X-TX2N 2+
5 2-
X-TX1N 6 LAN_TRD3P C417 *10P/50V_4
X-TX3P 1-
7 3+
X-TX3N 8 LAN_TRD3N C421 *10P/50V_4
3-
LAN_LINKLED# 11
[24] LAN_LINKLED# GREEN_N
+3V_S5 R419 220_8 LAN_LNK_LED_PWR 12 GREEN_P
RJ45
LAN_ACTLED#
LAN_LINKLED#
D D
C666 C681
*0.1u//50V_6 *0.1u//50V_6
PROJECT : ZQA
LAN Transformer and RJ45 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
MINI-CARD WLAN(MPC) Check LED signal. (active high or low)

+3.3V: 1000mA
+3.3Vaux:330mA
+1.5V:500mA
51
CN16
Reserved +3.3V
52 +WL_VDD
+3V
R223 *Short_8
C465 C464 C705

+WL_VDD
C697
26
49 Reserved GND 50
47 48 +WL_1.5V 10u/10V_8 0.1u/10V_4 *0.1u/10V_4 *0.1u/10V_4
[10,30] PCIE_RST# Reserved +1.5V
[10] PCLK_DEBUG 45 46
Reserved LED_WPAN# RF_LED#
43 44 RF_LED# [32,34]
Reserved LED_WLAN#
+WL_VDD 41 42
Reserved LED_WWAN#
39 40
Reserved GND
A 37 38 USBP4+ [11] A
Reserved USB_D+
35 GND USB_D- 36 USBP4- [11]
[7] PCIE_TXP2 33 PETp0 GND 34
[7] PCIE_TXN2 31 PETn0 SMB_DATA 32 PDAT_SMB [5,11]
29 GND SMB_CLK 30 PCLK_SMB [5,11]
27 GND +1.5V 28 +WL_1.5V
[7] PCIE_RXP2 25 PERp0 GND 26
23 24 +WL_VDD +1.5V
[7] PCIE_RXN2 PERn0 +3.3Vaux +WL_1.5V
21 GND PERST# 22 A_RST# [10,15,24]
19 20 RF_EN [34]
Reserved Reserved R424 *Short_8
17 18
Reserved GND
15 16 DEBUG_LFRAME# R204 *Short_4
GND Reserved LPC_LFRAME# [10,34]
13 14 DEBUG_LAD3 R202 *Short_4 C702 C699 C686
[10] CLK_PCIE_WLANP_2 REFCLK+ Reserved LPC_LAD3 [10,34]
11 12 DEBUG_LAD2 R199 *Short_4 Debug *1000P/50V_4 *0.1u/10V_4 *10u/6.3V_8
[10] CLK_PCIE_WLANN_2 REFCLK- Reserved LPC_LAD2 [10,34]
9 10 DEBUG_LAD1 R197 *Short_4
GND Reserved LPC_LAD1 [10,34]
7 8 DEBUG_LAD0 R195 *Short_4
[11] CLK_PCIE_2_REQ# CLKREQ# Reserved LPC_LAD0 [10,34]
+5V_TV-CARD R427 *0_6 +5V_TV-CARD_R_A 5 6 +WL_1.5V
R425 *0_6 +5V_TV-CARD_R_B Reserved +1.5V
TV use +5V 3
Reserved GND
4
PCIE_WAKE_WL 1 2 +WL_VDD
T158 WAKE# +3.3V
53 54
PAD53 PAD54
MINI CARD_A
+5V
500mA, 25mil
R429 *0_6 +5V_TV-CARD
C685 C684
*4.7u/6.3V_6 *.1u/10V_4
B B
C C
D D
PROJECT : ZQA
MINI PCI-E card/TV 1A

1 2 3 4 5 6 7 8
1 2 3 4
SATA HDD
27
CN14
GND23 23
GND1 1
RXP 2 SATA_TX0+ [12]
RXN 3 SATA_TX0- [12]
A A
GND2 4
5 SATA_RX0-_C C463 .01u/16V_4
TXN SATA_RX0- [12]
6 SATA_RX0+_C C461 .01u/16V_4
TXP SATA_RX0+ [12]
GND3 7
3.3V 8
3.3V 9
3.3V 10
GND 11
GND 12
13
GND
14
120mil +5V_HDD R414 *Short_8 +5V
5V
5V 15
5V 16
17 C676 C674 C672 C669
GND 10u/6.3V_6 10u/6.3V_6 0.1u/10V_4 .01u/16V_4
RSVD 18
GND 19
12V 20
12V 21
12V 22
B B
GND24 24
SATA_HDD
SATA ODD
CN8
GND14 14
GND1 1
RXP 2 SATA_TX1+ [12]
RXN 3 SATA_TX1- [12]
GND2 4
5 SATA_RX1-_C C247 .01u/16V_4
TXN SATA_RX1- [12]
6 SATA_RX1+_C C232 .01u/16V_4
C TXP SATA_RX1+ [12] C
GND3 7
8 SATA_DP R127 *1K_4

DP +5V_ODD R400 *Short_8 +5V
+5V 9
+5V 10
RSVD 11
12 C628 C623 C621 C619
GND 10u/6.3V_6 10u/6.3V_6 0.1u/10V_4 .01u/16V_4
GND 13
GND15 15
C18534-11305-L
D D
PROJECT : ZQA
SATA-HDD/ODD/HOLE 1A

1 2 3 4
5 4 3 2 1
Codec(ADO) HP [29] HP-R
[29] HP-L
SENSEB
MUTE(AMP) +5VA
[29] HPOUT_JD
R232 5.1K/F_4
C493 C473 C474

C494
0.1u/10V_4 0.1u/10V_4
0.1u/10V_4 4.7U/6.3V_6
MIC1-VREFO [29]
INSPKR+ R454 36K/F_6
ADOGND
D FRONT-L= (L+R)/2 Place next to pin 27 ADOGND D
11
13
2
6
5/11 Del FRONT-R U12
VCC
VCC
NC
NC
Speaker C487 C482 C480 C481 MONO-OUT C472 0.47u/10V_6 A02 15
ADOGND LIN-
FRONT-L
+ +
0.1u/10V_4 10u/6.3V_6 +5VA FRONT-L C475 *0.47u/10V_6 FRONT-R-1 R229 33K/F_4 FRONT-R-2 7 5 C484 4.7U/6.3V_6
RIN- BYPASS ADOGND
2.2U/6.3V_62.2U/6.3V_6
Place next to pin 25 16 LIN+ RVO1 12 INSPKR+ [29]
C483 0.47u/10V_6 FRONT-R+1 R233 33K/F_4 FRONT-R+2 8 9
THERMALPAD
ADOGND RIN+ RVO2 INSPKR- [29]
C479 C476
36
35
34
33
32
31
30
29
28
27
26
25
U11 1
LVO1
5/10 Add
FRONT-L
Sense B
HPOUT-L
CPVEE
CBP
MIC1-VREFO
AVSS1
AVDD1
FRONT-R
HPOUT-R
CBN
VREF
0.1u/10V_4 10u/6.3V_6 14 4
SHDN#
VSS
VSS
LVO2
INSPKR- R239 36K/F_6
MONO-OUT 37 24 G1453L
T86
17
10
MONO-OUT LINE1-R ADOGND R234 *100K_4
+3V
+5VA 38 AVDD2 LINE1-L 23 T85
R238 0_4 Modify it 4/26
39 22 MIC1-R
SURR-L MIC1-R MIC1-R [29] +3V_S5 ADOGND
C477 C469
10u/6.3V_6 0.1u/10V_4
ADOGND R225 20K/F_4 40 JDREF MIC1-L 21 MIC1-L
MIC1-L [29]
MIC
41 20 U26
SURR-R LINE2-VREFO
5
[34] AMP_MUTE# 1
42 19 MIC2-VREFO 4 R249 *10K_4
ADOGND
Place next to pin 38
ADOGND AVSS2
ALC272X<LQFP-48> MIC2-VREFO EAPD# 2
*TC7SH08FU C492
HP_MUTE# [29]
ANALOG T84 43 18
3
NC LINE1-VREFO *4.7u/10V_6
44 17 MIC2_INT_R C468 1u/16V_6 MIC2_INTL1_R R227 1K_4 MIC2_INTL1 R240 *0_4
+5VA DMIC-CLK3/4 MIC2-R
C DIGITAL C
45 16 MIC2_INT_L C466 1u/16V_6
SPDIFO2 MIC2-L
46 15
R461 DMIC-CLK1/2 LINE2-R
A01
4.7K_4 Split by DGND 47 14
EAPD
DMIC-1/2/GPIO0
DMIC-3/4/GPIO1
LINE2-L
48 13 SENSEA R222 20K/F_4 MIC1_JD
SDATA-OUT
SPDIFO1 Sense A MIC1_JD [29]
EAPD#
SDATA-IN
DVDD-IO
PCBEEP
RESET#
BIT-CLK
DVDD1
DVSS1
DVSS2
SYNC
Split by DGND
ANALOG
1
10
11
12
DIGITAL
1.6Vrms
+3V
PCBEEP C455 1u/16V_6 BEEP_1 R209 47K_4
SPKR [11]
C457 C454 C451 R208
4.7K_4
10u/6.3V_6 0.1u/10V_4 100p/50V_4
Place next to pin 1

R442 *Short_6 +3V
C698 C456
ACZ_RST#_AUDIO [11]
B 0.1u/10V_4 10u/6.3V_6 B
C452
ACZ_SYNC_AUDIO [11]
ACZ_SDIN0_R R213 22_4 *100p/50V_4
ACZ_SDIN0 [11]
ACZ_SDOUT_AUDIO [11]
Place next to pin 9
ACZ_BITCLK_AUDIO [11]
C453 *22p/50V_4
Power (ADO) INT MIC array

DIGITAL ANALOG
5/7 update the footprint name
+5V L75 UPB201209T-310Y-N/6A/31ohm_8 R224 *0_6 CN4 R259
+5VA R226 *0_6 1 MIC2_INTL1 MIC2-VREFO
U27 R252 *0_6 1
2
R453 *0_6 2 C496 2.2K_4
3 4
IN OUT R235 *0_6
2 R447 *0_6 *INT_MIC *22P/50V_4
GND R460 0_6
A A
1 5 R457 *29.4K/F_4 R444 0_6
SHDN SET C467 *1000P/50V_4 5/11 update Mic Partnumber
*G923-330T1UF C710 *1000P/50V_4
R456 + C720 C721 ADOGND
*10K/F_4
10u/10V_3216 0.1u/10V_4
C718 C719 ADOGND C497 0.1u/10V_4
+ R250 *0_4
0.1u/10V_4 10u/10V_3216
Tied at one point only under PROJECT : ZQA
ADOGND
the codec or near the codec
ADOGND
ADOGND cap place close to MIC-connector REALTEK ALC663&888/MDC 1A
C730, C787 close U37 pin3 and L65
5 4 3 2 1
5 4 3 2 1
MIC D14 BAS316
D15 BAS316
[28] MIC1-VREFO
Internal Speaker
Normal OPEN Jack
R248 R247
4.7K/F_4 4.7K/F_4
PINK
1 CN20 7
D C486 4.7U/6.3V_6 MIC1_L2 R236 1K/F_4 MIC1_L3 L52 MIC1_L D
[28] MIC1-L 2
BLM15AG121SS1/0.5A/120ohm_4 6
[28] MIC1-R C485 4.7U/6.3V_6 MIC1_R2 R237 1K/F_4 MIC1_R3 L51 MIC1_R 3
BLM15AG121SS1/0.5A/120ohm_4 MIC1_JD 4 CN19
[28] MIC1_JD 8 [28] INSPKR- 2 2
5 [28] INSPKR+ 1 1
JAS7331-P30H9-7F
C489 C490 SPEAKER-CONN
Max. 100mVrms input for Mic-IN 470p/50V_4 470p/50V_4
C723 C724
MIC1_JD ADOGND *0.22u/25V_6 *0.22u/25V_6
1
ADOGND
D29
*VPORT_6
ADOGND
C C
HP
[28] HP_MUTE#
1 CN21 7
HP-L-2 R245 56/F_4 HPL-1 L50 BLM15AG121SS1/0.5A/120ohm_4 HPL_SYS 2
2
HP-R-2 R242 56/F_4 HPR-1 L49 BLM15AG121SS1/0.5A/120ohm_4 6
HPR_SYS 3
HP_JD 4 [28] HP-L 3 1 HP-L-2
R241 R246 C491 C488 8
5 Q23
*1K_4 *1K_4 2.2n/50V_4 2.2n/50V_4 JAS7331-P30H9-7F *FDV301N
R244 0_6
B ADOGND B
ADOGND Normal OPEN Jack HP_MUTE#
2
[28] HP-R 3 1 HP-R-2
Q22
*FDV301N
R243 0_6
+5VA
HPOUT_JD HPOUT_JD [28]

R231
3
+5VA
10K_4
HP_JD
HP_JD# 2
R230 Q11
3
1
A 20K/F_4 2N7002K D16 A
1
HP_JD 2 *VPORT_6
2
Q10
PROJECT : ZQA
2N7002K ADOGND
ADOGND Quanta Computer Inc.
1

ADOGND AMP /AUDIO JACK CONN 1A

5 4 3 2 1
A B C D E
2 IN 1 CARD READER (MMC)

CARD READER Controller
SD_WP
SD_CD# 30
11
12
4
CN3
SW COM
CD/SW
WP/SW
SD_DAT1 10
4 SD_DAT0 DATA1 4
9 DATA0
8 VSS2
SD_CLK 7 CLK
VCC_XD 6 VDD
5 VSS1
SD_CMD 3 CMD
GND1
SD_DAT3 2
GND
SD_DAT2 DATA3
1 DATA2
SD-CARD
13
14
VCC_XD
Main DFHS11FR011 C458 C460
4.7u/10V_6 0.1u/10V_4
Second DFHS11FR033
Close to CNxx pin 14 & pin23 5/10 change Card Redaer conn
C743 close PIN46, 47 4.7u CAP close to pin23 footpirnt sdcard-sdsn09-08-xa-11p-smt
+1.8V_VDD
T165
C708 close PIN48, 47
+3V_VDD T163
R445 *Short_4 XTALSEL C704 C706
3 Clock input selection 0.1u/10V_4 0.1u/10V_4 3
XTALSEL
CRMD_N
'1' for 48MHz input [Default]
DATA1
DATA0
CTRL1
CTRL3
NBMD
'0' for 12MHz input
CTRL0, CRTL 1 trace length shorter ,
and surround with GND.
R452 *100K_4
48
47
46
45
44
43
42
41
40
39
38
37
+3V_VDD U25
R449 0_4
[10,26] PCIE_RST#
GND
VDD
NBMD
VDDHM
TRIST
XTALSEL
CTRL1
CTRL3
DATA1
DATA0
DATA7
DATA6
C711 *0.47u/10V_6
+3V R446 *Short_6 +3V_VDD

C712 1 36 CTRL0
GPON7 CTRL0
2 EXT48IN DATA5 35
4.7u/10V_6 3 34 CTRL2
R450 330_4 RSTN CTRL2 GPI4
4 REXT GPI4 33
5 32 T162
VD33P DATA4 DATA3
[11] USBP10+ 6 DP DATA3 31
7 AU6437-GBL 30 DATA2
[11] USBP10- DM DATA2
8 29 DATA0 R216 *Short_4 SD_DAT0
C709 C708 XI VS33P XDWPN GPI2
9 XI GPI2 28
XO 10 27 T161
*5p/50V_4 *5p/50V_4 XO XDCEN EEPDATA DATA1 R215 *Short_4 SD_DAT1
+1.8V_VDD 11 VDD EEPDATA 26
12 25 GPI1 T160
VDD GPI1 T159
SDWPEN
AGND5V
EEPCLK
CF_V33
VDDHM
XDCDN DATA2 R220 *Short_4 SD_DAT2

VCC33
CTRL4
GND
VDD
V18
V33
2 2
DATA3 R219 *Short_4 SD_DAT3
close PIN11, 12
13
14
15
16
17
18
19
20
21
22
23
24
crystal trace width needs at least 10 mils. pin13 output 20mils

EEPCLK T164
C707
VCC_XD
C714 18p/50V_4 XI
4.7u/10V_6
Y6 R451
12MHz 270K_4 CTRL0 R217 SD_CLK
*0_4 R443 BLM15AG121SS1/0.5A/120ohm_4
VCC_XD
C713 18p/50V_4 XO
SD write protect C459
+1.8V_VDD 1:decided by SDWP[Default] *10P/50V_4
0:letting SD always CTRL1 R214 *Short_4 SD_WP
+3V_VDD +3V_VDD write-able
C701 C703 CTRL2 R218 *Short_4 SD_CMD
4.7u/10V_6 0.1u/10V_4
CTRL3 R221 *Short_4 SD_CD#
1 1
PROJECT : ZQA
AU6433 CardReader 1A

A B C D E
5 4 3 2 1
+5V_S5
EXT. USB(USB)
INT. USB(USB) +5V_S5
C462
120mil CN12
L47 *0_6 C689 10u/10V_8
1u/16V_6 U10 16 18
USBPW L48 0_6 USBPW_L C692 1u/16V_6 15 17
2 IN1 OUT3 8 14
3 7 C470 C471
IN2 OUT2 + C700 13
OUT1 6 12
USBON# 4 *10P/50V_4 *10P/50V_4
D [34] USBON# EN# [11] OC_7# 11 D
1 330u/6.3V_6X5.7 A14
GND L45 DLW21HN900SQ2L/330mA/90ohm 10
OC# 5 9
OC_6# [11] 3 3 USBP11_L-
G547F2P81U
[11] USBP11- 4 4 USBP11_L+ 8
[11] USBP11+ 2 2 1 1 7
CN17
DLW21HN900SQ2L/330mA/90ohm USBPW_L L44 DLW21HN900SQ2L/330mA/90ohm 6
A13 USBP0_L-
1 1 8 8
USBP12_L- 5
[11] USBP0- 3 3 4 4 2 2 7 7 [11] USBP12- 3 3 4 4 4
2 2 USBP0_L+ USBP12_L+
[11] USBP0+ 1 1 3 3 6 6 [11] USBP12+ 2 2 1 1 3
L73
4 4 5 5 A15 USBON# 2
USB_MB 1
1
USB_BTB CONN
C722
RV1 RV2
*EGA10402V05AH_4
*EGA10402V05AH_4
*100p/50V_4
2
A16
C C
BLUETOOTH V3.0 CONN(BTM)

BLUETOOTH V2.1 CONN(BTM)
A04
30mil
+3V_S5 1 3 BT_POWER1
30mil
+3V_S5 1 3 BT_POWER2 C717 Q24
.33u/10V_6 R455 + C716 C715
2
C726 Q25 47K_4 AO3413
.33u/10V_6 R462 + C728 C727 2.2U/6.3V_6 1000P/50V_4
47K_4 2 AO3413
2.2U/6.3V_6 1000P/50V_4
B [34] BT_POWERON# B
[34] BT_POWERON#
CN18
Need to modify. BT_POWER1
5
CN22
BT_POWER2 4
5 [11] USBP9+ 3
4 [11] USBP9- 2 7
[11] USBP8+ 3 1 6
[11] USBP8- 2 7 BT_CONN
1 6
BT_CONN
A A
PROJECT : ZQA
USB/BT/TP 1A

5 4 3 2 1
5 4 3 2 1
EE RETURN-PATH CAPACITORS(EMC) LED(UIF)

+3V_S5
EC2 .01u/50V_6 EC14 .01u/16V_4
VIN +1.5VSUS Amber
EC3 .01u/50V_6 EC15 .01u/16V_4 LED2
R253 220_4 4 2
[34] SUSLED#
EC1 .01u/50V_6
R254 220_4 3 1
[34] PWRLED#
+1.5VSUS EC20 .01u/16V_4 +1.1V
D LED_A/B D
EC5 .01u/50V_6
VIN +1.8V Blue
EC4 .01u/50V_6 +1.1V EC8 *.01u/16V_4 R256 *1M_4 +3VPCU +3VPCU
EC9 *.01u/16V_4 R255 *1M_4 Amber

LED3
+1.8V EC10 *.01u/16V_4 R257 220_4 4 2
[34] BATLED1#
+1.1V EC7 .01u/16V_4 +3V R258 220_4 3 1

[34] BATLED0#
LED_A/B
+3V
+1.1V_S5 EC6 .01u/16V_4 +3V
Amber LED5
A22 EC22 .01u/16V_4 R260 220_4
+VCORE [26,34] RF_LED#
LED_Amber
EC21 *.01u/16V_4
Blue LED4
R261 220_4 1 2
[12] SATA_ACT#
C +VCORE EC11 1000P/50V_4 +1.8V LED_B-LTST-C191TBKT-5A C
+5V EC16 .01u/50V_6 +3V
+1.5VSUS EC23 .01u/50V_6 +3V +NB_CORE EC19 .01u/16V_4

LED1 LED_Bule R1 220_4
D1 Power LED near PW SW
+5V EC24 *.01u/16V_4 For fix HyperTransport
+VGPU_CORE EC13 *.01u/16V_4 +1.8V nets across plane
EC12 *.01u/16V_4 splits
HOLE(OTH) HOLE6 HOLE7 HOLE9

*HG-C315D118P2 *HG-C315D118P2 *HG-C315D118P2 CPU
7 6 7 6 7 6 HOLE17 HOLE2
8 5 8 5 8 5 HOLE21 HOLE22 VGA-c256d161p2 *HG-C315D110P2 HOLE14
9 4 9 4 9 4 CPU C236D142 CPU C236D142 7 6 FAN-C315D146
8 5 7 6
9 4 8 5
1
2
3
1
2
3
1
2
3
9 4
1
2
3
1
1
2
3
B HOLE8 HOLE13 B
*HG-C315D118P2 *HG-C315D118P2 HOLE12
7 6 7 6 *HG-C315D118P2 HOLE16
8 5 8 5 7 6 HOLE19 HOLE18 VGA-c256d161p2
9 4 9 4 8 5 CPU C236I182D142 CPU C236D142
9 4 HOLE23
MPCIE-C197D87 HOLE3
1
2
3
1
2
3
*H-C94D94N
1
2
3
1
1
1
HOLE1 HOLE5
HG-C315D118P2
1
*HG-C315D118P2 *HG-C315D118P2 HOLE4
1
7 6 7 6 *HG-C315D118P2 HOLE15
8 5 8 5 7 6 VGA-C256I161D161
9 4 9 4 8 5
9 4 HOLE24
*H-C1417D1417N
1
2
3
1
2
3
1
2
3
1
HOLE10 HOLE11
1
*HG-C315D118P2 *H-C315D118P2 HOLE20
A 7 6 VGA-C256I161D161 A
8 5
9 4
PROJECT : ZQA
1
2
3
1
POWER/USB/BT/TP/MDC 1A

5 4 3 2 1
5 4 3 2 1
K/B(KBC) MY0
CN2 CPU FAN(THM)
[34] MY0 1
MY1 2
[34] MY1
MY2 3
[34] MY2 +3VPCU
MY3 4
[34] MY3
MY4 5
[34] MY4
MY5 6
[34] MY5
MY6 7 RP11 10K_10P8R +3V
[34] MY6
MY7 8 10 1 MX7
[34] MY7
D MY8 9 MX0 9 2 MX6 D
[34] MY8
MY9 10 MX1 8 3 MX5 R327
[34] MY9 +5V
MY10 11 MX2 7 4 MX4 10K_4
[34] MY10
MY11 12 MX3 6 5
[34] MY11
MY12 13
[34] MY12 [34] FANSIG
MY13 14 R67 *0_8
[34] MY13
MY14 15 C574 .01u/16V_4
[34] MY14
MY15
[34] MY15
MY16
16
17 U4
30 MIL CN7
[34] MY16
MY17 18 C103 2.2U/6.3V_6 2 3 TH_FAN_POWER
[34] MY17 VIN VO 1
MX7 19 5
[34] MX7 GND 2 4
MX6 20 1 6
[34] MX6 [2] PM_THERM# FON# GND 3 5
MX5 21 7 C109 C117
[34] MX5 GND
MX4 22 4 8 FAN
[34] MX4 [34] CPUFAN# VSET GND
MX3 23 22u/6.3V_8 1000P/50V_4
[34] MX3
MX2 24 27 G991
[34] MX2
MX1 25 28
[34] MX1
MX0 26
[34] MX0
change footpirnt as SA6
KB
4/23
C C
TOUCHPAD BOARD CONN(TPD)
+5V +5V
50mil SW2
MISAKI_SW_H1.5
B L58 +TPVDD +TPVDD
BK1608HS220/1A/22ohm_6 B
LEFT# 1 2
3 4
1
R346 R347 C588 C583 5
10K_4 10K_4 *.1u/10V_4 0.1u/10V_4 C582 D17 6
TP/B
1 *VPORT_6
2
2 *100p/50V_4
L59 LZA10-2ACB104MT/100mA_6 TPDATA_R 3
[34] TPDATA
L60 LZA10-2ACB104MT/100mA_6 TPCLK_R 4 SW3
[34] TPCLK
5 MISAKI_SW_H1.5
6
RIGHT# 7 RIGHT# 1 2
C580 C581 8 3 4
1
*.01u/16V_4 *.01u/16V_4 9 C478 5
10 13 D13 6
11 14
LEFT# 12 *100p/50V_4 *VPORT_6
2
CN1
A A
PROJECT : ZQA
KB/FAN/EE RETURN CAP 1A

5 4 3 2 1
5 4 3 2 1
EC(KBC) L66 BK1608HS220/1A/22ohm_6 +A3VPCU

+3V
C594 C592
30mil
+3VPCU 0.1u/10V_4 4.7u/10V_6
E775AGND
0.03A(30mils) D25 C625 C629
R364 2.2/F_6 +3VPCU_EC
BAS316 4.7u/10V_6 0.1u/10V_4
C584 C612 C585 C622 C609 C586
115
102
Take care of power side
19
46
76
88
4
4.7u/10V_6 0.1u/10V_4 *.1u/10V_4 0.1u/10V_4 *.1u/10V_4 0.1u/10V_4 U18
AVCC
VDD
VCC1
VCC2
VCC3
VCC4
VCC5
E775AGND C589 *.01u/50V_6 ICMNT
D D
C587 .01u/16V_4
[10,26] LPC_LFRAME# 3 LFRAME GPIO90/AD0 97 TEMP_MBAT [35]
126 98 WL_SW T131
[10,26] LPC_LAD0 LAD0 GPIO91/AD1
127 99 TPD_TRIP
[10,26] LPC_LAD1 LAD1 GPIO92/AD2
[10,26] LPC_LAD2 128 LAD2 A/D GPIO93/AD3 100
NB_CORE_ON
ICMNT [35]
[10,26] LPC_LAD3 1 LAD3 GPIO05 108 T36
CLK_PCI_775 CLK_PCI_775 2 96 R342 *0_4
[10] CLK_PCI_775 LCLK GPIO04 VGA_THERM# [20]
[10] CLKRUN# 8 GPIO11/CLKRUN

101 POWER_SAVE T132 A06
R113 GPIO94/DA0
[11] SIO_A20GATE 121 GPIO85/GA20 GPI95/DA1 105 T134
*22_4
D/A GPI96/DA2 106
TP_SW#
CPUFAN# [33]
[11] SIO_RCIN# 122 KBRST/GPIO86 GPI97 107 T133
[11] SIO_EXT_SCI# 29
ECSCI/GPIO54 LPC New add for Green Adapter
64 ACIN [35]
C172 EC_FPBACK# GPIO01/TB2 D20 BAS316 NBSWON#
[22] EC_FPBACK# 6 95
GPIO24/LDRQ GPIO03
*10P/50V_4 93 LID591# [22]
T143 NOCIR# GPIO06/IOX_DOUT
124 94 SUSB# [11]
GPIO10/LPCPD GPIO07
119 MXM_SMCLK12 [20]
GPIO23/SCL3 ACPRN
[8,10] A_RST#_SB 7 109 T139
LREST GPIO30/CIRTX2
120 MXM_SMDATA12 [20]
USBON# GPIO31/SDA3
[31] USBON# 123 65 BATLED0# [32]
GPIO67/PWUREQ GPIO32/D_PWM
GPIO33/H_PWM 66 BATLED1# [32]
IRQ_SERIRQ 125 15 VRON T151
[10] IRQ_SERIRQ SERIRQ GPIO36
16 SUSLED# [32]
GPIO40/F_PWM
[11] SIO_EXT_SMI# 9 17
GPIO65/SMI GPIO42/TCK
GPIO GPIO43/TMS
20 AMP_MUTE# [28]
21 T49
MX0 GPIO44/TDI
[33] MX0 54 22 T147
MX1 KBSIN0 GPIO45/E_PWM
[33] MX1 55 KBSIN1 GPIO46/CIRRXM/TRST 23 T152
MX2 56 24 T153
[33] MX2 KBSIN2 GPO47/SCL4
MX3 57 25
C [33] MX3 KBSIN3 GPIO50/TDO D/C# [35] C
MX4 58 26
[33] MX4 KBSIN4 GPIO51 S5_ON [36,38,41,44]
MX5 59 27
[33] MX5 KBSIN5 GPIO52/CIRTX2/RDY HDMI_HPD_EC# [23]
MX6 60 28 EC_ODD_EN
[33] MX6 KBSIN6 GPIO53/SDA4
MX7 61 91
[33] MX7 KBSIN7 GPIO81 DNBSWON# [11]
110
[33] MY0
MY0 53
KBSOUT0/JENK
GPO82/TEST
GPO84/TRIST
112 RF_LED_EN#
T141
T138
SM BUS PU(KBC)
MY1 52 80 DCR_EN T130
[33] MY1 KBSOUT1/TCK GPIO41
MY2 51
[33] MY2 KBSOUT2/TMS
MY3 50
[33] MY3 KBSOUT3/TDI +3VPCU
MY4 49 KB 31 ODDLED T149 +3V
[33] MY4 KBSOUT4/JEN0 GPIO56/TA1
MY5 48 117
[33] MY5 KBSOUT5/TDO GPIO20/TA2/IOX_DIN SUSON [40]
MY6 47 63
[33] MY6 KBSOUT6/RDY GPIO14/TB1 FANSIG [33]
MY7 43 MBCLK R336 2.2K_4 CPU_SMBCLK R333 10K_4
[33] MY7 KBSOUT7
MY8 42 TIMER 32 MBDATA R335 2.2K_4 CPU_SMBDATA R334 10K_4
[33] MY8 KBSOUT8 GPIO15/A_PWM CONTRAST [22]
MY9 41 118 NUMLED# T142 EC_ODD_EN R379 *10K_4
[33] MY9 KBSOUT9/SDP_VIS GPIO21/B_PWM
MY10 40 62 1.2V_ON R378 10K_4
[33] MY10 KBSOUT10/P80_CLK GPIO13/C_PWM PWRLED# [32]
MY11 39 81 CAPSLED# T128
[33] MY11 KBSOUT11/P80_DAT GPIO66/G_PWM
MY12 38
[33] MY12 KBSOUT12/GPIO64
MY13 37 MXM_SMCLK12 R366 EV@2.2K_4 +3V_D_EXT
[33] MY13 KBSOUT13/GPIO63
MY14 36 84 ODD_EJ T129 MXM_SMDATA12 R369 EV@2.2K_4
[33] MY14 KBSOUT14/GPIO62 GPIO77/SPI_DI
MY15 35 SPI 83 SHBM_R
[33] MY15 KBSOUT15/GPIO61/XOR_OUT GPO76/SPI_DO/SHBM
MY16 34 82 RF_LED#_EC R337 *0_4
[33] MY16 GPIO60/KBSOUT16 GPIO75/SPI_SCK RF_LED# [26,32]
MY17 33
[33] MY17 GPIO57/KBSOUT17
GPIO72/IRRX1/SIN2
75 ICH_RSMRST# [11]
SPI FLASH(KBC)
SM Bus 1 for BATTERY MBCLK 70 73
[35] MBCLK GPIO17/SCL1 GPIO70/IRRX2_IRSL0 SUSC# [11] +3VPCU
MBDATA 69 74
[35] MBDATA GPIO22/SDA1 GPIO71/IRTX/SOUT2 PWROK_EC [14]
[4] CPU_SMBCLK CPU_SMBCLK 67 SMB IR 113 RF_EN
GPIO73/SCL2 GPIO87/CIRRXM/SIN_CR RF_EN [26]
SM Bus 2 for CPU THERMAL [4] CPU_SMBDATA CPU_SMBDATA 68 14 T150 U17
GPIO74/SDA2 GPIO34/CIRRXL HWPG SPI_SDI_uR R344 22_4 SPI_SDI_uR_R
114 2 8
GPIO16/CIRTX P_SAVE_LED# SO VDD
111 T140
TPCLK GPO83/SOUT_CR/XORTR R345 100K_4 SPI_SDO_uR C616
[33] TPCLK 72 GPIO37/PSCLK1 5 SI HOLD 7
TPDATA 71
[33] TPDATA GPIO35/PSDAT1
B T148 1.2V_ON
10 86 SPI_SDI_uR SPI_SCK_uR 6 3 0.1u/10V_4 B
GPIO26/PSCLK2 F_SDI SPI_SDO_uR_R R340 22_4 SPI_SDO_uR SCK WP
[31] BT_POWERON# 11 GPIO27PSDAT2 PS/2 F_SDO 87
SPI_CS0#_uR R343 10K_4 SPI_CS0#_uR
[40,41,44] MAINON
T145
12
GPIO25/PSCLK3 FIU F_CS0
90
SPI_SCK_uR_R R341 22_4 SPI_SCK_uR
+3VPCU 1
CE VSS
4
13 92
GPIO12/PSDAT3 F_SCK A25L080M
77 30 ECDB_CLOCK T144
[10] RTC_CLK GPIO00/32KCLKIN GPIO55/CLKOUT/IOX_DIN
85 VCC_POR# R339 47K_4 +3VPCU If the Southbridge enables 'Long Wait Abort' by
VCC_POR Winbond W25X16AVSSIG AKE38ZP0N01
VCORF
default, the flash device should be 50MHz (or faster)

AGND
GND1
GND2
GND3
GND4
GND5
GND6
79 104 VREF_uR R351 *Short_4 +A3VPCU MXIC MX25L1605AM2C-15G AKE37FP0Z13

GPIO02 VREF EON EN25F16-100HIP AKE38ZA0Q00
For ZQ2B (6L/ UMA) AMIC A25L016 AKE38ZN0800
NPCE781
Program this pin to GPI.
5
18
45
78
89
116
103
44
VCORF_uR
+3V
L64 SM BUS ARRANGEMENT TABLE HWPG(KBC)
BK1608HS220/1A/22ohm_6
SM Bus 1 Battery
C611 R393
10K_4
1U/6.3V_4 SM Bus 2 CPU
D7 BAS316
[40] HWPG_1.5V
E775AGND SM Bus 3 No Use
D6 BAS316 HWPG
[39] HWPG_NB HWPG [2]
D26 *BAS316
[37,41] HWPG_2.5V
PALM REST THERMAL SENSOR (THM) POWER-ON SWITCH (KBC) POWER-ON SWITCH (KBC) [36] SYS_HWPG
D24 BAS316
+3V D23 BAS316

[38] HWPG_1.1V
SHBM=0: Enable shared memory with host BIOS
A SW1 D9 *BAS316 A
[38,41] HWPG-1.8V
R348 MISAKI_SW_H1.5 D27 for VRON enable +Vcore/0.9V
47K_4 D27 BAS316
[41] HWPG_0.9V D8 for 1.2V_ON enable +1.1V
NBSWON# 1 2
Near TP on TOP side and only for 3 4 SHBM_R R338 10K_4 D8 *BAS316
[14,37,39] CPU_COREPG
2
TPD_TRIP 5
AMD platform Palm Rest use. D19 6
*VPORT_6
RT1
100K/F/NTC_4 (02/25) PROJECT : ZQA
1
Per QSMC SMT request, change to

t Mitsubishi.
Disabled ('1') if using FWH device on LPC.
Main: CU4100B0000 Enabled ('0') if using SPI flash for both system BIOS and EC firmware Size Document Number Rev
E775AGND Second: CU410000Z07 (MIT) WPCE775C_0DG & FLASH 1A

5 4 3 2 1
5 4 3 2 1
PW_JACK (65W/90W) A03

dcjk-2dc2003-000111-3p-v VA1 PD10
PJ1 PL1 SBR1045SP5-13 PQ32 VIN PQ33
FDD6685
A08 FDD6685
1 UPB201212T-121Y-N_8 1
2 VA 3 VA2 3 4 1 2 3 4
2
3
1
PL2
1
PC116 PC115 UPB201212T-121Y-N_8 PC1 PC2 PR1 PR8 VIN PC3 PC7 PR3
7
6
5
4
0.1u/50V_6 2.2n/50V_4 0.1u/50V_6 0.1u/50V_6 220K/F_4 0.01_3720 0.1u/50V_6 2.2n/50V_4 33K/F_4

PD9
SMAJ20A CSIP_1
2
D D
1 6
PD1 PR4
SW1010CPT PR2 2 5 10K_4
D/C# [34]
220K/F_4
Modfiy 4/28 andy 3 4
3
ZH9
For EMI PQ1
IMD2AT108
VA VIN 2
+ PQ2
EC18 EC17 PC117 CSIP_1 DMN601K-7
*22u/25V_1210 *22u/25V_1210 *100u/25V_6.3*5.8
1
VIN
PC135
PR17 PR18 1u/16V_6
10/F_4 10/F_4
Item Color QCI P/N

PC18 PC129 PC13
0.1u/50V_6 PR152 2.2n/50V_4 4.7u/25V_8
65W Yellow DFPJ06MR012 4.7_6 PC137
1u/16V_6
27 CSIN
28 CSIP
ISL88731_VDDP
5
6
7
8
90W Blue DFPJ06MR013
33
32
31
30
26
21
C C
1
+3VPCU PD11
*RB500V-40 4
CSSP
VDDP
NC
GND
GND
GND
GND
CSSN
VCC
PC139 PR22 PC19 A03
0.1u/50V_6 2.7_6 0.1u/50V_6
+3VPCU 11 25 88731B_2 88731B_1 PQ35 0.01_3720
VDDSMB BOOT AO4468 PR142
PL6
3
2
1
MBDATA 9 24 ISL88731_UGATE 6.8uH
PR43 SDA UGATE BAT-V
1 2
100K_4
5
6
7
8
MBCLK 10 23 ISL88731_PHASE
SCL PHASE
13 20 ISL88731_LGATE 4 PR150
[34] ACIN ACOK LGATE *4.7_6
PR151 PC136 19
49.9/F_6 0.1u/50V_6 PGND PQ37
DCIN 22 AO4468
DCIN PR35 PC120 PC122 PC119
3
2
1
PR29 10/F_4 PC133 2.2n/50V_4 10u/25V_1206 10u/25V_1206
82.5K/F_4 PU4
CSOP 18 CSOP CSOP_1 A23 *680p/50V_6
PC5 88731ACSET 2 ISL88731A CSOP_1
0.1u/50V_6 ACIN PC29
0.1u/50V_6
3 VREF
B
PC6 PR32
CSON 17 CSON BAT-V BAT-V
B
A07 100p/50V_4 PL3 22K/F_4
UPB201212T-121Y-N_8 4 PR37
ICOMP 10/F_4
NC 16
MBAT+ BAT-V
C114F3-108A1-L_Batt_Conn 5
PL4 NC
UPB201212T-121Y-N_8 15 BAT-V
10 1 PR6 VBF
2 6 VCOMP
100/F_4 29 PR38
3 TEMP_MBAT GND 100/F_4
GND
4 TEMP_MBAT [34]
ICM
NC
NC
5
6 PR7 PR40
7
14
12
7 100K_4 2.21K/F_4
9 8
+3VPCU
PJ2
PC4 PC8
47p/50V_6 47p/50V_6 PC35
.01u/50V_6
ISL88731 thermal pad
ICMNT
tie to Pin12
ICMNT [34]
A45 PR139 PR138

100/F_4 100/F_4 PC26 PC31 PC33
MBCLK [34] *1u/16V_6 .01u/50V_6 *0.01u/50V_6
MBDATA [34]
A A
PU1
CM1293A-04SO
1 6 MBDATA
CH1 CH4
2 VN VP 5 +3VPCU PROJECT : ZQA
TEMP_MBAT 3 CH2 CH3 4 MBCLK Quanta Computer Inc.
Add ESD diode base on EC FAE suggestion Charger(ISL88731A) 1A

5 4 3 2 1
5 4 3 2 1
MAIND
MAIND [40,44]
VL
[2,44] SYS_SHDN#
PR174 Note1
Note1 0_4
VIN
D VIN D
PR178
39K/F_4
PC77 PR181 PC86 PC91 PC88

PC69 1U/6.3V_4 *0_6 2.2n/50V_4 4.7u/25V_8 *4.7u/25V_8
+ PC84 PC85 3V5V_EN 0.1u/50V_6
PC175 2.2n/50V_4 4.7u/25V_8
100u/25V_6.3*5.8
VL OCP:7A
PR180 PR175
0_4 0_4 PR179 PR182
PC75 0_4 *0_4
5.7A
1u/16V_6 +3VPCU
5V_EN
3V_EN
OCP:8A PC74
5
6
7
8
PR177 4.7u/10V_6
390K_4 A42
6.3A
+5VPCU 8206_ONLDO REF 3V_DH 4
Note1
8
7
6
5
PC76
0.1u/50V_6 PQ12
PR176 AO4468
8
7
6
5
4
3
2
1
Note1 4 5V_DH 150K_4
PL13
LDOREFIN
LDO
VIN
NC
ONLDO
VCC
TON
REF
3
2
1
2.2uH
PQ14 3V_LX
AO4468 PR94
5
6
7
8
A12 A21 9 32 REFIN2 174K/F_4 A43
PL14 BYP REFIN2
10 31
1
2
3
2.2uH/8A OUT1 ILIM2 PR190
C 11 FB1 OUT2 30 C
5V_LX 12 PU14 29 SKIP 4 *4.7_6 +
PR95 DDPWRGD_R 13 ILIM1 RT8206B SKIP# DDPWRGD_R PC87 PC176
PGOOD1 PGOOD2 28
8
7
6
5
A44 143K/F_4 5V_EN 14 27 3V_EN 0.1u/50V_6 330u/6.3V_6X5.7
PR183 EN1 EN2
15 DH1 DH2 26
+ *0_4 PR193 16 25 PC174
PC185 *4.7_6 5V_DL LX1 LX2 *680p/50V_6
4 37 PAD
330u/6.3V_6X5.7 36
3
2
1
PAD
PGND
PVCC
PC171 PQ11
BST1
BST2
GND
PAD
PAD
PAD
DL1
DL2
PC173 0.1u/50V_6 AO4710 PR186 PR185
NC
PC102 PC99 PC177 0.1u/50V_6 0_4 *0_4
*4.7u/25V_8 0.1u/50V_6 *680p/50V_6 PQ13 PR191
35
34
33
17
18
19
20
21
22
23
24
AO4710 PR192 1/F_6 +3VPCU_OUT
1
2
3
PR93 1/F_6 PR184

0_4 3V_DL *0_4
PR187
*0_4
VL
+5VPCU_FB
PR97 A40
2 PC172 *Short_6
PD8 1u/16V_6
CHN217 3 SKIP
PC90 PR107
1 0.1u/50V_6 *Short_6
PC89
PC93 2 0.1u/50V_6
0.1u/50V_6 PD7
B
OCP:6.3A CHN217 3 PR99 OCP:7A B
L(ripple current) 0_6 L(ripple current) A41
1
=(9-5)*5/(2.2u*0.4M*9) =(9-3.3)*3.3/(2.2u*0.5M*9)
+15V_ALWP DDPWRGD_R
=2.525A +15V =1.9A SYS_HWPG [34]
Iocp=6.3-(2.525/2)=5.04A PR100 Iocp=7-(1.9/2)=6.05A PR173

22_8 *Short_6
Vth=5.04A*14.2mOhm=71.53mV PC92 Vth=6.05A*14.2mOhm=8591mV
0.1u/50V_6
R(Ilim)=(71.53mV*10)/5uA=143K R(Ilim)=(85.91mV*10)/5uA=171.8K
Ipeak(choke)=10.487A Ipeak(choke)=8.679A
VIN +3V_S5 +5V_S5 +15V +5VPCU +5VPCU +3VPCU +3VPCU
PR121 PR133 PR125 PR114
3
1M_6 22_8 22_8 1M_6
5
6
7
8
5
6
7
8
5
6
7
8
S5D 2
S5D 4 MAIND 4 MAIND 4
3
PQ28
A PQ56 PQ55 PQ20 AO3404 A
1
2 AO4468 AO4468 AO4468
S5_ON
2 2 2 +3V_S5 1.13A
[34,38,41,44]
3
2
1
3
2
1
3
2
1
PR123 PQ29 PQ22

1
PQ30 1M_6 DMN601K-7 DMN601K-7

DTC144EU PQ21
+5V_S5
PROJECT : ZQA
1
DMN601K-7
3A
+5V +3V
3.28A 3A Size Document Number Rev
SYSTEM 5V/3V (RT8206) 1A

5 4 3 2 1
A B C D E
3A PL11 Note1
2.2uH/8A
LGATE_NB
+CPU_VDDNB_CORE VIN
Offset &
OFS/VFIXEN Droop SVI VFIX
GND O O X [2] CPU_VDDNB_FB_H
1
D1
D1
S2
G2
+3.3V X X O PR85
10/F_6 +
+5V X O X PC71
330u/2V_7343 PC169 PC78 PC72
[2] CPU_VDDNB_FB_L 0.1u/50V_6 4.7u/25V_8 4.7u/25V_8
4 4
S1/D2
PQ52
PR88 PR84 AO4932
G1
Metal VID Codes 10/F_6 PC66 10/F_6
+5VPCU 1000P/50V_4
8
SVC SVD Output
0 0 1.1 PC64 UGATE_NB
A37 1u/16V_6
0 1 1.0 PR89
22.1K/F_4
1 0 0.9
PR166 *Short_6
1 1 0.8
PR200 *Short_6 PC62
33p/50V_4
PC63
1200p/50V_4
VFIXEN VID Codes VIN
Note1
SVC SVD Output PR86 A10
10/F_6
VIN
0 0 1.4 PC60
0.1u/50V_6 PR83 LGATE_NB
0 1 1.2 11.3K/F_4 +
PC165
1 0 1.0 PR87 PHASE_NB 100u/25V_6.3*5.8
44.2K/F_4 PQ51
5
1 1 0.8 AOL1448
UGATE_NB PC61 PC67 PC68 PC168
+3V 0.1u/50V_6 4.7u/25V_8 4.7u/25V_8 0.1u/50V_6
UGATE_0 4
49
48
47
46
45
44
43
42
41
40
39
38
37
A38 20A
1
2
3
+5VPCU PR82 PL10
GND
VIN
VCC
FB_NB
COMP_NB
FSET_NB
VSEN_NB
RTN_NB
OCSET_NB
PGND_NB
LGATE_NB
PHASE_NB
UGATE_NB
1/F_6 0.36uH/30A
PR80
10K_4 1 2 +VCORE
3 1 36 3
OFS/VFIXEN BOOT_NB PR79
4
1/F_6
2 35 PQ50 PR172
[14,34,39] CPU_COREPG
5
PGOOD BOOT_0 AOL1718 *2.2/F_6 + +
A39 PC59
3 34 UGATE_0 0.1u/50V_6
[2,10] CPU_PWRGD PWROK UGATE_0
Pin 49 is GND Pin 4
PC160
4 33 PHASE_0 *1000P/50V_6 PC158 PC65
[2] CPU_SVD
1
2
3
SVD PHASE_0 330u/2V_7343 330u/2V_7343
ISP_0
[2] CPU_SVC 5 32
SVC PGND_0 ISN_0
PR167
100K_4 6265_EN 6 PU8 31 LGATE_0 +5VPCU
[34,41] HWPG_2.5V ENABLE LGATE_0
6265_EN PR77 0_4 ISL6265A A11 Note1
VIN
7 30
RBIAS PVCC
PR76 PR75 PC58 +
19.6K/F_4 97.6K/F_4 8 29 LGATE_1 2.2u/10V_8 PQ47
OCSET LGATE_1
5
PR74 PC57 AOL1448
255/F_4 4700p/25V_4
9 28
VDIFF_0 PGND_1 UGATE_1 PC156 PC157 PC151 PC153
4
PR73 4.7u/25V_8 4.7u/25V_8 0.1u/50V_6 100u/25V_6.3*5.8
1K/F_4 10 27 PHASE_1
1
2
3
FB_0 PHASE_1
11
COMP_0 UGATE_1
26 UGATE_1 PL9 20A
0.36uH/30A
PR71 PC54 +VCORE
54.9K/F_4 1200p/50V_4 12 25 1 2
VW_0 BOOT_1
COMP_1
VDIFF_1
VSEN_0
VSEN_1
PC55 PR70 PR72 PC56

RTN_0
RTN_1
4
ISN_0
ISN_1
ISP_0
VW_1
ISP_1
180p/50V_4 6.81K/F_4 1/F_6 0.1u/50V_6 PQ48
FB_1
5
AOL1718 PR165
2 2
+ +
PC53 *2.2/F_6
13
14
15
16
17
18
19
20
21
22
23
24
1000P/50V_4 LGATE_1 4
1
2
3
ISP_0 PC152 PC154
PC155 330u/2V_7343 330u/2V_7343
Close to *1000P/50V_6
PR68 ISN_1
CPU socket 18.2K/F_4 PC51
PR69 0.1u/50V_6
+VCORE
3.92K/F_4 PR67
PR64 ISN_0 PC50 3.92K/F_4
10/F_6 0.1u/50V_6
[2] CPU_VDD0_FB_H ISP_1
[2] CPU_VDD0_FB_L PR62

18.2K/F_4 ISN_1
+1.5VSUS PR66 1K/F_4
Parallel
PR65 10/F_6
+VCORE
PR63
10/F_6 [2] CPU_VDD1_FB_H
1 1
PROJECT : ZQA
CPU Core (ISL6265) 1A

A B C D E
5 4 3 2 1
Note1
VIN
+5VPCU
OCP:8A
D D
PR143
1.1V/6.3A
10/F_6 PC32 PC134
5
6
7
8
PD2 2.2n/50V_4 4.7u/25V_8 +1.1V_S5
A35 RB500V-40
PR149 PR27
A36 1M_4 2.2/F_6 PC12 4
4.7U/6.3V_6
PU2 PQ39
Note1
PR145 UP6111AQDD AO4468
*Short_6 PC28
15 13 0.1u/50V_6
S5_ON
3
2
1
EN/DEM BOOT
[34,36,41,44]
+3V 16 12 UGATE-1.1V PL7
TON UGATE 1R0uH-3mR/15A
1 11 PHASE-1.1V
VOUT PHASE
PR10 2 10 PR33
VDD OC
5
6
7
8
C *10K_4 PC132 4.32K/F_4 C
*0.1u/50V_6 3 9 PC24 PR41
FB VDDP 1u/16V_6 *4.7_6
4 8 LGATE-1.1V 4 +
[34] HWPG_1.1V PGOOD LGATE
6 GND PGND 7
PC34
5 17 *680p/50V_6
NC TPAD
14 PQ38
3
2
1
NC AO4710
PC131 PC130 PC140 PC38 PC40
1u/16V_6 *1000P/50V_6 560u/2.5V_6X5.7 *10u/10V_8 0.1u/50V_6
B
PR144
Rds*OCP=RILIM*20uA B
TON=3.85p*RTON*Vout/(Vin-0.5) 4.75K/F_4 PC128
R1 *33p/50V_4
Frequency=Vout/(Vin*TON)
1.1V_FB
TON=3.85p*1M*1/(Vin-0.5)
PR146
VOUT=(1+R1/R2)*0.75
Frequency=1/(0.0036767)=272K
VIN +1.1V +15V +1.1V_S5 R2 10K/F_4 L(ripple current)
A34 =(19-1.1)*1.1/(1u*272k*19)
PR148 *Short_6
=3.81A
5
6
7
PR157 PR155 PR153 8 PR201 *Short_6
1M_4 22_8 1M_4 RILIM=14.2mohm*(8-1.905)/20uA=4.327K
4
Ipeak(choke)=11.81A
3
A PR154 PQ41 A
[34,41] HWPG-1.8V 1M_4 AO4468
2 2 2 PROJECT : ZQA
3
2
1
PC141 PR156 PQ43 PQ42 PQ40

1U/6.3V_4 100K_4 DMN601K-7 DMN601K-7 DMN601K-7
5.7A Size Document Number Rev
1
VCCP 1.1V(UP6111A) 1A
+1.1V
5 4 3 2 1
5 4 3 2 1
Note1
VIN
+5V_S5
OCP:10A
D PR57 PC145 D
10/F_6 PC146
7.5A
5
6
7
8
PD6 2.2n/50V_4 4.7u/25V_8 +NB_CORE
A32 RB500V-40
PR61 PR54
A31 1M_4 2.2/F_6 PC49 4
4.7U/6.3V_6 Note1
PR164
100K_4 PU7 PQ46
PR163 UP6111AQDD AO4468
*Short_6 PC147
UP6111AQDD_EN 15 13 0.1u/50V_6
34,37] CPU_COREPG
3
2
1
EN/DEM BOOT
+3V 16 12 UGATE-1.05V PL8
TON UGATE 1R0uH-3mR/15A
1 11 PHASE-1.05V
VOUT PHASE
PR160 2 10 PR56
VDD OC
5
6
7
8
*10K/F_4 PC149 5.6K/F_4
*0.1u/50V_6 3 9 PC45 PR159
FB VDDP 1u/16V_6 *4.7_6
4 8 LGATE-1.05V 4 +
C [34] HWPG_NB PGOOD LGATE C
6 GND PGND 7
PC144
5 17 *680p/50V_6
NC TPAD
14 PQ45
3
2
1
NC AO4710
PC46 PC48 PC142 PC143 PC150
1u/16V_6 *1000P/50V_6 560u/2.5V_6X5.7 *10u/10V_8 0.1u/50V_6
A33
PR59 *Short_6
VOUT=(1+R1/R2)*0.75
PR161 +5VPCU
PR60 *Short_6 2.74K/F_4 PC148
R1 *33p/50V_4 PR55
13.3K/F_4
1.05V_FB
3
B PR58 B
10K/F_4
PR162
10K/F_4 2
R2 PQ9
DMN601K-7 PR158
100/F_4
HI --- 0.95V
1
PC47
LOW ---1.1V
3
.01u/16V_4
2 +NB_CORE_ON [8]
PQ44
DMN601K-7
L(ripple current)
TON=3.85p*RTON*Vout/(Vin-0.5)
1
=(19-1.1)*1.1/(1u*272k*19)
Frequency=Vout/(Vin*TON)
A ~3.81A A
TON=3.85p*1M*1/(Vin-0.5)
RILIM=14.2mohm*(10-1.905)/20uA=5.747K
Frequency=1/(0.0036767)=272K PROJECT : ZQA
Ipeak(choke)=13.81A
NB_CORE(UP6111A) 1A

5 4 3 2 1
5 4 3 2 1
D D
PC101
10u/10V_8
A25 PC100
0.1u/50V_6 Note1
8207A_VBST
+0.75V_DDR_VTT
VIN
8207A_DH
PC104 PC103
0.38A 10u/10V_8 10u/10V_8 8207A_LX
5
8207A_DL PC184 PC94 PC183
2.2n/50V_4 4.7u/25V_8 4.7u/25V_8
4
OCP:16A
25
24
23
22
21
20
19
1
2
3
PQ53
12.99A
LL
DRVL
VTT
VBST
GND
VLDOIN
DRVH
AOL1448 PL15 Note1
1R0uH-3mR/15A
1 18 +1.5VSUS
VTTGND PGND
2 VTTSNS CS_GND 17
PR198
5
3 RT8207A 16 6.2K/F_4
GND PU11 CS
A20 PR101
+1.5VSUS 4 15 4 *4.7_6 +
C MODE V5IN +5V_S5 C
PC113
PR122 PQ54 10u/10V_8
1
2
3
5 14 5.1/F_6 AOL1718
+SMDDR_VREF VTTREF V5FILT
1
VDDQSNS
VDDQSET
PC108 +5V_S5 6 13 PC186 PC106 PC95

0.08A .033u/50V_6 COMP PGOOD 1U/6.3V_4 1U/6.3V_4 *680p/50V_6 PC187
2
PR124 560u/2.5V_6X5.7
NC
NC
100K_4
S3
S5
+3V
7
10
11
12
FOR DDR III

HWPG_1.5V [34]
PR128 (For RT8207A 400KHZ ) close to pc2008

VIN
620K/F_4
S5_1.8V PR132
SUSON [34]
0_4
S3_1.8V PR131
MAINON [34,41,44]
A24 *0_4
PR199
*Short_6
PR202
*Short_6 PC114 PR126
*33p/50V_4 10K/F_4
Vout = (PR150/PR149) X 0.75 + 0.75
B B
8207A_SET L(ripple current)

=(9-1.5)*1.5/(1u*400k*9)
PR130 S5_1.8V
PR127
0_4 S3_1.8V
=3.125A
10K/F_4
Vtrip= (16-1.5625)*4.3mohm=0.062081V
+1.5VSUS RILIM=Vtrip/10u=6.208K
3
MAIND 2
[36,44] MAIND
PQ25
AO3404
1
S3 S5 +1.5VSUS REF VTT
+1.5V S0 1 1 ON ON ON
0.57A S3 0 1 ON ON OFF
A A
S4/S5 0 0 OFF OFF OFF
PROJECT : ZQA
DDR 1.5V(TPS51116) 1A

5 4 3 2 1
5 4 3 2 1
+3V
+3V
PR109
PR168 +5VPCU 10K_4
+5VPCU EV@10K_4 PC112 PU10
0.1u/50V_6 RT9025-25PSP
PC164 PU13 PR111 4 1
VPP PGOOD HWPG_0.9V [34]
EV@0.1u/50V_6 EV@RT9018A 0_4
D 4 1 HWPG_2.5V 2 6 CPU_VDDR D
VPP PGOOD PG_1.5V_EN [43] VEN VO
2 6 3
[42] PG_GPUIO_EN VEN VO +1V +1.5VSUS
8
VIN PR112 0.94A
GND
ADJ
+1.5VSUS 3 VIN 1.5A 9 GND NC 5 4.02K/F_6
8 PC105
GND
ADJ
9 5 *0.1u/50V_6 0.8V PC111
7
GND NC PC163 1.2VADJ0.9V 10u/10V_8
PR171 EV@22u/6.3V_8
7
EV@9.1K/F_6
0.8V PR110
PC110 PC109 30.1K/F_6
1V_ADJ 10u/10V_8 0.1u/50V_6
PR108
PC159 PR169
Vout =0.8(1+R1/R2) 22.1K/F_4
Vout =0.8(1+R1/R2)
EV@0.1u/50V_6 EV@100K_4 =1V =0.9V
PC161 PC162 PR170
3
EV@10U/6.3V_6 EV@0.1u/50V_6 EV@34K/F_4
PR102
VGA 33_4
[12] VDDR_OPT 2
PQ15
DMN601K-7
+3V PC96
1
220P/50V_4
+3V
C C
PR197
+5VPCU 10K_4
PC178 PU15 PR136
1u/16V_6 RT9025-25PSP +5VPCU *10K_4
PR196 4 1 PC125 PU12
VPP PGOOD HWPG_2.5V [34,37]
0_4 0.1u/50V_6 RT9025-25PSP
MAINON +2.5V_ENABLE 2 6 +2.5V PR140 4 1 HWPG_1.2V
VEN VO 0_4 VPP PGOOD
+3VPCU 3 VIN 0.19A [34,36,38,44] S5_ON 2 VEN VO 6 +1.2V_S5
8 GND R1
ADJ PR194 PC179
9 GND NC 5
73.2K/F_4 10u/10V_8
+3VPCU 3
8
VIN PR137
1.2V
GND
ADJ
9 5 17.4K/F_4 0.2A
7
+2.5V_ADJ GND NC
PC118 0.8V PC121
7
*0.1u/50V_6 10u/10V_8
0.8V
PC182 PC180 PC181 PR195
*0.1u/50V_6 10u/10V_8 0.1u/50V_6
R2 34K/F_4 PR135
PC124 PC123 34K/F_4
10u/10V_8 0.1u/50V_6
Vout =0.8(1+R1/R2)
Vout =0.8(1+R1/R2)
=2.5V
=1.2V
B B
+3VPCU
A26 1.76A
+1.8V
PC81 PC79
Note1
10u/10V_8 .1u/10V_4
PU9 HPA00835RTER
16 VIN PH 10
1 11 PL12
VIN PH 1uH_7X7X3
PR90 2 12
0_4 VIN PH
MAINON 15 13 PC73
[34,40,44] MAINON EN BOOT 0.1u/50V_6
PC70 54418-1.8_VFB 6 14 R1
1000P/50V_4 VSNS PW RGD PR189
7 3 100K/F_4
COMP GND
8 RT/CLK GND 4
PR98
HWPG-1.8V [34,38]
PAD
PAD
PAD
PAD
PAD
PAD
15K/F_4 9 5
SS AGND 54418-1.8_VFB
A PC83 PR96 +3V PC170 PC166 PC167 A
22
21
20
19
18
17
*100P/50V_4 182K/F_4 .1u/10V_4 10u/10V_8 10u/10V_8

PR91
10K_4 R2 PR188
PC82 PC80 78.7K/F_4
1200p/50V_4 .01u/16V_4
PROJECT : ZQA
V0=0.8*(R1+R2)/R2 Quanta Computer Inc.
LDO 1A

5 4 3 2 1
1 2 3 4 5
+5V_S5
Note1
VIN
A28
OCP=16.38A
13.64A
A +3V +3V_D_EXT PC126 PC127 PC10 PC9 +VGPU_CORE A
PR141 EV@2.2n/50V_4 EV@4.7u/25V_8 EV@4.7u/25V_8 EV@4.7u/25V_8
5
EV@200K/F_4
PC23 EV@1u/10V_6 2 7 8792TON
VDD TON
PR31 PR30 5 8792DH 4 PQ34
*EV@10K_4 EV@10K_4 PC22 EV@1u/10V_6 8792VCC DH
13 VCC
1
2
3
6 8792BST
BST EV@AOL1448
[41] PG_GPUIO_EN 14 PGOOD PR11 PC17 PL5
Note1
8792EN 1 EV@1/F_6 EV@0.22u/25V_6 EV@0.36uH/30A
[18] dGPU_PW REN EN 8792LX
LX 4
PR36 PU3
EV@0_4 PR24 8792SKIP# 12 EV@MAX8792ETD+T
*EV@0_4 SKIP# 8792DL
DL 3
5
PC25 PR20 PC11 PC44
EV@0.1u/10V_4 8792REFIN 10 *EV@2.2/F_6 EV@0.1u/50V_6 EV@330u/2V_7343
REFIN
FB 8
+ + +
4 A09
PR34 REF-2V
EV@100K_4 8792REF 11 9 8792ILIM PC20
1
2
3
REF ILIM *EV@1000P/50V_6 PC138 PC43
PQ36 A29 560u/2.5V_6X5.7 EV@330u/2V_7343
EP
A30 EV@AOL1718
B B
Rc
15
PR15 PR28 *Short_6
SPE@44.2K/F_4
PR21 PR78 *Short_6
EV@75K/F_4
+VGPU_CORE_FB
Ra Place near GND pin15
PC15
PR12 EV@1000P/50V_4
3
SPE@470K/F_4
PR16
2 EV@100K_4
[16] GPU_VID1
Frequency(PR220=200K) 300K
PQ3
EV@DMN601K-7 Note: MAX8792 had integrate
PR19 PR23
discharge design.
1
EV@100K_4
Rd SPE@49.9K/F_4
PC16
EV@.01u/16V_4
C
Rb C
PR14
Park / Robson / Seymour - XT
3
SPE@220K/F_4
GPU_VID1 (GPIO15) GPU_VID2 (GPIO20) +VGPU_CORE

[16] GPU_VID2 2
PQ4
0 0 1.12V
EV@DMN601K-7 1 0 0.85V
PR26
1
EV@100K_4 0 1 0.95V
1 1 0.9V
PC21
EV@.01u/16V_4 Ra Rb Rc Rd VREF
332K 130K 39.2K 49.9K 2V
D D
Rc --> 39.2K/F_4 (CS33922FB15)

Ra --> 332K/F_4 (CS43322FB15) PROJECT : ZQA
Rb --> 130K/F_4 (CS41302FB00) Quanta Computer Inc.
GPU CORE(MAX8792) 1A

1 2 3 4 5
5 4 3 2 1
+1.5VSUS
VIN +1.5V_GPU +1.8V_GPU +15V +1.8V
PR113 PR103 PR104 PR105
5
6
7
8
D D
EV@1M_4 EV@22_8 EV@22_8 EV@1M_4
dGPU_D1 2 dGPU_D1 4
2.97A
3
3
PQ49 PQ10
PR118 EV@AO3404 EV@AO4468 +1.5V_GPU
0.23A
1
PR106 EV@0_4 2 PQ19 EV@1M_4 2 2 2
[41] PG_1.5V_EN EV@DTC144EU PC98
+1.8V_GPU
3
2
1
PQ16 PQ17 PQ18 *2.2n/50V_4
PC97 EV@DMN601K-7 EV@DMN601K-7 EV@DMN601K-7
1
A18
1
EV@1U/6.3V_4 C730
*100p/50V_4
C C
B B
A A
PROJECT : ZQA
GPU POWER 1A

5 4 3 2 1
1 2 3 4 5
VIN
PU5B
LM393
5 +
PD3 7
SW1010CPT 6
A - A
PR42
For EC control thermal protection (output 3.3V)
Thermal protection 1M_6
1
PQ6
AO3409
2
3
S5_ON 2
[34,36,38,41] S5_ON
PQ7 PR44
1
DTC144EU 0_6
B
VL VL B
SYS_SHDN#
POWER TEST : Thermal & Charge pump test circuit
PR39
A27 220K/F_4
PR47 PC27
PR46 200K/F_4 0.1u/50V_6 +5VPCU
3
1.2K/F_4
8
PR48
10K_6_NTC 2.469V 2
3 +
1 2 PR51 +5VPCU PD4 PR49
PD5 3 *CHN217 *22_8 +15V
2 - *0_6
PQ5 *SW1010CPT
1
3
PU5A DMN601K-7
4
LM393 PC30
1
0.1u/50V_6 PC41 PC39 PC37
S5_ON 2 PC42 PR53 1 8 *.1u/10V_4 *.1u/10V_4 *.1u/10V_4
PR45 *.1u/10V_4 *1.2K/F_4 VCC CLK
PQ8 200K/F_4 2 7
DMN601K-7 GND -CLK
3 6 SYS_SHDN# [2,36]
1
TMSNS -OT
4 5 S5_ON_EN S5_ON
TMGND EN
C C
PU6 PR50
PR52 *RT9025-25PSP *0_4
*10K_6_NTC
VIN +3V +5V +1.5V +15V
PR129 PR115 PR116 PR117 PR120

1M_4 22_8 22_8 22_8 1M_4
MAINON_ON_G MAIND
MAIND [36,40]
3
3
3
PR119
2 PQ31 1M_4 2 2 2 2
[34,40,41] MAINON DTC144EU PC107
PQ26 PQ27 PQ23 PQ24 *2.2n/50V_4
D DMN601K-7 DMN601K-7 DMN601K-7 DMN601K-7 D
1
PR134
1
*100K_4
PROJECT : ZQA
Thermal protect 1A

1 2 3 4 5
1 2 3 4 5 6 7 8
Power on Sequence required:
SB800:
1, +3.3VDUAL ramp before +1.1VDUAL
2, +3.3V ramp before +1.8v CPU_LDT_RST#
3, +1.8V ramp before +1.1v (SB TO CPU)
4, +3.3v ramp before +1.1v
5, +3.3VALW_R ramping down time > 300us
6, 50uS <= All power rails except +3.3VALW_R <= 40mS
7, 100uS <= +3.3VALW_R <= 40mS CPU_PWROK
(SB TO CPU) >1 mS Req.
RS880: CPU_CLKP/N running

A 1, 0 <(+3.3V) - (+1.8v) < 2.1 A
2, +1.8V ramp before +1.1v
>1 mS Req.
3. +1.1V ramp before VCC_NB
running
>1 mS Req. NB_CORE(all NB power) valid before NB_PWRGD_IN

SB OUTPUT NB_PWRGD
NB_PWRGD_IN
SLP_S3# 1V1DUAL_PWRGD
SB INPUT SB_PWRGD_IN SYS_RST# 1V5_PWRGD/DNI
+1.2V_PWRGD KBC_GPIO77/DNI
HWPG_0.95V
RC=~22ms NB_CORE should not ramp before +1.1v

NB_CORE
RC=~4.7ms
VLDT
GROUP B
VRM_PWRGD AND HWPG_1.8V (modify at B)

+1.1V
CPU_COREPG
RC=0
CPU_VDDR
RC=0
+VCC_CORE
RC=0
CPU_VDDNB_CORE
B B
HWPG_2.5V
GROUP A
+2.5V
(CPU_VDDA_2.5_RUN)
+1.5V
HWPG_1.8V
RC=0
+1.8V
+5V/+3.3V
MAIN_ON
to S3
SUSB#
VDRAM_PWRGD
CPU MEM CTL &
DDR3 SODIMM PWRS +0.75V_DDR_VTT +0.75V_DDR_VTT only will be shut down in S3 mode, and +0.75V_DDR_VTT for DDR3 SODIMM only.
+SMDDR_VREF
+1.5V_SUS
SUSC#
C C
Power button from EC to SB
DNBSWON#
20mS
CPU_THM/SB/SB_SCL1/2 delay
SB_KB/SPI/LPC ROM PWRS RSMRST#
HWPG_1.1V
+5V_S5/+3.3_S5/+1.1_S5
S5 RAILS When IMC, always on at all time( always PWR)
SUSD
S5_ON
Power button pressed

NBSWON#
KBC is ready
AC not present scenario = LOW AC present= high
ACIN
(ACIN detect)
KBC is powered by
+3.3VPCU +5VPCU/+3.3VPCU
LDO:5.4V
(from DCIN)
Battery inserted/AC IN
VIN_SRC
+AVBAT
D D
PROJECT : ZQA
Power Squence Chart 1A

1 2 3 4 5 6 7 8
1 2 3 4 5 6 7 8
Group-A Power on Sequence required:

3 HWPG_1.1V
+3VPCU
SB800:
+3.3V_S5
1, +3.3V_S5 ramp before +1.1_S5
PWRGD PWRGD 2 2, +3.3V ramp before +1.8v
EC +1.1VEN
+1.5V
S5_ON 1 +5V_S5 +1.1V_S5 +1.5V_SUS
A
RT8206B UP6111A 3, +1.8V ramp before +1.1v A
SMSC HWPG_1.8V SWITCH 4, +3.3v ramp before +1.1v
+1.8V (OPTION) 5, +3.3VALW_R ramping down time > 300us
DNBSWON# HPA00835RTER
4 6, 50uS <= All power rails except +3.3VALW_R <=
+1.5V_SUS +1.8VEN
PWRGD
+1.1V_S5 +1.1V 40mS
SUSON 5 MAX8207A 7, 100uS <= +3.3VALW_R <= 40mS
SB820 5 +0.75V_DDR_VTT SWITCH
MAIN_ON
+1.2V_ON
5 RS880:
MAIN_ON
1, 0 <(+3.3V) - (+1.8v) < 2.1
+5V_S5 5 +5V 2, +1.8V ramp before +1.1v
CPU_VDDR
7 +2.5V 9 3. +1.1V ramp before VCC_NB
+3.3V_S5 SWITCH +3.3V RT9025
6 RT9025 +VCORE
LDO 9
B
+2.5V_ON EN
B
HWPG_2.5V 8 ISL6265A
CPU_VDDNB_CORE H/W Thermal Follow Chart
9
CPU_COREPG PWRGD
10 NB_CORE
NTC
UP6111A Thermal
Protection
POWER RAILS Sequencing

SB820 Sequencing RS880 Sequencing EC Sequencing
1 CPU 3
1 S5_ON 13 +1.8V 1 +3.3V_S5 1 +3.3V 1 3VPCU CPU_THRMTRIP_L# SYS_SHDN# 3V/5 V
CPU_SIC
CPU_SID THERMTRIP_L
WIRE-AND SYS PWR
Temp Sense I2C

2 +3.3V_S5 14 HWPG_1.8V 2 ICH_RSMRST# 2 NB POWER RAILS 2 NBSWON# PROCHOT_L
C C
SideBand
3 +5V_S5 15 +1.5V 3 S0 POWER 3 ATX PS_PWRGD 3 VIN_ON 2 Level Shift
4 +1.1V_S5 16 +2.5V 4 PCIE_RCLKP/N 4 NB INPUT CLOCKS 4 S5_ON CPU_PROCHOT_L# PM_THERM#
PROCHOT#
5 HWPG_1.1V 17 HWPG_2.5V 5 PCICLK[4:0] 5 CPUCLK 5 ICH_RSMRST#

Level Shift
FAN Driver FAN
6 DNBSWON# 18 CPU_VDDNB_CORE 6 SB_PWRGD_IN 6 NB_PWRGD 6 -DNBSWON# S.B.
7 SUSON 19 +VCC_CORE 7 NB_PWRGD_IN 7 SB_PWRGD 7 SUSB#/SUSC#
8 +1.5V_SUS 20 CPU_VDDR 8 LDT_PG 8 LDT_PG/CPU_PWRGD 8 SUSON/USB_ON# CPUFAN#

E.C. The temperature listed blow first 3 items is CPU reading from EC.
CPI_SMBCLK The fourth value is thermal meter near fan.
9 +SMDDR_VTERM 21 CPU_COREPG 9 KBRST# 9 PCIRST#,NB_RST# 9 MAIN_ON/HWPG CPU_SMBDTA ‧ Level 5 : Fan on =94C ; Fan Off =89C , Fan RPM= 95 % Duty
‧ Throttling 50%: On =95C ; Off=90C
D ‧ OS Shut down: 98C D
10 MAIN_ON 22 +1.1V 10 A_RST# 10 LDT_RST# 10 VRON ‧ H/W Shut down : 95C
11 +5V 23 NB_CORE 11 PCIRST# 11 11 PWROK

PROJECT : ZQA
12 +3.3V 24 12 LDT_RST# 12 12 Quanta Computer Inc.
PWR ON SEQ and THERM POLICY 1A

1 2 3 4 5 6 7 8
5 4 3 2 1
ZQ2B Power tree +5VPCU (6.15A)

<Alway ON>
AO4468 +5V_S5 (3~4A) USB/M*1

<S5_ON--->S5D> PQ27 USB/S*3
<S5D> Page32
Page37
HDD
ODD
AO4468
<MAINON--->MAIND> +5V (3.2~4.3A) FAN
PQ26
<MAIND> ALC271
Page37
D ADAPTER D
65W/90W Smart +3VPCU (5.03A)

Charger <Alway ON>
RT8206B
ISL88731A BT
PU0001
BATTERY PU4 AO3404
Page26 <S5_ON--->S5D> +3V_S5 (1.3A)
PQ29 LAN
<S5D>
Page37
Page37
AO4468 (3.2A)
<MAINON--->MAIND> +3V
VIN_SRC
<MAIND> PQ28
Page37 +3V_D
--<EC>-- EV@AO3413 (1A)
<dGPU_VRON>
Q26
RT9025 *<+1.5V_GPU> Page20
--<EC>--
*<VR2.5_ON> PU6 (0.2A)
+2.5V
Page44 +CPUVDDA
<+3V>
HPA00835RTER +1.8V (1.95A)

--<EC>-- PU10
<MAINON>
Page44
EV@AO3404 +1.8V_GPU (0.96A)
Q50
C <+1.5V_GPU> Page45 C
EV@AO3404 +1.5V_GPU (10.7A)

<PG_1V_EN--->PG_1.5V_EN> PQ54
<PG_1.5V_EN> Page41
--<EC>-- AO1413 +1.5VSUS (18.71A) +1.5VSUS
<VIN_ON> PQ8
Page36
EV@G9018A
PU3 +1V (1.5A)
<PG_GPUIO_EN-->PG_1V_EN>
<PG_1V_EN> Page44
RT8207A
--<EC>-- PU12 RT9025 CPU_VDDR (0.75A)

<SUSON>
<VR2.5_ON-->HWPG_2.5V> PU5
<HWPG_2.5V>
*<MAINON> Page41 --<EC>-- Page45
*<VRON>
AO4468
VIN
--<EC>-- PQ25 +1.5V (7.87A)

<MAINON> Page41
B B
+0.75V_DDR_VTT (1.71A)
+SMDDR_VREF (0.75V) (0.75A)
UP6111A +1.1V_S5 (6A)

--<EC>-- PU13
<S5_ON>
Page39
<MAINON--->HWPG_1.8V> AO4468 +1.1V (5.5~7.8A)

<HWPG_1.8V>
PQ22
--<EC>--
*<1.2V_ON> Page39
UP6111A
NB_CORE (7.5A)
<VRON-->CPU_COREPG> PU8
<CPU_COREPG> Page40
EV@MAX8792 +VGPU_CORE (22.5A)

--<EC>-- PU7
<dGPU_VRON> Page42
A A
EV@ISL62872 +VGPU_IO (4A)

<dGPU_VRON-->PG_GPUIO_EN> PU2
<PG_GPUIO_EN> Page43
+VCORE (20A)
ISL6265A
PU11
--<EC>-- CPU_VDDNB_CORE
<VRON> Page38 (3A) PROJECT : ZQA
Power Tree 1A

5 4 3 2 1
5 4 3 2 1
Model KN1A M/B BOARD

MODEL REV CHANGE LIST Page From To
1 1A 3A
ZQA M/B 3A A01 PAGE28 : Add pull high resistor 4.7kohm on PD# pin, the reason is prevent speaker no sound. 2 1A 3A
A02 PAGE28 : Change R229,R223 to 33K for speaker 1W. 3 1A 3A
D
A03 PAGE35 : Change PR8,PR142 from 1m ohm to 10m ohm. 4 1A 3A D
A04 PAGE31 : Add BT2.1 design for Customer request. 5 1A 3A
A05 PAGE22 : Delete R8 bead. 6 1A 3A
A06 PAGE34 : The connection of CPUFAN# is changed from 105pin to 106pin. 7 1A 3A
A07 PAGE35 : Change P/N 8 1A 3A
A08 PAGE35 : Change PR8 Package to 3720 9 1A 3A
A09 PAGE42 : Stuff PC44 10 1A 3A
A12 PAGE36 : Change P/N 13 1A 3A
A13 PAGE31 : Stuff L73 14 1A 3A
A16 PAGE31 : Add 100p for EMI 17 1A 3A
A17 PAGE23 : Add 1000p for EMI 18 1A 3A
C A18 PAGE23 : Add 1000p for EMI 19 1A 3A C
A19 PAGE02 : Delete R356 20 1A 3A

A20 21 1A 3A
A21 22 1A 3A
A22 PAGE32 : Delete EC25,EC26,EC27,EC28 23 1A 3A
A23 24 1A 3A
A24 25 1A 3A
A25 26 1A 3A
A26 27 1A 3A
A27 PAGE44 : Change PR46 from 1.7K ohm to 1.2K ohm. 28 1A 3A
A28 29 1A 3A
A29 30 1A 3A
A30 31 1A 3A
32 1A 3A
33 1A 3A
B
34 1A 3A B
Note : 35 1A 3A
1. Remove Jumper : JP5,JP16,JP6,JP14,JP3,JP13,JP11,JP2,JP8,JP9,JP10,JP15,JP17,JP12,JP1,JP7 36 1A 3A
2. Remove 0 ohm : 37 1A 3A
R355,R356,R370,183,R207,R73,R331,L61,R76,R65,R83,R42,R50,L9,R35,R24,R27,R448,R228,R204,R202,R199, 38 1A 3A
39 1A 3A
R197,R195,R223,R424,R414,R400,R442,R459,R458,R446,R62,R70,R351. 40 1A 3A
3. Change footprint : 41 1A 3A
C119,C139,C149,C153,C154,C181,C182,C185,C191,C192,C195,C198,C199,C201,C202,C204,C205,C209, 42 1A 3A
C335,C336,C337,C338,C340,C361,C362,C363,C364,L30,L39,R9,R84,R89,R95,R96,R98,R123,R126,R134, 45 1A 3A
46 1A 3A
R158,R363,C296,C308,C213 47 1A 3A
48 1A 3A
A
PROJECT : ZQA A

Custom CHANGE LIST - 3A 3A
Date: Monday, June 21, 2010 Sheet 48 of 48
Quanta Computer Inc. PROJECT: ZQA PCBA NO. REV: 3A DOC. NO :

ZQA APPROVED BY : Johnny O CHECK BY : Darren Liao DRAWING BY : Bowen Chuang DATE :06/11/2010 SHEET 1
5 4 3 2 1

Quanta Zqa - Rev 1a

Uploaded by

Document Information

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Quanta Zqa - Rev 1a

Uploaded by

Copyright:

Available Formats

1 2 3 4 5 6 7 8

ZQA SOLE UMA SYSTEM DIAGRAM

DDR3- SODIMM2 DDR3 channel B 638P (PGA) 35W

+2.5V W/S= 15 mil/20mil +CPUVDDA

+1.5VSUS R382 1K_4 0 0 1.1V

CPUTEST24 R397 1K_4

CPUTEST23 R391 1K_4

R405 CPUTEST21 R139 1K_4

R387 1K_4 PROJECT : ZQA

Date: Monday, May 31, 2010 Sheet 2 of 48

VDDR=>1.75A CPU_VDDR CPU_VDDR

[5] M_B_DQSP0 C12 MB_DQS_H0 MA_DQS_H0 G13 M_A_DQSP0 [5]

Date: Monday, May 31, 2010 Sheet 3 of 48

BSS138_NL/SOT23 F23 V15 +1.5VSUS

PROCESSOR POWER AND GROUND

Date: Monday, May 31, 2010 Sheet 4 of 48

CK0 DQ49 CK0 DQ49

M_A_DQ54 M_B_DQ55 + C418 + C439

103 175 103 175

[3] M_A_CLKN1 [3] M_B_CLKN1

CK0# DQ50 2 CK0# DQ50

102 177 102 177

[3] M_A_CLKP2 [3] M_B_CLKP2

CK1 DQ51 CK1 DQ51 2

M_A_DQ48 M_B_DQ48 *330u/2V_7343 *330u/2V_7343

104 164 104 164

[3] M_A_CLKN2 [3] M_B_CLKN2

[3] M_A_CKE0 [3] M_B_CKE0

CKE0 DQ54 CKE0 DQ54

[3] M_A_CKE1 [3] M_B_CKE1

CKE1 DQ55 CKE1 DQ55

Place on each DIMM Connector

110 183 110 183

[3] M_A_RAS# [3] M_B_RAS#

RAS# DQ57 RAS# DQ57

115 191 115 191

[3] M_A_CAS# [3] M_B_CAS#

CAS# DQ58 CAS# DQ58

113 193 113 193

[3] M_A_WE# [3] M_B_WE#

WE# DQ59 WE# DQ59

114 180 114 180

[3] M_A_CS#0 [3] M_B_CS#0

S0# DQ60 S0# DQ60

121 182 121 182

[3] M_A_CS#1 [3] M_B_CS#1

S1# DQ61 S1# DQ61

116 194 116 194

[3] M_A_ODT0 [3] M_B_ODT0

ODT0 DQ63 ODT0 DQ63

[3] M_A_ODT1 [3] M_B_ODT1

SA0 NC1 SA0 NC1

201 122 201 122

SA1 NC2 SA1 NC2

[11,26] PCLK_SMB SCL SCL

Date: Monday, May 31, 2010 Sheet 5 of 48

HYPER TRANSPORT CPU I/F

This block is for Side-Port only

AC16 MEM_A10(NC) MEM_DQ10/DVO_D6(NC) AE22

Date: Monday, May 31, 2010 Sheet 6 of 48

RS880 Display Port Support (muxed on GFX)

PCIE I/F GFX

AA8 AD7 A_TXP0_C C573 .1u/10V_4 A_TXP0 [10]

[22] INT_CRT_HSYNC INT_CRT_HSYNC A11 B16 LA_CLK [22]

M_A_DQ48 M_B_DQ48 330u/2V_7343 330u/2V_7343

+3V_S5 R275 10K_4 SIDE_PORT_ID0 R278 10K_4

R265 10K_4 SIDE_PORT_ID1 R270 10K_4