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Half-adder implementations

InputsOutputs

a0

a0
b0
c
s0

0
0
0
0

0
1
0
1
1
0
0
1
1
1
1
0

a0
b0
a0
b0

s
(a)AND/XORhalfadder
_
c

b0

c=a0b0
s0 =a0 b0

HA
s0

_a0
b0

a0
b0
s0
(b)NORgatehalfadder
a0

s0
b0
(c)NANDgatehalfadderwithcomplementedcarry
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Assumingeachgate
hasTGdelay,then
eachimplementation
hasadifferentdelay

Full-adder implementations
InputsOutputs
a0
b0
c0
c1
s1

0
0
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
HA

c1
HA
S0

(a)FAbuiltoftwoHAs

a0

b0
FA

a0
b0

s0
c1

a0
b0

a0
b0

c0
c1

0
1
2
3

0
1

0
1
2
3

s0
(b)MuxbasedFA
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c1 =a0b0 +c0 (a0 b0)


s0 =c0 a0 b0

c0

c0
s0
(c)TwolevelANDORFullAdder
2

Ripple-carry adder or carry-propagate adder


an1
cn
c out
sn

bn1

FA

s n1

c n1

an2

bn2

FA

s n2

c n2

a1

.. .

c2

b1

FA

a0
c1

s1

b0

FA

c0
c in

s0

All2n+1inputbitsofa,b,andcin availableatthesametime
Inaripplecarryadder(RCA),carriesripplethroughalln FAsbeforewecanclaim
thatthesumoutputsarecorrectandmaybeusedinfurthercalculations
TheRCAproducescorrectsumsafterthisfixeddelayevenforveryshortcarry
propagationtimesasin0101+0010
RCAisinherentlyslowbecause,ingeneralsk mustwaitforck whichmustwaitforck
1 andsoonandsoforth
11111+00001istheworstcaseaddition

TRCA =TFA(a0,b0c1)+(n 2)TFA(c1cout)+TFA(cins)


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Carry lookahead adders (CLAs)


Atradeoffexistsbetweentimeandarea,whereafastercircuitmayrequire
additionallogic
Ingeneral,fornbitadditionthebestwecanachieveis
Delay log(n)

Howcanallincomingcarriesbegeneratedinparallel?
Carriesdependonlyonan1,an2,...,a0 andbn1,bn2,,b0 informationavailableto
allstagesforcalculatingincomingcarryandsumbits
Threepossiblecases:
If aibi=00 : no carry propagation
If aibi=10 or aibi=01 : incoming carry propagated
If aibi=11 : carry-out generated regardless of incoming carry

Carrygenerate: Gi=aibi
Carrypropagate: Pi=ai bi

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Carry propagation
Therefore,sumandcarryoutputcanbereexpressedintermsof
generate/propagateasfollows:
s i = a i b i ci = P i ci
ci+1 = ai bi + ci (ai bi) = Gi + ci Pi
c0
a0
b0

P0
G0

s0 =P0 c0
c1 =G0 +P0c0

s0

a1
b1

P1
G1

s0 =P1 c1
c2 =G1 +P1c1

s1

a2
b2

P2
G2

s2 =P2 c2
c3 =G2 +P2c2

s2

a3
b3

P3
G3

s3 =P3 c3
c4 =G3 +P3c3

s3

c4

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Group propagate and generate signals


Thefollowingexpressionsshowthatallcarryinputscanbedirectlyderivedfrom
datainputsandnotfromintermediatecarries

Thisallowscomputationofallsumbitsinparallel
Cout=G+PCin

PistrueifthegroupasawholepropagatesacarrytoCout
P=Pi Pi+1 Pi+k
Gistrueifthegroupasawholegeneratesacarry
G=Gi+k +Pi+kGi+k1 ++(Pi+1Pi+2 Pi+k)Gi

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