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OPERATIONAL AMPLIFIERS

Why do we study them at this point???

1. OpAmps are very useful electronic components


2. We have already the tools to analyze practical circuits
using OpAmps
3. The linear models for OpAmps include dependent sources

COMMERCIAL PACKAGING OF TYPICAL OP-AMP

LM324 DIP

LMC6294
MAX4240

OP-AMP ASSEMBLED ON PRINTED CIRCUIT BOARD

APEX PA03

DIMENSIONAL DIAGRAM LM 324


PIN OUT FOR LM324

CIRCUIT SYMBOL FOR AN OP-AMP SHOWING POWER SUPPLIES

LINEAR MODEL

OUTPUT RESISTANCE
INPUT RESISTANCE

TYPICAL VALUES

Ri : 10 10
5

RO : 1 50
A : 105 107

12

VIN

IN

VO

IN

GAIN

CIRCUIT WITH OPERATIONAL AMPLIFIER


LOAD
OP-AMP

DRIVING CIRCUIT

TRANSFER PLOTS FOR SOME COMERCIAL OP-AMPS

LINEAR
REGION

IDENTIFY SATURATION REGIONS

SATURATION
REGION

OP-AMP IN SATURATION

CIRCUIT AND MODEL FOR UNITY GAIN


BUFFER

WHY UNIT GAIN BUFFER?


PERFORMANCE OF REAL OP-AMPS
Op-Amp BUFFER GAIN
LM324
0.99999
LMC6492
0.9998
MAX4240
0.99995

KVL : Vs Ri I RO I AOVin 0
KVL : - Vout RO I AOVin 0
CONTROLLIN G VARIABLE : Vin Ri I
SOLVING
1
BUFFER Vout
GAIN
Ri
Vs 1
RO AO Ri
V
AO out 1
VS

THE IDEAL OP-AMP

IDEAL RO 0, Ri , A
i
i

RO 0 vO A(v v )
Ri
A

THE UNITY GAIN BUFFER IDEAL OP-AMP ASSUMPTION

vOUT vS

v v s

v v

vOUT
vOUT v

vOUT

1
vS

USING LINEAR (NON-IDEAL) OP-AMP MODEL WE OBTAINED

Vout

Vs

1
Ri
1
RO AO Ri

PERFORMANCE OF REAL OP-AMPS

Op-Amp BUFFER GAIN


LM324
0.99999
LMC6492
0.9998
MAX4240
0.99995

IDEAL OP-AMP ASSUMPTION YIELDS EXCELLENT APPROXIMATION!

WHY USE THE VOLTAGE FOLLOWER OR UNITY GAIN BUFFER?

vO v S

v v s
v v

vO v

CONNECTION WITHOUT BUFFER

THE VOLTAGE FOLLOWER ACTS AS


BUFFER AMPLIFIER

THE VOLTAGE FOLLOWER ISOLATES ONE


CIRCUIT FROM ANOTHER
ESPECIALLY USEFUL IF THE SOURCE HAS
VERY LITTLE POWER

CONNECTION WITH BUFFER

vO v S
THE SOURCE SUPPLIES NO POWER
THE SOURCE SUPPLIES POWER

LEARNING EXAMPLE

DETERMINE THE GAIN G

APPLY KCL @ v Vs 0 Vout 0

0
R1
R2
G

Vout
R
2
Vs
R1

Ao v v v 0
Ri i i 0

Vout
Vs

v 0
i 0
v 0

FOR COMPARISON, NEXT WE EXAMINE THE SAME


CIRCUIT WITHOUT THE ASSUMPTION OF IDEAL
OP-AMP

REPLACING OP-AMPS BY THEIR LINEAR MODEL

WE USE THIS EXAMPLE TO DEVELOP


A PROCEDURE TO DETERMINE OP-AMP
CIRCUITS USING THE LINEAR MODELS

1.

Identify Op Amp nodes

v
vo

3. Draw components of linear OpAmp


(on circuit of step 2)

v
vo

Ri

RO

2. Redraw the circuit cutting out


the Op Amp

A(v v )

4. Redraw as needed

v
R2

v
vo

v
v

INVERTING AMPLIFIER: ANALYSIS OF NON IDEAL CASE

USE LINEAR ALGEBRA

NODE ANALYSIS

CONTROLLING VARIABLE IN TERMS OF NODE


VOLTAGES

TYPICAL OP - AMP : A 105 ,


Ri 108 , RO 10

R1 1k, R2 5k

vO
v
4.9996994 A O 5.000
vS
vS

SUMMARY COMPARISON: IDEAL OP-AMP AND NON-IDEAL CASE

v 0
i 0

v 0
IDEAL OP-AMP ASSUMPTIONS

Ri i i 0

A v v
KCL @ INVERTING TERMINAL

NON-IDEAL CASE
REPLACE OP-AMP BY LINEAR MODEL
SOLVE THE RESULTING CIRCUIT WITH
DEPENDENT SOURCES
GAIN FOR NON-IDEAL CASE

0 v S 0 vO
v
R

0 O 2
R1
R2
vs
R1
THE IDEAL OP-AMP ASSUMPTION PROVIDES EXCELLENT APPROXIMATION.
(UNLESS FORCED OTHERWISE WE WILL ALWAYS USE IT!)

LEARNING EXAMPLE: DIFFERENTIAL AMPLIFIER

THINK NODES!

OUTPUT CURRENT IS NOT KNOWN

THE OP-AMP IS DEFINED BY ITS 3 NODES. HENCE IT NEEDS 3 EQUATIONS


KCL AT V_ AND V+ YIELD TWO EQUATIONS
(INFINITE INPUT RESISTANCE IMPLIES THAT i-, i+ ARE KNOWN)
DONT USE KCL AT OUTPUT NODE. GET THIRD EQUATION FROM INFINITE
GAIN ASSUMPTION (v+ = v-)

LEARNING EXAMPLE: DIFFERENTIAL AMPLIFIER

IDEAL OP-AMP CONDITIONS

NODES @ INVERTING TERMINAL

R4
R4
v2 v
v2
R3 R4
R3 R4

R
R
R
R
vO 1 2 v 2 v1 2 1 1 v v1
R1
R1
R1 R2

i 0 v

NODES @ NON INVERTING TERMINAL

R4 R2 , R3 R1 vO

R2
(v2 v1 )
R1

LEARNING EXAMPLE: USE IDEAL OP-AMP

v1

FIND vO

vo1

v1
vm1
v2

v 1 v m 1
v 2 v m 2
FINISH WITH INPUT NODE EQUATIONS
USE INFINTE GAIN ASSUMPTION

v1 v1

v 2
vo 2

vm 1 v1

v 2 v 2

vm 2 v2

USE REMAINING NODE EQUATIONS

v 2

@ vm1 :

vm 2

6 NODE EQUATIONS + 2 IDEAL OP-AMP

v 1 v 1
v 2 v 2

v1 v01 v1 v 2 v1 vo 2

00
R2
RG
R1

v 2 v o 2 v 2 v1 v 2
@ vm 2 :

00
R1
RG
R2

ONLY UNKWONS ARE OUTPUT NODE VOLTAGES

SOLVE FOR REQUIRED VARIABLE vo vo1

LEARNING EXTENSION

FIND IO . ASSUME IDEAL OP - AMP


v 12V

AO v 12V

v 12V
Ri i 0

12 Vo 12

0 Vo 84V
12k
2k
V
IO o 8.4mA
10k

KCL@ v :

LEARNING EXTENSION

v0

NONINVERTING AMPLIFIER - IDEAL OP-AMP

v
v_

vo

R2

v vi
i 0

R1

inverse voltage divider


SET VOLTAGE

v v1

v v1 v v1
INFINITE GAIN ASSUMPTION
INFINITE INPUT RESISTANCE

R1
R1 R2
vi
v0 v0
vi
R1 R2
R1

FIND GAIN AND INPUT RESISTANCE - NON IDEAL OP-AMP

vO

vi v v

COMPLETE EQUIVALENT
FOR MESH ANALYSIS

Ri

RO

vO

A(v v )

DETERMINE EQUIVALENT CIRCUIT


USING LINEAR MODEL FOR OP-AMP
MESH 1
NOW RE-DRAW CIRCUIT TO ENHANCE
CLARITY. THERE ARE ONLY TWO LOOPS

MESH 2

CONTROLLNG VARIABLE IN TERMS OF LOOP


CURRENTS

vO R2i2 R1 (i1 i2 )

THE SOLUTIONS

MATHEMATICAL MODEL

R1 v1
i1 1 ( R1 R2 RO )

i ( AR R ) ( R R ) 0
2

i
1
1
2

MESH 1
MESH 2

i1

R1 R2 RO
v1

i2

( ARi R1 )

CONTROLLNG VARIABLE IN TERMS OF LOOP


CURRENTS

vO R2i2 R1 (i1 i2 )
INPUT RESISTANCE

Rin

v1
i1

GAIN

vO
vi

REPLACE AND PUT IN MATRIX FORM

R1
( R1 R2 )
i1 v1
AR R ( R R R ) i 0

i
1
1
2
O 2
THE FORMAL SOLUTION
1

R1
v1
i1 ( R1 R2 )

i AR R ( R R R ) 0
2 i
1
1
2
O
( R1 R2 RO )( R1 R2 ) R1 ( ARi R1 )
R1
( R R2 RO )
Adj 1

( ARi R1 ) ( R1 R2 )

vO R1i1 ( R1 R2 )i2

R1 ( R1 R2 RO )
( R R2 )( ARi R1 )
v1 1
v1

A ???
A AR1Ri

Rin

vO
R R2
1
v1
R1

A SEMI-IDEAL OP-AMP MODEL


This is an intermediate model, more accurate than the ideal op-amp
model but simpler than the linear model used so far

Ri , RO 0, A AO i i 0 v v !!

v
Replacement Equation

ve vin

vO AO ve AO (v v )

Non-inverting amplifier and semi-ideal model

v v S
vO

R2 R1
v (as before)
R1

vO
AO
R1

;
v S 1 AO
R! R2

actual gain-ideal gain


GE
ideal gain
AO (v S v ) vO (replaces v v )

1
1 AO

Sample Problem

Set voltages?

i 0

Use infinite gain assumption

vO

iS

+
-

vS

v v S

Find the expression for Vo. Indicate


where and how you are using the Ideal
OpAmp assumptions

v v S

Use infinite input resistance assumption


and apply KCL to inverting input

vo v
iS
0
R

vo vS RiS

Sample Problem

DRAW THE LINEAR EQUIVALENT CIRCUIT AND WRITE THE LOOP EQUATIONS

4. Redraw if necessary

Ri

iS

RO

vO
A(v v )

i2

i1

iS

vo
RO

Ri
+
-

A(v + - v -)

1. Locate nodes

2. Erase Op-Amp
3. Place linear model

TWO LOOPS. ONE CURRENT SOURCE. USE MESHES


MESH 1 i1

is

Ri (i2 i S ) ( R RO )i2 A(v v _ )


CONTROLLING VARIABLE v v _ Ri ( i2 i1 )

MESH 2

LEARNING EXTENSION

FIND GAIN AND VO


v VS

v _ VS

i 0
VS
INVERSE VOLTAGE DIVIDER

100k 1k
VO
VS
1k
V
G O 101
VS
VS 1mV VO 0.101V

VO

VS

R2

R1

LEARNING EXAMPLE

UNDER IDEAL CONDITIONS BOTH CIRCUITS SATISFY

VO 8V1 4V2

If 1V V1 2V , 2V V2 3V
dc supplis are 10V

DETERMINE IF BOTH IMPLEMENTATIONS PRODUCE THE


FULL RANGE FOR THE OUTPU

VX 2V1 V2
1V V1 2V , 2V V2 3V 1V VX 2V VX OK!

VO 4VX

1V VX 2V 4V VO 8V VO OK !

VY 8V1
1V V1 2V 16V VY 8V
EXCEEDS SUPPLY VALUE.
THIS OP-AMP SATURATES!

POOR IMPLEMENTATION

COMPARATOR CIRCUITS

Some REAL OpAmps require


a pull up resistor.

ZERO-CROSSING DETECTOR

LEARNING BY APPLICATION

OP-AMP BASED AMMETER


NON-INVERTING AMPLIFIER

G 1

R2
R1

VI RI I

R
VO GVI 1 2 RI I
R1

LEARNING EXAMPLE

DC MOTOR CONTROL - REVISITED


CHOOSE NON-INVERTING
AMPLIFIER (WITH POWER
OP-AMP PA03)

1
Constraints: VM

RB
4 (design eq.)
RA

20V

Power dissipation
in amplifier 100mW
Significant power losses
Simplifying assumptions: Ri , RO 0 Occur only in Ra, Rb

Worst case occurs when Vm=20

(20V )2
PMX
100mW RA RB 4000
RA RB

RB
3
RA

One solution: RB 3k , RA 1k

Standard values at 5%!

V1
DESIGN EXAMPLE: INSTRUMENTATION AMPLIFIER
V2
DESIGN SPECIFICATIONS

VO

VO
10
V1 V2

HIGH INPUT RESISTENCE


LOW POWER DISSIPATION
OPERATE FROM 2 AA BATTERIES
MAX4240

VO VX VY
ANALISIS OF PROPOSED CONFIGURATION

VA V1 ; VB V2

Infinite gain

V1 V2 V1 VX

0
R
R1
V V1 V2 VY
@B: 2

0
R
R2
@ A:

R
R
R
R

VO V1 1 1 V2 1 2 V1 2 V2 1
R
R
R
R

SIMPLIFY DESIGN BY MAKING R1 R2 V 1 2 R1 (V V )

O
2
R 1

DESIGN EQUATION: 2 R1 9 R
USE LARGE RESISTORS FOR LOW POWER e. g., R 100k, R1 R2 450k

DESIGN EXAMPLE

DESIGN SPECIFICATION

VO
10
Vin

Power loss in resistors should not exceed

100mW when 2V Vin 2V


Design
Max Vo is 20V

VO
R2
1
10
equationS:
Vin
R1

PR R
1

R2 9 R1

(20V )2

100mW R R 4k
R1 R2

Solve design equations (by trial and error if necessary)

R1 400

IMPLEMENT THE OPERATION VO 0.9V1 0.1V2

DESIGN EXAMPLE

DESIGN CONSTRAINTS
AS FEW COMPONENTS AS POSSIBLE
MINIMIZE POWER DISSIPATED
USE RESISTORS NO LARGER THAN 10K
Given the function (weighted sum
with sign change) a basic weighted
adder may work

ANALYSIS OF POSSIBLE SOLUTION

V 0

R
R
VO V1 V2
V V
V
@V :

0
R1
R2
O

R1 1

R2

R2 9 R1

DESIGN
EQUATIONS

R
0.1
R2
R2 R1 R

SOLVE DESIGN EQUATIONS USING TRIAL AND ERROR IF NECESSARY

R2 10k ,5.6k ,...


ANALYZE EACH SOLUTION FOR OTHER CONSTRAINTS AND FACTORS; e.g.
DO WE USE ONLY STANDARD COMPONENTS?

DESIGN EXAMPLE

DESIGN 4-20mA TO 0 5V CONVERTER

1. CONVERT CURRENT TO VOLTAGE USING A RESISTOR

VI RI
CANNOT GIVE DESIRED RANGE!
2. CHOOSE RESISTOR TO PROVIDE THE 5V CHANGE
AND SHIFT LEVELS DOWN!

VMAX VMIN
50

312.5
I MAX I MIN 0.020 0.004

1.25 VI 6.25

MUST SHIFT DOWN BY 1.25V


(SUBSTRACT 1.25 V)

R2
VI
R1 R2

R1
V
(VO VSHIFT ) VSHIFT
R1 R2
V V VO R2 VI VSHIFT
R1

LEARNING BY DESIGN

DOES NOT LOAD PHONOGRAPH

DETERMINE R2 , R1 SO THAT
IT PROVIDES AN AMPLIFICA TION OF 1000

VO
R
(1)(1 2 )
V1
R1

LEARNING EXAMPLE

RT 57.45e 0.0227 T
UNITY GAIN
BUFFER

ONLY ONE LED


IS ON AT ANY
GIVEN TIME
COMPARATOR CIRCUITS

MATLAB SIMULATION OF TEMPERATURE SENSOR


WE SHOW THE SEQUENCE OF MATLAB INSTRUCTIONS USED TO OBTAIN THE PLOT
OF THE VOLTAGE AS FUNCTION OF THE TEMPERATURE
T=[60:0.1:90]'; %define a column array of temperature values
RT=57.45*exp(-0.0227*T); %model of thermistor
RX=9.32; %computed resistance needed for voltage divider
VT=3*RX./(RX+RT); %voltage divider equation. Notice ./ to create output array
plot(T,VT, mo); %basic plotting instruction
title('OUTPUT OF TEMPERATURE SENSOR'); %proper graph labeling tools
xlabel('TEMPERATURE(DEG. FARENHEIT)')
ylabel('VOLTS')
legend('VOLTAGE V_T')

EXAMPLE OF TRANSFER CURVE SHOWING SATURATION

v v1
i 0
v v1

THIS SOURCE CREATES THE OFFSET


THE TRANSFER CURVE

OUTPUT CANNOT
EXCEED SUPPLY
(10V)

KCL @ v_

IN LINEAR RANGE

OFFSET