Be657 Compal LA-6851P123

A
Compal Confidential
2
Cougar
LA-6851P Schematics Document
Intel Pine View Processor/ Tiger point
2010-10-10
REV: 1.0
Toshiba Satellite NB500 NB505
4
Compal Electronics, Inc.
Compal Secret Data
Security Classification
2010/06/27
Issued Date
Deciphered Date
2011/6/27
Title
SCHEMATIC MB A6851
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Size Document Number
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
Custom
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Date:
Rev
D
401986
Friday, September 02, 2011
Sheet
E
of
36
Compal Confidential
Model Name : PBU00
File Name : LA-6851P
Thermal Sensor
Fan Control
Low Power Clock Generator
EMC1402
page 24
ICS9LVRS387AKLFT MLF
page 7
page 9
CRT Conn.
page 15
Memory BUS(DDRIII)
Intel Pineview-M
LVDS
ONE CHANNEL
LED Conn.
page 16
(22x22mm)
page 10
1.5V DDRIII 667
page 6,7,8
DMI x 2
PCIeMini Card
WWAN
USB port 6
page 16
USB Conn X3
(FULL)
USB
PCIe 1x [2]
1.5V 2.5GHz(250MB/s)
5V 480MHz
USB
PCIe 1x
page 22
RTL8105E
10/100 LAN
PCIe port 3
Int. Camera
USB port 7
page 16
page 18,21
Tiger Pointer
PCIe port 2
page 16
RJ45
USB port 0,1,4
USB
5V 480MHz
PCIeMini Card
WLAN +BT COMBO (HALF)
204pin DDRIII-SO-DIMM
Card Reader
RTL5137
USB port 3
(17x17mm)
1.5V 2.5GHz(250MB/s)
SATA port 0
5V 1.5GHz(150MB/s)
Card Reader Conn.

page 23
page 23
SATA HDD
page 19
page 22
page 11,12,13,14
3
RTC CKT.
page 13
DC/DC Interface CKT.
3.3V 24.576MHz/48Mhz
3.3V 33 MHz
LPC BUS
HD Audio
HDA Codec
ALC269
page 26
page 20
ENE KB926 E0
page 24
Power Circuit DC/DC
Int.
MIC CONN
page 20
page 27~35
Touch Pad
page 26
4
Power/B
Int.KBD
MIC CONN
page 21
HP CONN
page 21
SPK CONN
page 21
SPI ROM
page 25
(10A 1X) (10B 2X)
page 25
page 26
Compal Secret Data
2010/06/27
Issued Date
Deciphered Date
2011/6/27
Title
Size
Date:
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
E
of
36
Voltage Rails
SIGNAL
Power Plane
Description
S1
S3
S5
G3
VIN
Adapter power supply (19V)
ON
ON
ON
OFF
B+
AC or battery power rail for power circuit.
ON
ON
ON
ON
+CPU_CORE
Core voltage for CPU
ON
OFF
OFF
OFF
+0.89VS
0.89VS GFX support voltage
ON
OFF
OFF
OFF
+0.75VS
0.75V switched power rail for DDR terminator
ON
OFF
OFF
OFF
+1.05VS
VCCP switched power rail
ON
OFF
OFF
OFF
+1.5VS
1.5V switched power rail
ON
OFF
OFF
OFF
+1.5V
1.5V power rail for DDR
ON
ON
OFF
OFF
+1.8VS
1.8VS switched power rail
ON
OFF
OFF
OFF
+3VALW
3.3V always on power rail
ON
ON
ON
OFF
+3V_LAN
3.3V power rail for LAN
ON
ON
OFF
OFF
+3V_WLAN
3.3V power rail for LAN
ON
ON
OFF
OFF
+3VS
3.3V switched power rail
ON
ON
OFF
OFF
+5VALW
5V always on power rail
ON
OFF
ON
OFF
+5VS
5V switched power rail
ON
OFF
OFF
OFF
+VSB
VSB always on power rail
ON
ON
ON
OFF
+RTCVCC
RTC power
ON
ON
ON
ON
STATE
SLP_S3# SLP_S4# SLP_S5#
Full ON
HIGH
S1(Power On Suspend)
+VALW
+V
+VS
ON
ON
HIGH
HIGH
ON
ON
Clock
HIGH
HIGH
HIGH
ON
ON
ON
LOW
S3 (Suspend to RAM)
LOW
HIGH
HIGH
ON
ON
OFF
OFF
S4 (Suspend to Disk)
LOW
LOW
HIGH
ON
OFF
OFF
OFF
S5 (Soft OFF)
LOW
LOW
LOW
ON
OFF
OFF
OFF
BTO Option Table

2
Mini PCI-E SLOT
Function
CAMERA & MIC
BLUE TOOTH
Clock gen
CAMERA
BLUE TOOTH
Tpye
description
explain
Wi-Fi
WiMax
3GGPS
3G
BTO
WLAN@
WIMAX@
3GGPS@
3G@
CAM@
MIC
MIC@
low@
BT@
normal@
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Function
description
explain
BTO
3
EC SM Bus1 address
EC SM Bus2 address
Device
Address
Device
Address
Smart Battery
0001 011X b
EMC1402
1001 010X b
ICH7M SM Bus address

Device
Address
Clock Generator
(SLG8SP556VTR)
1101 001Xb
DDR DIMMA
1010 000Xb
WWAN/WLAN
Compal Secret Data
2010/06/27
Issued Date
Deciphered Date
2011/6/27
Title
SCHEMATIC MB A6851
Custom
Date:
Rev
D
401986
Sheet
E
of
36
Issued Date
Compal Secret Data
2010/06/27
Deciphered Date
2011/6/27
Size
Date:
Title
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
1
of
36
B+
Cougar Power Map
DESIGN CURRENT 250mA
Ipeak=6.97A, Imax=4.88A
** The SW just is reserved.

The power passes by jump or
0-ohm resistor.
UP6182CQAG
+3VALWP +-5%
+3V_LAN
+5VALWP +-5%
+5VS
+3VS
+LCD_VDD
+0.89VSP
+1.05VSP +-5%
WOL_EN#
** P-CHANNEL
AO3413
SUSP
N-CHANNEL
SI4800BDY
SUSP
N-CHANNEL
ENVDD
SI4800BDY
P-CHANNEL
AO3413
SUSP#
SY8033BDBC
SUSP#
SY8033BDBC
Ipeak=1.308A, Imax=4A
VR_ON
Imax=3.5A
+CPU_CORE
ADP3211AMNR2G
SYSON
+1.5VP +-5%
+1.5VSP
+0.75VSP
G5603RU1U
SUSP#
IRF8113PBF
SUSP
UP7711U8
A
Issued Date
Compal Secret Data
2010/06/27
2011/6/27
Deciphered Date
Title
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS Custom
Date:
SCHEMATIC MB A6851
Rev
D
401986
Sheet
5
1
of
36
<10> DDR_A_DQS#[0..7]
N455@
U1
U80610006237AA SLBX9 A0 1.66G
PINEVIEW_M
N475@
U1
AU80610006240AA SLBX5
<10> DDR_A_D[0..63]
U1B
PINEVIEW_M
U1A
F3
F2
H4
G3
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14
AH19
AJ18
AK18
AK16
AJ14
AH14
AK14
AJ12
AH13
AK12
AK20
AH12
AJ11
AJ24
AJ10
DDR_A_MA_0
DDR_A_MA_1
DDR_A_MA_2
DDR_A_MA_3
DDR_A_MA_4
DDR_A_MA_5
DDR_A_MA_6
DDR_A_MA_7
DDR_A_MA_8
DDR_A_MA_9
DDR_A_MA_10
DDR_A_MA_11
DDR_A_MA_12
DDR_A_MA_13
DDR_A_MA_14
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
AK22
AJ22
AK21
DDR_A_WE#
DDR_A_CAS#
DDR_A_RAS#
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
AJ20
AH20
AK11
DDR_A_BS_0
DDR_A_BS_1
DDR_A_BS_2
DDR_CS0#
DDR_CS1#
AH22
AK25
AJ21
AJ25
DDR_A_CS#_0
DDR_A_CS#_1
DDR_A_CS#_2
DDR_A_CS#_3
DDR_CKE0
DDR_CKE1
AH10
AH9
AK10
AJ8
DDR_A_CKE_0
DDR_A_CKE_1
DDR_A_CKE_2
DDR_A_CKE_3
M_ODT0
M_ODT1
AK24
AH26
AH24
AK27
DDR_A_ODT_0
DDR_A_ODT_1
DDR_A_ODT_2
DDR_A_ODT_3
<10> DDR_A_DQS[0..7]
<10> DDR_A_MA[0..14]
REV = 1.1
DMI_RXP0_C
DMI_RXN0_C
DMI_RXP1_C
DMI_RXN1_C
DMI_RXP_0
DMI_RXN_0
DMI_RXP_1
DMI_RXN_1
G2
G1
H3
J2
DMI_TXP_0
DMI_TXN_0
DMI_TXP_1
DMI_TXN_1
DMI_TXP0
DMI_TXN0
DMI_TXP1
DMI_TXN1
<12>
<12>
<12>
<12>
DMI
N7
N6
<9> CLK_CPU_EXP#
<9> CLK_CPU_EXP
R10
R9
N10
N9
K2
J1
M4
L3
EXP_CLKINN
EXP_CLKINP
EXP_RCOMPO
EXP_ICOMPI
EXP_RBIAS
L10
L9
L8
RSVD_TP
RSVD_TP
N11
P11
EXP_TCLKINN
EXP_TCLKINP
RSVD
RSVD
RSVD
RSVD
RSVD
RSVD
DMI_IRCOMP
T1
T2
R492
R493 49.9_0402_1%
750_0402_1%
<10> DDR_A_WE#
<10> DDR_A_CAS#
<10> DDR_A_RAS#
Pull-down must be placed

within 500 mils from Pineview-M
<10> DDR_A_BS0
<10> DDR_A_BS1
<10> DDR_A_BS2
K3
L2
M2
N2
RSVD
RSVD
RSVD
RSVD
<10> DDR_CS0#
<10> DDR_CS1#
1 OF 6
PINEVIEW-M_FCBGA8559
N550@
<10> DDR_CKE0
<10> DDR_CKE1
<12> DMI_RXP1
C9501
DMI_RXP1_C
2
0.1U_0402_10V6K
<12> DMI_RXN1
C9511
DMI_RXN1_C
2
0.1U_0402_10V6K
2
1
<27>
SYSON#
SYSON#
Q37
2
G
S 2N7002_SOT23
@
0.1U_0402_16V4Z
DMI_RXN0_C
2
0.1U_0402_10V6K
<10> M_ODT0
<10> M_ODT1
DDR_A_DQS_0
DDR_A_DQS#_0
DDR_A_DM_0
AD3
AD2
AD4
DDR_A_DQS0
DDR_A_DQS#0
DDR_A_DM0
DDR_A_DQ_0
DDR_A_DQ_1
DDR_A_DQ_2
DDR_A_DQ_3
DDR_A_DQ_4
DDR_A_DQ_5
DDR_A_DQ_6
DDR_A_DQ_7
AC4
AC1
AF4
AG2
AB2
AB3
AE2
AE3
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_DQS_1
DDR_A_DQS#_1
DDR_A_DM_1
AB8
AD7
AA9
DDR_A_DQS1
DDR_A_DQS#1
DDR_A_DM1
DDR_A_DQ_8
DDR_A_DQ_9
DDR_A_DQ_10
DDR_A_DQ_11
DDR_A_DQ_12
DDR_A_DQ_13
DDR_A_DQ_14
DDR_A_DQ_15
AB6
AB7
AE5
AG5
AA5
AB5
AB9
AD6
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_DQS_2
DDR_A_DQS#_2
DDR_A_DM_2
AD8
AD10
AE8
DDR_A_DQS2
DDR_A_DQS#2
DDR_A_DM2
DDR_A_DQ_16
DDR_A_DQ_17
DDR_A_DQ_18
DDR_A_DQ_19
DDR_A_DQ_20
DDR_A_DQ_21
DDR_A_DQ_22
DDR_A_DQ_23
AG8
AG7
AF10
AG11
AF7
AF8
AD11
AE10
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_DQS_3
DDR_A_DQS#_3
DDR_A_DM_3
AK5
AK3
AJ3
DDR_A_DQS3
DDR_A_DQS#3
DDR_A_DM3
DDR_A_DQ_24
DDR_A_DQ_25
DDR_A_DQ_26
DDR_A_DQ_27
DDR_A_DQ_28
DDR_A_DQ_29
DDR_A_DQ_30
DDR_A_DQ_31
AH1
AJ2
AK6
AJ7
AF3
AH2
AL5
AJ6
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_DQS_4
DDR_A_DQS#_4
DDR_A_DM_4
AG22
AG21
AD19
DDR_A_DQS4
DDR_A_DQS#4
DDR_A_DM4
DDR_A_DQ_32
DDR_A_DQ_33
DDR_A_DQ_34
DDR_A_DQ_35
DDR_A_DQ_36
DDR_A_DQ_37
DDR_A_DQ_38
DDR_A_DQ_39
AE19
AG19
AF22
AD22
AG17
AF19
AE21
AD21
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_DQS_5
DDR_A_DQS#_5
DDR_A_DM_5
AE26
AG27
AJ27
DDR_A_DQS5
DDR_A_DQS#5
DDR_A_DM5
DDR_A_DQ_40
DDR_A_DQ_41
DDR_A_DQ_42
DDR_A_DQ_43
DDR_A_DQ_44
DDR_A_DQ_45
DDR_A_DQ_46
DDR_A_DQ_47
AE24
AG25
AD25
AD24
AC22
AG24
AD27
AE27
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_DQS_6
DDR_A_DQS#_6
DDR_A_DM_6
AE30
AF29
AF30
DDR_A_DQS6
DDR_A_DQS#6
DDR_A_DM6
DDR_A_DQ_48
DDR_A_DQ_49
DDR_A_DQ_50
DDR_A_DQ_51
DDR_A_DQ_52
DDR_A_DQ_53
DDR_A_DQ_54
DDR_A_DQ_55
AG31
AG30
AD30
AD29
AJ30
AJ29
AE29
AD28
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_DQS_7
DDR_A_DQS#_7
DDR_A_DM_7
AB27
AA27
AB26
DDR_A_DQS7
DDR_A_DQS#7
DDR_A_DM7
DDR_A_DQ_56
DDR_A_DQ_57
DDR_A_DQ_58
DDR_A_DQ_59
DDR_A_DQ_60
DDR_A_DQ_61
DDR_A_DQ_62
DDR_A_DQ_63
AA24
AB25
W24
W22
AB24
AB23
AA23
W27
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
2
C1063
C9491
<12> DMI_RXN0
R880
DMI_RXP0_C
2
0.1U_0402_10V6K
C9481
10K_0402_5%
SMPWROK
<12> DMI_RXP0
REV = 1.1
<10> DDR_A_DM[0..7]
<10>
<10>
<10>
<10>
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1
AG15
AF15
AD13
AC13
DDR_A_CK_0
DDR_A_CK_0#
DDR_A_CK_1
DDR_A_CK_1#
AC15
AD15
AF13
AG13
DDR_A_CK_3
DDR_A_CK_3#
DDR_A_CK_4
DDR_A_CK_4#
AD17
AC17
AB15
AB17
RSVD
RSVD
RSVD
RSVD
+1.5V
Close to CPU
+5VALW
3 2
@ R885
10K_0402_5%
@ R884
1K_0402_5%
@Q40B
@
Q40B
<32> SM_PWROK
R881
2
6
2N7002DW-T/R7_SOT363-6
@Q40A
<7>
XDP_TMS
<7>
XDP_TDO
<7>
XDP_PREQ#
R495@ 1
2
51_0402_5%
XDP_TMS
R496@ 1
2
51_0402_5%
XDP_TDO
R499@ 1
2
51_0402_5%
XDP_PREQ# R501@ 1
2
51_0402_5%
<13,24> PM_SLP_S4#
<24,27,32> SYSON
@ R882
1
0_0402_5%
@ R886
1
2
+1.5V
+1.5V
2N7002DW-T/R7_SOT363-6
10K_0402_5%
T3
T4
DDR_VREF
DDR_RPD
DDR_RPU
XDP_TRST# R502@ 1
2
51_0402_5%
XDP_TCK
R505@ 1
2
51_0402_5%
DRAM_PWROK
DRAM_RST#
R500
2
XDP_TCK
SMPWROK AB4
AK8
Reserve PM_SLP_S4# to turn on DRAM_PWROK
R504
1K_0402_1%
C953
0.1U_0402_16V4Z
AB11
AB13
RSVD_TP
RSVD_TP
AL28
AK28
AJ26
DDR_VREF
DDR_RPD
DDR_RPU
AK29
RSVD
XDP_TRST#
<7>
@R878
@
R878
1
1K_0402_1%
0_0402_5%
<7>
2
0_0402_5%
<10> DRAMRST#
XDP_TDI
XDP_TDI
<7>
+1.05VS
XDP Reserve
+1.5V
DDR_A
# MP Remove XDP resistor for ESD

DDR_RPU
R497
1
+5VALW
C952
0.01U_0402_16V7K
+1.5V
80.6_0402_1%
R503
DDR_RPD
80.6_0402_1%
1
A
C203
68P_0402_50V8J
2
C204
0.1U_0402_16V4Z 68P_0402_50V8J
2
2
C1050
C1065
0.1U_0402_16V4Z
2 OF 6
2010/06/27
Issued Date
2010.07.12 RF request
Compal Secret Data
2011/6/27
Deciphered Date
Title
SCHEMATIC MB A6851
Date:
Rev
D
401986
Sheet

1
of
36
PINEVIEW_M
N31
P30
P29
N30
CRT_DDC_DATA
CRT_DDC_CLK
L31
L30
DAC_IREF
P28
DAC_IREF
Y30
Y29
AA30
AA31
CPU_DREFCLK
CPU_DREFCLK#
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
<15>
<15>
<16>
<16>
<16>
<16>
<16>
<16>
<16>
<16>
GMCH_CRT_R <15>
GMCH_CRT_G <15>
GMCH_CRT_B <15>
LCD_TXCLKLCD_TXCLK+
LCD_TXOUT0LCD_TXOUT0+
R509
L_IBG
2.37K_0402_1%
R510 be placed <500 mils to U1.P28
REFCLKINP
REFCLKINN
REFSSCLKINP
REFSSCLKINN
GMCH_CRT_DATA <15>
GMCH_CRT_CLK <15>
R510
665_0402_1%
R509 be placed U1.R22
CPU_DREFCLK <9>
CPU_DREFCLK# <9>
CPU_SSCDREFCLK <9>
CPU_SSCDREFCLK# <9>
RSVD
PM_EXTTS#_1/DPRSLPVR
PM_EXTTS#_0
PWROK
RSTIN#
<16> LCD_EDID_CLK
<16> LCD_EDID_DATA
<16> GMCH_ENVDD
+3VS
0_0402_5%
R512
PM_DPRSLPVR <13>
PM_EXTTS#0 <10>
PCH_POK <13>
PLTRST# <13,17,22>
T26
T27
T28
T29
AA7
AA6
R5
R6
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
T31
T33
T35
T37
AA21
W21
T21
V21
RSVD_TP
RSVD_TP
RSVD_TP
RSVD_TP
T43
T47
T46
T45
To be placed <250 mils to U1 ball

GMCH_CRT_R
Close to CPU
R514
2
150_0402_1%
1 R515
2
150_0402_1%
1 R516
2
150_0402_1%
R517
100K_0402_5%
GMCH_CRT_G
GMCH_CRT_B
ENBKL
LIBG
LVBG
LVREFH
LVREFL
LBKLT_EN
LBKLT_CTL
LCTLA_CLK
LCTLB_DATA
LDDC_CLK
LDDC_DATA
LVDD_EN
E7
H7
H6
F10
F11
E5
F8
H_SMI#
H_A20M#
H_FERR#
H_INTR
H_NMI
H_IGNNE#
H_STPCLK#
DPRSTP#
DPSLP#
INIT#
PRDY#
PREQ#
G6
G10
G8
E11
F15
H_DPRSTP#
H_DPSLP#
H_INIT#
T48
XDP_PREQ#
THERMTRIP#
E13
H_THERMTRIP#
PROCHOT#
CPUPWRGOOD
C18
W1
H_PROCHOT#
H_PWRGD
GTLREF
VSS
A13
H27
H_GTLREF
H_SMI# <11>
H_A20M# <11>
H_FERR# <11>
H_INTR <11>
H_NMI
<11>
H_IGNNE# <11>
H_STPCLK# <11>
H_DPRSTP# <13>
H_DPSLP# <13>
H_INIT# <11>
XDP_PREQ# <6>
Close to CPU
H_THERMTRIP# <11>
Close to CPU
68_0402_5%
+1.05VS
R511
H_PWRGD <13>
Close to Processor pin
CLK_CPU_HPLCLK# <9>
CLK_CPU_HPLCLK <9>
MISC
CLK_CPU_HPLCLK#
CLK_CPU_HPLCLK
W8
W9
R22
J28
N22
N23
L27
L26
L23
K25
K23
K24
H26
SMI#
A20M#
FERR#
LINT0
LINT1
IGNNE#
STPCLK#
R513
10K_0402_5%
PM_EXTTS#0
HPL_CLKINN
HPL_CLKINP
LA_CLKN
LA_CLKP
LA_DATAN_0
LA_DATAP_0
LA_DATAN_1
LA_DATAP_1
LA_DATAN_2
LA_DATAP_2
PM_EXTTS#1
PM_EXTTS#0
PCH_POK
PLTRST#
K29
J30
L5
AA3
ENBKL
<24>
ENBKL
<16> GMCH_INVT_PWM
U25
U26
R23
R24
N26
N27
R26
R27
ICH
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
GMCH_CRT_HSYNC
GMCH_CRT_VSYNC
T30
T32
T34
T36
G11
E15
G13
F13
BPM_1_0#
BPM_1_1#
BPM_1_2#
BPM_1_3#
B18
B20
C20
B21
BPM_2_0#/RSVD
BPM_2_1#/RSVD
BPM_2_2#/RSVD
BPM_2_3#/RSVD
G5
D14
D13
B14
C14
C16
RSVD
TDI
TDO
TCK
TMS
TRST#
D30
E30
THRMDA_1
THRMDC_1
C30
D31
THRMDA_2/RSVD
THRMDC_2/RSVD
RSVD
RSVD
L6
E17
BCLKN
BCLKP
H10
J10
BSEL_0
BSEL_1
BSEL_2
K5
H5
K6
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2
VID_0
VID_1
VID_2
VID_3
VID_4
VID_5
VID_6
H30
H29
H28
G30
G29
F29
E29
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
RSVD
RSVD
RSVD
RSVD
L7
D20
H13
D18
RSVD_TP
RSVD_TP
EXTBGREF
K9
D19
K7
CPU
M30
M29
LVDS
CRT_HSYNC
CRT_VSYNC
L11
T25
REV = 1.1
REV = 1.1
XDP_RSVD_00
XDP_RSVD_01
XDP_RSVD_02
XDP_RSVD_03
XDP_RSVD_04
XDP_RSVD_05
XDP_RSVD_06
XDP_RSVD_07
XDP_RSVD_08
XDP_RSVD_09
XDP_RSVD_10
XDP_RSVD_11
XDP_RSVD_12
XDP_RSVD_13
XDP_RSVD_14
XDP_RSVD_15
XDP_RSVD_16
XDP_RSVD_17
VGA
PINEVIEW_M
U1D
U1C
D12
T8
A7
T18
D6
T9
C5
T10
C7
T19
C6
T11
D8
T20
B7
T12
A9
T13
XDP_RSVD_9 D9
C8
T14
B8
T15
C10
T44
D10
T17
B11
T21
B10
T22
B12
T23
C11
T24
Close to CPU
<6>
<6>
<6>
<6>
<6>
To be placed <500 mils to U1 ball
T38
XDP_TDI
XDP_TDO
XDP_TCK
XDP_TMS
XDP_TRST#
XDP_TDI
XDP_TDO
XDP_TCK
XDP_TMS
XDP_TRST#
H_THERMDA
H_THERMDC
RF@C205
RF@C205
LCD_EDID_CLK 1
2
CLK_CPU_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK# <9>
CLK_CPU_BCLK <9>
CPU_BSEL0 <9>
CPU_BSEL1 <9>
CPU_BSEL2 <9>
CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6
<35>
<35>
<35>
<35>
<35>
<35>
<35>
T39
T40
H_EXTBGREF
12P_0402_50V8J
RF@C206
RF@
C206
LCD_EDID_DATA 1
2
XDP_RSVD_9
12P_0402_50V8J
3 OF 6
4 OF 6
R518
1K_0402_5%
# PVT C205, C206 change to
12p and stuff for RF
0.1U_0402_16V4Z
+3VS
CPU THERMAL SENSOR
1
C961
H_THERMDA
+3VS
R524
C954 1
@2 220P_0402_50V7K
H_DPSLP#
C955 1
@2 220P_0402_50V7K
H_PWRGD
C956 1
@2 220P_0402_50V7K
H_A20M#
C957 1
@2 220P_0402_50V7K
H_IGNNE#
C958 1
@2 220P_0402_50V7K
H_INIT#
C959 1
2 220P_0402_50V7K
H_INTR
C960 1
2 220P_0402_50V7K
H_FERR#
C962 1
@2 220P_0402_50V7K
H_NMI
C965 1
@2 220P_0402_50V7K
H_SMI#
C966 1
@2 220P_0402_50V7K
H_STPCLK#
C967 1
@2 220P_0402_50V7K
U2
C968
1
2
H_DPRSTP#
H_THERMDC
2200P_0402_50V7K
CPU_THERM#
SMCLK
EC_SMB_CK2
DP
SMDATA
EC_SMB_DA2
DN
ALERT#
THERM#
GND
VDD
2
@ R523
EC_SMB_CK2 <24>
EC_SMB_DA2 <24>
1
+3VS
10K_0402_5%
# PVT
2010/06/27
Issued Date
EMC1402-1-ACZL-TR_MSOP8
Address:0100_1100 EMC1402-1
Address:0100_1101 EMC1402-2
+1.05VS
R519
1K_0402_1%
H_EXTBGREF
2
@
220P_0402_50V7K
R521
2K_0402_1%
C964
1U_0402_6.3V6K
R522
3.3K_0402_1%
2
A
ESD request
C959, C960 stuff for ESD
Deciphered Date

2011/6/27
Title
Size
B
4
R520
976_0402_1%
H_GTLREF
C963
Date:
placed within 0.5" of processor

pin and 5 mils spacing
+1.05VS
Compal Secret Data
2
10K_0402_5%
placed within 0.5"

of processor pin.
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
1
of
36
+1.05VS
+1.5V
+VCCCK_DDR
22U_0805_6.3V6M
R530
0_0603_5%
2270mA
1
C992
C993
+VCCCK_DDR AK7
AL7
1U_0402_6.3V6K
+VCCA_VCCD
1880mA
Please closed U1 ball
U10
U5
U6
U7
U8
U9
V2
V3
V4
W10
W11
AA10
AA11
VCCCK_DDR
VCCCK_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
VCCA_DDR
C978
1
+
C984
330U_D2_2.5VY_R9M
C985
1 R528
330U_D2_2.5VY_R9M
+RING_WEST
0_0603_5%
2
+CPU_CORE
1 R529
+LGI_VID
2
@
0_0603_5%
C987
+
2
1U_0402_6.3V6K
2 x 330uF(9mohm/2)
1
1 R531
+VCC_DMI
0_0603_5%
R532
100_0402_5%
VCCSENSE
VSSSENSE
VCCA
VCCACK_DDR
VCCACK_DDR
C29
B29
Y2
VCCSENSE
VSSSENSE
+1.05VS
420mA
VCCP
VCCP
VCCSENSE <35>
VSSSENSE <35>
1
D4
B4
B3
VCCD_AB_DPL
+1.8VS
+1.5VS
80mA
R533
C996
0.01U_0402_16V7K
C999
0.1U_0402_10V6K
+VCCSFR_AB_DPL
1
C997
1U_0402_6.3V6K
@
2
1 R534
2
0_0603_5%
100_0402_5%
C998
1U_0402_6.3V6K
2
2
Please closed U1.Y2
Please closed U1.D4

V11
+VCCSFR_AB_DPL
+VCCA_VCCD
1
2
C159 22P_0402_50V8J
VCCD_HMPLL
RF@
1 R535
2
0_0603_5%
+VCC_CRT_DAC
1
AC31
VCCSFR_AB_DPL
VCCALVDS
VCCDLVDS
154mA
VCCACRTDAC
+3VS
5mA
+RING_EAST
+RING_WEST
305mA
+LGI_VID
VCC_GIO
VCCRING_EAST
VCCRING_WEST
VCCRING_WEST
VCCRING_WEST
VCC_LGI
C1000
1U_0402_6.3V6K
60mA
+VCCCK_DDR
VCCA_DMI
VCCA_DMI
VCCA_DMI
RSVD
VCCSFR_DMIHMPLL
VCCP
T1
T2
T3
P2
AA1
+0.89VS
480mA
C1001
1U_0402_6.3V6K
1
2
C153 22P_0402_50V8J
T41
RF@
104mA
E2
+DMI_HMPLL
1 R536
2
0_0603_5%
1
+VCC_DMI
+DMI_HMPLL
1
2
C150 22P_0402_50V8J
RF@
DMI
T31
J31
C3
B2
C2
A21
+VCC_ALVD
+VCC_DLVD
LVDS
T30
EXP\CRT\PLL
+VCC_CRT_DAC
V30
W31
1 R537
2
0_0603_5%
+1.05VS
+VCC_ALVD
C1002
22U_0805_6.3V6M
5 OF 6
1
2
C156 22P_0402_50V8J
RF@
+0.89VS
REV = 1.1
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
RSVD_NCTF
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
RSVD_NCTF
RSVD_NCTF
VSS
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
RSVD_NCTF
VSS
RSVD_NCTF
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F24
F28
F4
G15
G17
G22
G27
G31
H11
H15
H2
H21
H25
H8
J11
J13
J15
J4
K11
K13
K19
K26
K27
K28
K30
K4
K8
L1
L13
L18
L22
L24
L25
L29
M28
M3
N1
N13
N18
N24
N25
N28
N4
N5
N8
P13
P14
P16
P18
P19
P21
P3
P4
R25
R7
R8
T11
U22
U23
U24
U27
V14
V16
V18
V28
V29
W13
W2
W23
W25
W26
W28
W30
W4
W5
W6
W7
Y28
Y3
Y4
VSS
T29
6 OF 6
1
+CPU_CORE
PINEVIEW_M
GND
C973
1U_0402_6.3V6K
C972
4.7U_0603_6.3V6K
C971
22U_0805_6.3V6M
C970
0.1U_0402_10V6K
+CPU_CORE
+CPU_CORE
VCCP
AA19
+RING_EAST
2
0_0603_5%
R526
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
VCCSM
POWER
AK13
AK19
AK9
AL11
AL16
AL21
AL25
+1.05VS
1U_0402_6.3V6K
+VCC_SM
1U_0402_6.3V6K
C988
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
C983
1
1U_0402_6.3V6K
C982
1
@1
1U_0402_6.3V6K
C995
C981
1
22U_0603_6.3V6M
@2
C986
C980
1
1U_0402_6.3V6K
2
C994
C979
1
C977
U1F
A11
A16
A19
A29
A3
A30
A4
AA13
AA14
AA16
AA18
AA2
AA22
AA25
AA26
AA29
AA8
AB19
AB21
AB28
AB29
AB30
AC10
AC11
AC19
AC2
AC21
AC28
AC30
AD26
AD5
AE1
AE11
AE13
AE15
AE17
AE22
AE31
AF11
AF17
AF21
AF24
AF28
AG10
AG3
AH18
AH23
AH28
AH4
AH6
AH8
AJ1
AJ16
AJ31
AK1
AK2
AK23
AK30
AK31
AL13
AL19
AL2
AL23
AL29
AL3
AL30
AL9
B13
B16
B19
B22
B30
B31
B5
B9
C1
C12
C21
C22
C25
C31
D22
E1
E10
E19
E21
E25
E8
F17
F19
+VCC_SM
1
C976
DDR
0_1206_5%
1U_0402_6.3V6K
1
C975
2 1U_0402_6.3V6K
1
C974
1U_0402_6.3V6K
22U_0805_6.3V6M
R527
1
CPU
+1.5V
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
VCCGFX
GFX/MCH
T13
T14
T16
T18
T19
V13
V19
W14
W16
W18
W19
3500mA 1U_0402_6.3V6K
22U_0805_6.3V6M
C991
REV = 1.1
1380mA
A23
A25
A27
B23
B24
B25
B26
B27
C24
C26
D23
D24
D26
D28
E22
E24
E27
F21
F22
F25
G19
G21
G24
H17
H19
H22
H24
J17
J19
J21
J22
K15
K17
K21
L14
L16
L19
L21
N14
N16
N19
N21
22U_0805_6.3V6M
C990
+0.89VS
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
C989
PINEVIEW_M
+VCCA_VCCD
2
0_0805_5%
+CPU_CORE
U1E
R525
C969
0.1U_0402_10V6K
R538
1
2
0_0603_5%
+VCC_DLVD
1
C1013
C1012
C1011
C1010
C1009
C1008
C1007
1
+
2
330U_D2_2.5VY_R9M
10U_0805_10V4Z
C1004
0.1U_0402_10V6K
C1014
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
1U_0402_6.3V6K
C1005
2.2U_0603_10V6K
C1006
Close Chipset pin
Compal Secret Data
2010/06/27
Issued Date
C1003
1U_0402_6.3V6K
2011/6/27
Deciphered Date
Title
SCHEMATIC MB A6851
Custom
Date:
Rev
D
401986
Sheet

1
of
36
FSC
FSB
FSA
CLKSEL2
CLKSEL1
CLKSEL0
CPU
MHz
SRC
MHz
PCI
MHz
REF
MHz
+3VM_CK505
DOT_96 USB
MHz
MHz
R81
+3VS
266
100
33.3
14.318
96.0
48.0
133
100
33.3
14.318
96.0
48.0
200
100
33.3
14.318
96.0
48.0
CPU_SSCDREFCLK
C126
C127
C128
C129
C133
0.1U_0402_16V4Z
47P_0402_50V8J
C940
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
166
100
33.3
14.318
96.0
80 mA
1
48.0
1
@
C941
33P_0402_50V8K
@
33P_0402_50V8K
7/13 Add 33pFfor RF request
7/13 For RF request
+1.05VM_CK505
R82
1
2
FBMH1608HM601-T_0603
+1.05VS
CPU_SSCDREFCLK#
0_0603_5%
2010.03.23 Change R81 from bead to 0 ohm

250 mA
7/21 Reserve 33pFfor RF request

1
C134
C135
C136
C137
C138
+3VS
C139
C141
0.1U_0402_16V4Z
47P_0402_50V8J
333
100
33.3
14.318
96.0
48.0
100
100
33.3
14.318
96.0
48.0
10U_0805_10V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0
1
400
100
33.3
14.318
96.0
48.0
+1.5VS
Reserved
7/13 For RF request
Normal Power
Low Power
@
U4
RTM875N-397-GR
+3VM_1.5VM_R
1
2
0_0603_5%
@
R479
+1.05VM_CK505
0.1U_0402_16V4Z
R483
C943
C945
0_0603_5%
R480
CPU_BSEL0
1
2
R86
0_0402_5%
8/24 Change net name to FSB for U3.2

1
<7>
7/13 For RF request
47P_0402_50V8J
C946
1
R481
470_0402_5%
R482
2.2K_0402_5%
FSA 2
1
+1.05VM_CK505
+1.05VM_1.5VM_R
0_0603_5%
C947
+1.5VM_CK505
0.1U_0402_16V4Z
+1.05VS
@ R484
1K_0402_5%
7/13 Add 33pF to GND for RF request
<23> CLK_48M_CR
7/21 Reserve 33pF to GND for RF request
<12> CLK_PCH_48M
8/27 C303, C324, C325, C326, C327 to GND for RF request
R65
2 R92
10_0402_5% 1
2 R91
FSA
1
2
C143 22P_0402_50V8J
33_0402_5% 1
2 R93
<13> CLK_PCH_14M
+3VS
10_0402_5% 1
H_STP_CPU#
2
10K_0402_5%
+1.05VS
<13,24,35> VGATE
CLK_SMBDATA
SCL
10
CLK_SMBCLK
CLK_CPU_BCLK
VDD_PCI
CPU_0
VDD_CPU
CPU_0#
70
CLK_CPU_BCLK#
19
VDD_48
CPU_1
68
CLK_CPU_HPLCLK
27
VDD_PLL3
CPU_1#
67
CLK_CPU_HPLCLK#
66
VDD_CPU_IO
SRC_0/DOT_96
24
CPU_DREFCLK
31
VDD_PLL3_IO
SRC_0#/DOT_96#
25
CPU_DREFCLK#
62
VDD_SRC_IO
52
VDD_SRC_IO
VDD_IO
38
VDD_SRC_IO
FS_B/TEST_MODE
REF_0/FS_C/TEST_
REF_1
CPU_BSEL1
1
2
R487
0_0402_5%
R427 1
NC
+3VS
R608 1
<17> CLK_PCI_DDR
33_0402_5% 1
2
+1.05VS
8/14 Add R250 pull up for Intel request
<24> CLK_PCI_LPC
<11> CLK_PCI_PCH
R489
470_0402_5%
CPU_BSEL2
1
2
R104
0_0402_5%
2 R103
CPU_SSCDREFCLK
CPU_SSCDREFCLK#
SRC_2
32
CLK_CPU_EXP
SRC_2#
33
CLK_CPU_EXP#
SRC_3
35
SRC_3#
36
SRC_4
39
CLK_PCIE_SATA
SRC_4#
40
CLK_PCIE_SATA#
SRC_6
57
CLK_PCIE_WLAN
SRC_6#
56
CLK_PCIE_WLAN#
CPU_STOP#
54
PCI_STOP#
SRC_7
61
SRC_7#
60
XTAL_IN
XTAL_OUT
CLK_PCIE_LAN
45
CLK_PCIE_LAN#
15
PCI_3
50
16
SRC_10
CLK_PCIE_PCH
PCI4_SEL
PCI_4/SEL_LCDCL
SRC_10#
51
CLK_PCIE_PCH#
17
PCIF_5/ITP_EN
18
VSS_PCI
VSS_REF
2
22P_0402_50V8J
For PCI4_SEL, 0 = Pin24/25 : DOT96 / DOT96#

Pin28/29 : LCDCLK / LCDCLK#
1 = Pin24/25 : SRC_0 / SRC_0#
Pin28/29 : 27M/27M_SS
For PCI2_TME:0=Overclocking of CPU and SRC allowed
(ICS only)
1=Overclocking of CPU and SRC NOT allowed
0_0402_5%
22
VSS_48
CLKREQ_3#
37
26
VSS_IO
CLKREQ_4#
41
69
VSS_CPU
CLKREQ_6#
58
30
VSS_PLL3
CLKREQ_7#
65
CLKREQ_9#
43
VSS_SRC
SLKREQ_10#
49
42
VSS_SRC
73
VSS
10K_0402_5%
10K_0402_5%
10K_0402_5%
@
R115
R114
2010.03.09 Change Y1 to 5 x3.2 size
CLK_CPU_EXP# <6>
DEVICE
SRC0
SRC2
SRC3
SRC4
SRC6
SRC7
SRC8
SRC9
SRC10
SRC11
CPU_DREFCLK
CPU_EXP
PCIE_SATA
PCIE_WLAN
PCIE_LAN
PCIE_PCH
PCIE_WWAN
CLK_PCIE_SATA <11>
+3VS
CLK_PCIE_SATA# <11>
CLKREQ_11#
46
USB_1/CLKREQ_A#
21
WLAN_CLKREQ#
WWAN_CLKREQ#
LAN_CLKREQ#
CLK_PCIE_WLAN <17>
CLK_PCIE_WLAN# <17>
R99 2
R100 2
R101 2
1 10K_0402_5%
1 10K_0402_5%
1 10K_0402_5%
2
56P_0402_50V8
2
56P_0402_50V8
REQ PORT LIST
CLK_PCIE_LAN <22>
CLK_PCIE_LAN# <22>
PORT
CLK_PCIE_PCH <12>
CLK_PCIE_WWAN
CLK_PCIE_WWAN#
DEVICE
REQ_3#
REQ_4#
REQ_6# PEIC_WLAN
REQ_7#
REQ_9# PCIE_LAN
REQ_10#
REQ_11# PEIC_WWAN
REQ_A#
CLK_PCIE_PCH# <12>
<17>
<17>
WLAN_CLKREQ# <17>
LAN_CLKREQ# <22>
WWAN_CLKREQ#
WWAN_CLKREQ# <17>
A
7/21 Change WWAN_CLKREQ# from REQ4 to REQ11
Issued Date
Compal Secret Data
2010/06/27
2011/6/27
Deciphered Date
Title
Size
Date:
<7>
CLK_CPU_EXP <6>
PORT
PCI2_TME
R113
Routing the trace at least 10mil
CLK_XTAL_OUT
22P_0402_50V8J
PCI4_SEL
<7>
CPU_SSCDREFCLK#
LAN_CLKREQ#
ICS9LVRS387AKLFT MLF
ITP_EN
<7>
CPU_SSCDREFCLK
WLAN_CLKREQ#
10K_0402_5%
Y1
14.31818MHZ 20PF 7A14300003
CLK_PCIE_WWAN#
VSS_SRC
R112
C148
CLK_PCIE_WWAN
59
CLK_XTAL_IN
22P_0402_50V8J
48
47
34
C147
SRC_11
SRC_11#
+3VS
7/22 Add R242 to R253 for Intel request
CLK_SMBCLK
44
ITP_EN
2N7002DW-T/R7_SOT363-6
SRC_9
For ITP_EN, 0 =SRC8/SRC8#; 1 = ITP/ITP#
@ R491
64
63
SRC_9#
2 R108
CLK_PCI_DDR_R 13
SRC_8/CPU_ITP
SRC_8#/CPU_ITP#
PCI_2
1
C146
<7>
<7>
CPU_DREFCLK#
1
@ C1067
CLK_PCIE_PCH#
1
@ C1066
PCI_1
33_0402_5% 1
CPU_DREFCLK
CLK_PCIE_PCH
14
2 R107
CLK_CPU_HPLCLK#
29
PCI2_TME
1
2
C145 22P_0402_50V8J
33_0402_5% 1
7/13 Add 33pF to GND for RF request
<7>
53
H_STP_PCI#_R
CLK_XTAL_OUT
1
2
C144 22P_0402_50V8J
2 H_STP_PCI#_R
10K_0402_5%
0_0402_5%
FSC
H_STP_CPU#
CLK_XTAL_IN
@ R488
R490
10K_0402_5%
2
1
2 @ 0_0402_5%
CLK_CPU_HPLCLK <7>
28
<7>
<13> H_STP_PCI#
CLK_SMBDATA
CKPWRGD/PD#
11
<13> H_STP_CPU#
FSB
R486
1K_0402_5%
2
1
CLK_CPU_BCLK# <7>
LCDCLK/27M
1
R485
470_0402_5%
SRC PORT LIST
CLK_CPU_BCLK <7>
LCDCLK#/27M_SS
USB_0/FS_A
Q1B
CLK_SMBCLK <10,17>
72
23
<13> PCH_SMBCLK
CLK_SMBDATA <10,17>
71
FSC
7/22 Add R241 pull up to +3VS for RF Intel request
SDA
12
FSB
VGATE
7/13 Add 22pF to gnd and close to U3 for RF request
VDD_REF
20
1
2
C868 22P_0402_50V8J
7/21 Delete C296, C297 for RF request
VDD_SRC
0_0603_5%
U4
55
C944
7/21 Reserve 22pF to gnd and close to U3 for RF request
R478
0.1U_0402_16V4Z
@
+1.5VM_CK505
2.2K_0402_5%
+3VS
Low power CLK Gen.
Stuff
@
@
Stuff
Stuff
2.2K_0402_5%
<13> PCH_SMBDATA
+3VM_CK505
0.1U_0402_16V4Z
@
Stuff
Stuff
@
@
R84
Q1A
2N7002DW-T/R7_SOT363-6
SA00003H610 (ICS :CS9LVRS387AKLFT MLF)
+3VM_CK505
R477
R478
R479
R480
R483
R83
0_0603_5%
@
C942
1
1
8/27 Delete C93, C94, C95, C102 for low power CLK GEN
10U_0805_10V4Z
0.1U_0402_16V4Z
2010.03.23 Change R477 from bead to 0 ohm

+1.5VM_CK505
R477
7/13 For RF request
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
1
of
36
+DIMM_VREF
+1.5V
+1.5V
3A@1.5V
<6> DDR_A_DQS#[0..7]
<6> DDR_A_D[0..63]
JDDR1
+1.5V
+DIMM_VREF
<6> DDR_A_DM[0..7]
DDR_A_D0
DDR_A_D1
1
R74
+1.5V
C116
2.2U_0603_6.3V6K
C103
2.2U_0603_6.3V6K
C102
2.2U_0603_6.3V6K
C101
2.2U_0603_6.3V6K
C100
2.2U_0603_6.3V6K
R879
1
2
0_0402_5%
DDR_A_D10
DDR_A_D11
DDR_A_D16
DDR_A_D17
DDR_A_DQS#2
DDR_A_DQS2
+DIMM_VREF
CZ04
0.1U_0402_16V4Z
CZ03
0.1U_0402_16V4Z
C110
0.1U_0402_16V4Z
C109
0.1U_0402_16V4Z
C108
0.1U_0402_16V4Z
C104
DDR_A_D18
DDR_A_D19
20mils
C105
DDR_A_D24
DDR_A_D25
2.2U_0603_6.3V6K
DDR_A_DM3
DDR_A_D26
DDR_A_D27
0.1U_0402_16V4Z
73
75
77
79
81
83
85
87
89
91
93
95
97
99
101
103
105
107
109
111
113
115
117
119
121
123
125
127
129
131
133
135
137
139
141
143
145
147
149
151
153
155
157
159
161
163
165
167
169
171
173
175
177
179
181
183
185
187
189
191
193
195
197
199
201
203
CKE0
VDD1
NC1
BA2
VDD3
A12/BC#
A9
VDD5
A8
A5
VDD7
A3
A1
VDD9
CK0
CK0#
VDD11
A10/AP
BA0
VDD13
WE#
CAS#
VDD15
A13
S1#
VDD17
NCTEST
VSS27
DQ32
DQ33
VSS29
DQS#4
DQS4
VSS32
DQ34
DQ35
VSS34
DQ40
DQ41
VSS36
DM5
VSS37
DQ42
DQ43
VSS39
DQ48
DQ49
VSS41
DQS#6
DQS6
VSS44
DQ50
DQ51
VSS46
DQ56
DQ57
VSS48
DM7
VSS49
DQ58
DQ59
VSS51
SA0
VDDSPD
SA1
VTT1
205
G1
VSS1
DQ4
DQ5
VSS3
DQS#0
DQS0
VSS6
DQ6
DQ7
VSS8
DQ12
DQ13
VSS10
DM1
RESET#
VSS12
DQ14
DQ15
VSS14
DQ20
DQ21
VSS16
DM2
VSS17
DQ22
DQ23
VSS19
DQ28
DQ29
VSS21
DQS#3
DQS3
VSS24
DQ30
DQ31
VSS26
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
DDR_A_D4
DDR_A_D5
DDR_A_DQS#0
DDR_A_DQS0
DDR_A_D6
DDR_A_D7
D
DDR_A_D12
DDR_A_D13
DDR_A_DM1
DRAMRST#
DRAMRST# <6>
DDR_A_D14
DDR_A_D15
DDR_A_D20
DDR_A_D21
DDR_A_DM2
DDR_A_D22
DDR_A_D23
DDR_A_D28
DDR_A_D29
DDR_A_DQS#3
DDR_A_DQS3
DDR_A_D30
DDR_A_D31
+1.5V
<6> DDR_CKE0
DDR_CKE0
<6> DDR_A_BS2
DDR_A_BS2
R76
DDR_A_MA12
DDR_A_MA9
+V_DDR_CPU_REF
DDR_A_MA8
DDR_A_MA5
DDR_A_MA3
DDR_A_MA1
1K_0402_1%
R77
Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.75VS
1K_0402_1%
C118
0.1U_0402_16V4Z
2010.03.27 Add CZ03,CZ04 for ESD
C114
0.1U_0402_16V4Z
C113
0.1U_0402_16V4Z
C112
0.1U_0402_16V4Z
C111
0.1U_0402_16V4Z
+0.75VS
<6> M_CLK_DDR0
<6> M_CLK_DDR#0
M_CLK_DDR0
M_CLK_DDR#0
<6> DDR_A_BS0
DDR_A_MA10
DDR_A_BS0
<6> DDR_A_WE#
<6> DDR_A_CAS#
DDR_A_WE#
DDR_A_CAS#
<6> DDR_CS1#
DDR_A_MA13
DDR_CS1_DIMMA#
DDR_A_D32
DDR_A_D33
DDR_A_DQS#4
DDR_A_DQS4
DDR_A_D34
DDR_A_D35
DDR_A_D40
DDR_A_D41
DDR_A_DM5
DDR_A_D42
DDR_A_D43
DDR_A_D48
DDR_A_D49
DDR_A_DQS#6
DDR_A_DQS6
DDR_A_D50
DDR_A_D51
DDR_A_D56
DDR_A_D57
DDR_A_DM7
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204
G2
206
DDR_CKE1
2010/06/27
DDR_CKE1 <6>
DDR_A_MA14
C
DDR_A_MA11
DDR_A_MA7
DDR_A_MA6
DDR_A_MA4
DDR_A_MA2
DDR_A_MA0
M_CLK_DDR1
M_CLK_DDR#1
M_CLK_DDR1 <6>
M_CLK_DDR#1 <6>
DDR_A_BS1
DDR_A_RAS#
DDR_A_BS1 <6>
DDR_A_RAS# <6>
DDR_CS0_DIMMA#
M_ODT0
DDR_CS0# <6>
M_ODT0 <6>
M_ODT1
+VREF_CA
1
R877
1
DDR_A_DM4
2 @
DDR_A_D38
DDR_A_D39
2
0_0402_5%
DDR_A_DQS#5
DDR_A_DQS5
DDR_A_D46
DDR_A_D47
DDR_A_D52
DDR_A_D53
DDR_A_DM6
DDR_A_D54
DDR_A_D55
DDR_A_D60
DDR_A_D61
DDR_A_DQS#7
DDR_A_DQS7
DDR_A_D62
DDR_A_D63
PM_EXTTS#0
CLK_SMBDATA
CLK_SMBCLK
PM_EXTTS#0 <7>
CLK_SMBDATA <9,17>
CLK_SMBCLK <9,17>
+0.75VS
0.65A@0.75V
FOX_AS0A621-U4SG-7H
+0.75VS

2011/6/27
Deciphered Date
Title
Date:
DDR_A_D44
DDR_A_D45
Custom
5
+V_DDR_CPU_REF
M_ODT1 <6>+VREF_CA
DDR_A_D36
DDR_A_D37
Compal Secret Data
Issued Date
2 @
A
R208
10K_0402_5%
C220
0.1U_0402_16V4Z
+3VS
C219
2.2U_0402_6.3V6M
DDR_A_D58
DDR_A_D59
1 R207
2
10K_0402_5%
CKE1
VDD2
A15
A14
VDD4
A11
A7
VDD6
A6
A4
VDD8
A2
A0
VDD10
CK1
CK1#
VDD12
BA1
RAS#
VDD14
S0#
ODT0
VDD16
ODT1
NC2
VDD18
VREF_CA
VSS28
DQ36
DQ37
VSS30
DM4
VSS31
DQ38
DQ39
VSS33
DQ44
DQ45
VSS35
DQS#5
DQS5
VSS38
DQ46
DQ47
VSS40
DQ52
DQ53
VSS42
DM6
VSS43
DQ54
DQ55
VSS45
DQ60
DQ61
VSS47
DQS#7
DQS7
VSS50
DQ62
DQ63
VSS52
EVENT#
SDA
SCL
VTT2
C214
2.2U_0402_6.3V6M
C215
0.1U_0402_16V4Z
C106
C107
0.1U_0402_16V4Z
220U_B2_2.5VM_R35
C115
+
+DIMM_VREF
DDR_A_DQS#1
DDR_A_DQS1
0.1U_0402_16V4Z
DDR_A_D8
DDR_A_D9
VREF_DQ
VSS2
DQ0
DQ1
VSS4
DM0
VSS5
DQ2
DQ3
VSS7
DQ8
DQ9
VSS9
DQS#1
DQS1
VSS11
DQ10
DQ11
VSS13
DQ16
DQ17
VSS15
DQS#2
DQS2
VSS18
DQ18
DQ19
VSS20
DQ24
DQ25
VSS22
DM3
VSS23
DQ26
DQ27
VSS25
C213
0.1U_0402_16V4Z
C99
2.2U_0603_6.3V6K
R75
DDR_A_D2
DDR_A_D3
1K_0402_1%
DDR_A_DM0
1K_0402_1%
C117
<6> DDR_A_MA[0..14]
0.1U_0402_16V4Z
Layout Note:
Place near JDDR1
<6> DDR_A_DQS[0..7]
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
SCHEMATIC MB A6851
Rev
D
401986
Sheet
1
10
of
36
+3VS
U15A
PCI_DEVSEL#
CLK_PCI_PCH
PCI_RST#
<9> CLK_PCI_PCH
<24> PCI_RST#
PCI_IRDY#
100K_0402_5%
2
1
+3VS
RP7
1
2
3
4
PCI_PIRQB#
PCI_PIRQF#
PCI_PIRQC#
PCI_PIRQA#
8
7
6
5
8.2K_0804_8P4R_5%
PCI_SERR#
PCI_STOP#
PCI_PLOCK#
PCI_TRDY#
PCI_PERR#
PCI_FRAME#
R541
For EC request.
+3VS
RP8
1
2
3
4
PCI_PIRQE#
PCI_PLOCK#
PCI_PIRQG#
PCI_IRDY#
8
7
6
5
A18
E16
GNT1#
GNT2#
REQ1#
REQ2#
G16
A20
REQ1#
REQ2#
GPIO22
GPIO1
G14
A2
C15
C9
GPIO48/STRAP1#
GPIO17/STRAP2#
GPIO22
GPIO1
B2
D7
B3
H10
E8
D6
H8
F8
PIRQA#
PIRQB#
PIRQC#
PIRQD#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
D11
K9
M13
STRAP0#
RSVD01
RSVD02
PCI
8.2K_0804_8P4R_5%
+3VS
RP16
R543
10K_0402_5%
@
8.2K_0804_8P4R_5%
RP10
1
2
3
4
GPIO22
PCI_DEVSEL#
PCI_PIRQD#
PCI_PIRQH#
8
7
6
5
R544
10K_0402_5%
PCI_PIRQA#
@
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#
8.2K_0804_8P4R_5%
RSVD01
RSVD02
+3VS
RP11
REQ2#
REQ1#
PCI_STOP#
PCI_FRAME#
8
7
6
5
C/BE0#
C/BE1#
C/BE2#
C/BE3#
H16
M15
C13
L16
PCI_RST#
D
CLK_PCI_PCH
R542
@ 10_0402_5%
@
C1016
8.2P_0402_50V8D
For EMI, close to TigerPoint
R545
1K_0402_5%
+1.05VS
TIGERPOINT_ES1_BGA360
U15C
1
2
3
4
B22
D18
C17
C18
B17
C19
B18
B19
D16
D15
A13
E14
H14
L14
J14
E10
C11
E12
B9
B13
L12
B8
A3
B5
A6
G12
H12
C8
D9
C7
C1
B1
8.2K_0804_8P4R_5%
+3VS
R551
R12
AE20
AD17
AC15
AD18
Y12
AA10
AA12
Y10
AD15
W10
V12
AE21
AE18
AD19
U12
RSVD03
RSVD04
RSVD05
RSVD06
RSVD07
RSVD08
RSVD09
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
AC17
AB13
AC13
AB15
Y14
RSVD19
RSVD20
RSVD21
RSVD22
RSVD23
AB16
AE24
AE23
RSVD24
RSVD25
RSVD26
AA14
V14
RSVD27
RSVD28
AD16
AB11
AB10
RSVD29
RSVD30
RSVD31
AD23
GPIO36
TGP
SATA0RXN
SATA0RXP
SATA0TXN
SATA0TXP
SATA1RXN
SATA1RXP
SATA1TXN
SATA1TXP
AE6
AD6
AC7
AD7
AE8
AD8
AD9
AC9
SATA_CLKN
SATA_CLKP
AD4
AC4
R546
56_0402_5%
SATA_IRX_C_DTX_N0 <19>
SATA_IRX_C_DTX_P0 <19>
SATA_ITX_DRX_N0 <19>
SATA_ITX_DRX_P0 <19>
T63
T64
T65
T66
PAD
PAD
PAD
PAD
H_FERR#
R111 closed TigerPoint within 1"
SATA
+3VS
PCI_SERR#
PCI_PERR#
PCI_TRDY#
GPIO1
8
7
6
5
SATARBIAS#
SATARBIAS
SATALED#
CLK_PCIE_SATA# <9>
CLK_PCIE_SATA <9>
AD11 SATARBIAS
AC11
AD25
Please closed Tiger point

PIN within 500 mils
+3VS
R547 24.9_0402_1%
R548
SATALED# <26>
SATALED#
10K_0402_5%
R549
GATEA20
HOST
1
2
3
4
AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
RSVD02
PAR
DEVSEL#
PCICLK
PCIRST#
IRDY#
PME#
SERR#
STOP#
PLOCK#
TRDY#
PERR#
FRAME#
C1015
0.1U_0402_16V4Z
2 8.2K_0402_5%
A5
B15
J12
A23
B7
C22
B11
F14
A8
A10
D10
A16
R540 1
TGP
RSVD01
8.2K_0402_5%
A20GATE
A20M#
CPUSLP#
IGNNE#
INIT3_3V#
INIT#
INTR
FERR#
NMI
RCIN#
SERIRQ
SMI#
STPCLK#
THRMTRIP#
U16
Y20
Y21
Y18
AD21
AC25
AB24
Y22
T17
AC21
AA16
AA21
V18
AA20
GATEA20
H_A20M#
H_IGNNE#
H_INIT#
H_INTR
H_FERR#
H_NMI
EC_KBRST#
SERIRQ
H_SMI#
H_STPCLK#
GATEA20 <24>
H_A20M# <7>
SERIRQ
10K_0402_5%
R550
2
8.2K_0402_5%
H_IGNNE# <7>
+1.05VS
H_INIT# <7>
H_INTR <7>
H_FERR# <7>
H_NMI
<7>
EC_KBRST# <24>
SERIRQ <24>
H_SMI# <7>
H_STPCLK# <7>
2 8.2K_0402_5%
R552
56_0402_5%
R110 to be within 1" from the Tiger

Point chipset.
R539 1
H_THERMTRIP# <7>
3
A
A
Compal Secret Data
2010/06/27
Issued Date
Deciphered Date
2011/6/27
Title
Size
Date:
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
1
11
of
36
USB PORT LIST
PAD T59
PAD T60
PAD T61
PAD T62
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P2
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_PRX_N3
PCIE_ITX_PRX_P3
PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4
PCIE_ITX_PRX_N4
PCIE_ITX_PRX_P4
K21
K22
J23
J24
M18
M19
K24
K25
L23
L24
L22
M21
P17
P18
N25
N24
PERN1
PERP1
PETN1
PETP1
PERN2
PERP2
PETN2
PETP2
PERN3
PERP3
PETN3
PETP3
PERN4
PERP4
PETN4
PETP4
PAD
PAD
PAD
PAD
WLAN+BT Combo
LAN
WWLAN
<17>
<17>
<17>
<17>
<22>
<22>
<22>
<22>
<17>
<17>
<17>
<17>
PCIE_PTX_C_IRX_N2
PCIE_PTX_C_IRX_P2
PCIE_ITX_C_PRX_N2
PCIE_ITX_C_PRX_P2
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P3
PCIE_ITX_C_PRX_N3
PCIE_ITX_C_PRX_P3
PCIE_PTX_C_IRX_N4
PCIE_PTX_C_IRX_P4
PCIE_ITX_C_PRX_N4
PCIE_ITX_C_PRX_P4
C1017 2
C1018 2
1 0.1U_0402_10V6K
1 0.1U_0402_10V6K
C1019 2
C1020 2
1 0.1U_0402_10V6K
1 0.1U_0402_10V6K
C1021 2
C1022 2
1@ 0.1U_0402_10V6K
1@ 0.1U_0402_10V6K
T51
T52
T53
T54
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
H7
H6
H3
H2
J2
J3
K6
K5
K1
K2
L2
L3
M6
M5
N1
N2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
OC0#
OC1#
OC2#
OC3#
OC4#
OC5#/GPIO29
OC6#/GPIO30
OC7#/GPIO31
D4
C5
D3
D2
E5
E6
C2
C3
USB_OC#0_1_PCH
USB_OC#0_1_PCH
USB_OC#2
USB_OC#3
USB_OC#4_PCH
SLP_CHG_M3_PCH
SLP_CHG_M4_PCH
USB_OC#7
USBRBIAS
USBRBIAS#
G2
G3
USB
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
PCI-E
PAD T57
PAD T58
R23
R24
P21
P20
T21
T20
T24
T25
T19
T18
U23
U24
V21
V20
V24
V23
DMI_TXN0
DMI_TXP0
DMI_RXN0
DMI_RXP0
DMI_TXN1
DMI_TXP1
DMI_RXN1
DMI_RXP1
DMI
<6>
<6>
<6>
<6>
<6>
<6>
<6>
<6>
12P_0402_50V8J
USB20_N4
USB20_P4
USB20_N5_L
USB20_P5_L
USB20_N6
USB20_P6
USB20_N7
USB20_P7
<9> CLK_PCIE_PCH#
<9> CLK_PCIE_PCH
USB20_N3
USB20_P3
USB20_N4
USB20_P4
<23>
<23>
<18>
<18>
Card-reader
USB20_N6
USB20_P6
USB20_N7
USB20_P7
<17>
<17>
<16>
<16>
USB3(Left)
WWAN
WLAN + BT (Combo)
CMOS
#6/27 EVT
USB_OC#0_1_PCH <18>
#DVT USB_OC# control by EC PCH reserve

USB_OC#4_PCH <18>
SLP_CHG_M3_PCH <18>
SLP_CHG_M4_PCH <18>
+3VALW
RP12
USB_OC#0_1_PCH 4
SLP_CHG_M4_PCH 3
USB_OC#7
2
1
10K_0804_8P4R_5%
R553
22.6_0402_1%
CLK_PCH_48M
F4

PIN within 200 mils
5
6
7
8
RP13
USB_OC#3
4
USB_OC#2
3
USB_OC#4_PCH
2
SLP_CHG_M3_PCH 1
10K_0804_8P4R_5%
CLK_PCH_48M <9>
5
6
7
8
33_0402_5%
@
R554
# DVT For RF need stuff
R555 24.9_0402_1%
1
2
USB1(Right)
USB2(Right)
#EVT 6/27 support sleep charge function
+1.5VS
12P_0402_50V8J
<18>
<18>
<18>
<18>
T49 PAD
T50 PAD

PIN within 500 mils
@ C226
PCIE_ITX_PRX_P21
2
USB20_N0
USB20_P0
USB20_N1
USB20_P1
CLK48
@ C225
PCIE_ITX_PRX_N21
2
PORT #EVT DEVICE

USB0
USB1(Left)
USB1
USB2(Left)
USB2
NC
USB3
Card-reader
USB4
USB3(Right)
USB5
WWAN
USB6
WLAN + BT
USB7
CMOS
TGP
U15B
H24
J22
DMI_ZCOMP
DMI_IRCOMP
W23
W24
DMI_CLKN
DMI_CLKP
@
C1023
22P_0402_50V8J
2
For EMI, Close to TigerPoint
USB20_N5_L
1
R3
RF@ L2
1 1
2
0_0402_5%
2
USB20_N5
USB20_P5
USB20_N5 <17>
USB20_P5_L
USB20_P5 <17>
WCM-2012-900T_0805
1
2
R4
0_0402_5%
# PVT C225, C226 add

12p to GND for RF
2010/06/27
Issued Date
Compal Secret Data
2011/6/27
Deciphered Date
Title
SCHEMATIC MB A6851
Date:
Rev
D
401986
Sheet

1
12
of
36
+3VALW
2.2K_0402_5% 1
R560
PCH_SMBCLK
2.2K_0402_5% 1
R561
PCH_SMBDATA
7/2 For EMI, Close to TigerPoint

9/1 C207 change to SE071100J80 for EMI request
+3VALW
HDA_BITCLK
1
+3VALW
D
PM_CLKRUN# 1
R598
SYS_RST#
C1024
10P_0402_50V8J
EC_SWI#
10K_0402_5% 2
R565 1
SLP_CHG#
9/1 R125 change to SM010027780 for EMI request
AA5
V6
AA6
Y5
W8
Y8
Y4
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
<24> LPC_FRAME#
C1025
18P_0402_50V8J
2
1
Y2
32.768KHZ_12.5PF_Q13MC14610002
RP15
8 GPIO15
7PCH_LOW_BAT#
6 GPIO12
5 EC_LID_OUT#
J1
@
1 1
+RTCVCC
INTRUDER#
INTVRMEN
OSC
NC
OSC
RF@
C1026
10P_0402_50V8J
RTCX2
RTCRST#
<9> PCH_SMBCLK
<9> PCH_SMBDATA
GPIO11
PCH_SMBCLK
PCH_SMBDATA
LINKALERT#
SMLINK0
SMLINK1
U3
AE2
T6
V3
EE_CS
EE_DIN
EE_DOUT
EE_SHCLK
T4
P7
B23
AA2
AD1
AC2
W3
T7
U4
LAN_CLK
LANR_RSTSYNC
LAN_RST#
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
W4
V5
T5
RTCX1
RTCX2
RTCRST#
E20
H18
E23
H21
F25
F24
SMBALERT#/GPIO11
SMBCLK
SMBDATA
LINKALERT#
SMLINK0
SMLINK1
2
R2
T1
M8
P9
R4
JUMP_43X39
C1028
1U_0402_6.3V4Z
1
2
EPROM
SPI_MISO
SPI_MOSI
SPI_CS#
SPI_CLK
SPI_ARB
CPUPWRGD/GPIO49
THRM#
VRMPWRGD
MCH_SYNC#
PWRBTN#
RI#
SUS_STAT#/LPCPD#
SUSCLK
SYS_RESET#
PLTRST#
WAKE#
INTRUDER#
PWROK
RSMRST#
INTVRMEN
SPKR
SLP_S3#
SLP_S4#
SLP_S5#
SPI
332K_0402_1%
1 R576
NC
R574 1
20K_0402_5%
+RTCVCC
R575
C1027
18P_0402_50V8J
2
1
8.2K_0804_8P4R_5%
BATLOW#
DPRSTP#
DPSLP#
RSVD31
+3VS
8.2K_0402_5%
R577
8.2K_0402_5%
@R579
8.2K_0402_5%
R580
GPIO0
8.2K_0402_5%
R581
GPIO6
EC_SMI# <24>
EC_SCI# <24>
EC_LID_OUT# <24>
SLP_CHG# <18>
PM_DPRSLPVR <7>
H_STP_PCI# <9>
H_STP_CPU# <9>
R570 1
BOARD_ID
2 1K_0402_5%
12/31 Add HW Board ID function

PM_CLKRUN#
BT_PWR# <17>
AB22
H_PWRGD
AB17
V16
AC18
E21
H23
G22
D22
G18
G23
C25
T8
U10
AC3
AD3
J16
EC_THERM#
VGATE
MCH_SYNC#
PBTN_OUT#
ICH_RI#
T42
7/20
EC_CLK
SYS_RST#
PLTRST#
EC_SWI#
INTRUDER#
PCH_POK
PCH_RSMRST#
INTVRMEN
PCH_SPKR
C1064
0.1U_0402_16V4Z
H_PWRGD <7>
H20
E25
F21
PCH_LOW_BAT#
H_DPRSTP#
H_DPSLP#
SLPIOVR
PBTN_OUT# <24>
Add test point

EC_CLK <24> 01/11 Reserve EC_CLK for KBC
PLTRST# <7,17,22>
EC_SWI# <24>
8/24 Add R254 pull down for EC request

+3VALW
PCH_SPKR <20>
H_DPRSTP# <7>
H_DPSLP# <7>
R578
330K_0402_5%
ACIN
<24,30>
D45
R585
PCH_RSMRST#
CH751H-40PT_SOD323-2
1
R583
2
10K_0402_5%
1
R584
2
10K_0402_5%
D46
<29,31>
POK
2 MCH_SYNC#
2
0_0402_5%
@
C1030
0.1U_0402_16V4Z
2
+RTCBATT
D6
R126
2
ACES_85205-0200N
CONN@
2
1K_0402_5%
3
C1029
EC_RSMRST# <24>
MMBT3906_SOT23-3
1
2
+3VALW
@ R589
4.7K_0402_5%
@D7A
@
D7A
BAV99DW-7_SOT363
2
1
@ R590
@R590
2.2K_0402_5%
RSMRST# circuit
2010.03.22 Un-stuff RSMRST# circuit and use 0 ohm bypass
2010.03.22 Un-stuff U5 and C1030
DAN202U_SC70
Issued Date
Compal Secret Data
2010/06/27
2011/6/27
Deciphered Date
Title
SCHEMATIC MB A6851
Date:
0_0402_5%
PCH_POK <7>
TC7SH08FUF_SSOP5
+RTCBATT
+3VL
1
1U_0402_6.3V6K
3
4
@ D7B
BAV99DW-7_SOT363
<9,24,35> VGATE
<24> EC_PWROK
+RTCBATT_R
+RTCVCC
JRTC
@ U5
2
1
@ Q36
PCH_RSMRST#
1
2
R588
10K_0402_5%
2
B
R587
+3VS
1
R586
1 GND
2 GND
PCH_POK
PCH_POK
1
2
EC_PWROK
D44
PCH_ACIN
9/23 Change RP17 to R256, R257, R258 for layout request
PM_CLKRUN#
R573
100K_0402_5%
EC_THERM# <24>
PM_SLP_S3# <24>
PM_SLP_S4# <6,24>
PM_SLP_S5# <24>
B25
AB23
AA18
F20
PLTRST#
2010.04.22 Add C1064 for ESD solution
7/20 Add SLPIOVR pull up 8.2k to +3vs
+3VS
1K_0402_5% 1
GPIO0
GPIO6
SLPIOVR
EC_SMI#
EC_SCI#
PCH_ACIN
GPIO12
EC_LID_OUT#
SLP_CHG#
GPIO15
T15
W16
W14
K18
H19
M17
A24
C23
P5
E24
AB20
Y16
AB19
R3
C24
D19
D20
F22
AC19
U14
AC1
AC23
AC24
@
R611
10K_0402_5%
1M_0402_5% 1
R572
10M_0402_5%
2
1
+3VALW
RTCX1
10_0402_5%
RF@
SMB
# MP C1026 4.7P change to

10p for RF request
HDA_BIT_CLK
HDA_RST#
HDA_SDIN0
HDA_SDIN1
HDA_SDIN2
HDA_SDOUT
HDA_SYNC
CLK14
RTC
R571
10K_0804_8P4R_5%
1
2
3
4
R568 2
R569 2
BITCLK_PCH P6
RST#_PCH U2
W2
V2
P8
SDOUT_PCHAA1
SYNC_PCH Y1
AA3
LAN
4 LINKALERT#
3 GPIO11
2 SMLINK0
1 SMLINK1
2
2
RP14
5
6
7
8
33_0402_5%
1
33_0402_5%
1
<20> HDA_SDOUT
<20> HDA_SYNC
<9> CLK_PCH_14M
R582
R567
BMBUSY#/GPIO0
GPIO6
GPIO7
GPIO8
GPIO9
GPIO10
GPIO12
GPIO13
GPIO14
GPIO15
DPRSLPVR
STP_PCI#
STP_CPU#
GPIO24
GPIO25
GPIO26
GPIO27
GPIO28
CLKRUN#
GPIO33
GPIO34
GPIO38
GPIO39
AUDIO
33_0402_5%
1
33_0402_5%
1
<20> HDA_BITCLK
<20> HDA_RST#
<20> HDA_SDIN0
LDRQ1#/GPIO23
LAD0/FWH0
LAD1/FWH1
LAD2/FWH2
LAD3/FWH3
LDRQ0#
LFRAME#/FWH4
LPC
<24>
<24>
<24>
<24>
12/17 Add Pull high Resistor for GPIO14

+3VALW
TGP
U15D
R564 1
BOARD_ID
10K_0402_5% 2
EVT# For EC request 7/5
ICH_RI#
@
R610
10K_0402_5%
R563
8.2K_0402_5%
R562 1
MISC
10K_0402_5% 2
2
10K_0402_5%
2
Rev
D
401986
Sheet

1
13
of
36
U15F
TGP
+3VS
TGP
+5VS
F12
+V5REF_RUN
VCC5REF_SUS
F5
+V5REF_SUS
VCCSATAPLL
Y6
+SATAPLL
VCC5REF
AA8
M9
M20
N22
POWER
+1.5VS
R594
955mA
VCC1_05_1
VCC1_05_2
VCC1_05_3
VCC1_05_4
0.1U_0402_10V6K
J10
K17
P15
V10
+VCC1_05 1
R596
216mA
C1044
1U_0402_6.3V6K
C1048
1U_0402_6.3V6K
C1047
+3VS
0_0603_5%
R599
2
5
1
10U_0805_6.3V4Z
C1051
1U_0402_6.3V6K
C1054
+VCCSUS33
92mA
1U_0402_6.3V6K
C1046
F18
N4
K7
F1
0.1U_0402_10V6K
C1045
C1043
0.1U_0402_10V6K
+VCC33
1U_0402_6.3V6K
C1053
VCCSUS3_3_1
VCCSUS3_3_2
VCCSUS3_3_3
VCCSUS3_3_4
H25
AD13
F10
G10
R10
T9
0.1U_0402_10V6K
C1052
VCC3_3_1
VCC3_3_2
VCC3_3_3
VCC3_3_4
VCC3_3_5
VCC3_3_6
+1.05VS
0_0603_5%
1U_0402_6.3V6K
C1039 1
1U_0402_6.3V6K
C1049
10mA
0_0603_5%
10U_0805_10V4Z
+V5REF_SUS
1U_0402_6.3V6K
C1042
RB751V-40TE17_SOD323-2
10_0402_5%
1U_0402_6.3V6K
C1038
VCC1_5_1
VCC1_5_2
VCC1_5_3
VCC1_5_4
1U_0402_6.3V6K
C1041
D47
R593
14mA
+VCC1_5 1
1U_0402_6.3V6K
C1037
V_CPU_IO
W18
+5VALW +3VALW
R592
1432mA
C1033
F6
+RTCVCC
1
0.1U_0402_10V6K
VCCUSBPLL
+DMIPLL
C1032
Y25
0.01U_0402_16V7K
VCCDMIPLL
10U_0805_10V4Z
AE3
C1035
1U_0402_6.3V6K
2mA
VCCRTC
0.1U_0402_10V6K
C1036
6mA
C1034
+V5REF_RUN
C1031
0.1U_0402_10V6K
RB751V-40TE17_SOD323-2
1
100_0402_5%
VSS01
VSS02
VSS03
VSS04
VSS05
VSS06
VSS07
VSS08
VSS09
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
D8
C1040
R591
U15E
+3VALW
0_0603_5%
A1
A25
B6
B10
B16
B20
B24
E18
F16
G4
G8
H1
H4
H5
K4
K8
K11
K19
K20
L4
M7
M11
N3
N12
N13
N14
N23
P11
P13
P19
R14
R22
T2
T22
V1
V7
V8
V19
V22
V25
W12
W22
Y2
Y24
AB4
AB6
AB7
AB8
AC8
AD2
AD10
AD20
AD24
AE1
AE10
AE25
Place closely pin Y25 within 100mlis.

+1.5VS
+1.5VS
R601
C1055
0_0603_5%
C1056
4.7U_0603_6.3V6K
+DMIPLL
0.01U_0402_16V7K
+3VS
24mA
1
@
+3VALW
+1.05VS
Place closely pin Y6 within 100mlis.

+1.5VS
R602
C1057
C1058
0.1U_0402_10V6K
+SATAPLL
0_0603_5%
10U_0805_10V4Z
RF@C1068
RF@
C1068
1
RF@C207
RF@
C207
1
RF@C1069
RF@
C1069
1
RF@C208
RF@
C208
1
RF@C1070
RF@
C1070
1
RF@C209
RF@
C209
1
RF@C1071
RF@
C1071
1
RF@ C210
1
RF@C1072
RF@
C1072
2200P_0402_50V7K
2
68P_0402_50V8J
2
2200P_0402_50V7K
2
68P_0402_50V8J
2
2200P_0402_50V7K
2
68P_0402_50V8J
2
2200P_0402_50V7K
2
68P_0402_50V8J
2
0.1U_0402_10V6K
G24
AE13
F2
RSVD32
AE16
45mA
2
Compal Secret Data
2010/06/27
Issued Date
Deciphered Date
2011/6/27
Title
SCHEMATIC MB A6851
Date:
VSS57
VSS58
VSS59
Rev
D
401986
Sheet

1
14
of
36
2/16 DVT: Mount C504 for EMI request

+3VS
DAN217_SC59
2
3/16 PVT: Change to high speed bead
D4
DAN217_SC59
2
D3
DAN217_SC59
2
D2
Place closed to conn.
CRT CONNECTOR
Place closed to conn.
C191
C192
C193
CRT_B_L
C194
C195
2.2P_0402_50V8C
CRT_G_L
2.2P_0402_50V8C
C190
2.2P_0402_50V8C
R147
2.2P_0402_50V8C
R146
2
1
150_0402_1%
2
1
150_0402_1%
R145
2
1
150_0402_1%
GMCH_CRT_B
<7> GMCH_CRT_B
0.1U_0402_16V4Z
CRT_R_L
2.2P_0402_50V8C
GMCH_CRT_G
<7> GMCH_CRT_G
2.2P_0402_50V8C
<7> GMCH_CRT_R
L6
1
2
NBQ100505T-800Y_0402
L7
1
2
NBQ100505T-800Y_0402
L8
1
2
NBQ100505T-800Y_0402
GMCH_CRT_R
C504
+CRT_VCC
1
R148
SN74AHCT1G125DCKR_SC70-5
P
2
2
10K_0402_5%
U13
CRT_HSYNC_1
R149 1
2 39_0402_5%
HSYNC
CRT_VSYNC_1
R150 1
2 39_0402_5%
VSYNC
5
P
2
C198
U14
1
C199
<7> GMCH_CRT_VSYNC
OE#
2
0.1U_0402_16V4Z
1
1
C197
33P_0402_50V8K
+CRT_VCC
33P_0402_50V8K
<7> GMCH_CRT_HSYNC
OE#
2
0.1U_0402_16V4Z
5
1
C196
SN74AHCT1G125DCKR_SC70-5
+5VS
If=1A
D5
2
3
+3VS
3/29 PVT:Change F1 from SC04301P000 to SP04301P120.
+CRT_VCC_R
+CRT_VCC
F1
30mil
1
1
2
RB491D_SOT23-3
1.1A_6V_MINISMDC110F-2 1
C200
0.1U_0402_16V4Z
+CRT_VCC
R152
R153
JCRT
R154
4.7K_0402_5%
CRT_R_L
4.7K_0402_5%
4.7K_0402_5%
4.7K_0402_5%
+CRT_VCC
+3VS
R151
CRT_DDC_DAT
CRT_G_L
Q3B
4
2
<7> GMCH_CRT_DATA
PAD T55
CRT_DDC_DAT
HSYNC
CRT_B_L
2N7002DW-T/R7_SOT363-6
VSYNC
<7> GMCH_CRT_CLK
Q3A
CRT_DDC_CLK
6
2N7002DW-T/R7_SOT363-6
C201
470P_0402_50V8J
@
PAD T56
CRT_DDC_CLK
C202
470P_0402_50V8J
2 @
6
11
1
7
12
2
8
13
3
9
14
4
10
15
5
RGND
ID0
Red
GGND
SDA
Green
BGND
Hsync
Blue
+5V
Vsync
res
SGND
SCL
GND
16
17
GND
GND
SUYIN_070546FR015S263ZR
@
Compal Secret Data
2010/06/27
Issued Date
Deciphered Date
2011/6/27
Title
Size
Date:
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
E
15
of
36
LCD POWER CIRCUIT
+LCDVDD
1/22 DVT:Change R117 from 47K to 100K
W=40mils
+3VS
+3VS
R116
150_0603_5%
0.1U_0402_16V7K
1
47K_0402_5%
1/22 DVT:Change Q11 from SI2301BDS to A03413
+LCDVDD
0.01U_0402_25V7K
W=40mils
Q2A
+3VS
C187
0.1U_0402_16V4Z
1/22 DVT:Add C498 with 0.01uF

12P_0201_50V8J
@ C230
LCD_TXOUT1+
1
2
12P_0201_50V8J
@ C231
LCD_TXOUT21
2
LED/PANEL BD. Conn.
100K_0402_5%
C186
@
4.7U_0805_10V4Z
R144
2.2K_0402_5%
12P_0201_50V8J
@ C229
LCD_TXOUT11
2
2N7002DW-T/R7_SOT363-6
R142
<7> GMCH_ENVDD
R143
2.2K_0402_5%
1
2
LCD_TXOUT0-
12P_0201_50V8J
@ C228
LCD_TXOUT0+
1
2
C
Q11
AO3413_SOT23
C498
@ C227
1
2
2A
# MP Add C227~C232 for RF request
C149
@
4.7U_0805_10V4Z
2
R141
Q2B
2N7002DW-T/R7_SOT363-6
C183
S
R117
100K_0402_5%
LCD_EDID_CLK
LCD_EDID_CLK
LCD_EDID_DATA
LCD_EDID_DATA
<7>
<7>
12P_0201_50V8J
@ C232
LCD_TXOUT2+
1
2
12P_0201_50V8J
JLVDS1
C468
@
680P_0402_50V7K
C469
@
680P_0402_50V7K
10P_0402_50V8J
# PVT Add C1074, C1075

10p and stuff for RF
2011.01.5 Change R421 to D56

and R12 pull down for KBC ESD protection
680P_0402_50V7K
1 C188
68P_0402_50V8J
1 C189
<24>
R376
R105
+3VS
<7>
<7>
<7>
<7>
2
BKOFF#_L
D56
INVT_PWM_R
BKOFF#
2
+LCD_INV
0.1U_0402_16V4Z
1
2
R12 10K_0402_5%
+3VS_LVDS_CAM
USB20_N7_R
+LCD_INV
USB20_P7_R
0_0805_5%
<20> DMIC_CLK
<20> DMIC_DAT
W=20mils
LCD_TXCLKLCD_TXCLK+
<7> LCD_TXCLK<7> LCD_TXCLK+
1
C306
+3VS_LVDS_CAM
0_0603_5%
1
2
<7> LCD_TXOUT0<7> LCD_TXOUT0+
+LCDVDD_R
LCD_EDID_CLK
LCD_EDID_DATA
B+
(20 MIL)
+3VS
LCD_TXCLK-
10P_0402_50V8J
RF@C1075
RF@C1075
2
1 LCD_TXCLK+
250mA
0_0805_5%
0.1U_0402_16V4Z
1
2
C313
DMIC_CLK
DMIC_DAT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
<24> INVT_PWM
MGND4
MGND3
34
33
MGND2
MGND1
32
31
Int. Camera
DMIC_CLK
DMIC_DAT
2 @ 0_0402_5%
1 @
2
R392
0_0402_5%
L13
1 1
2
USB20_N7_R
USB20_P7_R
INVT_PWM_R
R11
10K_0402_5%
2011.01.5 Change R419 to D55

and R11 pull down for KBC ESD protection
D9
D55
R420 1
<7> GMCH_INVT_PWM
I-PEX_20143-030E-20F~D
@
#6/27 EVT
2
RF@C1074
RF@C1074
2
1
R377
+LCDVDD
2
USB20_N7 <12>
USB20_P7 <12>
WCM2012F2S-900T04_0805
1
2
R393
0_0402_5%
@
PACDN042Y3R_SOT23-3
For EMI request

LCD_TXCLK+
C871
2 10P_0402_50V8J
2/25 PVT:Mount C871 with 10pF
LCD_TXCLK-
Compal Secret Data
2010/06/27
Issued Date
Deciphered Date
2011/6/27
Title
Size
Date:
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
1
16
of
36
Mini-Express Card for WLAN/WiMax

+3V_WLAN
C258
WLAN@
120 mil
C259
WLAN@
2
0.01U_0402_25V7K
2/25 PVT:Mount C479,C480 with 47pf

3/16 PVT:Add BOM Config of C481,C482 to WLAN@
+1.5V_WLAN
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
1
C260
WLAN@
2
4.7U_0805_10V4Z
C479
WLAN@
47P_0402_50V8J
C261
WLAN@
C262
WLAN@
2
0.01U_0402_25V7K
For WWAN request
C263
WLAN@
C480
WLAN@
47P_0402_50V8J
2
4.7U_0805_10V4Z
For WWAN request
+1.5V_WLAN
+1.5VS
+3V_WLAN
PLTRST#
CLK_PCI_DDR
<9> CLK_PCI_DDR
<12> PCIE_PTX_C_IRX_N2
<12> PCIE_PTX_C_IRX_P2
<12> PCIE_ITX_C_PRX_N2
<12> PCIE_ITX_C_PRX_P2
WLAN/ WiFi
+3V_WLAN
R425 1
R426 1
1
<24> EC_TX_P80_DATA
<24> EC_RX_P80_CLK
2
2
0_0402_5%
EC_RX_P80_CLK_R
0_0402_5%
Debug card using

R429
100K_0402_5%
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
54
GND
GND
@ JUMP_43X79
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
2
4
6
8
10
12
14
16
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
LPC_FRAME#_R
LPC_AD3_R
LPC_AD2_R
LPC_AD1_R
LPC_AD0_R
WL_OFF_R#
PLTRST#
LPC_FRAME#_R <24>
LPC_AD3_R <24>
LPC_AD2_R <24>
LPC_AD1_R <24>
LPC_AD0_R <24>
#EVT WLAN&BT Combo module circuits
Disable
HI
LO
+3VS
USB20_N6 <12>
USB20_P6 <12>
R428
0_0402_5%
Enable
# MP Add R328
by pass for cost down
CLK_SMBCLK <9,10>
CLK_SMBDATA <9,10>
@
1
BT
on module
BT_CRTL
PLTRST# <7,13,22>
LED_WIMAX#_R
BT
on module
BT_CTRL
LED_WIMAX#
R259
100K_0402_5%
LED_WIMAX# <24,26>
R229@
100K_0402_5%
1
2
+3VS
<13>
R328 @
0_0402_5%
1
<9> WLAN_CLKREQ#
<9> CLK_PCIE_WLAN#
<9> CLK_PCIE_WLAN
BT_CTRL
WLAN_CLKREQ#
+3VS
PJ20
2
0_0805_5%
1
3
5
7
9
11
13
15
# MP Add R326 1K for WB195 pin 51
1
R888
JWLAN
EC_RX_P80_CLK_R
2
1
1K_0402_5%
R326
BT_CTRL
S 2N7002_SOT23
WLAN@
Q41
2
G
BT_PWR#
CONN@ ACES_88910-5204
#DVT WLAN,WWAN and BT LED

control by EC and HW reserve
#DVT Q41 due die

change to single
@ D49
WL_OFF_R#
WL_OFF# <24>
Mini-Express Card for 3G/GPS

3G current need to 2750mA
+1.5V_WWAN
120 mil
R430
0_0402_5%
#DVT R430 reserve for leakage power
0.1U_0402_16V4Z
1
C265
WWAN@
C266
C267
WWAN@
WWAN@
2
2
2
0.01U_0402_25V7K
4.7U_0805_10V4Z
0.1U_0402_16V4Z
1
1
C482
WWAN@
47P_0402_50V8J
C268
WWAN@
C269
WWAN@
2
2
0.01U_0402_25V7K
C270
WWAN@
C481
WWAN@
47P_0402_50V8J
2
4.7U_0805_10V4Z
For WWAN request

2/25 PVT:Mount C482,C481 with 47pf
3
+1.5VS
1
D14
For WWAN request

+3V_WWAN
+3VS
+1.5V_WWAN
V I/O
V I/O
Ground V BUS
V I/O
V I/O
+UIM_PWR
+UIM_PWR
3
IP4223CZ6_SO6-6
<9> WWAN_CLKREQ#
<9> CLK_PCIE_WWAN#
<9> CLK_PCIE_WWAN
+3V_WWAN
4
WWAN_CLKREQ#
1
3
5
7
9
11
13
15
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
54
GND
GND
2
0_0805_5%
1
R889
2
0_0805_5%
120 mil
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
P-TWO_A54402-A0G16-N
CONN@
1
+UIM_PWR
UIM_DATA
UIM_CLK
UIM_RST
UIM_VPP
+1.5V_WWAN
+UIM_PWR
C296
0.1U_0402_16V4Z
2
3G@
UIM_RST
UIM_CLK
D13
GLZ20A LL-34
3G@
12P_0402_50V8J
C307
3G@
12P_0402_50V8J
C298
3G@
1
2
3
VCC
RST
CLK
GND
VPP
I/O
4
5
6
GND
GND
UIM_DATA
CONN@
C297
22P_0402_50V8J
2 3G@

UWB_OFF#_R
PLTRST#
CLK_SMBCLK
CLK_SMBDATA
UWB_OFF#_R 2
USB20_N5 <12>
USB20_P5 <12>
D52 @
1
UWB_OFF# <24>
LED_WIMAX#_R
1
WWAN@ R431
0_0402_5%
#DVT R431reserve for leakage power
Compal Secret Data
2010/06/27
Issued Date
Deciphered Date
2011/6/27
Title
Date:
UIM_VPP
SUYIN_254020MA006S522ZL~D
Size
A
R231
4.7K_0402_5%
@
J3GSIM
+UIM_PWR
+UIM_PWR
WWAN@
2
4
6
8
10
12
14
16
WWAN@
Reserve
1
R890
JGPS
BOM Config of C481,C482 to 3GGPS@
+3V_WWAN
3/16 PVT:Add
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet

E
17
of
36
USB CONN- -Left
W=30mils
1.4A
+5VALW
+USB_VCCB
U24
SLP_CHG_M3
SLP_CHG_M4
HIGH
LOW
1
2
R88
0_0402_5%
1
2
@ R87
0_0402_5%
<24> USB_CHG_EN#
Mode 3
<24>
Mode 4
LOW
SLP_CHG
FUNCTION
D=1D
HIGH
D=2D
<12> USB20_P4
<12> USB20_N4
1D+
USB20_N4_S
1D-
USB20_P4
2D+
D+
4
5
VCC
<12> SLP_CHG_M4_PCH
CHG@
R213 0_0402_5%
2
1
Use PCH
C288
@
4.7U_0805_10V4Z
GND
OE#
+ C2
C1
220U_6.3V_M_R17
USB_CHG_EN#
C3
C4
2
1000P_0402_50V7K
JUSB1
USB20_N4_RL
USB20_P4_RL
2 nonCHG@
0_0402_5%
2 nonCHG@
0_0402_5%
SLP_CHG_M3
1
@ R1
L1
USB20_N4_R
USB20_P4_R
SLP_CHG_M4
0120 reserve both EC and PCH.
+USB_VCCB 0.1U_0402_16V4Z
SLP_CHG# <13>
USB20_P4_R
TS3USB221RSER_QFN10_2x1P5~D
<12> SLP_CHG_M3_PCH
USB_OC#4
APL3510BXI-TRG MSOP 8
USB20_N4_R
470P_0402_50V8J
CHG@
R211 0_0402_5%
2
1
8
7
6
5
W=30mils
10
D-
2D-
1
R221
1
R222
OUT
OUT
OUT
OC#
+USB_VCCB
USB20_P4_S
USB20_N4
GND
IN
IN
EN#
#PVT R88 CHG@ change to

always stuff for OC protect
actioc same
+3VALW
U11 CHG@
LOW
USB_EN#
HIGH
1
2
3
4
1
2
3
4
VCC
DD+
GND
5
6
7
8
GND1
GND2
GND3
GND4
1
4
C5
0.1U_0402_16V4Z
SUYIN_020133GB004M25MZL
CONN@
2
0_0402_5%
2
USB20_N4_RL
USB20_P4_RL
D1
USB20_P4_RL
I/O1
I/O4
REF1 REF2
I/O2
WCM-2012-900T_0805
1
2
@ R2
0_0402_5%
+USB_VCCB
I/O3
2
+5VALW
USB20_N4_RL
CM1293A-04SO_SOT23-6
VCC
GND
R218
51K_0402_1%
CHG@
USB_OC#0_1
2
0_0402_5%
USB_OC#4
2
0_0402_5%
1
R7
1
R8
<12> USB_OC#0_1_PCH
R219
51K_0402_1%
CHG@
<12> USB_OC#4_PCH
H3
1.4A
H_2P3
H_2P3
H11
H12
@
H_2P3
H_3P3
H13
@
H14
@
H_3P3
H_2P0N
H_2P0X2P6N
# PVT
APL3510BXI-TRG MSOP 8
H_2P3
H9
@
H_2P3
H_1P2
Add
H14 and remove H1
H10
@
@
C283
@
4.7U_0805_10V4Z
H8
@
1
H7
H6
8
7
6
5
U18
USB_EN#
<24>
<24>
+USB_VCCA
W=60mils
OUT
OUT
OUT
OC#
H4
@
H2
USB CONN
GND
IN
IN
EN#
USB_OC#4_EC
For EMI request
2/3 DVT: Change D38,D37 from PRTR5V0U2X_SOT143-4 to CM1293A-04SO_SOT23-6
1
2
3
4
USB_OC#0_1_EC
#DVT USB_OC# control by EC
For EMI request
2
0_0402_5%
2
0_0402_5%
SN74CBT3125PWRG4_TSSOP14
C361
0.1U_0402_16V4Z
1 CHG@
+5VALW
1
R9
1
R10
USB20_P4_S_O
3
USB20_N4_S_O
6
8 R220 1 CHG@ 2
11 100_0402_5%
1B
2B
3B
4B
14
+USB_VCCB
USB20_P4_S_O
USB20_N4_S_O
1A
2A
3A
4A
2
5
9
12
1OE#
2OE#
3OE#
4OE#
USB20_P4_S
USB20_N4_S
1
4
10
13
SLP_CHG_M4
R216
43K_0402_1%
CHG@
SLP_CHG_M3
R215
75K_0402_1%
CHG@
CHG@
For EMI request

U12
H_1P2
H_1P2
Add 0.1u Caps for each screw hole for ESD rule
+5VALW
+3VS
+USB_VCCA
USB20_P1
USB20_N1
Close to H1,H7
1
@
C528
2
1
@
C535
2
1
C534
2
Close to H2
# PVT
0.1U_0402_16V4Z
USB20_P0
USB20_N0
C531
2
1U_0402_6.3V4Z
USB20_P1
USB20_N1
0.1U_0402_16V4Z
USB20_P0
USB20_N0
<12>
<12>
C530
2
1U_0402_6.3V4Z
<12>
<12>
1
2
3
4
5
6
7
8
9
10
GND
GND
0.1U_0402_16V4Z
JP1
1
2
3
4
5
6
7
8
9
10
11
12
0.1U_0402_16V4Z
USB_OC#0_1
1 @
C526@
2
C527
0.1U_0402_16V4Z
Close to H9,H6
Close to H4
2010.07.20 Add for ESD solution
ACES_85201-1005N_10P
CONN@
FIDUCIAL_C40M80
FM1
FM2
@
1
@
A
FM3
@
1
@
1
FM4
Close to H5
Compal Secret Data
2010/06/27
Issued Date
Deciphered Date
2011/6/27
Title
Size
Date:
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
1
18
of
36
SATA Conn.
For 1.8" SSD
+5VS
1.2A
1
1
+3VS
Place closely JHDD SATA CONN.

1
C275
10U_0805_10V4Z
C276
0.1U_0402_16V4Z
C277
0.1U_0402_16V4Z
C278
0.1U_0402_16V4Z
SSD HDD need 400mA for 3V(PHISON)
C279
@
10U_0805_10V4Z
C280
@
0.1U_0402_16V4Z
C281
@
0.1U_0402_16V4Z
C282
@
0.1U_0402_16V4Z
JSATA
GND
A+
AGND
BB+
GND
1
2
3
4
5
6
7
V33
V33
V33
GND
GND
GND
V5
V5
V5
GND
Reserved
GND
V12
V12
V12
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
GND
GND
23
24
SATA_ITX_C_DRX_P0 C284 1
SATA_ITX_C_DRX_N0 C285 1
2
2
0.01U_0402_25V7K
0.01U_0402_25V7K
SATA_IRX_DTX_N0
SATA_IRX_DTX_P0
2
2
0.01U_0402_25V7K
0.01U_0402_25V7K
C286 1
C287 1
SATA_ITX_DRX_P0 <11>
SATA_ITX_DRX_N0 <11>
SATA_IRX_C_DTX_N0 <11>
SATA_IRX_C_DTX_P0 <11>
+3VS
+5VS
SUYIN_127043FR022G226ZL_NR
CONN@
Issued Date
Compal Secret Data
2010/06/27
Deciphered Date
2011/6/27
Title
SCHEMATIC MB A6851
Custom
Rev
D
401986
Date:

G
Sheet
19
of
H
36
Speaker Connector
RA2
+PVDD1
600 mA 0.1U_0402_16V4Z
CA57
CA7
10U_0805_10V4Z
2
2
1U_0402_6.3V4Z
LINE1_L 23
1
LINE1_R 24
11U_0402_6.3V4Z
14
15
4.7U_0805_10V4Z
CA21
MIC1_LINE1_R_L
MIC_L
21
2
1
MIC_R 22
MIC1_LINE1_R_R
2
1
16
4.7U_0805_10V4Z
CA22
17
25
38
AVDD2
46
39
PVDD2
CA4
CA25
470P_0402_50V8J
@
+5V_CODEC
CA5
CA6
2
2
2
2
10U_0805_10V4Z 0.1U_0402_16V4Z
40
41
SPKL+
SPKL-
LINE2_L
LINE2_R
SPK_OUT_R+
SPK_OUT_R-
45
44
SPKR+
SPKR-
HP_OUT_L
HP_OUT_R
32
33
470P_0402_50V8J CA26
RA16
2
1 @
0_0603_1%
SPKR-
place close to chip
GPIO0/DMIC_DATA
DMIC_CLK_R
GPIO1/DMIC_CLK
EC_MUTE#
PD#
MONO_IN
2
100P_0402_50V8J
11
RESET#
12
PCBEEP
SENSE_A
SYNC
10
BCLK
SDATA_OUT
SDATA_IN
EAPD
13
SENSE A
18
SENSE B
For EMI
1
2
CA15
2.2U_0603_6.3V4Z
+MIC1_VREFO_L
EC_MUTE#
RA45
4.7K_0402_5%
HDA_SYNC
<21>
<21>
HDA_SYNC
HDA_BITCLK
HDA_SDOUT
SPDIFO
48
MONO_OUT
20
Beep sound
RA7
1
2
47K_0402_5%
MIC2_VREFO
29
30
28
HDA_SDOUT <13>
2
RA6
1
33_0402_5%
RA12
HDA_SDIN0 <13>
4.7K_0402_5%
100P_0402_50V8J
CA18
+5VALW
35
CBN
VREF
27
AC_VREF
19
AC_JDREF2 RA9
CPVEE
1
CA14
31
MIC1_VREFO_L
JDREF
43
42
49
7
PVSS2
PVSS1
DVSS2
DVSS1
CPVEE
34
AVSS1
AVSS2
26
37
ALC269@
1
RA53
1
RA54
ALC259@
1 20K_0402_1%
1
2
2.2U_0603_6.3V4Z
CA17
2
1
0.1U_0402_16V4Z
HDA_BITCLK
MIC_SENSE
2 0.1U_0603_50V7K
CA49 1
2 0.1U_0603_50V7K
CA50 1
2 0.1U_0603_50V7K
2
FBMH1608HM601-T
1
RA42
2
1
10_0402_5%
CA62
RF@
QA1A
ALC269@
2N7002DW-T/R7_SOT363-6
RA28
12P_0402_50V8J
RF@
RA55 ALC259@
0_0402_5%
100K_0402_5%
ALC269@
CA48 1
2
0_0805_5%
2
0_0805_5%
CA16
2.2U_0603_6.3V4Z
AGND
2 0.1U_0603_50V7K
+5VS
+5V_CODEC
+MIC1_VREFO_R CA23 10U_0805_10V4Z

1
2
CBP
CA47 1
1
RA18
MONO_IN
0.1U_0402_16V4Z
2
for EMI request
C438
100P_0402_50V8J
CA13
1
2
RA8
1
2
47K_0402_5%
place close to chip
2DMIC_CLK_R
39_0402_5%
2
<21>
#DVT PC beep R,C change 4.7K and 100P
36
EC control EC_MUTE# behavior: High-state / low-state
SPK_R2
<13>
ALC269Q-VB2-GR_QFN48_7X7
SPK_R2
CA27
1U_0402_6.3V4Z
@
PCI Beep
1
RA47
<21>
47
DGND
<16> DMIC_CLK
<21>
SPK_R1
HDA_BITCLK <13>
HDA_SDIN0_R
MIC1_VREFO_R
LDO_CAP
Add RA45 and un-mount RA43 at PVT

for audio noise issue
SPK_L2
1
CA12
SPK_R1
EC Beep
HP_L
HP_R
SPK_L2
<21>
CA24
1U_0402_6.3V4Z
@
<24> EC_BEEP
CA11
0.01U_0402_25V7K
@
RA40
100K_0402_5%
@
<13> PCH_SPKR
MIC2_L
MIC2_R
DMIC_DAT
HDA_RST#
<13> HDA_RST#
2 10U_0805_10V4Z
SPK_L1
<24> EC_MUTE#
SPK_OUT_L+
SPK_OUT_L-
<16> DMIC_DAT
ALC269@
UA1
CA3
LINE1_L
LINE1_R
MIC1_L
MIC1_R
SPK_L1
1
MIC1_LINE1_R_R
PVDD1
1
CA9
2
CA10
2
MIC1_LINE1_R_L
<21> MIC1_LINE1_R_R
DVDD
Change CA9 and CA10

to 1U at pre-MP
<21> MIC1_LINE1_R_L
470P_0402_50V8J CA20
RA14
SPKL2
1 @
0_0603_1%
RA15
SPKR+
2
1
0_0603_1%
+5V_CODEC
10U_0805_10V4Z 0.1U_0402_16V4Z 2
1
0_0603_1%
68 mA
ALC259@
UA1
ALC259-VB5-GR_QFN48_7X7
Ext. Mic/LINE IN
CA19
470P_0402_50V8J
@
RA3
CA8
RA11
2
1
0_0603_1%
1
CA60
@
@
# DVT For RF
0.1U_0402_16V4Z
35 mA
2
FBMH1608HM601-T
RA13
2
1
0_0603_1%
2
10U_0805_10V4Z
+PVDD2
1
1
0.1U_0402_16V4Z
CA61
C224
+AVDD
68P_0402_50V8J
2
2 RF@
DVDD_IO
RA1
place close to chip
+3VS_DVDD
10U_0805_10V4Z
2
2
+3VS
2
10U_0805_10V4Z
SPKL+
CA1
placement near Audio Codec
+5V_CODEC
CA43
AVDD1
CA2
+3VS_DVDD
2
1
0_0603_1%
CA56
JA1
JUMP_43X39
0.1U_0402_16V4Z
place close to chip
0.1U_0402_16V4Z
1
1
CA44
Add RA43 for S/M battery mode at PVT

+3VL
RA44
100K_0402_5%
for RF request
Sense Pin
Impedance
Codec Signals
Function
MIC_SENSE
PORT-I (PIN 32, 33)
Headphone out
20K
PORT-B (PIN 21, 22)
Ext. MIC
10K
PORT-C (PIN 23, 24)
5.1K
(PIN 48)
1
20K_0402_1%
RA21
39.2K_0402_1%
SENSE_A
+3VS
QA1B
ALC269@
B+
2N7002DW-T/R7_SOT363-6
BACK_SENSE <21>
39.2K
2
RA10
<24> SM_SENSE#
For EMI
place close to chip
SENSE A
4
<21>
NBA_PLUG
1
@ CA28
1
@ CA29
2
1U_0402_6.3V4Z
2
1U_0402_6.3V4Z
#EVT EMI for DMIC_CLK solution
2010/06/27
Issued Date
Compal Secret Data
2011/6/27
Deciphered Date
Title
SCHEMATIC MB A6851
Rev
D
401986
Date:
Sheet

E
20
of
36
# PVT for DC mode only detect
MIC1_L
MIC1_R
PESD5V0U2BT_SOT23-3
6
5
GND2
GND1
4
3
2
1
4
3
2
1
5
6
1
CA68
33P_0402_50V8K
1
CA69
ESD request
CONN@
E&T_3806-F04N-02R
SINGA_2SJ2285-001191
CONN@
RA56
ALC259@
1
1
SPK_R1
SPK_R2
SPK_L1
SPK_L2
MIC1_R_1
0_0402_5%
SPK_R1
SPK_R2
SPK_L1
SPK_L2
2 FBM-11-160808-601-T_0603
33P_0402_50V8K
<20>
<20>
<20>
<20>
BACK_SENSE
JSPK1
3
PESD5V0U2BT_SOT23-3
LA1
MIC1_L_1
JMIC1
8
7
3
1
4
2
CA63
2 FBM-11-160808-601-T_0603
<20> BACK_SENSE
0.1U_0402_16V4Z
DA7
LA2
4.7K_0402_5%
RA48
ALC269@
MIC
VL
SPEAKER
1
CA64
0.1U_0402_16V4Z
CA65
0.1U_0402_16V4Z
3
DA6
Head phone
Ext.MIC/LINE IN JACK
<20> MIC1_LINE1_R_L
MIC1_LINE1_R_R
MIC1_LINE1_R_L
1
+MIC1_VREFO_R
2.2K_0402_5%
MIC1_R
2
1
1K_0402_5%
RA35
MIC1_L
JHP2
<20> HP_L
<20> HP_R
<20> NBA_PLUG
2
RA31
HP_L
RA52 1
2 40.2_0402_1% HP_L_R
LA4 1
2 FBM-11-160808-601-T_0603 PL
HP_R
RA51 1
2 40.2_0402_1% HP_R_R
LA3 1
2 FBM-11-160808-601-T_0603
8
7
3
1
4
2
PR
NBA_PLUG
5
6
1
+MIC1_VREFO_L
2.2K_0402_5%
@
0.1U_0402_16V4Z
CA70
33P_0402_50V8K
1
CA67
ESD request
1 CA71
33P_0402_50V8K
<20> MIC1_LINE1_R_R
RA46
2
1K_0402_5% RA36
2
1
SINGA_2SJ2285-001191
CONN@
CA66
0.1U_0402_16V4Z
ESD request
Issued Date
Compal Secret Data
2010/06/27
Deciphered Date
2011/6/27
Title
SCHEMATIC MB A6851
Rev
D
401986
Date:

E
Sheet
21
of
36
3/10 Change CL13 0805-->0603
UL1
2 0.1U_0402_16V7K PCIE_PRX_LANTX_P3
22
HSOP
CL2
2 0.1U_0402_16V7K PCIE_PRX_LANTX_N3
23
HSON
17
18
HSIP
HSIN
<9> LAN_CLKREQ#
0_0402_5% 16
CLKREQB
25
PERSTB
19
20
REFCLK_P
REFCLK_N
LAN_X1
43
CKXTAL1
LAN_X2
44
CKXTAL2
28
LANWAKEB
<7,13,17> PLTRST#
<9> CLK_PCIE_LAN
<9> CLK_PCIE_LAN#
+3VALW
RL102
10K_0402_5%
LOM_WAKE#
<24> LOM_WAKE#
ISOLATEB
26
ISOLATEB
LOM_WAKE#
1 RL22
+3V_LAN
2 1K_0402_5%
ENSWREG
+LAN_VDDREG
1
RL5
+3VS
2
2.49K_0402_1%
14
15
38
NC/SMBCLK
NC/SMBDATA
GPO/SMBALERT
33
ENSWREG
34
35
VDDREG
VDDREG
46
RSET
GND
PGND
EECS/SCL
EEDI/SDA
30
32
MDIP0
MDIN0
MDIP1
MDIN1
NC/MDIP2
NC/MDIN2
NC/MDIP3
NC/MDIN3
1
2
4
5
7
8
10
11
DVDD10
DVDD10
DVDD10
13
29
41
DVDD33
DVDD33
+LAN_VDD10
RL2 2
RL1 2
+LAN_VDD10
0.1U_0402_16V4Z
CL9
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
2
CL10
2
CL4
2
CL5
2
CL6
2
CL7
1
1
1
1
Close to Pin 3,6,9,13,29,41,45
+LAN_EVDD10
+LAN_VDD10
+3V_LAN
12
42
47
48
EVDD10
21
+LAN_EVDD10
AVDD10
AVDD10
AVDD10
AVDD10
3
6
9
45
+LAN_VDD10
36
0.1U_0402_16V4Z
+LAN_VDD10
2
0_0603_5%
27
39
0.1U_0402_16V4Z
1
Layout Note: LL1 must be
within 200mil to Pin36
CL13
CL8,CL9 must be within 4.7U_0603_6.3V6K
2
200mil to LL1
+LAN_REGOUT: Width =60mil
LAN_MDI0+
LAN_MDI0LAN_MDI1+
LAN_MDI1-
AVDD33
AVDD33
AVDD33
AVDD33
REGOUT
LL1 @
+LAN_REGOUT
1
2
2.2UH +-5% NLC252018T
1 10K_0402_5%
1 10K_0402_5%
1
LL2
CL18
1U_0402_6.3V4Z
+3V_LAN
CL17
0.1U_0402_16V4Z
1
0.1U_0402_16V4Z
0.1U_0402_16V4Z
0.1U_0402_16V4Z
Close to Pin 21
0.1U_0402_16V4Z
+3V_LAN
2
CL19
2
CL20
2
CL21
2
CL22
1
1
1
+LAN_VDDREG
2
0_0603_5%
+LAN_REGOUT
24
49
LED3/EEDO
LED1/EESK
LED0
31
37
40
RL6
1K_0402_1%
+3V_LAN
Close to Pin 27,39,12,47,48
CL1
RL19
1
LL3
CL28
4.7U_0603_6.3V6K
RTL8105E-VB-GR_QFN48_6X6
CL29
0.1U_0402_16V4Z
1
ISOLATEB
+3V_LAN
+3VS
RL7
15K_0402_5%
+3VALW TO +3V_LAN
RL4 @
0_0402_5%
QL1
1
2
2
47K_0402_5%
1
AO3413_SOT23
CL14
0.01U_0402_25V7K
1
RL16
WOL_EN#
<24>
# MP reserve CL33,CL34,CL35
+3VS to GND decouplin cap for
EMI request
CL12
0.1U_0402_16V7K
1LAN_X2
CL27
27P_0402_50V8J
Vgs=-4.5V,Id=3A,Rds<97mohm
RL25
100K_0402_5%
RL23
0_0402_5%
25MHZ_20PF_7A25000012
1
1
CL26
27P_0402_50V8J
2
+3VALW
ENSWREG
YL1
LAN_X1 2
+3VALW
1
0.01U_0402_16V7K
1
0.01U_0402_16V7K
1
0.01U_0402_16V7K
2
CL33
2
CL34
2
CL35
+3V_LAN
2
1
CL15
4.7U_0805_10V4Z
@ 2
CL8
1U_0402_6.3V4Z
2
UL2
LAN_MDI1+
LAN_MDI12
CL30
1
0.01U_0402_16V7K
LAN_MDI0+
LAN_MDI0-
1
2
3
4
5
6
7
8
TD+
TDCT
NC
NC
CT
RD+
RD-
TX+
TXCT
NC
NC
CT
RX+
RX-
16
15
14
13
12
11
10
9
RJ45_MIDI1+
RJ45_MIDI1CL31 1
1
CL32
RJ45_MIDI0+
RJ45_MIDI0-
JLAN1
2 1000P_0402_50V7K 1
2
1
1000P_0402_50V7K
RL26
2 75_0402_1%
2
75_0402_1%
RL27
RJ45_MIDI1RJ45_MIDI1+
RJ45_GND 1
CL3
1
2
3
4
5
6
7
8
9
10
LANGND
2 1000P_1808_3KV7K
RJ45_MIDI0RJ45_MIDI0+
1
NS681680
CL23
4.7U_0603_6.3V6K
1
2
3
4
5
6
7
8
GND1
GND2
ACES_88231-08001
CONN@
#DVT LAN connect pin defind change
# MP change back to orignal design for EMI

D28 remove and add CL23 4.7U
# PVT Add pin 7 connect to LANGND
2010/06/27
Deciphered Date
2011/6/27
Title
Date:
Compal Secret Data
Issued Date
#DVT remove CL16 and CL23, Add ESD diode
SCHEMATIC MB A6851
Rev
D
401986
Sheet
D
22
of
36
XD_CD#
XD_RDY
XD_RE#
XD_CE#
XD_CLE
XD_ALE
XD_WE#
XD_WP
XD_D0
XD_D1
XD_D2
XD_D3
XD_D4
XD_D5
XD_D6
XD_D7
SP1
SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10
SP11
SP12
SP13
SP14
R891
+3VS
CC4
RC7
1
<12>
<12>
1 100P_0402_50V8J
2 6.2K_0603_1%
USB20_N3
USB20_P3
+VCC_3IN1
VREG
CC8
1U_0402_6.3V6K
CC13
0.1U_0402_16V4Z
CC5
4.7U_0805_10V4Z
0_0805_5%
REFE
2
3
DM
DP
4
5
6
3V3_IN
CARD_3V3
V18
need 12 mil trace

7
SDWP#
SD_DATA1
SD_MS_DATA0
8
9
10
11
12
GPIO0
17
CLK_IN
24
XD_D7
23
SP14
SP13
SP12
SP11
SP10
SP9
SP8
SP7
SP6
22
21
20
19
18
16
15
14
13
XD_CD#
SP1
SP2
SP3
SP4
SP5
25
SD_D1
SD_D0
SD_D7
SD_CD#
SD_D6
SD_CLK
SD_D5
SD_CMD
SD_D4
SD_D3
SD_D2
MS_CLK
MS_INS#
MS_D7
MS_D3
MS_D6
MS_D2
MS_D0
1
MS_D4
MS_D1
MS_D5
MS_BS
UC1
RREF
EPAD
+3VS_CR
SD_WP
CR_LED#
CR_LED# <26>
XTLI
2
0_0402_5%
1
RC19
CLK_48M_CR <9>
48Mhz1
SD_DATA2
SD_DATA3
SDCMD
SD_MS_CLK RC11 1
2 33_0402_5%
R556
C1073
33_0402_5%
@
22P_0402_50V8J
@
SDCLK
# DVT reserve for 48M CLK
SDCD#
RTS5137-GR QFN 24P_4X4
2 in 1 Card Reader
JREAD1
SD_DATA3
SD-DAT3
SDCMD
SD-CMD
SD-GND
SD-VCC
SD-CLK
SD-GND
SD_MS_DATA0
SD-DAT0
SD_DATA1
SD-DAT1
SD_DATA2
SD-DAT2
CB29
0.1U_0402_16V4Z
+VCC_3IN1
SDCLK
SDCD#
10
DETECT GND1
12
SDWP#
11
PROTECT GND2
13
#DVT swap conncet pin10 and pin11
SDCLK
10_0402_5%
1
2
@ RC18
TAITW_PSDATA009GLBS1ZZ4H
CONN@
10P_0402_50V8J
@ CC15
Compal Secret Data
2010/06/27
Issued Date
Deciphered Date
2011/6/27
Title

SCHEMATIC MB A6851
Custom
Date:
Rev
D
401986
Sheet
E
23
of
36
+3V_EC
2
C387
ECRST#
1
0.1U_0402_16V4Z
<13>
EC_SCI#
<17,26> LED_WIMAX#
<25>
KSO[0..15]
<25>
KSI[0..7]
#DVT EC to contral WWAN,

WLAN and BT LED
KSI[0..7]
confirm battery team change +5VALW to +3VALW

+3V_EC
EC_SMB_CK1
R323
EC_SMB_DA1
R314
2.2K_0402_5%
2.2K_0402_5%
EVT# For EC request 7/5
+3VS
EC_SMB_CK2
R308
EC_SMB_DA2
R309
2.2K_0402_5%
2.2K_0402_5%
1
2
3
4
5
7
8
10
CLK_PCI_LPC
PCI_RST#
ECRST#
EC_SCI#
LED_WIMAX#
<9> CLK_PCI_LPC
<11> PCI_RST#
KSO[0..15]
12
13
37
20
38
<29>
<29>
<7>
<7>
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
AD
PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82
KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24
KSO5/GPIO25 Int. K/B
KSO6/GPIO26 Matrix
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49
EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2
77
78
79
80
SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47
HW_BOARD_ID
2010.07.15 EMI request
@
R319
10K_0402_5%
<13> PM_SLP_S3#
<13> PM_SLP_S5#
<13> EC_SMI#
PM_SLP_S3#
PM_SLP_S5#
EC_SMI#
HW_BOARD_ID
6
14
15
16
17
18
19
25
28
29
30
31
32
34
36
PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
GPIO
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A
WP
INVT_PWM
FAN_SPEED1
<16> INVT_PWM
<25> FAN_SPEED1
EC_TX_P80_DATA
EC_RX_P80_CLK
ON/OFFBTN#
PWR_SUSP_LED#
<17> EC_TX_P80_DATA
<17> EC_RX_P80_CLK
<26> ON/OFFBTN#
<26> PWR_SUSP_LED#
@ R320
<25>
WP_R
WP_R
Delet NUM_LED#
#6/27 EVT
WP
0_0402_5%
<13>
EC_CLK
0_0402_5%
122
123
2
R322
ACIN_D
2
100P_0402_50V8J
1
C390
+3V_EC
KSO1
KSO2
1
R312
1
R313
2
47K_0402_5%
2
47K_0402_5%
to avoid EC entry ENE test mode
RZ01
100K_0402_5%
67
AVCC
USB_CHG_EN#
PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D
TP_CLK/PSCLK3/GPIO4E
TP_DATA/PSDAT3/GPIO4F
83
84
85
86
87
88
EC_MUTE#
USB_EN#
+3VL
ADP_I
ADP_V
Delet KILL_SW#
#6/27 EVT
IREF
CHGVADJ
LID_SW#
47K_0402_5%
CLK_PCI_LPC
1
@ C211
INVT_PWM
1
@ C212
EC_TX_P80_DATA 1
@ C216
EC_RX_P80_CLK 1
@ C217
IREF
<30>
CHGVADJ <30>
EC_MUTE# <20>
USB_EN# <18>
C525
0.1U_0402_16V4Z
2
68P_0402_50V8J
2
68P_0402_50V8J
2
68P_0402_50V8J
2
68P_0402_50V8J
TP_CLK
TP_DATA
TP_CLK <26>
TP_DATA <26>
VGATE
WOL_EN#
SPIDI/RD#
SPIDO/WR#
SPICLK/GPIO58
SPICS#
CIR_RX/GPIO40
CIR_RLC_TX/GPIO41
FSTCHG/SELIO#/GPIO50
BATT_CHGI_LED#/GPIO52
CAPS_LED#/GPIO53
BATT_LOW_LED#/GPIO54
SUSP_LED#/GPIO55
SYSON/GPIO56
VR_ON/XCLK32K/GPIO57
AC_IN/GPIO59
73
74
89
90
91
92
93
95
121
127
USB_OC#0_1_EC
USB_OC#4_EC
FSTCHG
BATT_FULL_LED#
CAPS_LED#
BATT_CHG_LOW_LED#
PWR_ON_LED#
SYSON
VR_ON
ACIN_D
EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04
EC_ON/GPXO05
EC_SWI#/GPXO06
ICH_PWROK/GPXO06
GPO
BKOFF#/GPXO08
WL_OFF#/GPXO09
GPXO10
GPXO11
100
101
102
103
104
105
106
107
108
EC_RSMRST#
EC_LID_OUT#
EC_ON
EC_SWI#
EC_PWROK
BKOFF#_L
WL_OFF#
UWB_OFF#
PM_SLP_S4#/GPXID1
ENBKL/GPXID2
GPXID3
GPXID4
GPXID5
GPXID6
GPXID7
110
112
114
115
116
117
118
PM_SLP_S4#
ENBKL
V18R
124
+EC_V18R
GPI
Place closely pin 109
R243
# MP change LID# pull up to +3VL
USB_CHG_EN# <18>
119
120
126
128
SPI Flash ROM
<30>
<30>
#DVT remove EN_DFAN1
97
98
99
109
SPI Device Interface
ADP_I
ADP_V
@ R329
1
0_0402_5%
R330
1
0_0402_5%
BATT_TEMPA <29>
SDICS#/GPXOA00
SDICLK/GPXOA01
SDIDO/GPXOA02
SDIDI/GPXID0
XCLK1
XCLK0
KB926QFE0_LQFP128
@ CZ01
2 20P_0402_50V8J
BATT_TEMPA
68
70
71
72
PS2 Interface
SM_SENSE# <20>
EC_BEEP <20>
EC_PWM_FAN <25>
ACOFF
<30>
+3VALW
DAC_BRIG/DA0/GPIO3C
EN_DFAN1/DA1/GPIO3D
IREF/DA2/GPIO3E
DA3/GPIO3F
GPIO
EC_BEEP
EC_PWM_FAN
ACOFF
63
64
65
66
75
76
GND
GND
GND
GND
GND
1
2
100P_0402_50V8J
Delet SBPWR_EN#
LID_SW#
#6/27
EVT
EC_SI_SPI_SO
EC_SO_SPI_SI
EC_SPICLK
SPI_CS#
VGATE
<9,13,35>
WOL_EN# <22>
LID_SW#
+3V_EC
<26>
1
330K_0402_5%
2
R307
D21
EC_SI_SPI_SO <25>
EC_SO_SPI_SI <25>
EC_SPICLK <25>
SPI_CS# <25>
ACIN_D
USB_OC#0_1_EC <18>
USB_OC#4_EC <18>
FSTCHG <30>
BATT_FULL_LED# <26>
CAPS_LED# <25>
BATT_CHG_LOW_LED# <26>
PWR_ON_LED# <26>
SYSON
<6,27,32>
VR_ON
<35>
<13,30>
+3VALW
R5
10K_0402_5%
USB_OC#0_1_EC 2
1
USB_OC#4_EC
R6
10K_0402_5%
2
1
#DVT USB_OC# control by EC
Delet ARROW_LED#
#6/27 EVT
PM_SLP_S4# <6,13>
ENBKL
<7>
ACIN
Add D21 for AC-IN leakage issue
EC_RSMRST# <13>
EC_LID_OUT# <13>
EC_ON
<26>
EC_SWI# <13>
EC_PWROK <13>
BKOFF#_L <16>
WL_OFF# <17>
UWB_OFF# <17>
EC_THERM#
SUSP#
PBTN_OUT#
LOM_WAKE#
Chenge EAPD to NC
#6/27 EVT
EC_THERM# <13>
SUSP#
<27,33,34>
PBTN_OUT# <13>
LOM_WAKE# <22>
20mil
C391
4.7U_0603_6.3V6K
20mil
+5VS
BATT_TEMPA
1
C388
21
23
26
27
BATT_TEMP/AD0/GPIO38
BATT_OVP/AD1/GPIO39
ADP_I/AD2/GPIO3A
Input
AD3/GPIO3B
AD4/GPIO42
SELIO2#/AD5/GPIO43
SM Bus
01/11 Reserve EC pin17 for WP function.
R302
@ 10_0402_5%
+3V_EC
R614
C385
@ 22P_0402_50V8J
PWM Output
11
24
35
94
113
PCI_RST#
1
0.1U_0402_16V4Z
2
C389
R318
10K_0402_5%
+EC_AVCC
CLK_PCI_LPC
+3VL
2
1
0_0603_5%
INVT_PWM/PWM1/GPIO0F
BEEP#/PWM2/GPIO10
FANPWM1/GPIO12
ACOFF/FANPWM2/GPIO13
+3V_EC
GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1
LAD0 LPC & MISC
DA Output
For EC recommend 10/17

01/06 Add HW board ID in EC pin16
9
22
33
96
111
125
U29
0.1U_0402_16V4Z
AGND
R303
47K_0402_5%
2
1
69
+3V_EC
GATEA20
EC_KBRST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0
<11>
GATEA20
<11> EC_KBRST#
<11>
SERIRQ
<13> LPC_FRAME#
<13>
LPC_AD3
<13>
LPC_AD2
<13>
LPC_AD1
<13>
LPC_AD0
12/31 Add for miniI PCIE debug card.
C384
1
2
VCC
VCC
VCC
VCC
VCC
VCC
C383
1000P_0402_50V7K
C382
1000P_0402_50V7K
<17> LPC_AD0_R
C381
0.1U_0402_16V4Z
<17> LPC_AD1_R
C380
0.1U_0402_16V4Z
<17> LPC_AD2_R
C379
0.1U_0402_16V4Z
<17> LPC_AD3_R
2 LPC_FRAME#
@ R310
2 LPC_AD3
@ R311
2 LPC_AD2
@ R315
2 LPC_AD1
@ R316
2 LPC_AD0
@ R317
C378
0.1U_0402_16V4Z
LPC_FRAME#_R
0_0402_5%
LPC_AD3_R
0_0402_5%
LPC_AD2_R
0_0402_5%
LPC_AD1_R
0_0402_5%
LPC_AD0_R
0_0402_5%
<17> LPC_FRAME#_R
01/06 Reserve +3VL power for EC
+3VALW
@ R612
2
1
0_0603_5%
R613
2
1
0_0603_5%
+EC_AVCC
+3V_EC
1
R595
1
R597
TP_CLK
2
4.7K_0402_5%
TP_DATA
2
4.7K_0402_5%
01/11 Reserve EC_CLK for KBC

Layout: R322 need to close EC pin123
Issued Date
Compal Secret Data
2010/06/27
Deciphered Date
2011/6/27
Title
Custom
SCHEMATIC MB A6851
Rev
D
401986
Date:
Sheet
24
of
36
+5VS
SPI Flash (8Mb*1)
+3VS
# DVT For RF
# DVT For RF
10_0603_5%
JFAN
1
2
3
4
EC_PWM_FAN_R
+5VS
+3V_EC
2/3 DVT: Add C501,C502,C503,R412 for EMI request

+3V_EC
RF@
C221
68P_0402_50V8J
1
2
3
4
330P_0402_50V7K
1
1
C503
C502
U36
<24> SPI_CS#
R321
0_0402_5%
<24> EC_SI_SPI_SO
CE#
VDD
SO
HOLD#
WP#
SCK
EC_SPICLK
VSS
SI
EC_SO_SPI_SI
2
2
470P_0402_50V8J
R600
1
<24> FAN_SPEED1
<24> EC_PWM_FAN
R887
2
10K_0402_5%
RF@
C223
68P_0402_50V8J
R332
10K_0402_5%
RF@
C222
68P_0402_50V8J
# DVT For RF
FAN Control Circuit
5
6
@
C218
68P_0402_50V8J
GND1
GND2
<24>
WP_R
ACES_88231-04001
CONN@
C501
330P_0402_50V7K
8M W25Q80BVSSIG SOIC 8P
01/11 Reserve WP function for SPI ROM

1
#DVT Reserve for EC protect
C508
C411
0.1U_0402_16V4Z
EC_SPICLK <24>
EC_SO_SPI_SI <24>
# PVT remove EON BIOS ROM
R412
1
2
33_0402_5%
12P_0402_50V8J
RF@
EC_SPICLK
RF@
LPC Debug Port
KEYBOARD
CONN.
KSI[0..7]
KSI[0..7]
KSO[0..15]
<24>
KSO[0..15] <24>
JKB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
R382 1
KSI1
KSI6
KSI5
KSI0
KSI4
KSI3
KSI2
KSI7
KSO15
KSO12
KSO11
KSO10
KSO9
KSO8
KSO13
KSO7
KSO6
KSO14
KSO5
KSO3
KSO4
KSO0
KSO1
KSO2
2 300_0402_5%
KSI0
C414 1
100P_0402_50V8J
KSI1
C419 1
100P_0402_50V8J
KSI2
C416 1
100P_0402_50V8J
KSI3
C418 1
100P_0402_50V8J
KSI4
C422 1
100P_0402_50V8J
KSI5
C424 1
100P_0402_50V8J
KSI6
C426 1
100P_0402_50V8J
KSI7
C428 1
100P_0402_50V8J
KSO0
C430 1
100P_0402_50V8J
KSO1
C432 1
100P_0402_50V8J
KSO2
C434 1
100P_0402_50V8J
KSO3
C436 1
100P_0402_50V8J
KSO4
C415 1
100P_0402_50V8J
KSO5
C420 1
100P_0402_50V8J
KSO6
C417 1
100P_0402_50V8J
KSO7
C421 1
100P_0402_50V8J
KSO8
C423 1
100P_0402_50V8J
KSO9
C425 1
100P_0402_50V8J
KSO10
C427 1
100P_0402_50V8J
KSO11
C429 1
100P_0402_50V8J
KSO12
C431 1
100P_0402_50V8J
KSO13
C433 1
100P_0402_50V8J
KSO14
C435 1
100P_0402_50V8J
KSO15
C437 1
100P_0402_50V8J
CAPS_LED#
C461 1
100P_0402_50V8J
CAPS_LED# <24>
+3VS
@ ACES_88170-3400
12/18 Follow KB Matrix the same to KSKAA
Compal ElectronicsInc
Compal Secret Data
Issued Date
3/4 PVT:Mount C414~C437,C461 for EMI request
2010/06/27
Deciphered Date
2011/6/27
Title
Size
Date:
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
25
of
36
Power Button
Touch/B Connector
#DVT change power

ON/OFF power rail +3VALW-->+3V_EC
+3V_EC
1/22 DVT:JTOUCH pin define reversal
+5VS
R324
ON/OFFBTN# <24>
51_ON#
R325
0_0603_5%
<24>
<24>
<28>
CHN202UPT SC-70
1
<24>
LID_SW#
1
2
3
4
5
6
G2
G1
8
7
C405
1 1U_0402_6.3V4Z
Q15
D26
PJDLC05_SOT23-3
CONN@
S 2N7002_SOT23
#MP Change To E&T footprint

2
1
R327
10K_0402_5%
1
2
3
4
5
6
E-T_7182K-F06N-00R
2
G
3
EC_ON
2 0_0402_5%
TP_DATA
TP_CLK
<24>
JTOUCH
R223
1
100K_0402_5%
D24
ON/OFFBTN#_R 1
@ R333
R331
JPOWER
5
6
GND
GND
JOINT_F1017WR-S-04P
CONN@
0_0402_5%
D27
@
C505
180P_0402_50V8J
PJSOT24C_SOT23-3
3
1
2
C538
0.1U_0402_16V4Z
2 FBMA-10-100505-151T
0_0402_5%
+3VL
2
@
R415 1
1
2
3
4
+3VALW
ON/OFFBTN#_R
1
2
3
4
# MP change LID power to +3VL
# DVT change D27 reverse voltage

to 24V from 6V
LED Conn
ISPD
JLED
+5VS
+5VALW
<24> BATT_CHG_LOW_LED#
<24> BATT_FULL_LED#
<24> PWR_SUSP_LED#
<24> PWR_ON_LED#
<17,24> LED_WIMAX#
SATALED#_R
1
2
3
4
5
6
7
8
9
10
11
12
1
2
3
4
5
6
7
8
9
10
GND
GND
ZZZ
PCB
PCB LA-6851
4/7 MP:PCB P/N Change to DAZ08100105
P-TWO_161021-10021
CONN@
# PVT change non ZIF for cost

D50
2
3
SATALED#_R
D51
2
1
CR_LED# <23>
3
SATALED# <11>
Compal Secret Data
2010/06/27
Issued Date
Deciphered Date
2011/6/27
Title
SCHEMATIC MB A6851
Custom
Date:
Rev
D
401986
Sheet
E
26
of
36
+3VALW TO +3VS
+5VALW TO +5VS
4/2 MP:For EMI ESD solution
2/25 PVT:Change C447 with 0.022uF
C449
470_0805_5%
1 R346
2
47K_0402_5%
R349
200K_0402_5%
@
4.7U_0805_10V4Z
R343
+VSB
3 1
Q7A
Q7B
SUSP
2
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
Q6B
SUSP
2
5
2N7002DW-T/R7_SOT363-6
2N7002DW-T/R7_SOT363-6
C448
Q6A
330K_0402_5%
R348
1
C442
1U_0402_6.3V4Z
+VSB
3 1
C447
C446
1 R344
2
47K_0402_5%
1
C441
R342
0.01U_0402_25V7K
4.7U_0805_10V4Z
1U_0402_6.3V4Z
+5VS
SI7326DN-T1-E3_PAK1212-8
Q19
1
2
5
3
4.7U_0805_10V4Z
+5VALW
C440
0.022U_0402_16V7K
C529
1
C439
4.7U_0805_10V4Z
@1
Vgs=-0V,Id=9A,Rds=18.5mohm
SI7326DN-T1-E3_PAK1212-8
Q18
1
2
5
3
0.1U_0402_16V4Z
+3VS
470_0805_5%
+3VALW
3/23 For EMI ESD solution
+5VALW
SYSON#
SYSON#
<6>
R362
100K_0402_5%
Q28B
SYSON
2N7002DW-T/R7_SOT363-6
5
4
<6,24,32> SYSON
R402
10K_0402_5%
R363@
470_0603_5%
R604@
470_0603_5%
1
3
2N7002DW-T/R7_SOT363-6
SUSP
2N7002DW-T/R7_SOT363-6
C1060
10U_0805_10V4Z
C1061
+3VALW
1
R606
C1062
0.01U_0402_25V7K
5
6
Q35B
2N7002DW-T/R7_SOT363-6
@
C532
Q35A
1U_0402_6.3V4Z
SUSP#
2N7002DW-T/R7_SOT363-6
@ Q24
2
G
SUSP
Compal Secret Data
2N7002_SOT23 S
2N7002_SOT23 S
2
1
1U_0402_6.3V4Z
2SYSON#
G
3
2N7002DW-T/R7_SOT363-6
@ Q26
1
2
2
@
C533
SUSP
+VSB
R607
10K_0402_5%
1 R605
2
47K_0402_5%
8/14 R237 for HW design

R365@
470_0603_5%
1
1
2
1
@
R367
470_0603_5%
8/31 Change Q20 from SB000002880 to SB00000DW00 for HW design
7/9 Add Q29, Q30, R228 for Intel power sequence
@Q25A
2009/04/07
Issued Date
Deciphered Date
2012/10/21
Title
Custom
SCHEMATIC MB A6851
Rev
D
401986
Date:
<33>
reserve UO8 to control power down sequence between

1.8vs and 1.05vs,01/08,2010
+1.5V
6 1
P
3
+1.05VS
@
R366
470_0603_5%
1P8_EN
@ RO227
10K_0402_5%
C1059
2/6 DVT: Reserve +1.5VS,+1.05VS,+0.75VS,+1.8VS discharge circuit
+0.75VS
TC7SH08FUF_SSOP5
1U_0402_6.3V4Z
SUSP
2N7002DW-T/R7_SOT363-6
R401
10K_0402_5%
@ Q31B
SUSP
4.7U_0805_10V4Z
@ Q25B
@Q31A
2N7002DW-T/R7_SOT363-6
<24,33,34> SUSP#
1
6
6
Q28A
+1.5VS
SI7326DN-T1-E3_PAK1212-8
Q33
1
2
5
3
SUSP
SUSP
2
R603
470_0603_5%
1
0.1U_0402_25V6
+1.5V
+1.8VS
200K_0402_5%
2
1
+1.5VS
<33> VCCP_POK
@
UO8
CO836
+0.89VS
R361
470_0603_5%
<32>
SUSP#
+1.5V TO +1.5VS
@
2
#DVT change to 470 ohm for

+5VALW
+VS power leakage
+3VS
Sheet
E
27
of
36
VIN
PL1
SMB3025500YA_2P
1
2
PF1
DC301001M80
DC_IN_S1 1
DC_IN_S2
@ SINGA_2DW-0005-B03
PC4
100P_0402_50V8J
1
2
PC3
1000P_0402_50V7K
PC2
100P_0402_50V8J
1
1
PC1
1000P_0402_50V7K
5A_24V_0466005.NR
PJP1
VIN
PD3
PR8
68_1206_5%
2
PD4
2
BATT+
2
PR9
68_1206_5%
N1
PQ4
BSS84_SOT23-3
RLS4148_LL34-2
VS
2
RLS4148_LL34-2
PC6
PR10
100K_0402_1%
PC5
0.1U_0603_25V7K
0.22U_0603_25V7K
PR11
<26>
51_ON#
22K_0402_1%
PJ330
2
+3VALWP
PJ150
1
+3VALW
+1.5VP
@ JUMP_43X118
+1.5V
@ JUMP_43X118
(6A,240mils ,Via NO.= 10)
(4.1A,180mils ,Via NO.= 12)
(OCP min=8A)
(OCP min=6.03A)
PJ350
2
+5VALWP
PJ105
1
+5VALW
+1.05VSP
+1.05VS
@ JUMP_43X118
@ JUMP_43X118
(5.5A,220mils ,Via NO.= 10)
(3.5A,140mils ,Via NO.=7)
(OCP min=7.8A)
PJ180
PJ5
2
+VSBP
+VSB
+1.8VSP
+1.8VS
@ JUMP_43X118
@ JUMP_43X39
(120mA,40mils ,Via NO.= 1)
PJ75
2
+0.75VSP
PJ89
1
+0.75VS
@ JUMP_43X79
+0.89VSP
+0.89VS
@ JUMP_43X118
(2.6A,120mils ,Via NO.=6)
PJ331
+3VLP
+3VL
@ JUMP_43X39
(100mA,40mils ,Via NO.= 2)
Issued Date
Compal Secret Data
2009/06/12
Deciphered Date
2010/06/12
Title
Size
Date:
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
D
28
of
36
VMB
7A_24VDC_429007.WRML
PJP2
1
BATT+
PC8
0.01U_0402_25V7K
2
PC7
1000P_0402_50V7K
PR14
1K_0402_1%
PH1 under CPU botten side :

CPU thermal protection at 95 degree C
Recovery at 56 degree C
BATT_S1
BATT_P4
BATT_P5
EC_SMDA
EC_SMCA
9
8
7
6
5
4
3
2
1
GND
GND
9
8
7
6
5
4
3
2
1
PL2
SMB3025500YA_2P
1
2
PF2
10
11
@ SUYIN_200045MR009G171ZR
VL
1
PD6
PJSOT24C_SOT23-3
PD5
PJSOT24C_SOT23-3
2
1
PR15
19.6K_0402_1%
+3VL
1
PC9
0.1U_0402_25V6
PR16
6.49K_0402_1%
2
1
PR18
8.66K_0402_1%
BATT_TEMPA <24>
<31>
VCC TMSNS1
GND RHYST1
OT1 TMSNS2
OT2 RHYST2
VS_ON
PH1
100K_0402_1%_NCP15WF104F03RC
2
PR21
100_0402_1%
1
PR20
100_0402_1%
PU1
PR19
1K_0402_1%
G718TM1U_SOT23-8
EC_SMB_DA1 <24>
EC_SMB_CK1 <24>
PQ5
BSS84_SOT23-3
B+
+VSBP
PR24
1
PR25
100K_0402_1%
1
2
1
2
VL
PC10
0.22U_0603_25V7K
2
1
PR23
100K_0402_1%
PC11 @
0.1U_0603_25V7K
22K_0402_1%
PR26
<13,31>
POK
PQ6
SSM3K7002FU_SC70-3
2
G
@ PC12
.1U_0402_16V7K
0_0402_5%
Issued Date
Compal Secret Data
2009/11/13
Deciphered Date
2009/04/28
Title
Size
Date:
SCHEMATIC MB A6851
Document Number
Rev
D
401986
D
Sheet
29
of
36
PC225
PC226
0.1U_0402_25V6
2200P_0402_50V7K
CSIP
VIN
1
DCIN 2
17
DH_CHG
CHLIM
BOOT
16
PR205
BST_CHG 1
2
0_0603_5%
PR222
6251aclim
10
ACLIM
VDDP
15
6251VDDP
LGATE
14
DL_CHG
PGND
13
24.9K_0402_1%
PR223
20K_0402_1%
PC205
BST_CHGA 2
1
11
VADJ
12
GND
0.1U_0603_25V7K
PD202
RB751V-40_SOD323-2
1
2 6251VDD
PR233
PC221
4.7U_0603_6.3V6M
2
PR206
4.7_1206_5%
0.02_1206_1%
PC206
680P_0603_50V7K
4.7_0603_5%
UGATE
VREF
BATT+
PQ202
AON4708L
6251VREF
PR235
CHG
6251VREF
1
PL202
10UH_MPL73-100_3A_20%
1
2
LX_CHG
PHASE
18
PQ201
AON4708L
19
BATT_ON
PC229
2200P_0402_50V7K
1
PC216
ACOFF
PR221
100K_0402_1%
ICM
<24>
PQ213
DTC115EUA_SC70-3
ACOFF
2
CSIP
VCOMP
PR2312
1 20_0402_5%
PC220
0.1U_0603_25V7K
1
2
PR232
2_0402_5%
PC204
0.1U_0402_25V6
2
1
20
PR238
100K_0402_1%
CSOP
PC202
10U_1206_25V6M
2
1
PC203
10U_1206_25V6M
2
1
CSIN
ICOMP
PC219
0.047U_0402_16V7K
1
2
PR230
20_0402_5%
IREF
.1U_0402_16V7K
<24>
21
CSOP
PC215
1
2
PR220
309K_0402_1%
2
1
CSON
CELLS
PR211
47K_0402_1%
1
2
ADP_I
EN
6
PR219
1
2
47K_0402_1%
<24>
10K_0402_1%
CSON
22
0.01U_0402_25V7K
PR229 20_0402_5%
1
2
6800P_0402_25V7K
PR218
PQ215
DTC115EUA_SC70-3
ACPRN
5
G
PACIN
PC214
1
2
0.01U_0402_25V7K
PQ212B
DMN66D0LDW-7_SOT363-6
3
2
1
PC213
1
2
VIN
PR228
14.3K_0402_1%
23
ACSET ACPRN
PQ212A
ACSETIN
6251_EN
2
1 1
100K_0402_1%
PQ211
DTC115EUA_SC70-3
24
DCIN
PR236
1
2
47K_0402_1%
PR237
10K_0402_1%
PC218
VDD
8
7
6
5
0.1U_0603_25V7K
PR217
PR213
150K_0402_1%
G
1
PU200
1
FSTCHG
1
BATT_ON
<24>
PR227
10_1206_5%
PQ210
PDTA144EU_SOT323-3
PC217
1000P_0402_25V8J
2
1
PR216
10K_0402_1%
2
1
PD201
RB751V-40_SOD323-2
47K
PR226
191K_0402_1%
47K
2
6251VDD
ACSETIN
PR212
200K_0402_1%
PC211
5600P_0402_25V7K
PC212
2.2U_0603_6.3V6K
PR210
200K_0402_1%
PC210
0.1U_0603_25V7K
2
1
1
2
3
PQ207
AO4435_SO8
2
1
1.2UH_1127AS-1R2N_2.4A_30%
CSIN
PC224 47P_0402_50V8J
2
1
B340A_SMA2
8
7
6
5
CHG_B+
PL201
PC208
0.1U_0402_25V6
2
1
PC222
2200P_0402_50V7K
2
1
1
2
3
3
2
1
B+
0.05_1206_1%
PC231
4.7U_0805_25V6-K
2
1
PC232
4.7U_0805_25V6-K
2
1
PC233
4.7U_0805_25V6-K
2
1
PC207
10U_1206_25V6M
2
1
VIN
P3
PQ204
AO4407A_SO8
PC228 47P_0402_50V8J
2
1
PR215
P2
PD203
PC209
10U_1206_25V6M
2
1
PC227
10U_1206_25V6M
2
1
ISL6251AHAZ-T_QSOP24
CP mode
PR224
Iada=0~1.579A(30W) CP= 92%*Iada; CP=1.45A

Vaclim=1.08132V(30W)
PR70=53.6k
<24> CHGVADJ
15.4K_0402_1%
PR216=0.05
PR225
31.6K_0402_1%
3.309V
PR242
10K_0402_1%
ACIN
<13,24>
PR246
309K_0402_1%
PR247
10K_0402_1%
1
2
PACIN
ADP_V
<24>
Ki
Vchlim=Iref*(PR221/(PR220+PR221))
=Iref*(100K/(309K+100K))
=Iref*0.2444
Ichanrge=(165mV/PR235)*(Vchlim/3.3V)
=(165m/20m)*(1/3.3V)*Iref*0.5537
=0.611*Iref
Iref=1.636*Ichanrge =>Ki=1.636
PR241
10K_0402_1%
1
2
PQ214
DTC115EUA_SC70-3
PR243
14.3K_0402_1%
Vin Detector
PR248
PC223
.1U_0402_16V7K
47K_0402_1%
High 18.089V
Low 17.44V
ACPRN
4.35V
PR240
47K_0402_1%
2
0V
1.898V
4.2V
4V
IREF=0.409V~3.272V
VCHLIM need over 95mV
CHGVADJ
1
Vcell
IREF=1.636*Icharge
VIN
6251VDD
CHGVADJ=(Vcell-4)*9.455
CC=0.25A~2A
Kv
Rinternal ic=514K Rec=3K R1=PR224=15.4K R2=PR225=31.6K
R=514K//31.6K//(15.4K+3k)=11.372K
r=514K//514K//31.6K=28.14K
Vcell=0.175*Vadj+3.99v
4.2V=0.175*Vadj+3.99V =>Vadj=1.2V
Vadj=Vref*(R/(R+514K))+CALIBRATE*(r/(r=514K))
1.1483=CALIBRATE*0.6046 =>CALIBRATE=1.899
1.899=(4.2-(Vcell+A*0.175))*Kv=(4.2-(4.2+A*0.175))*Kv
A=Vref*(R/(R+514K))=0.052
Kv=9.455
Issued Date
Compal Secret Data
2010/01/25
Deciphered Date
2009/04/28
Title
SCHEMATIC MB A6851
Date:
Rev
D
401986

D
Sheet
30
of
36
2VREF_6182
PC363
1U_0402_6.3V6K
12
DRVL2
DRVL1
19
VL
1
+
PC352
150U_B_6.3VM_R45M
2
1
3
2
1
680P_0603_50V7K
PC371
S CER CAP 0.1U 25V K X5R 0402
2
1
VCLK
PQ352
@ PC356
PC373
2200P_0402_50V7K
2
1
@ PR356
4.7_1206_5%
PC364
4.7U_0603_6.3V6K
Ipeak=5.5A
Imax=3.85A
F=300KHz
Total Capacitor 150uF,
ESR 35mohm
UP6182_B+
+5VALWP
LG_5V
18
17
16
15
PL352
4.7UH_FDVE0630-H-4R7M=P3_5.5A_20%
1
2
PU330
TPS51125ARGER_QFN24_4X4
13
1
2
PC355
2 0.1U_0603_25V7K
3
2
1
LG_3V
<13,29>
LL1
PR361
2200P_0402_50V7K
PC368
1
2
PC366
10U_1206_25V6M
PC372
0.1U_0402_25V6
1
ENTRIP1
LL2
LX_5V
AON7408L
PC365
0.1U_0603_25V7K
2VREF_6182
2
VFB1
21
20
PQ360B
VREF
DRVH1
VREG5
DRVH2
11
VIN
10
LX_3V
1
D
5
G
UG_3V
PR355
BST_5V 1
2
0_0603_5%
UG_5V
EN0
3
G
D
PQ360A
VFB2
22
ENTRIP2
ENTRIP1
TONSEL
23
VBST1
GND
PGOOD
VBST2
1
PC362
1U_0402_6.3V6K
POK
VREG3
100K_0402_5%
B+
24
PR360
499K_0402_1%
1
2
PQ351
4
VO1
PQ332
S TR AON7702L
2
1
Ipeak=6A
Imax=4.2A
F=375KHz
ESR 35mohm
PR357
120K_0402_1%
1
2
BST_3V
1
2
3
@ PC336
680P_0603_50V7K
UP6182_B+
S TR AON7702L
VO2
SKIPSEL
1
B
@ PR336
4.7_1206_5%
1
150U_B_6.3VM_R45M
PC332
PC369
0.1U_0402_25V6
ENTRIP2
6
PR335
1
2
0_0603_5%
P PAD
ENTRIP2
25
14
1
2
3
PC335
0.1U_0603_25V7K
1
PR337
120K_0402_1%
1
2
PL332
4.7UH_FDVE0630-H-4R7M=P3_5.5A_20%
1
2
+3VALWP
PC361
AON7408L
PR365
19.1K_0402_1%
1
2
4.7U_0603_6.3V6K
2200P_0402_50V7K
PQ331
PC367
10U_1206_25V6M
2
1
PC360
1
2
PC374 0.1U_0402_25V6
2
1
PC375 47P_0402_50V8J
+3VLP
PR363
20K_0402_1%
1
2
ENTRIP1
B+
PL331
HCB2012KF-121T50_0805
1
2
PR364
30K_0402_1%
1
2
UP6182_B+
PR362
13K_0402_1%
1
2
PR370
2
1
100K_0402_1%
VL
<29>
PQ361
DTC115EUA_SC70-3
VS_ON
PR371
1
2
PR372
2
42.2K_0402_1%
1
2
100K_0402_1%
VS
@ PC370
0.1U_0402_16V4Z
Compal Secret Data
2009/11/13
Issued Date
Deciphered Date
2009/04/28
Title
Size
Date:
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
1
31
of
36
PL151
HCB2012KF-121T50_0805
1
2
PR160
PGOOD
DL_1.5V
G5603RU1U_TQFN14_3P5X3P5
PC162
4.7U_0805_10V6K
PC164
4.7U_0805_25V6-K
2
1
PC163
4.7U_0805_25V6-K
2
1
PC168
0.1U_0402_25V6
2
1
PC169
0.1U_0402_25V6
2
1
+
2
PC156
680P_0603_50V7K
Ipeak=4.5A
Imax=3.15A
F=313KHz
ESR 25mohm
PGND
AGND
DL
PR156
4.7_1206_5%
FB
<6> SM_PWROK
+5VALW
PC170 2200P_0402_50V7K
10
5
1
PC161
4.7U_0603_6.3V6K
PR157
1
2
8.2K_0402_1%
PC167
0.1U_0402_25V6
2
1
VDD
VFB=0.75V
PC152
LX_1.5V
11
+1.5VP
220U_B2_2.5VM
12
ILIM
LX
VCC
0.1U_0603_25V7K
14
TP
OUT
BST
DH_1.5V
100_0603_5%
13
TON
PL152
S COIL 2.2UH +-20% PCMC063T-2R2MN 8A
PC155
1
2
PQ152
S TR AON7702L 1N DFN
BST_1.5V-1
3
2
1
1
2
0_0603_5%
DH
PR161
+5VALW
EN_SKIP
PU150
15
1
2
PC160 @
.1U_0402_16V7K
3
2
1
BST_1.5V
0_0402_5%
B+
PR155
<6,24,27> SYSON
PC165
2200P_0402_50V7K
2
1
PR164
255K_0402_1%
1
2
PQ151
AON4708L
1.5_B+
PR165
10K_0402_1%
+1.5VP
PR162
1
10K_0402_1%
PR163
10K_0402_1%
+1.5V
3
PJ76
JUMP_43X79
@
PU75
VCNTL
GND
NC
VREF
NC
VOUT
NC
TP
+3VALW
VIN
PC261
2
PR261
1K_0402_1%
2
PC260
4.7U_0805_6.3V6K
1U_0603_10V6K
+0.75VSP
PC263
.1U_0402_16V7K
2
1
1
2
PR263
1K_0402_1%
PQ261
SSM3K7002FU_SC70-3
PC262
.1U_0402_16V7K
2
G
1
<27> SUSP
G2992F1U_SO8
PR262
0_0402_5%
1
2
PC264
10U_0603_6.3V6M
For shortage changed
Issued Date
Compal Secret Data
2010/01/25
Deciphered Date
2009/04/28
Title
SCHEMATIC MB A6851
Date:
Rev
D
401986

D
Sheet
32
of
36
PC181
1U_0603_10V6K
PJ181
@ JUMP_43X39
+5VALW
+3VALW
PC182
4.7U_0805_25V6-K
PU180
PR183
2.4K_0402_1%
2
VCCP_POK
0.1U_0402_10V7K
PR405
13.7K_0402_1%
1
2
PC401@
FB_1.05V
PC404
22U_0805_6.3V6M
@ PR401
499K_0402_1%
0_0402_5%
PR404
10K_0402_1%
PC403
22U_0805_6.3V6M
PR403
2
NC
NC
FB=0.6Volt
2 EN_1.05V
PR402
PC406
11
<24,27,34> SUSP#
TP
PC405
22U_0805_6.3V6M
Ipeak=3.5A
ILIM = 2.45A
F=1MHz
Total Capacitor66uF,
+1.05VSP
FB
LX_1.05V
PC402
68P_0402_50V8J
2
1
EN
SVIN
LX
LX
PVIN
PVIN
10
PL400
1UH_PCMC063T-1R0MN_11A_20%
1
2
4.7_1206_5%
JUMP_43X39
PG
@ PJ400
2
PU400
SY8033BDBC_DFN10_3X3
680P_0603_50V7K
PR410
10K_0402_1%
+3VS
+5VALW
0.47U_0402_6.3V6K
PR182
3K_0402_1%
APL5930KAI-TRG_SO8
@ PC185
FB
+1.8VSP
PC184
22U_0805_6.3V6M
3
4
1
EN
POK
VOUT
VOUT
PC183
0.01U_0402_25V7K
8
7
VCNTL
VIN
VIN
GND
PR184
0_0402_5%
1
2
<27> VCCP_POK
6
5
9
1P8_EN
<27>
@ PR181
0_0402_5%
1
2
Pin 1 define same with Pin 2 & Pin 3 that just for SY8035 ,
SY8035 is for 5A loading , let LX shape can bigger!!
Compal Secret Data
Issued Date
2010/01/25
Deciphered Date
2009/04/28
Title
SCHEMATIC MB A6851
Date:
Rev
D
401986

D
Sheet
33
of
36
@ PR271
499K_0402_1%
2
PC271@
0.1U_0402_10V7K
PR275
21K_0402_1%
1
2
Ipeak=3A
ILIM = 2.1A
F=1MHz
ESR 9mohm
FB_0.89V
PC274
22U_0805_6.3V6M
1
PC276
0_0402_5%
PR274
10K_0402_1%
PR273
2
NC
NC
FB=0.6Volt
PC273
22U_0805_6.3V6M
FB
2 EN_0.89V
PR272
11
<24,27,33> SUSP#
TP
PC275
22U_0805_6.3V6M
+0.89VSP
PC272
68P_0402_50V8J
2
1
EN
SVIN
LX
PVIN
LX_0.89V
JUMP_43X39
LX
4.7_1206_5%
PVIN
680P_0603_50V7K
10
PL89
1
2
+5VALW
PG
PU89
SY8033BDBC_DFN10_3X3
@ PJ891
Pin 1 define same with Pin 2 & Pin 3 that just for SY8035 ,
SY8035 is for 5A loading , let LX shape can bigger!!
Issued Date
Compal Secret Data
2010/01/25
Deciphered Date
2009/04/28
Title
SCHEMATIC MB A6851
Date:
Rev
D
401986

D
Sheet
34
of
36
0_0402_5%
+CPU_B+
1
2
PC504
0.1U_0402_25V6
1
2
PC505
2200P_0402_50V7K
1
2
PC503
4.7U_0805_25V6M
1
2
1
2
5
1
17
PC511
2.2U_0603_10V6K
4
+CPU_CORE
JUMP_43X118
@ PR506
4.7_1206_5%
LL=5.9m ohm
OCP=12A
VID:0.75V~1.1V
Io(max)=6.3A
33
@ PC506
680P_0603_50V7K
3
2
1
CSCOMP
AGND
3211_DRVL
16
CSFB
15
LLINE
PH500
100K_0402_1%_TSM0B104F4251RZ
1
Place RTH1 close to inductor

on the same layer
1
1
2
RAMP
CSREF
14
13
PJ501
+CPU_COREP
AGND
+5VALW
PQ502
AON7212L
19
18
B+
PC515
330P_0402_50V7K
PC514
680P_0402_50V7K
PR525
75K_0402_1%
1
3
PR526
124K_0402_1%
PC516
1000P_0402_50V7K
PL501
1
2
DRVL
PGND
AON7408L
3
2
1
20
Connect to input caps
PC501
4.7U_0805_25V6M
2
1
PVCC
PR523
35.7K_0402_1%
2
1
PR524
499K_0402_1%
RT
12
3211_RAMP
1
2
3211_VCC
25
26
VID5
27
VID4
VID3
VID6
3211_SW
3211_RAMP-1
PR527
1K_0402_1%
2
1
<8>
<8>
VCCSENSE
VSSSENSE
+CPU_B+
28
29
VID2
VID1
30
11
3211_RT
PR521
200K_0402_1%
1
2 3211_RPM
PR520
80.6K_0402_1%
3211_IREF
2
1
2
1
1
3
3211_DRVH
21
3211_CSCOMP
PR503
0_0402_5%
3211_CSFB
PR502
0_0402_5%
PU500
3211_CSCOMP
3211_CSCOMP 1
PR516
4.22K_0402_1%
ILIM
22
SW
3211_ILIM 8
DRVH
COMP
PR517
28K_0402_1%
PL500
HCB2012KF-121T50_0805
PQ501
PR519
PC519
0_0603_5%
0.22U_0603_25V7K
23 CPU_BOOST 1
2CPU_BOOST-1
1
2
24
GPU
Avoid high dV/dt
ADP3211AMNR2G_QFN32_5X5
FB
31
32
EN
5
3211_COMP 6
PC513
470P_0402_50V8J
FBRTN
IREF
CLKEN#
PR518
1K_0402_1%
23211_COMP-1
1
IMON
PC512
47P_0402_50V8J
RPM
3211_FB
PC510
390P_0402_50V7K
BST
10
CLK_ENABLE#
PWRGD
CLK_ENABLE#
PR522
274K_0402_1%
1
2
PC509
1000P_0402_50V7K
VID0
1
2
1
2
VCC
PC507
1U_0805_25V6K
PC500
4700P_0402_25V7K
1
VID6
PR510
10_0603_1%
1
1
VID5
PR514
0_0402_5%
1
VID4
PR513
1
VID3
PR512
0_0402_5%
0_0402_5%
1
VID2
PR511
0_0402_5%
1
VID1
PR509
0_0402_5%
+5VALW
+3VS
PR515
10K_0402_1%
<7>
<7>
<7>
<7>
<7>
CPU_VID6
<7>
CPU_VID4
<7>
CPU_VID5
<24>
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
VR_ON
1
VID0
PR508
0_0402_5%
2
2
1
3211_EN
<9,13,24> VGATE
PR501
PR505
0_0402_5%
2
13211_PWRGD
PR507
PR504
PC518
2
0_0402_5%
+3VS
100P_0402_50V8J
10K_0402_1%
PC517
1000P_0402_50V7K
Shortest the
net trace
2009/12/25
Issued Date
Compal Secret Data
Deciphered Date
2012/12/25
Title
Size
Date:
SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
35
H
of
36
NO DATE
PAGE
MODIFICATION LIST
PURPOSE
-----------------------------------------------------------------------------------------------------------------------------2010/8/23(DVT) P32 +1.5VP/+0.75VSP
Change PU75 UP7711(SA00003XI00)
-->G2992(SA00000VE80)
UPI had patent issue
2010/8/23(DVT) P30 Charger
Change PU200 G5209(SA00003TK00 )-->ISL6251(SA00001EP80 )
G5209 had leakage issue
2010/8/23(DVT) P31 +5VALWP/+3VALWP
Change PU330 UP6182(SA000043H00 ) -->TI51125A(SA000020C80 )
UPI had patent issue
add PR247(SD034100280 ) PC223(SE076104K80 )
Support SA ECO unit
PR246(SD034309380) PR248(SD034470280 )
2010/8/23(DVT) P35 CPU_CORE
Change PR526 174K (SD034174380) -->124K(SD034124380)
2010/8/23(DVT) All snuber
Change PC273,PC274,PC275,PC403,PC404,PC405
-->PC273,PC274,PC275,PC403,PC404,PC405
debug CPU load issue
22u(SE000008L80) Chose the same material s
22u(SE000000I10 )
Install PC222 PC224 0.1u (SE00000G880)
Install PC227,PC209,PC207,PC208,PC204 10u (SE142106M80 )
Change PL500(SM01000BY00)-->(SM01000C000)
Install PC371,PC369 0.1u (SE00000G880 )
RF commond
Install PC367 2200P(SE074222K80 )
RF commond
2010/8/23(DVT) P32 +1.5VP
Install PC165 2200P(SE074222K80 )
RF commond
2010/8/23(DVT) P32 +1.5VP
Install PC169,PC168,PC167 0.1u(SE00000G880 )
RF commond
add PC518 (SE071101J80 )
debug CPU VR-ON issue
2010/9/21(PVT) P30 Charger
EMI commond
EMI commond
Chose the same material s
Install PC225 PC208PC204 ( 0.1u) , PC226 PC222 PC229(2200P)
RF commond
Add PC208 add PC228 PC224 (47P),install snubber PR206,PC206

2010/9/21(PVT) P31 +5VALWP/+3VALWP
Add PC372 PC374(0.1u) , PC375(47P) PC371 (2200P)
RF commond
2010/9/21(PVT) P32 +1.5VP
Add PC170(2200P) install snubber PR156 PC156
RF commond
2010/10/8(pre-MP) P30 Charger
Change PL210 to 1.2u (SH00000B100)
EMI commond
2010/10/08(Pre-MP)P31 +5VALWP/+3VALWP
Change PC332 & PC352 to ESR 45 m ohm
cost down plane
2010/10/08(Pre-MP) P32 +1.5VP
Change
cost down plane
PC152 to ESR 35 m ohm
Compal Secret Data
Issued Date
2009/10/02
Deciphered Date
2010/10/02
Title
Size
Date:

SCHEMATIC MB A6851
Document Number
Rev
D
401986
Sheet
44
of
36

Be657 Compal LA-6851P123

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Compal Electronics, Inc.

Compal Secret Data

Friday, September 02, 2011

Low Power Clock Generator

1.5V DDRIII 667

USB port 0,1,4

Card Reader Conn.

DC/DC Interface CKT.

Power Circuit DC/DC

(10A 1X) (10B 2X)

Compal Electronics, Inc.

Compal Secret Data

Adapter power supply (19V)

AC or battery power rail for power circuit.

Core voltage for CPU

0.89VS GFX support voltage

0.75V switched power rail for DDR terminator

VCCP switched power rail

1.5V switched power rail

1.5V power rail for DDR

1.8VS switched power rail

3.3V always on power rail

3.3V power rail for LAN

3.3V power rail for LAN

3.3V switched power rail

5V always on power rail

5V switched power rail

VSB always on power rail

SLP_S3# SLP_S4# SLP_S5#

BTO Option Table

Mini PCI-E SLOT

CAMERA & MIC

ICH7M SM Bus address

Compal Electronics, Inc.

Compal Secret Data

Friday, September 02, 2011

Compal Electronics, Inc.

Compal Secret Data

Cougar Power Map

DESIGN CURRENT 250mA

** The SW just is reserved.

DESIGN CURRENT 522mA

DESIGN CURRENT 300mA

DESIGN CURRENT 3010mA

DESIGN CURRENT 2286mA

DESIGN CURRENT 5586mA

DESIGN CURRENT 2000mA

DESIGN CURRENT 2640mA

DESIGN CURRENT 3489mA

DESIGN CURRENT 6000mA

DESIGN CURRENT 2000mA

DESIGN CURRENT 2112mA

DESIGN CURRENT 500mA

Compal Electronics, Inc.

Compal Secret Data

Friday, September 02, 2011

Pull-down must be placed

Reserve PM_SLP_S4# to turn on DRAM_PWROK

# MP Remove XDP resistor for ESD

Compal Electronics, Inc.

Compal Secret Data

Friday, September 02, 2011

R510 be placed <500 mils to U1.P28