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VLSI

ASSIGNMENT 2

CMOS 2-BIT ADDER

SUBMITTED BY:
VINAY KUMAR JATOTH
120102069

CIRCUIT DIAGRAM OF CMOS 1-BIT ADDER :

TWO BIT FULL ADDER

STICK DIAGRAM FOR CMOS 2-BIT ADDER:

MAGIC LAYOUT OF CMOS 2-BIT FULL ADDER:

IRSIM OUTPUT:

MINIMIZATION OF AREA BY EULER PATH METHOD:

DESCRIPTION:
From the logic minimisation of the 2-bit adder, we get the equations given below:
Sum = ABC in + ABC in + ABC in + ABC in
C out = AB + BC in + AC in
From pull up and pull down network logic the circuit is designed.Then for gate ordering
and circuit minimization, EULER path method is used.
The stick diagram according to EULER path is drawn and with it's help the magic layout is
drawn.
The widths are calculated with respect to the inverter widths.