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We start our study of nonlinear circuit elements. These elements (diodes and transistors) are
made of semiconductors. A brief description of how semiconductor devices work is first given
to understand their i − v characteristics. You will see a rigorous analysis of semiconductors
in the breadth courses.
Energy Bands in Solids
In every atom, the nucleus (positively charged) is surrounded by a cloud of electrons. Initially
scientists envisioned the atomic structure to be similar to the solar system: the nucleus in
the center (similar to the sun), electrons revolving on orbits around the nucleus (similar to
planets), and the electric attraction force between the nucleus and electrons being similar
to the gravitational force between the sun and planets. However, according to Maxwell’s
equations, electrons that revolve around a nucleus should emit electromagnetic radiation. As
such, the electrons should lose energy gradually and their orbit should decay (in a fraction
of a second!). This means that there is a mechanism that would not allow the electrons to
lose energy gradually and is one of main reasons that the quantum theory was developed.
According to quantum theory, electrons revolving around an atom can have only discrete
levels of energy as is shown below. Electrons are not allowed to gradually lose or gain
energy. They can only “jump” from one level to another (by absorbing or emitting a quanta
of energy, usually a photon). Furthermore, there are only a finite number of electrons that
are allowed in each state (Pauli’s Principle). Therefore, both the energy levels for electrons
and the number of electrons at each energy level are specified. Because any system would
tend to be in a minimum energy state, electrons in an atom start by “filing” the lowest
energy level. Once all allowable slots is filled, electrons start filling the next energy level and
so on. Therefore, the electronic structure include “filled” energy levels (all slots are taken
by electrons), “empty” energy levels (positions are available but no electron is present), and
“partially filled” levels (there are some electrons but there is also room for more electrons).
In metals, one of the energy bands is only partially filled. Obvi- Empty Energy Band
ously, all energy bands below (i.e., with lower energies) are com-
Forbidden Gap
pletely filled and all energy bands above are completely empty.
Electrons in the partially filled band can easily move around the Partially Filled Band
solid with smallest amount of energy as there are lots of spaces Forbidden Gap
available. As such, metals can conduct electricity (and heat)
Filled Energy Band
very well.
In a semiconductor, no partially filled band exists. In the filled Metals
energy band, there are a lot of electrons, but there are no avail-
able slot to move into. In the empty band, there are a lot of slots
but no electrons. One would expect that semiconductors to be Empty Energy Band
perfect insulators (for both electricity and heat). However, the
size of the forbidden gap in a semiconductor is small. At room Forbidden Gap
Semiconductors
Semiconductor material are mainly made of elements from group IVB of the periodic table
like C (diamond), Si, Ge, SiC. These material have 4 electrons in their outer most electronic
shell. Each atom can form a “covalent” bond with four of its neighbors sharing one electron
with that atom. In this manner, each atom “sees” eight electrons in its outer most electronic
shell (4 of its own, and one from each neighbor), completely filling that shell. It is also
possible to form this type of covalent bond by combining elements from group IIIB (sharing
three electrons) with element from group VB (sharing five electrons). Examples of these
semiconductors are GaAs or AlGaAs and are usually called “3-5” semiconductors. We focus
mostly on Si semiconductors in this class. Figure below shows this covalent bond structure
for Si. A pair of electrons and holes are slow shown. Note that Si form a tetrahedron
structure and an atom in the center of the tetrahedron share electrons with atoms on the
each vertex. Figure below is a two-dimensional representation of such a structure. The left
figure is for a pure Si semiconductor and an electron-hole pair is depicted. Both electrons
and holes are called “mobile” carriers as they are responsible for carrying electric current.
If we add a small amount of an element from group VB, such as P, to the semiconductor, we
create a n-type semiconductor and the impurity dopant is called a n-type dopant. Each of
these new atoms also form a covalent bond with four of its neighbors. However, as a n-type
dopant has 5 valance electron, the extra electron will be located in the “empty” energy band.
As can be seen, there is no hole associated with this electron. In addition to electrons from
the n-type dopant, there are electron-hair pair in the solid from the base semiconductor (Si in
Si Si Si Si Si Si Si Si Si
Si Si Si Si P Si Si B Si
Si Si Si Si Si Si Si Si Si
In summary, in a n-type semiconductor there are two charge carriers: “holes” from the base
semiconductor (called the “minority” carriers) and electrons from both the n-type dopant
and electron-hole pairs (called the “majority” carrier).
Similarly, we can create a p-type semiconductor by adding an element from group IIIB, such
as B, to the semiconductor. In this case, the p-type dopant generate holes. We will have two
charge carriers: majority carriers are “holes” from the p-type dopant and electron-hole pairs
and minority carriers are electrons from the base semiconductor (from electron-hole pairs).
The charge carriers (electrons and holes) move in a semiconductor through two mechanisms:
First, charge carriers would move from regions of higher concentration to lower concentration
in order to achieve a uniform distribution throughout the semiconductor. This process
is called “diffusion” and is characterized by the diffusion coefficient, D. Second, charge
carriers move under the influence of an electric field. This motion is called the drift and is
characterized by the mobility, µ. The ratio of D and µ is independent of the dopant or the
base semiconductor material and is given by Einstein’s Equation
D kT T
= ' ≈ VT
µ q 11, 600
Since the n-type material has lost electrons, it becomes positively charged. Similarly the p-
type material becomes negatively charged. As a result, an electric potential and an electric
field appears across the depletion region. This electric field (or the voltage barrier) impedes
the flow of electrons from the n-type material and flow of holes from the p-type material.
The height of this voltage barriers is related to the forbidden gap of the base semiconductor
material (and not the amount of dopant).
i − v Characteristics
Let us attach a voltage source to this junction diode such that the positive terminal of the
voltage source is attached to the n-type material. This configuration is called reverse bias.
In this case, some of the free electrons from the n-type material will travel to the voltage
sources making the n-type material side more positively charged. Similarly, some of the
holes from the p-type material would go the voltage source, making the p-type material
more negatively charged. As a result, the depletion region becomes wider and the height of
the potential barrier increases and no majority carriers can cross the depletion region.
+
carriers. On the n-type material side, electron-hole pair are created
due to thermal energy. Electrons move to the voltage source and holes
vD
move to the depletion region. Similarly, on the p-type material side, + −
electron-hole pairs are created, holes are neutralized by electrons from
the voltage source and electrons move to the depletion region. These iD
electrons from the p-type material and holes from the n-type material
Reverse Bias
(minority carriers) combine in the depletion region leading to the flow
of a net current which is called the reverse saturation current, IS . In
−
the circuit above, iD = −IS . IS is very small: at room temperature it is
about several nA (10−9 A) for Si semiconductors. Value of IS strongly
depends on the temperature (as it is related to the electron-hole pro- vD
duction rate) – IS doubles for every increase of ∼ 7◦ C in temperature. + −
Now, let us attach the voltage source to the diode such that the positive iD
terminal is attached to the p-type material. This configuration is called
Forward Bias
forward bias.
Electrons are injected into the p-type material making that region less positively charged
while electrons are taken from the n-type material making it less negatively charged. As a
result, the depletion region become thiner and the height of the potential barrier decreases.
In this case the diffusion process can gradually overcome the force of the electric field and
some of majority carriers can cross the junction and a positive current flows through the
diode. As the voltage source voltage is increased, the potential barrier height become smaller
leading to larger and larger currents (diode current increases exponentially with the applied
voltage).
The i − v characteristics of a junction diode is given by:
iD = Is evD /ηVT − 1
where the constant η is called the “emission coefficient” (η = 2 for Si and ηVT = 0.052 V).
Figure below (left) shows the plot of iD versus vD for a typical Si diode. Note that be-
cause IS is very small (nA range), vD should become large enough such that large value
of exp(vD /0.052) compensate for the small value of IS . As can be seen, the diode current
sharply rises when vD is in the range of 0.6 to 0.7 V. If we zoom near the origin and expand
the current scale to nA range (figure to the right), we can see the behavior of the diode in
the reverse-bias region.
5 50
4 40
30
3
20
2
10
1 VD (V)
VD (V) 0
-0.2 -0.15 -0.1 -0.05 0 0.05 0.1 0.15
0
-10
-1 -0.5 0 0.5 1
-1 -20
Diode Limitations: In the forward bias region, the power P = iD vD is dissipated in the
diode in the form of heat. The diode packaging provides for the conduction of this heat to
the outside and diode is cooled by the air. If we increase vD (or iD ) diode is heated more.
At some point, the generated heat is more than capability of the diode package to conduct it
away and diode temperature rises dramatically and diode burns out. As vD changes slowly,
this point is usually characterized by the current iD,max , maximum forward current, and is
specified by the manufacturer.
Heat generation is not a problem in the revers bias as iD ' 0 (and, thus, P ' 0). However,
if we increase the reverse bias voltage, at some voltage, a large current can flow through the
diode. This voltage is called the reverse breakdown voltage or the Zener voltage.
This large reverse current is produced through two processes. First, in the reverse bias,
minority carriers enter the depletion region. These minority carriers are accelerated by the
voltage across the depletion region. If the reverse bias voltage is high enough, these minority
carrier can accelerate to a sufficiently high energy, impact an atom, and disrupt a covalent
band, thereby generating new electron-hole pairs. The new electron-hole pairs can accelerate,
impact other atoms and generate new electron-hair pairs. In this manner, the number of
minority carriers increases exponentially (an avalanches process), leading to a large reverse
current. This is called the avalanche breakdown. Second, when the strength of the electric
field across the junction becomes too large, electrons can be pulled out of the covalent bonds
directly, generating a large number of electron-hole pairs and a large reverse current. This
is known as the Zener effect or Zener breakdown.
Regular diodes are usually destroyed when operated in the Zener or reverse breakdown
region. These diode should be operated such that vD > −vZ . A special type of diodes,
Zener diodes, are manufactured specifically to operate in the Zener region. We will discuss
these diodes later. In Zener diodes, heat generation sets a maximum for the allowable diode
current in the Zener region.
+
Rest of vD
labeled “the rest of the circuit” in the figure can be replaced by Circuit
its Thevenin equivalent, giving the simple diode circuit below.
−
Because the three elements are in series, current iD flows through
all elements. Writing KVL around the loop we have: RT
VT = i D R T + v D iD
+
VT + vD
This is an equation with two unknowns (iD and vD ) as VT and RT −
−
are known. The second needed equation (to get two equations
in the two unknown) is the diode characteristic equation:
iD = Is evD /ηVT − 1
The above two equations in two unknown cannot be solved analytically as the diode i − v
equation is non-linear. PSpice solves these equations numerically. As analytical solutions
can provide insight in the circuit behavior and may be also needed for circuit design, we
develop two methods to solve diode circuits without numerical analysis.
Load Line
The i − v characteristic of the diode is plotted in the figure. The iD and vD values of any
point on the curve satisfies the diode equation above. Also plotted is the line representing
VT = iD RT + vD . This line is called the “load line.” The iD and vD values of any point on
the load line satisfies the first equation above. Since the solution to the above two equations
in two unknowns is a pair of iD and vD that satisfies both equations, such a point should
be both on the iv plot of the diode and on the load line, i.e., at the intersection of the two.
This point is called the Q-point or the Quiescent point (or the operating point) of the diode.
ID
8
The load line technique is not accu-
7
rate in finding numerical values of
iD and vD . However, it is a power- 6
VT/RT
ful tool to get qualitative measures 5
Q
IQ
ing that the diode operating point 3
forward current. 1
VD
0
VQ VT
-0.5 0 0.5 1 1.5 2 2.5
-1
VD
curve with a line). 0
-1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4
VJ
0.6 0.8 1
-1
As can be seen from the figure, it is NOT possible to approximate the i − v characteristics
curve with ONE line. However, it is possible to do so with TWO (or more) lines. This type
of approximation is called a piecewise linear model, i.e., pieces of the curve are replaced by
lines. One such model for diodes is shown in the figure with equations:
Parameter vγ is called the “cut-in” voltage and it is related to the forbidden gap of the base
semiconductor (not what dopant is used and how much). For Si, vγ ≈ 0.6 − 0.7 V. For
GaAs, vγ ≈ 1.7 − 1.9 V. Note that the above equations are valid only for a certain range of
parameters, (or range of validity) e.g., “Diode ON” equation is valid only if iD > 0.
An issue that arises in solving circuits with diodes is that we do not know a priori the state
of the diode (ON or OFF) and so we do not which equation to use. The following “recipe”
can be used to solve diode equations:
Recipe for solving diode circuits:
1. Write down all circuit equation with iD and vD as parameters and simplify as much as
possible.
2. Assume diode is in one state (either ON or OFF). Use the diode equation for that state
to solve the circuit equations and find iD and vD .
3. Check the range of validity inequality with the values of iD and vD that was found. If
iD and vD values satisfy the range of validity, the assumption was correct. Otherwise,
the assumed diode state is incorrect. Go to step 2 above and assume that the diode is
in the other state.
+
Step 1: KCL tells that current iD flow in all elements and VS + vD
by KVL: −
−
VS = i D R S + v D → 5 = 103 iD + vD
5 = 103 × 0 + vD → vD = 5 V
Step 3: Since vD = 5 > 0.7 = vγ , diode vD does NOT satisfy range of validity and the
assumed diode state is incorrect.
Step 2: Assume diode is ON:
Step 3: Although we know that since diode was not OFF, it should be ON, it is a good
practice to check the range of validity again in case we might have made a math mistake.
For this case, iD > 0 and satisfies range of validity. So diode is ON and vD = 0.7 V and
iD = 4.3 mA.
Parametric solution of diode circuits
It is very useful if we can derive the circuit solution parametrically, i.e., with values of
various circuit elements as parameters. This approach would allows us to solve the circuit
ONCE. For example, for inverting amplifier, we solved the circuit parametrically and found
the gain to be A = −R2 /R1 . So, if we encounter a circuit with R1 = 1 kΩ and R2 = 10 kΩ,
we can calculate the gain, A = −R2 /R1 = −10 without solving any circuit equations.
This approach can also be adopted to diode circuits. However, as diode can be in TWO states,
we will find TWO solutions to the circuit, each being valid over a range of parameters:
For example, consider the circuit above with VS and RS as parameters. Following our recipe
we get:
KCL tells that current iD flow in all elements and by KVL:
VS = i D R S + v D
iD = 0 → v D = VS
vD < v γ → VS < v γ
VS − v γ
vD = v γ → iD =
RS
VS − v γ
iD > 0 → >0 → V S > vγ
RS
VS − v γ
VS > v γ → Diode in ON → v D = vγ and iD =
RS
VS < v γ → Diode in OFF → v D = VS and iD = 0
Note that if we had solved the circuit parametrically first, we can get the answer for the case
VS = 5 V and RS = 1 kΩ immediately: VS = 5 V > vγ = 0.7 V, therefore, diode is ON,
vD = vγ = 0.7 V and iD = (5 − 0.7)/103 = 4.3 mA.
We will use the above two methods to explore some diode circuits.
You have seen binary mathematics and logic gates in ECE25. We will explore some electronic
logic gates in this course. Binary mathematics is built upon two states: 0, and 1. We
need to relate the binary states to currents or voltages as these are the parameters that
we can manipulate in electronic circuits. Similar to our discussion of analog circuits, it is
advantageous (from power point of view) to relate these the binary states to voltages. As
such, we “choose” two voltages to represent the binary states: VL for state 0 or Low state
and VH for state 1 or High state (for example, 0 V to represent state 0 and 5 V to represent
state 1). These voltages are quite arbitrary and can be chosen to have any value. We will
add subscript O and I to these voltages to denote input and output voltages to the gate,
e.g., V OL is the output voltage of the gate at the low state.
VO
Similar to analog circuits, we can plot the voltage transfer
VH
characteristics of a gate. For example, the voltage transfer
characteristics of an “ideal” inverter is shown in the figure,
when the input is low, the output is high and the when the
input is high, the output is low. We can see a difficulty
right away. In a practical circuit, there would be an output
voltage for any input voltage, so the output voltage makes a VL
VI
“smooth” transition for the high voltage to the low voltage
as the input voltage is varied. We have to be careful as it is VL VH
With this definitions, the voltage transfer characteristics of a practical inverter is shown.
The range of voltages, VOL to VIL and VIH to VOH are called the noise margins. The range
of voltages between VIL to VIH is the forbidden region as in this range, the output of the
gate does not correspond to any binary state. The maximum speed that a logic gate can
operate is set by the time it takes to traverse this region as the input voltage is varied from
one state to another state.
Current iA will be divided between two diodes by KCL, each carrying one half of iA (because
of symmetry). Thus, i1 = i2 = 2.1 mA. Since diode currents are positive, our assumption of
both diode being forward biased is justified and, therefore, vo = 0.7 V.
So, when v1 and v2 are low, D1 and D2 are ON and vo is low.
Case 2, v1 = 0, v2 = 5 V: Again, we note that the 5-V supply will tend to forward bias
D1 . Assume D1 is ON: vD1 = vγ = 0.7 V and i1 > 0. Then:
vo = v1 + vD1 = 0.7 V
vo = v2 + vD2 → vD2 = −4.3 V < vγ
VCC − vo 5 − 0.7
iA = = = 4.3 mA
RA 1, 000
i1 = iA − i2 = 4.3 − 0 = 4.3 mA
Since i1 > 0, our assumption of D1 being forward biased is justified and, therefore, vo = 0.7 V.
iA = i 1 + i 2 = 0
vo = VCC − i1 RA = 5 − 0 = 5 V
vD1 = vo − v1 = 5 − 5 = 0 < vγ and vD2 = vo − v2 = 5 − 5 = 0 < vγ
D2
v2 vo
RA
The above circuit is a simple method to convert AC input voltages to a “DC” output voltage
and is used in AC to DC converter part of power supplies. Such circuits are called “rectifier”
circuits. Because the output of the circuit is only one half of the input waveform, the above
circuit is called a “half-wave” rectifier circuit.
A better circuit would be a “full-wave” rectifier in which both portion of the AC input
waveform is turned into a DC output (so that we do not “throw” away half of the input).
An example of such a full-wave rectifier is the bridge rectifier shown below with four diodes.
We can see that in the portion of the input period in which vs > 2vγ , diodes D1 and D3 are
ON and a positive voltage appear across RL . Diodes D2 and D4 are OFF. In the portion
of the waveform in which vs < −2vγ , Diode D2 and D4 are ON and diodes D1 and D3 are
OFF and again a positive voltage appears on RL . The resulting voltage across RL is shown
below.
Another popular diode circuit is the peak detector which is similar to the half-wave rectifier
circuit with the addition of a capacitor. Following the same procedure, we find:
vS > v C + v γ → Diode in ON
vS < v C + v γ → Diode in OFF
vD
+ −
iL iL iL
VS − Vγ
+ + + + + +
+ C R C + VC C R
VS VC VL + VC RL VL VS L VL
L
− − −
− − − − − −
As the input voltage increases in the first quarter wave period (vγ < vs < Vs ), the capacitor
charges up as vS > vC + vγ and diode is ON. In the second quarter of the wave period, the
Clamp Circuit
Another popular diode circuit is the diode clamp which is similar to the peak-detector circuit
with the location of diode and capacitor switched as is shown below.
C + VC − + VC −
VS − Vγ
+ C +
+ C
VS RL VL + VS + RL V
L
− − −
− −
C C C
+ + +
VS + R V VS + RL VL VS + RL VL
+ L L −
− V
DC
− − VDC
− − −
− +
Zener Diodes
Zener diodes are specially manufactured to operate in the Zener region. These diode are
made by means of heavily doped regions near the metal contacts to the semiconductor.
The high density of charge carriers provides the means for a substantial reverse breakdown
current to be sustained. These diodes are useful in applications where one would like to hold
some load voltage constant, for example, in voltage regulators.
−vZ vD
vγ
Circuit solution techniques developed in this sections for diodes can be applied directly to
Zener diodes. The only change is that Zener diodes can have three states (instead of two for
regular diodes).
KCL: i = −iD + iL
Case 1: Diode is in the Zener region. In this case, vD = −vZ and iD < 0. Substituting
for vD = −vZ in the third equation above, we find vL = vZ and is independent of iL . So,
if the diode is in the Zener region, this circuit would behave like an independent voltage
source. To find the range of iL for which the diode is in the Zener region, we calculate iD
from equations above:
vS + v D vS − v Z
i= =
R R
vS − v Z
iD = i L − i < 0 → iL < i =
R
Therefore, as long as iL is smaller than the value iL,max = (vS − vZ )/R, the diode would
remain in the Zener region and the circuit would act as an independent voltage source.
Case 2: Diode is in the reverse bias region. In this case, iD = 0 and −vZ < vD < vγ .
Substituting for iD = 0 in the above circuit equations, we get:
KCL: i = −iD + iL = iL
KVL: vs = Ri − vD → −vD = vs − RiL
KVL: vL = −vD = vS − RiL
Thus, in this region the output voltage does not remain constant, rather it decreases with iL .
The diode is in the the reverse bias region as long as vD > −vZ or iL > iL,max = (vS − vZ )/R.
Case 3: Diode is in the forward bias region. Since vS > 0, the diode CANNOT be in the
forward bias region.
The i − v characteristics of this circuit is shown in the figure
vL
vZ
Diode in
Reverse Bias
Diode in
Zener Region
iL
i vS /R
L,max