Analog Integrated Circuits and Signal Processing, 47, 225228, 2006

c 2006 Springer Science + Business Media, Inc. Manufactured in The Netherlands.

DOI: 10.1007/s10470-006-4959-1

High-Gain Class-AB OTA with Low Quiescent Current

JEONGJIN ROH
Department of Electrical Engineering and Computer Science, Hanyang University, Ansan, Korea
E-mail: jroh@hanyang.ac.kr

Received May 31, 2005; Revised September 7, 2005; Accepted September 12, 2005
Published online: 27 February 2006

Abstract. High-performance operational transconductance amplifier (OTA) is designed for switched-capacitor applications.
Without using a cascoded output stage, which limits the voltage swing, the output resistance is significantly increased for
high DC gain by accurately controlling the output current. Also, the output stage has class-AB operation, so the overall
power efficiency is improved. With significantly low quiescent current, the presented new OTA achieves higher DC gain than
conventional OTAs. Theoretical analysis and HSPICE simulations prove the performance of the new OTA.
Key Words:

1.

operational transconductance amplifier, OTA, transconductance, slew rate

Introduction

High-performance operational transconductance amplifiers

(OTAs) are an essential building block in switched-capacitor
circuits such as analog filters and oversampled delta-sigma
data converters. For successful operation of systems, OTAs
have to meet several requirements such as large bandwidth,
high gain, high slew rate, and low quiescent current.
The conventional current mirror OTA in Fig. 1 and its
variants [13] have been popular because of its single-pole
characteristic and wide output voltage swing. The alphabets
under NMOS transistors in Figs. 1 and 2 represent their
respective width and length ratios. The transconductance
and the output resistance of the OTA are
G m = gm1,2

It
A
A
=

B
VOD
B

1
1
||
6 Io,Q 8 Io,Q
B
2

=
(6 + 8 ) It
A

(1)


Rout = (ro6 || ro8 ) =

(2)

where It is the tail current, VOD is the overdrive voltage,

which equals VGS VTH , is the channel length modulation coefficient, and Io,Q is the drain current of the output
transistors in quiescent state. The DC gain of the current
mirror OTA is
Av = G m Rout =

2
1

VOD
6 + 8

(3)

The DC gain is not sufficiently high for most switchedcapacitor circuit applications. From (3), it is apparent that

controlling current does not affect the gain of the amplifier

if the overdrive voltage remains constant. One possibility
for higher gain seems to decrease the overdrive voltage.
In general, however, the overdrive voltage should be larger
than 150 mV for transistors to remain in saturation region.
Further decrease of the overdrive voltage may cause the
transistor to enter a weak inversion region. Therefore, it is
common to set the overdrive voltage constant, and increase
the width of the transistor at the same scale with the current change. Another possibility is to increase the length
of the transistor to decrease the channel length modulation
coefficients. However, there would be a practical limit in increasing transistor sizes. A common practice for high gain
is to use a cascoded output stage [1]. However, cascoding
limits the output swing of an amplifier, so it cannot be a
general solution.
In addition to the problem of low DC gain, the current
mirror OTA in Fig. 1 has limited maximum output current
Io,max , and as a result, low slew rate such as

SR =

It BA
Io,max
=
Cload
Cload

(4)

where Cload is a load capacitance. If the tail current

It or the current mirror ratio A/B is increased for
higher slew rate, it will also increase the quiescent current. Since battery-operated portable systems are gaining popularity, higher quiescent current cannot be tolerated in such portable systems. In this letter, we design a new OTA, which achieves sufficient high gain
with small quiescent current with a single-pole frequency
characteristic.

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Roh

where Vin = V p Vn . The amount of current reduction

in M10 equals the extra amount of current increase in M4.
Therefore, the total current change in M4 is the sum of the
changes in M2 and M10. In order to have same overdrive
voltage, we can assume that, without loss of generality, the
transistor M2 has the size of B + C and M12 has the size
of D. Then the combined total transconductance of the new
OTA in Fig. 2 is

G m,new =

Fig. 1. Conventional OTA.

2.

High-Performance OTA Design

In order to achieve high DC gain, we need to increase Rout .

As mentioned earlier, however, cascoding limits output voltage swing, so it is avoided in our design. A solution to increase the output resistance is to reduce the current in the
output stage as shown in (2). However, reducing the output
current in the conventional OTA proportionally reduces Gm ,
so the overall gain does not change. Also reducing output
current directly contradicts to the requirement of high slew
rate.
Our solution is to reduce the quiescent current of the
output stage, and add an extra control circuit to increase
the output current during large signal operation. The new
OTA in Fig. 2 has two voltage controlled current sources,
which are M9 and M10. In quiescent condition, significant
portion of the drain current of M2 now flows into the current source M10, as a result reducing the output current.
Transistors M11M14 sense the input differential voltage
and control two voltage controlled current sources, M9 and
M10. If the current through M2 increases by gm2 Vin /2,
the current through M10 decreases by gm11 Vin /2 C/D,

Fig. 2. New high-gain OTA.

D
B +C
A
gm,in +
B +C + D
B
B +C + D
A
C

gm,in
D
B
A
B + 2C
= gm,in +
(5)
B
B +C + D

where the transconductance gm,in is the total input transconductance gm1,2 + gm11,12 , which equals the input transconductance gm1,2 in (1). Also, the quiescent output current is

Fig. 3. HSPICE plot of the conventional OTA.

Fig. 4. HSPICE plot of the new high-gain OTA.

High-Gain Class-AB OTA with Low Quiescent Current

reduced as
Io,Q =

227

ate values for a lower quiescent current and a higher slew

rate.

B
A
It
A
It

=
2
B +C + D
B
2
B +C + D

(6)
3.

Simulation Results

As a result, the output resistance is increased as

Rout = (ro6

2
B +C + D
 ro8 ) =

(6 + 8 )It
A

(7)

Since both Gm and Rout are increased, the overall gain

increase in the new OTA is significant. One drawback of the
new OTA is the creation of an extra non-dominant pole. The
diode-connect transistors M13 and M14 create extra pole,
so the overall frequency response should be carefully examined. However, since the small-signal resistance at the drain
of M13 or M14 is small, the extra pole at that node locates
at high frequency. Therefore, it does not significantly affect
the frequency response, especially if the load capacitor is
large.
Important OTA parameters are summarized in
Table 1 for both conventional and new OTAs. We can see
that the new OTA has advantages in Gm , output resistance,
and quiescent output current, while the maximum output
current of the new OTA may look slightly worse than the
conventional one. For a fair comparison of performance, we
need to clarify the slew rate issue. The available maximum
output current of the new OTA is slightly worse than that
of the conventional one in Table 1 because we significantly
reduced the quiescent current of the new OTA. If higher
slew rate is desired, the quiescent current of the new OTA
can be increased, but still less than the conventional one.
From another point of view, if we design both OTAs to have
same quiescent currents, the new OTA is going to have significantly higher slew rate. A reasonable design decision
should be made for the new OTA by selecting appropri-

The HSPICE simulation results are shown in this section

with 0.35 m standard CMOS process parameters. Both
conventional and new OTAs are designed to have same
200 A tail current, while the quiescent output current to
be 400 and 40 A, respectively. The values of A and B in
the conventional OTA are 4 and 1, respectively, while the
values of A, B, C, and D in the new OTA are 4, 1, 8, and
1, respectively. The transistors all have the same length of
1 m, and the widths are decided to have overdrive voltage
of about 200 mV. The simulation results in Table 1 show that
the currents are slightly less than the initial design target.
These errors are caused by the channel length modulation
of the current mirrors in both designs. The quiescent output
current is significantly reduced for the new OTA and the
maximum output current is only slightly less than that of
the conventional one. As mentioned earlier, if higher slew
rate is desired, the tail current or the value of A in the new
OTA can be increased. In other words, if we implement
the same quiescent current for both OTAs, the slew rate of
the new OTA is significantly higher than the conventional
one.
Figures 3 and 4 show the frequency responses of the conventional and the new OTAs with a 10 pF load capacitor,
respectively. The DC gain of the new OTA is significantly
increased from 40 to 62 dB. The unity-gain frequency of the
conventional one is 43 MHz with 81 phase margin, while
the new OTA has 46 MHz with 64 phase margin. The effect
of non-dominant poles decreases the phase margin of the
new OTA, but still a sufficient phase margin is achieved.
Step response of the new OTA is shown in Fig. 5 to confirm the stable operation of the circuit. Simulation result

Table 1. Performance comparison (A = 4, B = 1, C = 8, D = 1, It = 194 A, CL = 10 pF, VCC = 3 V).

Conventional OTA
Equation
Transconductance, Gm
Output Resistance, Rout
DC gain, Av
Quiescent output current,
Io,Q

gm,in

A
B

2
B

(6 + 8 ) It
A
1
2

VOD
6 + 8
A
It

2
B

New OTA

Simulation result

Equation

2.6 mA/V

gm,in

37.6 k
40 dB
392.6 A

B + 2C
A

B
B +C + D
2
B +C + D

(6 + 8 ) It
A
2
1
B +C

VOD
6 + 8
B
It
A

2
B +C + D

Total OTA quiescent

current

It + 2 Io,Q

979 A

It + 2 Io,Q

Max output current, Io,max

It

A
B

785 A

It

B +C
A

B
B +C + D

Simulation result
3.6 mA/V
361.5 k
62 dB
39.3 A
273 A
708 A

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Roh

Fig. 5. Step response of the new high-gain OTA.

shows slight overshoot as we can expect it for 64 phase

margin [1].

Acknowledgment
This work was supported by IT-SoC project of the Ministry
of Information and Communication, Korea.

4.

Conclusions

High-performance OTA architecture with single-pole characteristic is presented in this letter. Instead of using cascoded output stage, the presented OTA achieves high
DC gain by accurately controlling the output current.
The output stage is designed as a class-AB circuit,
so that the quiescent current is low with high output resistance, while the output current increases as
required.

References
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Solid-State Circuit Conf., Estoril, Portugal, 2003, pp. 297300.
3. R. Harjani, R. Heineke and F. Wang, An integrated low-voltage class
AB CMOS OTA. IEEE J. of Solid-State Circuits, vol. 34, no. 2, pp.
134141, 1999.