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Subject: TRONLA 2

Name: RABAYA, Janray S.

Section: ECE-3A

n: 25

Design Exercise 03
Voltage Gain of a Common-Source Circuit
Journal:
In this experiment, we are to apply some of the principles we learned from the previous
activity about FET in DC but this time, AC. We have learned how the different parameters like
the drain resistor of the FET affects the voltage gain of the FET. Now, it is more important to be
familiar with the admittance of FET based on the datasheet. The reciprocal of this variable is the
dynamic resistance of the FET which is the 2N5458. The schematic is the same as before but this
time, capacitors are added and connected to the gate and drain of the FET as these will serve as
the input and output respectively.
The objective is to attain the target voltage by getting the ratio of the output voltage with
the input voltage. Same procedure as before but this time, it should amplify signal. Signal
generator is added to the set-up to supply 1V input to the gate capacitor. Next is oscilloscope is
added to the set-up to visualize the input voltage and the amplified voltage graph (sine) from the
drain capacitor in where our output is. Oscilloscope was also used to obtain Vpeak and Vpeakto-peak that will be necessary for some computations. To obtain the true value of the dynamic
resistance of the FET is to reverse engineer the solution which requires measuring the actual
VGSQ and AV = -gm (rd//Rd) to get the dynamic resistance to obtain a value lower than the range
of dynamic resistance from 20k to 100k.
In conclusion, this experiment was more challenging than the previous one because of the
added set-ups such as adjusting the range of the signal generator. Still requires hardwork and
patience.

Subject: TRONLA 2

Name: RABAYA, Janray S.

Section: ECE-3A

n: 25

Design Exercise 03
Voltage Gain of a Common-Source Circuit
Question and Answer:
A certain common-source JFET has a voltage gain of 10. If the source bypass capacitor is
removed,
A.
B.
C.
D.

The voltage gain will increase.


The transconductance will increase.
The voltage gain will decrease.
The operation point will shift.

Background:
Capacitors function is to block DC signals and allow AC signals to pass through. This is
because DC signals have no frequency making them an open circuit at DC. As we all know our
FET happens to operate with DC sources and functions as an amplifier for AC signals. And with
two signals mix in the circuit it can get pretty hard to observe the input and output of the circuit
thus a coupling capacitor is added to the input and output to block the DC signals and only allow
AC signals to pass through.
Reference:
1. Electronic Devices and Circuit Theory by Robert L. Boylestad
2. http://www.electronics-tutorials.ws/amplifier/amp_3.html
Answer: C. The voltage gain will decrease.