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IRF640, RF1S640, RF1S640SM

Data Sheet

January 2002

18A, 200V, 0.180 Ohm, N-Channel Power


MOSFETs
These are N-Channel enhancement mode silicon gate
power field effect transistors. They are advanced power
MOSFETs designed, tested, and guaranteed to withstand a
specified level of energy in the breakdown avalanche mode
of operation. All of these power MOSFETs are designed for
applications such as switching regulators, switching
convertors, motor drivers, relay drivers, and drivers for high
power bipolar switching transistors requiring high speed and
low gate drive power. These types can be operated directly
from integrated circuits.
Formerly developmental type TA17422.

Ordering Information
PART NUMBER

PACKAGE

Features
18A, 200V
rDS(ON) = 0.180
Single Pulse Avalanche Energy Rated
SOA is Power Dissipation Limited
Nanosecond Switching Speed
Linear Transfer Characteristics
High Input Impedance
Related Literature
- TB334 Guidelines for Soldering Surface Mount
Components to PC Boards

Symbol
BRAND

IRF640

TO-220AB

IRF640

RF1S640

TO-262AA

RF1S640

RF1S640SM

TO-263AB

RF1S640

NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-263AB variant in the tape and reel, i.e., RF1S640SM9A.

Packaging
JEDEC TO-220AB

JEDEC TO-263AB
SOURCE
DRAIN
GATE

GATE

DRAIN
(FLANGE)

SOURCE

DRAIN (FLANGE)

JEDEC TO-262AA

DRAIN
(FLANGE)

2001 Fairchild Semiconductor Corporation

SOURCE
DRAIN
GATE

IRF640, RF1S640, RF1S640SM Rev. B

IRF640, RF1S640, RF1S640SM


TC = 25oC, Unless Otherwise Specified

Absolute Maximum Ratings

Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS


Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See TB334. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg

IRF640, RF1S640, RF1S640SM


200
200
18
11
72
20
125
1.0
580
-55 to 150

UNITS
V
V
A
A
A
V
W
W/oC
mJ
oC

300
260

oC
oC

CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

NOTE:
1. TJ = 25oC to 125oC.

Electrical Specifications

TC = 25oC, Unless Otherwise Specified

PARAMETER

SYMBOL

TEST CONDITIONS

MIN

TYP

MAX

UNITS
V

Drain to Source Breakdown Voltage

BVDSS

ID = 250A, VGS = 0V, (Figure 10)

200

Gate Threshold Voltage

VGS(TH)

VGS = VDS , ID = 250A

VDS = Rated BVDSS , VGS = 0V

25

VDS = 0.8 x Rated BVDSS , VGS = 0V, TJ = 125oC

250

VDS > ID(ON) x rDS(ON)MAX , VGS = 10V (Figure 7)

18

100

nA

Zero Gate Voltage Drain Current

IDSS

On-State Drain Current (Note 1)

ID(ON)

Gate to Source Leakage Current

IGSS

Drain to Source On Resistance (Note 1)


Forward Transconductance (Note 1)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)
Gate to Source Charge

rDS(ON)
gfs
td(ON)
tr
td(OFF)

VGS = 20V

0.14

0.18

6.7

10

13

21

ns

50

77

ns

46

68

ns

35

54

ns

VGS = 10V, ID 18A, VDS = 0.8 x Rated BVDSS


(Figure 14) Gate Charge is Essentially Independent
of Operating Temperature
IG(REF) = 1.5mA

43

64

nC

nC

22

nC

VDS = 25V, VGS = 0V, f = 1MHz (Figure 11)

1275

pF

ID = 10A, VGS = 10V (Figures 8, 9)


VDS 10V, ID = 11A (Figure 12)
VDD = 100V, ID 18A, RGS = 9.1, RL = 5.4,
MOSFET Switching Times are Essentially
Independent of Operating Temperature

tf
Qg(TOT)
Qgs

Gate to Drain Miller Charge

Qgd

Input Capacitance

CISS

Output Capacitance

COSS

400

pF

Reverse Transfer Capacitance

CRSS

100

pF

3.5

nH

4.5

nH

7.5

nH

oC/W

Internal Drain Inductance

LD

Measured From the


Contact Screw on Tab to
Center of Die
Measured From the Drain
Lead, 6mm (0.25in) From
Package to Center of Die

Internal Source Inductance

LS

Measured From the


Source Lead, 6mm
(0.25in) from Header to
Source Bonding Pad

Modified MOSFET
Symbol Showing the
Internal Devices
Inductances
D
LD
G
LS
S

Thermal Resistance Junction to Case

RJC

Thermal Resistance Junction to


Ambient

RJA

Free Air Operation, IRF640

62

oC/W

RJA

RF1S640SM Mounted on FR-4 Board with Minimum


Mounting Pad

62

oC/W

2001 Fairchild Semiconductor Corporation

IRF640, RF1S640, RF1S640SM Rev. B

IRF640, RF1S640, RF1S640SM


Source to Drain Diode Specifications
PARAMETER

SYMBOL

Continuous Source to Drain Current

ISD

Pulse Source to Drain Current


(Note 2)

ISDM

TEST CONDITIONS
Modified MOSFET
Symbol Showing the
Integral Reverse P-N
Junction Diode

MIN

TYP

MAX

UNITS

18

72

2.0

120

240

530

ns

1.3

2.8

5.6

Source to Drain Diode Voltage (Note 2)

VSD

Reverse Recovery Time

trr

Reverse Recovery Charge

QRR

TJ = 25oC, ISD = 18A, VGS = 0V, (Figure 13)


TJ = 25oC, ISD = 18A, dISD/dt = 100A/s
TJ = 25oC, ISD = 18A, dISD/dt = 100A/s

NOTES:
2. Pulse Test: Pulse width 300s, duty cycle 2%.
3. Repetitive Rating: Pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 3.37mH, RG = 25, peak IAS = 18A.

Typical Performance Curves

Unless Otherwise Specified


20

1.0
ID, DRAIN CURRENT (A)

POWER DISSIPATION MULTIPLIER

1.2

0.8
0.6
0.4

16

12

0.2
0

0
0

50

100

25

150

50

TC, CASE TEMPERATURE (oC)

75

100

150

125

TC, CASE TEMPERATURE (oC)

FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE


TEMPERATURE

FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs


CASE TEMPERATURE

ZJC , TRANSIENT
THERMAL IMPEDANCE (oC/W)

10

1
0.5
0.1

0.2
0.1
0.05
0.02
0.01

0.01

PDM

t1
t2

SINGLE PULSE

0.001
10-5

NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZJC + TC
10-4

10-3

10-2

10-1

10

tP, RECTANGULAR PULSE DURATION (s)

FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE

2001 Fairchild Semiconductor Corporation

IRF640, RF1S640, RF1S640SM Rev. B

IRF640, RF1S640, RF1S640SM


Typical Performance Curves
1000

Unless Otherwise Specified (Continued)

30

OPERATION IN THIS AREA MAY BE


LIMITED BY rDS(ON)

10s
100s
10

1ms
10ms
TC = 25oC
TJ = MAX RATED
SINGLE PULSE

24

ID , DRAIN CURRENT (A)

ID , DRAIN CURRENT (A)

TC = 25oC
100

7V
18

12
6V
6

DC

5V
4V

0
0

1000

100

10

12

VDS , DRAIN TO SOURCE VOLTAGE (V)

VGS = 7V

18
VGS = 6V

12

VGS = 5V

VGS = 4V

0
0

1.0

2.0

3.0

5.0

4.0

25oC
150oC
1

0.1
0

FIGURE 6. SATURATION CHARACTERISTICS

2
4
6
8
VGS , GATE TO SOURCE VOLTAGE (V)

0.9

0.6

VGS= 10V
VGS = 20V

0
15

30

45

60

75

ID , DRAIN CURRENT (A)

FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE


VOLTAGE AND DRAIN CURRENT

2001 Fairchild Semiconductor Corporation

NORMALIZED DRAIN TO SOURCE


ON RESISTANCE

rDS(ON) , DRAIN TO SOURCE


ON RESISTANCE ()

3.0

1.2

10

FIGURE 7. TRANSFER CHARACTERISTICS

PULSE DURATION = 80s


DUTY CYCLE = 0.5% MAX

0.3

60

10

VDS , DRAIN TO SOURCE VOLTAGE (V)

1.5

48

PULSE DURATION = 80s


DUTY CYCLE = 0.5% MAX
VDS 50V

VGS = 10V
ID , DRAIN CURRENT (A)

ID , DRAIN CURRENT (A)

100

24

36

FIGURE 5. OUTPUT CHARACTERISTICS

VGS = 8V

PULSE DURATION = 80s


DUTY CYCLE = 0.5% MAX

24

VDS , DRAIN TO SOURCE VOLTAGE (V)

FIGURE 4. FORWARD BIAS SAFE OPERATING AREA

30

PULSE DURATION = 80s


DUTY CYCLE = 0.5% MAX

10V
8V

2.4

PULSE DURATION = 80s


DUTY CYCLE = 0.5% MAX
VGS = 10V, ID = 18A

1.8

1.2

0.6

0
-60 -40

-20

20

40

60

80

100 120 140 160

TJ , JUNCTION TEMPERATURE (oC)

FIGURE 9. NORMALIZED DRAIN TO SOURCE ON


RESISTANCE vs JUNCTION TEMPERATURE

IRF640, RF1S640, RF1S640SM Rev. B

IRF640, RF1S640, RF1S640SM


Typical Performance Curves

Unless Otherwise Specified (Continued)

1.25

3000

VGS = 0V, f = 1MHz

1.15

1.05

0.95

0.85

1800
CISS
1200
COSS
600
CRSS

0.75
-60

-40

-20

20

40

80

60

100 120 140 160

10

TJ , JUNCTION TEMPERATURE (oC)

15

FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE

1000
ISD , SOURCE TO DRAIN CURRENT (A)

PULSE DURATION = 80s


DUTY CYCLE = 0.5% MAX

12
25oC
9
150oC
6

0
0

12

18

100

VDS , DRAIN TO SOURCE VOLTAGE (V)

FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN


VOLTAGE vs JUNCTION TEMPERATURE

gfs , TRANSCONDUCTANCE (S)

CISS = CGS + CGD


CRSS = CGD
COSS CDS + CGD

2400
C, CAPACITANCE (pF)

NORMALIZED DRAIN TO SOURCE


BREAKDOWN VOLTAGE

ID = 250A

24

PULSE DURATION = 80s


DUTY CYCLE = 0.5% MAX
150oC

100

25oC
10

30

0.4
0.8
1.2
1.6
VSD , SOURCE TO DRAIN VOLTAGE (V)

ID , DRAIN CURRENT (A)

FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT

2.0

FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE

VGS , GATE TO SOURCE VOLTAGE (V)

20
ID = 28A
VDS = 40V

16

VDS = 100V
12
VDS = 160V
8

0
0

15

30

45

60

75

Qg, GATE CHARGE (nC)

FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE

2001 Fairchild Semiconductor Corporation

IRF640, RF1S640, RF1S640SM Rev. B

IRF640, RF1S640, RF1S640SM


Test Circuits and Waveforms
VDS
BVDSS
L

tP

VARY tP TO OBTAIN

RG

REQUIRED PEAK IAS

VDS

IAS

VDD

VDD
-

VGS
DUT
tP

0V

IAS

0
0.01
tAV

FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT

FIGURE 16. UNCLAMPED ENERGY WAVEFORMS

tON

tOFF

td(ON)

td(OFF)
tr

RL

VDS

tf

90%

90%

RG

VDD

10%

10%

DUT

90%
VGS

VGS

FIGURE 17. SWITCHING TIME TEST CIRCUIT

50%

50%
PULSE WIDTH

10%

FIGURE 18. RESISTIVE SWITCHING WAVEFORMS

VDS
(ISOLATED
SUPPLY)

CURRENT
REGULATOR

VDD

12V
BATTERY

0.2F

Qg(TOT)

SAME TYPE
AS DUT

50k

Qgd

0.3F

VGS

Qgs
D
VDS
DUT

0
IG(REF)

0
IG CURRENT
SAMPLING
RESISTOR

VDS
ID CURRENT
SAMPLING
RESISTOR

FIGURE 19. GATE CHARGE TEST CIRCUIT

2001 Fairchild Semiconductor Corporation

IG(REF)
0

FIGURE 20. GATE CHARGE WAVEFORMS

IRF640, RF1S640, RF1S640SM Rev. B

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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification

Product Status

Definition

Advance Information

Formative or
In Design

This datasheet contains the design specifications for


product development. Specifications may change in
any manner without notice.

Preliminary

First Production

This datasheet contains preliminary data, and


supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.

No Identification Needed

Full Production

This datasheet contains final specifications. Fairchild


Semiconductor reserves the right to make changes at
any time without notice in order to improve design.

Obsolete

Not In Production

This datasheet contains specifications on a product


that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.

Rev. H4

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