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Interview Questions

Interview Questions

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VLSI Interview Questions -------------------------------------------------------------------------For Any answers you may contact Aviral Mittal at avimit@yahoo.

com CopyRight (C) Aviral Mittal -------------------------------------------------------------------------1(a). What you would use in RTL a 'boolean' type or a 'std_logic' type and why. 1(b). What are/may be the implications of using an 'integer' type in RTL. 2). What you would use a RAM or a regfile discuss: RAM: Low Power, Low Area REGFILE: better timing. 3). A timing path fails: what are your options? Ans: a). Look for parallelism in RTL. b). Look for small RAMs which might be synthesized c). Look for better placement d). Look for Pipelining opportunity e). Look for moving logic before the Reg f). Look for replicating the drivers to reduce load if the delay is caused by loading g). '< or >' are better than -, when comparators are used in RTL h). Look for if..elsif..elseif..elsif i). Use One Hot instead of Binary coded State Registers 4). Any example you can provide in which verilog might be a prob 5). What are VHDL structures, give an example to exploit them 6). What is grey coding, any example where they are used 7). Discuss Async interfaces 8). Metastability 9). Synopsys unwanted latch 10). Verilog blocking vs non-blocking 11). VHDL variables: example where you have to use them 12). What is pipelining and how it may improve the performance 13). What are multicycle paths. 14). What are false paths 15). What are Async counters, what are advantages of using these over sync counters. and what are the disadvantages 16). q_in : IN std_logic variable q0 : std_logic variable q1 : std_logic variable q2 : std_logic q_out : OUT std_logic; if(rising_edge(clk)) then q0 := q_in; q1 := q0;

. While writing a state machine in RTL it is generally recommended that the seq and combi logics should be written in different processes Even if its not a state machine. Sensitivity List: How does it matter. end process process(c_sig. end process Any thing wrong with the above code Ans: Same signal being driven in two different processes 19).What will happen if you dont include a signal in the sensitivity list and use/read it inside the process 18). it is recommended that seq and combi logics should be written in different processes Any example you may give to support this recommendation Ans: Sometime its desired to use the 'next_RegValue' which can only be accessed in recommended method. q_out <= q2. end if.b_sig) begin if(a_sig = '1' and b_sig = '0') then sig_out <= '1'. 17). else sig_out <= '0'. end if. else sig_out <= '0'. not in the method where you combine seq and combi parts into one seq process. process(a_sig. what will be the result.d_sig) begin if(c_sig = '1' and d_sig = '0') then sig_out <= '1'.q2 := q1. endif.

Discuss disadvantages/challenges of shrinking technology Ans : Leakage Power 27). What is Design For Test and why it is done. . process(a_sig. 25). signal b_sig : std_logic_vector(n downto 0). end if. Register going 'X' even when RTL has reset pin defining the state of register at power up reset.bsig) variable c_sig : std_logic_vector(n downto 0). begin c_sig := a_sig-bsig. a_is_smaller <= c_sig(c_sig'high). Simulation Problem. Which one MAY still be used how and why 23). 24). eg. end process. How you will implement a C language pointer in VHDL 22). A certain chip(silicon) fails hold test and another fails a setup test. end process. Following are two methods to determine if 'a_sig' is greater than 'b_sig' Which one would you use and why? signal a_sig : std_logic_vector(n downto 0). 21).bsig) variable c_sig : std_logic_vector(n downto 0). using grey coding f) Bus Invert coding: invert bus if hamming distance is greater than 1/2 word size g) Async design techniques 26). process(a_sig. begin if(asig < bsig) then a_is_smaller <= '1'. else a_is_smaller <= '0'. Low Power: discuss how it may be done Ans : a) Clock Gating b) Reducing the frequency of operation using pipelining c) Shutting the power down d) Different voltage domains e) Reducing number of transitions. And such a reset has been applied in simulation.20). What is clock gating? How and why it is done.

What determines the max frequency a digital design may work on. What is the difference between transport delays and inertial delays in VHDL 31). What is Latch-up 37). How much is the max fan out of a typical CMOS gate. 42). Why CMOS why not N-MOS or P-MOS logic. Given that the frequency at which the negative edge is appearing on the input signal is low as compared to the clock of the state machine 39). when we know that the number of gates required in CMOS are grater than in n-mos or p-mos logic. discuss the limiting factors. What are dynamic logic gates? What are their advantages over conventional logic gates 44).28). 32). 34). Design a state machine which divides the input frequency of a clock by 3. Draw DC curve of inverter and Re-Draw it if pmos and nmos are equal 36). 43). how may it affect the performance of a design 30). How can an Inverter work as an amplifier 38). Generally dc_shell tries to optimise the path with worst violation. 40). Or alternatively. The output of this state machine is a pulse of logic '1' of duration one clock when ever there is a negative edge on an input signal. Why are p-mos larger than n-mos in CMOS design 35). Design a digital circuit to delay the negative edge of the input signal by 2 clock cycles . Is there any thing that you can do to make it work on more paths parallely Ans :Use group_path may be with 'critical_range' on that group 29). Why thold(hold time) is not included in the calculation for the above. Why does a pass gate requires two transistors(1 N and 1 P type) Can we use a single transistor N or P type in a pass gate? If not why? and if yes then in what conditions? 41). What will happen if output of an inverter is shorted to its input 33). What is noise margin. Design a state machine to implement a edge detector That is. Given that the phase change in the output due to propogation delay in of the flip flop is acceptable up to a delay offered by a single flip flop only. What is pipelining.

the 40xx series. power it up.45). How you will constraint a combinational logic path through your design in dc_shell. Detect both. 48). 46). alternatively. Write a vhdl function to implement a length independent grey code counter. Similarly take a TTL logic gate IC. overlapping and non overlapping patterns. 52). 51). What are LFSRs. Design a state machine to detect a '1101' pattern in a stream. 47). Take an inverter IC. discuss the logic to do that. Make a T Flip Flop using a D Flip Flop 49). 50). Take an inverter IC. example usage? 53). power it up. From a CMOS logic gate IC. and leave the input of the inverter floating. How you will make a Nand Gate function like an inverter. What are MISRs. example usage? . Comment upon the output of this inverter. What is the relation between binary encoding and grey(or gray) encoding. and leave the input of the inverter floating. Comment upon the ouput of this inverter. the 74xx series.

20. How’s the DLL Hell problem solved in . What’s a satellite assembly? When you write a multilingual or multi-cultural application in . What’s the difference between // comments.C# interview questions and answers By admin | December 7. What’s class SortedList underneath? A sorted HashTable. How can you sort the elements of the array in descending order? By calling Sort() and then Reverse() methods. What are the ways to deploy an assembly? An MSI installer. 8. 11. Will finally block get executed if the exception had not occurred? Yes.StringBuilder over System. the localized assemblies that modify the core application are called satellite assemblies. 17.Text. so each time it’s being operated on. 5.NET uses the DbgCLR. 12. What does the This window show in the debugger? It points to the object that’s pointed to by this reference. but also the version of the assembly. To use CorDbg. so <Student> and <student> are different elements.Clone()? The first one performs a deep copy of the array. multi-line and XML documentation comments. 13. What’s a delegate? A delegate object encapsulates a reference to a method.Array. Visual Studio . What’s a multicast delegate? It’s a delegate that points to and eventually fires off several methods. What’s the .NET.Array? No. a new instance is created. What namespaces are necessary to create a localized application? System.Exception. 2003 1. 10. 2. You can also omit the parameter data type in this case and just write catch {}. System. Is XML case-sensitive? Yes. What’s the difference between the System.NET? Assembly versioning allows the application to specify not only the library it needs to run (which was available under Win32). you must compile the original C# file using the /debug switch. where a lot of manipulation is done to the text. 14. 16. Object’s instance data is shown. then why not write the proper code to handle that error instead of passing a new Exception object to the catch block? Throwing your own exceptions signifies some design flaws in the project. What’s the C# equivalent of C++ catch (…). In C++ they were referred to as function pointers.NET SDK? CorDBG – command-line debugger. What’s the difference between <c> and <code> XML documentation tag? Single line code example and multiple-line code example. Why is it a bad idea to throw your own exceptions? Well. and XCOPY command. /* */ comments and /// comments? Single-line.Globalization. if at that point you know that an error has occurred. 21. 19. 4. and then whatever follows the finally block. Can you store multiple data types in System.NET datatype that allows the retrieval of data by a unique key? HashTable.Resources. 7.Array. Can multiple catch blocks be executed? No. the control is transferred to the finally block (if there are any). which was a catch-all statement for any possible exception? A catch block that catches the exception of type System. and DbgCLR – graphic debugger. 22. Strings are immutable. the second one is shallow. 3. 6. a CAB archive. What debugging tools come with the . 18. What’s the advantage of using System.CopyTo() and System. and want to distribute the core application separately from the localized modules. 9.String? StringBuilder is more efficient in the cases. 15. once the proper catch code fires off. . How do you generate documentation from the C# file commented properly with a command-line compiler? Compile it with a /doc switch.

OLE-DB. Where is the output of TextWriterTraceListener redirected? To the Console or a text file depending on the parameter passed to the constructor. assert takes in a Boolean condition as a parameter. but it’s a . Microsoft Access and Informix. Presentation (UI). DB2. 39. What does Dispose method do with the connection object? Deletes it from the memory. The program proceeds without any interruption if the condition is true.NET layer on top of OLE layer. What does assert() do? In debug compilation. Why would you use untrusted verificaion? Web Services might use it. What is the wildcard character in SQL? Let’s say you want to query database with LIKE for all employees whose name starts with La. Consistent (data is either committed or roll back.NET? SQLServer. What does the parameter Initial Catalog define inside Connection String? The database name to connect to. including the security settings. use Trace class for both debug and release builds. 35. Durable (the values persist if the data had been committed even if the system crashes right after). 28. What connections does Microsoft SQL Server support? Windows Authentication (via Active Directory) and SQL Server authentication (via Microsoft SQL Server username and passwords). ODBC. 33. Use Debug class for debug builds. .Access. where every parameter is the same. 34.NET. just go to Immediate window. business (logic and underlying code) and data (from storage or other sources). 25. but requires SQL Server license purchased from Microsoft. and shows the error dialog if the condition is false. What is a pre-requisite for connection pooling? Multiple processes must agree that they will share the same connection.NET data provider is high-speed and robust. What’s the difference between the Debug class and Trace class? Documentation looks the same. What are advantages and disadvantages of Microsoft-provided data provider classes in ADO. 36. What’s the role of the DataReader class in ADO. Transaction must be Atomic (it is one unit of work and does not dependent on previous and following transactions).exe process to the DbgClr debugger. 32. allowing to fine-tune the tracing activities. since SQL Server is the only verifier participating in the transaction. 24.NET Web application? Attach the aspnet_wp. Why are there five tracing levels in System. How do you debug an ASP. 27. Isolated (no transaction sees the intermediate results of the current transaction). negative test cases (broken or missing data. Five levels range from None to Verbose. exception test cases (exceptions are thrown and caught properly). 29. 38. proper handling). 30. Which one is trusted and which one is untrusted? Windows Authentication is trusted because the username and password are checked with the Active Directory. as well as non-Windows applications. 40. correct output). the proper query with LIKE would involve ‘La%’. Explain ACID rule of thumb for transactions. no “in-between” case where something has been updated and something hasn’t). so not the fastest thing in the world.NET is a deprecated layer provided for backward compatibility to ODBC engines.TraceSwitcher? The tracing dumps can be quite verbose and for some applications that are constantly running you run the risk of overloading the machine and the hard drive there.23. What’s the data provider name to connect to Access database? Microsoft.Diagnostics. 31. 37. if you are debugging via Visual Studio. What are three test cases you should go through in unit testing? Positive test cases (correct data. Can you change the value of a variable while debugging a C# application? Yes. 26.NET is universal for accessing other sources. Explain the three services model (three-tier application). the SQL Server authentication is untrusted. like Oracle. 41. The wildcard character is %.NET connections? It returns a read-only dataset from the data source when the command is executed.

What can I safely assume about the initial values of variables which are not explicitly initialized? 11. 7. How do I initialize a pointer to a function? . Why can’t I initialize a local array with a string? 12. What’s the best way to declare and define global variables? 4. What’s happening? 10. How do I declare an array of N pointers to functions returning pointers to functions returning pointers to characters? 8. My compiler is complaining about an invalid redeclaration of a function. 1. How can I declare a function that returns a pointer to a function of its own type? 9. What should the 64-bit integer type on new. I can’t seem to define a linked list node which contains a pointer to itself. ? 13.C++ Interview questions and answers By admin | January 23. 64-bit machines be? 3. How do you decide which integer type to use? 2. but I only define it once and call it once. What is the difference between char a[] = “string”. 2004 Some good C++ questions to ask a job applicant. and char *p = “string”. What does extern mean in a function declaration? 5. What’s the auto keyword good for? 6.

It has a volatile memory.RAM: Read / Write memory. and also it is defined as a device that includes micro processor. Difference between static and dynamic RAM? . Why does microprocessor contain ROM chips? . 10. Low Speed.The address bus is unidirectional because the address information is always given by the Micro Processor to address a memory location of an input / output devices. Volatile Memory.? . 16. The primary function of a Latch is data storage. 8. 32-bit Processor . 11.Because 8085 processor has 8 bit ALU (Arithmetic Logic Review). few bit handling instructions.Static RAM: No refreshing. 16-bit Processor .Scratch pad of computer. 14. What is interrupt? . memory.80386 / 80486. & input / output signal lines on a single chip. What is the difference between primary & secondary storage device? . Most Micro Processor are single.The data bus is Bi-directional because the same bus is used for transfer of data between Micro Processor and memory or input / output devices in both the direction. 19. What is 1st / 2nd / 3rd / 4th generation processor? . 15. which can store 0 or 1.High-density n. .Microprocessor is a program-controlled device.type flip-flop used as a temporary storage device controlled by a timing signal. It is used for temporary storage of data & information between the main memory and the CPU (center processing unit). to hold the data for display.8086 / 68000 / Z8000. Information stored as voltage level in a flip flop. 9. more bit handling Instructions.x86 interview questions These interview questions test the knowledge of x86 Intel architecture and 8086 microprocessor specifically.Microprocessor contain ROM chip because it contain instructions to execute data. Most Microprocessor does not support floating-point operations. Similarly 8086 processor has 16 bit ALU.Cache memory is a small high-speed memory. 6. Is the data bus is Bi-directional? . 17. Dynamic RAM: Refreshed periodically. 12. What is the disadvantage of microprocessor? . ROM: Read only memory. Primary devices are: RAM / ROM. 3 to 4 transistors are required to form one memory cell. Give examples for 8 / 16 / 32 bit Microprocessor? . Which transistor is used in each cell of EPROM? . The cache memory is only in RAM. 7.In Microprocessor more op-codes. It is used in output devices such as LED.Latch is a D. 6 to 8 MOS transistors are required to form one memory cell. decodes and executes the instructions. which fetches the instructions from memory.type Complimentary Metal Oxide Silicon field effect transistor. and it is made up of 4 / 8 / 16 / 32 bits.The processing speed depends on DATA BUS WIDTH. Non Voliate Memory. What is called .8-bit Processor . Differentiate between RAM and ROM? . High Speed. Is the address bus unidirectional? . 18. It is a nonvolatile memory. What is meant by LATCH? .In primary storage device the storage capacity is limited. 4.Cache Memory is scratch pad of computer.Floating . 5. 1. What is the difference between microprocessor and microcontroller? . Secondary devices are: Floppy disc / Hard disk.8085 / Z80 / 6800. What is cache memory? .Interrupt is a signal send by external device to the processor so as to request the processor to perform a particular work.gate Avalanche Injection MOS (FAMOS) transistor is used in each cell of EPROM.chip devices. What does microprocessor speed depend on? . 2. Information is stored as a charge in the gate to substrate capacitance. But in Microcontroller: fewer op-codes. What is a Microprocessor? . 13. 3. Define HCMOS? .The processor made of PMOS / NMOS / HMOS / HCMOS technology is called 1st / 2nd / 3rd / 4th generation processor. In secondary storage device the storage capacity is larger.It has limitations on the size of data. Why 8085 processor is called an 8 bit processor? .

Are you familiar with the term MESI? 9.Stack is a portion of RAM used for saving the content of Program Counter and general purpose registers. Describe a finite state machine that will detect three consecutive coin tosses (of one coin) that results in heads. What are the total number of lines written by you in C/C++? What is the most complicated/valuable program written in C/C++? 14.Compiler is used to translate the high-level language program into machine code at a time. It doesn. What types of CMOS memories have you designed? What were their size? Speed? 18. What is a compiler? . Have you studied buses? What types? 2. it stores automatically. What types of high speed CMOS circuits have you designed? . At the input device there is either overshoot. How many bit combinations are there in a byte? 4. The Execution time is less compared to Interpreter. what is the purpose of a processor cache and describe its operation? 5. What is flag? . What compiler was used? 15. 22. Process technology? What package was used and how did you model the package/system? What parasitic effects were considered? 21. undershoot or signal threshold violations. What is stack? . Which processor structure is pipelined? . You have a driver that drives a long signal & connects to an input device. What types of I/O have you designed? What were their size? Speed? Configuration? Voltage requirements? 20.All x86 processors have pipelined structure. For a single computer processor computer system. What is the difference between = and == in C? 16. Assuming 1 clock per stage. Are you familiar with VHDL and/or Verilog? 17. Are you familiar with the term snooping? 10.Flag is a flip-flop used to store the information about the status of a processor and the status of the instruction executed most recently 23. what can be done to correct this problem? 13.ROM cannot be used as stack because it is not possible to write to ROM. What are the main issues associated with multiprocessor caches and how might you solve them? 7. 11. 25. Can ROM be used as stack? . 21. Explain the difference between write through and write back cache. The questions apply mostly to fresh college grads pursuing an engineering career at Intel. 24. also called Flash memory. What is NV-RAM? . Explain the operation considering a two processor computer system with a cache for each processor. In what cases do you need to double clock a signal before presenting it to a synchronous state machine? 12. It is also know as shadow RAM. 1. what is the latency of an instruction in a 5 stage machine? What is the throughput of this machine ? 3. ^Back to Top Intel interview questions The following questions are used for screening the candidates during the first interview.20. Have you studied pipelining? List the 5 stages of a 5 stage pipeline. What work have you done on full chip Clock and Power distribution? What process technology and budgets were used? 19.t require special instruction to store in a memory.Nonvolatile Read Write Memory. 6. 8.

What is the output of printf("\nab\bcd\ref").r. What is the difference between hard real-time and soft real-time OS? 31. 24. Who to know wether systemuses big endian or little endian format and how to convert among them? 27.3) does not expand but gives preprocessor warning.printf("hello world"). -> ef 15. a+++b -> (a++)+b 20. What transistor level design tools are you proficient with? What types of designs were they used on? 23. Advantages and disadvantages of using macro and inline functions? 4. Scope of static variables? 6. Can structures be passed to the functions by value? 2. ++*ip increments what? it increments what ip points to 18. Operations involving unsigned and signed — unsigned will be converted to signed 19.com Embedded systems interview questions 1. malloc(sizeof(0)) will return — valid pointer 21. How do you write a function which takes 2 arguments . Order of constructor and destructor call in case of multiple inheritance? 12. What is the differnce between embedded systems and the system in which rtos is running? 33.a byte and a field in the byte and returns the value of the field in that byte? 36. What are the different storage classes in C? . What happens when recursion functions are declared inline? 5. What products have you designed which have entered high volume production? 24. Can you have constant volatile variable? Yes.t. # error — what it does? 25. When you inherit a class using private keyword which members of base class are visible to the derived class? 14. 22.fork(). Why cannot arrays be passed by values to functions? 3.2).y) x##y concatenates x to y. What are the features different in pSOS and vxWorks? 35. #define cat(x. Can u have inline virtual functions in a class? 13. Which way of writing infinite loops is more efficient than others? there are 3ways. Why? 16. If not into production. How is function itoa() written? 26.fork(). But cat(cat(1. How is generic list manipulation function written which accepts elements of any kind? 30. pointers in c? 29. main() {fork(). Array of pts to functions — void (*fptr[10])() 23.22. What is forward reference w. Is java a pure object oriented language? Why? 11. What is interrupt latency? 28. How would you find out the no of instance of a class? 10. What was your role in the silicon evaluation/product ramp? What tools did you use? 25. Multiple inheritance . How can you define a structure with bit field members? 34. } — will print 8 times. you can have a volatile pointer? 17. how far did you follow the design and why did not you see it into production? ^Back to Top Read more at TechInterviews.objects contain howmany multiply inherited ancestor? 8. What are the 4 different types of inheritance relationship? 9. What is interrupt latency? How can you recuce it? 32. Difference between object oriented and object based languages? 7.

10. For a pipeline with ‘n’ stages. give the division between Block Offset. Give the truth table for a Half Adder. What’s the difference between Write-Through and Write-Back Caches? Explain advantages and disadvantages of each. what’s the ideal throughput? What prevents us from achieving this ideal throughput? 4.s charging and discharging. How do you detect a sequence of "1101" arriving serially from a signal line? 14. Draw a Transmission Gate-based D-Latch. What are the five stages in a DLX pipeline? 3. (Hint: Double the Clock) 6. Instead of just 5-8 pipe stages why not have.37. Suppose you have a combinational circuit between two registers driven by a clock. you can expect any sequential ckt) 3. The answer to the above question is breaking the combinational circuit and pipelining it. Index and Tag. What is ACBF(Hex) divided by 16? 17. Cache Size is 64KB. Design a Transmission Gate based XOR. say. Convert 65(Hex) to Binary 18. Explain RC circuit. The CPU is busy but you want to stop and do some other task. Give a circuit to divide frequency of clock cycle by two 5. how do you convert it to XNOR? (Without inverting the output) 12. What will be affected if you do this? 8. What is a Snooping cache? 15. Give two ways of converting a two input NAND gate to an inverter 2. What are the different Adder circuits you studied? 9. What are the different qualifiers in C? 38. Block size is 32B and the cache is Two-Way Set Associative. Design any FSM in VHDL or Verilog. Convert a number to its two’s compliment and back 19. 10. How do you handle precise exceptions or interrupts? 8. 11. Design a divide-by-3 sequential circuit with 50% duty circle. What are Branch Prediction and Branch Target Buffers? 7. How do you detect if two 8-bit signals are same? 13. What is Cache Coherency? 13. a pipeline with 50 pipe stages? 6. draw its exact timing response. What are the different hazards? How do you avoid them? 5. What is MESI? 14. What are set up time & hold time constraints? What do they signify? Which one is critical for estimating maximum clock frequency of a circuit? 4. For a 32-bit physical address. 11. Give a gate level implementation of the same. Given a circuit. What are the components in a Microprocessor? 16. What are the different BSD and SVR4 communication mechanisms ^Back to Top Computer architecture and design interview questions 1. How do you do it? Hardware design interview questions 1. (I was given a Pseudo Random Signal Generator. What is pipelining? 2. . What will you do if the delay of the combinational circuit is greater than your clock signal? (You can’t resize the combinational circuit transistors) 7. Now. What is a cache? 9. 15. What is Virtual Memory? 12.

Explain the working of a binary counter.16. .

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