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Mohanad Shini JTAG course 2005
Introduction . What is SoC ? SoC characteristics . Benefits and drawbacks . Solution . Major SoC Applications . Summary .
Introduction Technological Advances ± today¶s chip can contains 100M transistors . ± approximately every 18 months the number of transistors on a chip doubles ± Moore¶s law . ± hence the development of System-On-Chip design . . ± transistor gate lengths are now in term of nano meters . The Consequences ± components connected on a Printed Circuit Board can now be integrated onto single chip .
Summary . . Benefits and drawbacks . Solution . Major SoC Applications . What is SoC ? SoC characteristics .Agenda Introduction .
since we can program and give instruction to the uP to do whatever you want to do. People C: SoC is the efforts to integrate heterogeneous or different types of silicon IPs on to the same chip. like memory. uP. All of the above are partially right. but not very accurate!!! . People B: SoC is a high performance microprocessor.What is SoC ? People A: The VLSI manufacturing technology advances has made possible to put millions of transistors on a single die. and analog circuitry. It enables designers to put systemson-a-chip that move everything from the board onto the chip eventually. random logics.
compiler. protocol stackIntegrated development environment (debugger. but more on ³system´.What is SoC ? SoC not only chip. driver. ICE)Application interface (C/C++. SoC = Chip + Software + Integration The SoC chip includes: Embedded processor ASIC Logics and analog circuitry Embedded memory The SoC Software includes: OS. linker. simulator. firmware. assembly) The SoC Integration includes : The whole system solution Manufacture consultant Technical Supporting .
Major SoC Applications . Summary . Benefits and drawbacks .Agenda Introduction . What is SoC ? SoC characteristics . Solution . .
System on Chip architecture ASIC Typical Design Steps Top Level Design Unit Block Design Unit Block Verification Integration and Synthesis Trial Netlists Timing Convergence & Verification System Level Verification Fabrication DVT Prep DVT 6 12 12 4 14 ?? 5 8 Time in Weeks Typical ASIC design can take up to two years to complete 48 61 Time to Mask order .
IC Vendor steps of Placement. Need to consider Layout issues upfront. Time in Weeks Time to Mask order 33 . Need to reduce time before Vendor Steps.System on Chip architecture SoC Typical Design Steps Top Level Design Unit Block Design Unit Block Verification Integration and Synthesis Trial Netlists Timing Convergence & Verification System Level Verification Fabrication DVT Prep DVT 4 4 2 14 24 5 4 With increasing Complexity of IC¶s and decreasing Geometry. Layout and Fabrication are unlikely to be greatly reduced In fact there is a greater risk that Timing Convergence steps will involve more iteration.
All cores connect to the bus via a standard interface . Any-to-any connections easy but « ± Not all connections are necessary . ± Power consumption . ± Global clocking scheme .System on Chip interconnection Design reuse is facilitated if ³standard´ internal connection buses are used . Standardization is being addressed by the Virtual Socket Interface Alliance (VSIA) .
.System on Chip interconnection AMBA (Advanced Microcontroller Bus Architecture) is a collection of buses from ARM for satisfying a range of different criteria. Burst transfers and split transactions. Suitable for hosting peripherals. ASB (Advanced System Bus): a multimaster synchronous system bus. APB (Advanced Peripheral Bus): simple strobedaccess bus with minimal interface complexity. AHB (Advanced High Performance Bus): a highthroughput synchronous system backbone.
System on Chip cores One solution to the design productivity gap is to make ASIC designs more standardized by reusing segments of previously manufactured chips. ³cores´ or ³cells´. ³macros´. These segments are known as ³blocks´. . Cores are the basic building blocks . The blocks can either be developed in-house or licensed from an IP company.
power.System on Chip cores Soft Macro ± Reusable synthesizable RTL or netlist of generic library elements ± User of the core is responsible for the implementation and layout Firm Macro ± Structurally and topologically optimized for performance and area through floor planning and placement ± Exist as synthesized code or as a netlist of generic library elements Hard Macro ± Reusable blocks optimized for performance. size and mapped to a specific process technology ± Exist as fully placed and routed netlist and as a fixed layout such as in GDSII format . .
time to market .System on Chip cores Soft core Firm core Hard core Reusability portability flexibility Predictability. performance.
simulation and verification .System on Chip cores Locating the required cores and associated contract discussions can be a lengthy process ± Identification of IP vendors ± Evaluation criteria ± Comparative evaluation exercise ± Choice of core ± Contract negotiations Reuse restrictions Costs: license. tool costs ± Core integration. royalty.
. What is SoC ? SoC characteristics . Major SoC Applications . Summary .Agenda Introduction . Benefits and drawbacks . Solution .
. ± More reliable implementation .The Benefits There are several benefits in integrating a large digital system into a single integrated circuit . ± Greater design security . ± Smaller physical size . ± Lower power consumption . ± Faster circuit operation . These include ± Lower cost per gate .
The Drawbacks The principle drawbacks of SoC design are associated with the design pressures imposed on today¶s engineers . ± Increased verification requirements . . ± Exponential fabrication cost . ± Increased system complexity . such as : ± Time-to-market demands .
Design gap .
What is SoC ? SoC characteristics . . Solution . Major SoC Applications . Benefits and drawbacks . Summary .Agenda Introduction .
Done on such a scale that a new industry has been developed.Solution is Design Re-use Overcome complexity and verification issues by designing Intellectual Property (IP) to be re-usable . ± IP Integrators ± consumers . Design activity is split into two groups: ± IP Authors ± producers . integrate IP from multiple vendors ± IP integrated onto Integration Platform designed with specific application in mind . evaluate. IP Authors produce fully verified IP libraries ± Thus making overall verification task more manageable IP Integrators select.
Solution . Benefits and drawbacks . Major SoC Applications . What is SoC ? SoC characteristics . . Summary .Agenda Introduction .
Information Technologies ± PC interface (USB. WLAN. PCI. LCD monitor controller. Image and Video Signal Processing .etc) Computer peripheries (printer control... «.. 2G/3G/4G. Data Communication ± Wireline Communication: 10/100 Based-T.PCI-Express.. Gigabit Ethernet.. WiMax.Major SoC Applications Speech Signal Processing .etc . IDE. Etc ± Wireless communication: BlueTooth.etc) . xDSL. UWB. DVD controller.
Solution .Agenda Introduction . . Summary . Benefits and drawbacks . What is SoC ? SoC characteristics . Major SoC Applications .
Summary Technological advances mean that complete systems can now be implemented on a single chip . The drawbacks are that these systems are extremely complex requiring amounts of verification . The solution is to design and verify re-useable IP . . area and power . The benefits that this brings are significant in terms of speed .
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