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Digital Electronics

1. What is a binary coded decimal? When a computer handles numbers in binary in group of four digits, the number system is called Binary Coded Decimal (BCD). 2. State the rules for adding two BCD numbers? The rules for adding two BCD numbers are: a) Add the two numbers, using the rules for binary addition. b) If a four bit sum is equal to or less than 9, it is a valid BCD number. c) If a four bit sum is greater than 9, or if a carry-out of the group is generated, it is an invalid result, add 6(0110) to the four-bit sum in order to skip the six invalid states and return to the code to 8421.if a carry results when 6 is added, simply add the carry to the next four bit group. 3. State and explain Boolean algebra? Boolean algebra is a set of rules, laws and theorems by which logical operations can be expressed mathematically. It is a convenient and systematic way of expressing and analyzing the operation of digital circuits and systems. 4. State and explain De Morgan's theorems. De Morgan's first theorem states that the complement of a product is equal to the sum of the complements. (i.e.)AB'=A'+B' De Morgan’s second theorem states that the complement of a sum is equal to the product of the complements. 5. Define sum of products. The sum of products is a Boolean expression containing AND terms, called the product terms of one or more literals each. The sum denotes the ORing of these terms. eg.F=y'+xy+x'yz' 6. Define product of sum. A product of sum is a Boolean expression containing OR terms, called sum terms. Each term may have any number of literals. the product terms denote the ANDing of these terms.

10. . Boolean algebra is closure with respect to operator '+' and '. What is a binary operator? The binary operator defined on a set S of elements is a rule that assigns to each pair unique elements from S. What is maxterm? A sum term containing all the k variables of the function either in complemented or uncomplemented form is called a max term. 14. in which the map diagram is made up of squares. What are basic properties of Boolean algebra? The basic properties of Boolean algebra are commutative property.eg. What is minterm? the product term containing all the k variables of a function in either complemented or uncomplemented form is called a minterm. the prime implicant is said to be essential. Explain the closure property of Boolean algebra. 12. What is an essential implicant? If a min term is covered by only one prime implicant. What is a prime implicant? A prime implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map.F=x(y'+z)(x'+y+z') 7. What is a karnaugh map? A karnaugh map or k map is a pictorial form of truth table. A set S is closed with respect to a binary operator if for every pair of elements of S the binary operator specifies the rule for obtaining a unique element of S. 11. 13. with each squares representing one minterm of the function. 8. associativity and distributivity.'. 9.

include a third number in column b in paranthesis. 2 check both the numbers to show that they have been used and write them down in column b. The absorption law of Boolean algebra is given by X+XY=X. 3. The commutative property is: A+B=B+A 17. The associative property of Boolean algebra states that the ORing of several variables results in the same regardless of the grouping of the variables. the number in the section below is greater than the number in the section above by a power of 2. The distributive property is: A+BC= (A+B) (A+C) 18. The distributive property states that ANDing several variables and Oaring the result with a single variable is equivalent to ORing the single variable with each of the of the several variables and then ANDing the sums.15.State the associative property of boolean algebra. State the commutative property of Boolean algebra. List the conditions for tabulation method The conditions for tabulation method are as follows: 1. X(X+Y) =X. The commutative property states that the order in which the variables are ORed makes no difference. to designate power of 2 by which the number . What is min term canonical form? Logical sum of all the min terms having the value of 1 is called min term Canonical form. 19. The associative property is stated as follows: A+ (B+C) = (A+B) +C 16. 20. State the distributive property of Boolean algebra. State the absorption law of Boolean algebra.

MOS They are further classified as N-channel CMOS .differ. Unsaturated logic. AND gate 2. Classify the digital logic families? The digital logic families can be classified as 1.Dual in line package LCC. Metal oxide semiconductor family(MOS family).Emitter Coupled Logic 25. I2L.Integrated Injection Logic TTL. Classify the MOS digital logic family? The MOS logic family is classified into two types namely 4. Classify the logic family by operation? The Bipolar logic family is classified into 1. Which gates are called as the universal gates? What are its advantages? The NAND and NOR gates are called as the universal gates.Plastic Leaded Chip carrier PQFP. This type of gate is used for any type of applications.Diode Transistor logic I2L. TTL. Bipolar transistor family (BJT family) 2.Leadless Chip Carrier PLCC. P. . DTL. 23. Complementary MOS 5. Saturated logic 2. Mention the classification of BJT digital logic family? The BJT family is classified as follows: RTL. NOT gate 22. Mention the different IC packages? DIP. What are the basic digital logic gates? The three basic logic gates are 1.Plastic Quad Flat Pack PGA. and ECL logic comes under the unsaturated logic family.Transistor Transistor Logic ECL. The RTL. HTL logic comes under the saturated logic family.channel CMOS and Pchannel MOS and N.channel MOS. OR gate 3. 26. 24. This number in the paranthesis tells the position of difference in binary notation.Pin Grid Array 27.Resistor Transistor Logic DTL. The Schottky TTL. 21.

What is High Threshold Logic? Some digital circuits operate in environments which produce very high noise signals. 34. 30. What is propagation delay? Propagation delay is the average transition delay time for the signal to propagate from input to output when the signals change in value. 37. Totem-Pole Output 3. Define noise margin? Noise margin is the limit of a noise voltage which may be present without impairing the proper operations of the circuit. The temperature in which the performance of the IC is effective is called as operating temperature.28. 33. What are the type of TTL logic? 1. Define power dissipation? Power dissipation is the power consumed by the gate which must be available for the power supply. Open collector output 2. 36. This type of gate is called HTL logic or High Threshold Logic. What is depletion mode operation MOS? . Define fan in? Fan in is the number of inputs connected to the gate without any degradation in the voltage level. 31. Tri-state output. 32. What is Operating temperature? All the gates or semiconductor devices are temperature sensitive in nature. For operation in such surroundings there is available a type of DTL gate which possesses a high threshold to noise immunity. Define Fan-out? Fan out specifies the number of standard loads that he output of the gate can drive with out impairment of its normal operation. 35. Operating temperature of the IC vary from 00 C to 700 c. Mention the important characteristics of digital IC’s? Fan out Power dissipation Propagation Delay Noise Margin Fan In Operating temperature Power supply requirements 29.

What is enhancement mode operation of MOS? If the region beneath the gate is left initially uncharged a channel must be induced by the gate field before current can flow.channel MOS conducts when its gate. The basic unit for storage is flipflop.channel MOS conducts when its gate.source voltage is negative 3.to. Either type of device is turned of if its gate. The presence of schottky diode between the base and the collector prevents the transistor from going into saturation.They are. 39. 2.A flip-flop maintains its output state either at 1 or 0 until directed by an input signal to change its state. The resulting transistor is called as schottky transistor. The p. The use of schottky transistor in TTL decreases the propagation delay without a sacrifice of power dissipation. How a schottky transistor is formed and what are its uses? A schottky diode is formed by the combination of metal and semiconductor. . 2)Asynchronous sequential circuit. 41)What are the classification of sequential circuits? The sequential circuits are classified on the basis of timing of their signals into two types.source voltage is positive. 40.to. Thus the channel current is enhanced by the gate voltage and such a device is said to operate in the enhancement mode. In this mode current flows unless the channel is depleted by an applied gate field.Some of them are mentioned below they are. 38.to. 1)Synchronous sequential circuit. The n.source voltage is zero. 43)What are the different types of flip-flop? There are various types of flipflop.If the channel is initially doped lightly with p-type impurity a conducting channel exists at zero gate voltage and the device is said to operate in depletion mode. RS flip-flop SR flip-flop D flip-flop JK flip-flop T flip-flop 4 4)What is the operation of RS flip-flop? . Mention the characteristics of MOS transistor? 1. 4 2)Define Flipflop.

• • • • When R input is low and S input is high the Q output of flip-flop is set. When R input is high and S input is low the Q output of flip-flop is reset. • When both the inputs R and S are low the output does not change. 47)What is the operation of JK flip-flop? • When K input is low and J input is high the Q output of flip-flop is set. • When K input is high and J input is low the Q output of flip-flop is reset. 49)Define race around condition. • When T=0 there is no change in the output. In JK flip-flop output is fed back to the input. the output is reset. • When R input is high and S input is low the Q output of flip-flop is reset. 50)What is edge-triggered flip-flop? The problem of race around condition can solved by edge-triggering flipflop. • When both the inputs K and J are low the output does not change • When both the inputs K and J are high it is possible to set or reset the flip-flop (ie) the output toggle on the next positive clock edge. When both the inputs R and S are low the output does not change When both the inputs R and S are high the output is unpredictable.This condition is called ‘race around condition’. • When T=1 the output switch to the complement state (ie) the output toggles.The term edge triggering means that the flip-flop changes state either at the positive edge or .Due to this in the positive half of the clock pulse if both J and K are high then output toggles continuously. Therefore change in the output results change in the input. 46)What is the operation of D flip-flop? In D flip-flop during the occurrence of clock pulse if D=1. 48)What is the operation of T flip-flop? T flip-flop is also known as Toggle flip-flop. • When both the inputs R and S are high the output is unpredictable. the output Q is set and if D=0. 45)What is the operation of SR flip-flop? • When R input is low and S input is high the Q output of flip-flop is set.

The binary information in a register can be moved from stage to stage within the register or into or out of the register upon application of clock pulses. 60) What are the different types of shift type? There are five types. So an nbit register has a group of n flip-flops and is capable of storing any binary information/number containing n-bits. 59) Define shift registers. 51)What is a master-slave flip-flop? A master-slave flip-flop consists of two flip-flops where one circuit serves as a master and the other as a slave. A register is a group of flip-flops flip-flop can store 1 bit information. The time required to change the voltage level from 90% to 10% is known as fall time(tf). 55)Define setup time. This type of bit movement or shifting is essential for certain arithmetic and logic operations used in microprocessors. The time required to change the voltage level from 10% to 90% is known as rise time(tr). The hold time is the minimum time for which the voltage levels at the excitation inputs must remain constant after the triggering edge of the clock pulse in order for the levels to be reliably clocked into the flipflop.It is denoted as thold . 57)Define propagation delay. The setup time is the minimum time required to maintain a constant voltage levels at the excitation inputs of the flip-flop device prior to the triggering edge of the clock pulse in order for the levels to be reliably clocked into the flipflop.negative edge of the clock pulse and it is sensitive to its inputs only at this transition of the clock. 54)Define skew and clock skew.It is denoted as tsetup. A propagation delay is the time required to change the output after the application of the input. They are. 58)Define registers. The phase shift between the rectangular clock waveforms is referred to as skew and the time delay between the two clock pulses is called clock skew. 53)Define fall time. 56)Define hold time. 52)Define rise time. This gives rise to group of registers called shift registers. .

 11 transition: This can happen either when S=1 and R=0 or S=0 and R=0.  11 transition: This can happen when K=0 and J=0 or J=1. 65)Explain ROM .They are.  01 transition: This can happen only when S=1 and R=0. 62)Explain the flip-flop excitation tables for JK flip-flop In JK flip-flop also there are four possible transition from present state to next state.  00 transition: This can happen either when R=S=0 or when R=1 and S=0.Serial In Serial Out Shift Register Serial In Parallel Out Shift Register Parallel In Serial Out Shift Register Parallel In Parallel Out Shift Register Bidirectional Shift Register 61)Explain the flip-flop excitation tables for RS FF. RS flip-flop In RS flip-flop there are four possible transition from the present state to the next state.Therefore D must be 0 if Qn+1 has to 0. 64)Explain the flip-flop excitation tables for T flip-flop When input T=1 the state of the flip-flop is complemented.  10 transition: This can happen only when S=0 and R=1. Therefore. when T=0.the state of the flip-flop remains unchanged.  10 transition: This can happen either when J=0 and K=1 or when J=K=1.They are.  01 transition: This can happen either when J=1 and K=0 or when J=K=1.  00 transition: This can happen when J=0 and K=1 or K=0. 63)Explain the flip-flop excitation tables for D flip-flop In D flip-flop the next state is always equal to the D input and it is independent of the present state.for 00 and 11 transitions T must be 0 and for 01 and 10 transitions must be 1.and if Qn+1 has to be 1 regardless the value of Qn.

Data is stored as charge or no charge on an insulated layer or an insulated floating gate in the device.What is fundamental mode sequential circuit? -input variables changes if the circuit is stable -inputs are levels. 71. It is not possible to erase selective information. They store 1’s and 0’s as a packet of charge in a buried layer of the IC chip. Read and write operations can be carried out. 70) What is RAM? Random Access Memory. The PROMs are one time programmable.EEPROM 67)Explain PROM  PROM (Programmable Read Only Memory) It allows user to store data or program. The user can blow these fuses by passing around 20 to 50 mA of current for the period 5 to 20µs.EPROM 3. Each bit combination of the input variables is called an address.It consists of n input lines and m output lines. Once programmed. PROMs use the fuses with material like nichrome and polycrystalline.What are excitation variables? -next state variables in asynchronous sequential circuits 73. the information is stored permanent.A read only memory(ROM) is a device that includes both the decoder and the OR gates within a single IC package.What are pulse mode circuit? . The chip can be reprogrammed.The number of distinct addresses possible with n input variables is 2n.not pulses -only one input can change at a given time 74.PROM 2.The blowing of fuses is called programming of ROM. 69)Explain EEPROM  EEPROM(Electrically Erasable Programmable Read Only Memory) EEPROM also use MOS circuitry. 66)What are the types of ROM? 1.What are secondary variables? -present state variables in asynchronous sequential circuits 72. 68)ExplainEPROM  EPROM(Erasable Programmable Read Only Memory) EPROM use MOS circuitry. We can erase the stored data in the EPROMs by exposing the chip to uv light via its quartz window for 15 to 20 minutes. EEPROM allows selective erasing at the register level rather than erasing all the information since the information can be changed by using electrical signals. Each bit combination that comes out of the output lines is called a word.

makes a transition through a series of unstable state 80.what is dynamic hazard? -output changes 3 or more timeswhen it changes from 1 to 0 or 0 to 1 .what is static 0 hazard? -output goes momentarily 1 when it should remain at 0 85.What are the significance of state assignment? In synchronous circuits-state assignments are made with the objective of circuit reduction Asynchronous circuits-its objective is to avoid critical races 76.What is critical race? -final stable state depends on the order in which the state variable changes -race condition is harmful 79.When does a cycle occur? -asynchronous ckt.What is non critical race? -final stable state does not depend on the order in which the statevariable changes -race condition is not harmful 78.-inputs are pulses -width of pulses are long for circuit to repond to the input -pulsewidth must not be so long that it is still present after the new state is reached 75.When do race condition occur? -two or more binary state variables change their valu in response to the change in i/p variable 77.What is hazard? -unwanted switching transients 83.What are the steps for the design of asynchronous sequential circuit? -construction of primitive flow table -reduction of flow table -state assignment is made -realization of primitive flow table 82.What is static 1 hazard? -output goes momentarily 0 when it should remain at 1 84.What are the different techniques used in state assignment? -shared row state assignment -one hot state assignment 81.

What is a half subtracter? 2input 2 o/p device.What is a comparator? It is used to compare 2 binary numbers.What is primitive flow chart? -one stable state per row 91.What is flow table? -state table of an synchronous sequential network 88.What is a full subtracter? 3input 2 o/p device. 98.What is a full adder? 3input 2 o/p device.Used for 3 bit subtraction 96.Used for 2 bit addition.design of digital systems 89.What is the cause for essential hazards? -unequal delays along 2 or more path from same input 87.86.What is SM chart? -describes the behavior of a state machine -used in hardware.It has no storage element. 95.What is a demultiplexer? It receives information from single line and passes it through many lines. 100.What is a multiplexer? It selects information from many inputs and passes through single output line.What is the other name of multiplexer? Dataselector 97. - .Used for 2 bit subtraction.What is encoder? Used for data conversion 99. 93.What are the advantages of SM chart? -easy to understand the operation -east to convert to several equivalent forms 90.What is a half adder? 2input 2 o/p device.Used for 3 bit addition 94.What is combinational circuit? Output depends on the given input. 92.

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