# 1.3.

Description bitwise-and bitwise-or bitwise-xor bitwise-not Left u/l,uv,lv u/l,uv,lv u/l,uv,lv Operator and or xor not Right u/l,uv,lv u/l,uv,lv u/l,uv,lv u/l,uv,lv

2.4. CONVERSION FUNCTIONS
From un,lv sg,lv un,sg un,sg na in To sg un lv in un sg Function SIGNED(from) UNSIGNED(from) STD_LOGIC_VECTOR(from) TO_INTEGER(from) TO_UNSIGNED(from) TO_SIGNED(from)

1164 PACKAGES QUICK REFERENCE CARD
REVISION 1.0
() {} bold b u/l bv uv lv un sg na in sm
c

1.4. CONVERSION FUNCTIONS
From u/l uv,lv b bv,ul bv,lv To b bv u/l lv uv Function TO_BIT(from, [xmap]) TO_BITVECTOR(from, [xmap]) TO_STDULOGIC(from) TO_STDLOGICVECTOR(from) TO_STDULOGICVECTOR(from)

3. IEEE’S NUMERIC_BIT
3.1. PREDEFINED TYPES
UNSIGNED(na to | downto na) Array of BIT SIGNED(na to | downto na) Array of BIT

Grouping Repeated As is ::= ::= ::= ::= ::= ::= ::= ::= ::= ::= ::=

[] | CAPS

Optional Alternative User Identifier

BIT STD_ULOGIC/STD_LOGIC BIT_VECTOR STD_ULOGIC_VECTOR STD_LOGIC_VECTOR UNSIGNED SIGNED NATURAL INTEGER SMALL_INT (subtype INTEGER range 0 to 1) commutative

Left Op Right Return abs sg sg sg sg +,-,*,/,rem,mod un un +,-,*,/,rem,mod sg sg +,-,*,/,rem,mod c na un +,-,*,/,rem,mod c in sg <,>,<=,>=,=,/= un bool <,>,<=,>=,=,/= sg bool <,>,<=,>=,=,/= c na bool <,>,<=,>=,=,/= c in bool

1.5. PREDICATES
RISING_EDGE(SIGID) Rise edge on signal ? FALLING_EDGE(SIGID) Fall edge on signal ? IS_X(OBJID) Object contains ‘X’ ? un sg un sg un sg un sg

2. IEEE’S NUMERIC_STD
2.1. PREDEFINED TYPES
UNSIGNED(na to | downto na) SIGNED(na to | downto na) Arrays of STD_LOGIC

1. IEEE’S STD_LOGIC_1164
1.1. LOGIC VALUES
‘U’ ‘X’/’W’ ‘0’/’L’ ‘1’/’H’ ‘Z’ ‘-’ Uninitialized Strong/Weak unknown Strong/Weak 0 Strong/Weak 1 High Impedance Don’t care

3.3. PREDEFINED FUNCTIONS
SHIFT_LEFT(un, na) SHIFT_RIGHT(un, na) SHIFT_LEFT(sg, na) SHIFT_RIGHT(sg, na) ROTATE_LEFT(un, na) ROTATE_RIGHT(un, na) ROTATE_LEFT(sg, na) ROTATE_RIGHT(sg, na) RESIZE(sg, na) RESIZE(un, na) un un sg sg un un sg sg sg un

Left Op Right Return abs sg sg sg sg +,-,*,/,rem,mod un un +,-,*,/,rem,mod sg sg +,-,*,/,rem,mod c na un +,-,*,/,rem,mod c in sg <,>,<=,>=,=,/= un bool <,>,<=,>=,=,/= sg bool <,>,<=,>=,=,/= c na bool <,>,<=,>=,=,/= c in bool

1.2. PREDEFINED TYPES
STD_ULOGIC Subtypes: STD_LOGIC X01 X01Z UX01 UX01Z Base type Resolved STD_ULOGIC Resolved X, 0 & 1 Resolved X, 0, 1 & Z Resolved U, X, 0 & 1 Resolved U, X, 0, 1 & Z

un sg un sg un sg un sg

3.4. CONVERSION FUNCTIONS
From un,bv sg,bv un,sg un,sg na in To sg un bv in un sg Function SIGNED(from) UNSIGNED(from) BIT_VECTOR(from) TO_INTEGER(from) TO_UNSIGNED(from) TO_SIGNED(from)

2.3. PREDEFINED FUNCTIONS
SHIFT_LEFT(un, na) SHIFT_RIGHT(un, na) SHIFT_LEFT(sg, na) SHIFT_RIGHT(sg, na) ROTATE_LEFT(un, na) ROTATE_RIGHT(un, na) ROTATE_LEFT(sg, na) ROTATE_RIGHT(sg, na) RESIZE(sg, na) RESIZE(un, na) un un sg sg un un sg sg sg un

STD_ULOGIC_VECTOR(na to | downto na) Array of STD_ULOGIC STD_LOGIC_VECTOR(na to | downto na) Array of STD_LOGIC

© 1995 Qualis Design Corporation. Permission to reproduce and distribute strictly verbatim copies of this document in whole is hereby granted. See reverse side for additional information.

© 1995 Qualis Design Corporation

© 1995 Qualis Design Corporation