# Digital Components

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Chapter 25

Introduction Gate Characteristics Logic Families Logic Family Characteristics A Comparison of Logic Families Complementary Metal Oxide Semiconductor Transistor-Transistor Logic

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OHT 25.½#¾

Introduction 
Earlier we looked at a range of digital applications based on logic gates ± at that time we treated the gates as µblack boxes¶

25.1 

We will now consider the construction of such gates, and their characteristics  In this lecture we will concentrate on small- and medium-scale integration circuits containing just a handful of gates
± typical gates are shown on the next slide
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OHT 25.½#¾

½#¾ . Typical logic device pin-outs Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.

Gate Characteristics  The inverter or NOT gate ± consider the characteristics of a simple inverting amplifier as shown below ± we normally use only the linear region 25.2 Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ .

½#¾ . We can use an inverting amplifier as a logical inverter but using only the non-linear region Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.

we use circuits with a rapid transition between the non-linear regions ± as in (b) Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ .± we choose input values to ensure that we are always outside of the linear region ± as in (a) ± unlike linear amplifiers.

 Logic levels ± the voltage ranges representing µ0¶ and µ1¶ represent the logic levels of the circuit ± often logic 0 is represented by a voltage close to 0 V but the allowable voltage range varies considerably ± the voltage used to represent logic 1 also varies greatly. while in others it might be 12-15 V ± in order for one gate to work with another the logic levels must be compatible Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ . In some circuits it might be 2-4 V.

the voltage ranges defining the logic levels are more tightly constrained at the output of a gate than at the input ± thus small amounts of noise will not affect the circuit ± the maximum noise voltage that can be tolerated by a circuit is termed its noise immunity. VNI Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ . Noise immunity ± noise is present in all real systems ± this adds random fluctuations to voltages representing logic levels ± to cope with noise.

 Transistors as switches ± both FETs and bipolar transistors make good switches ± neither form produce ideal switches and their characteristics are slightly different ± both forms of device take a finite time to switch and this produces a slight delay in the operation of the gate ± this is termed the propagation delay of the circuit Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ .

 The FET as a logical switch Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ .

tr and fall time.½#¾ . Rise and fall times ± because the waveforms are not perfectly square we need a way of measuring switching times ± we measure the rise time. tf as shown below Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.

 The bipolar transistor as a logical switch Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ .

1 V ± however.½#¾ .± when the input voltage to a bipolar transistor is high the transistor turns ON and the output voltage is driven down to its saturation voltage which is about 0. saturation of the transistor results in the storage of excess charge in the base region ± this increases the time taken to turn OFF the device ± an effect known as storage time ± this makes the device faster to turn ON than OFF ± some switching circuits increase speed by preventing the transistors from entering saturation Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.

½#¾ . tPD ± this is the average of the two switching times 1 t PD ! 2 (t PHL  t PLH ) Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25. Timing considerations ± all gates have a certain propagation delay time.

Logic Families  We have seen that different devices use different voltages ranges for their logic levels  They also differ in other characteristics 25.3  In order to assure correct operation when gates are interconnected they are normally produced in families  The most widely used families are: ± complementary metal oxide semiconductor (CMOS) ± transistor-transistor logic (TTL) ± emitter-coupled logic (ECL) Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ .

4 ± excellent noise immunity of about 30% of supply voltage ± can be connected to a large number of gates (about 50) ± many forms ± some with t down to 1 ns ± power consumption depends on speed (perhaps 1 mW) Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ .Logic Family Characteristics  Complementary metal oxide semiconductor (CMOS) ± most widely used family for large-scale devices ± combines high speed with low power consumption ± usually operates from a single supply of 5 ± 15 V 25.

± high speed versions comparable to CMOS (~ 1. etc.5 ns) ± low-power versions down to about 1 mW/gate Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.6 V ± many forms. some optimised for speed. power. Transistor-transistor logic (TTL) ± based on bipolar transistors ± one of the most widely used families for small.½#¾ .and medium-scale devices ± rarely used for VLSI ± typically operated from 5V supply ± typical noise immunity about 1 ± 1.

25 V ± used in some high speed specialist applications.propagation delays of 1ns or less ± high power consumption.½#¾ .2-0. Emitter-coupled logic (ECL) ± based on bipolar transistors. but now largely replaced by high speed CMOS Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25. perhaps 60 mW/gate ± low noise immunity of about 0. but removes problems of storage time by preventing the transistors from saturating ± very fast operation .

200 TTL NAND 10 1 .5 ± 33 25.22 Very good 1.5 ECL OR/NOR 25 4 .55 Good 1-4 OHT 25.½#¾ Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 .A Comparison of Logic Families Parameter Basic gate Fan-out Power per gate (mW) Noise immunity t (ns) CMOS NAND/NOR >50 1 @ 1 MHz Excellent 1 .

½#¾ .Complementary Metal Oxide Semiconductor  A CMOS inverter 25.6 Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.

½#¾ . CMOS gates Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.

½#¾ . CMOS logic levels and noise immunity Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.

Transistor-Transistor Logic  Discrete TTL inverter and NAND gate circuits 25.½#¾ .7 Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.

 A basic integrated circuit TTL NAND gate Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ .

 A standard TTL NAND gate Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ .

 A TTL NAND gate with open collector output Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ .

each optimised for a particular characteristic      Storey: Electrical & Electronic Systems © Pearson Education Limited 2004 OHT 25.½#¾ .Key Points Physical gates are not ideal components Logic gates are manufactured in a range of logic families The ability of a gate to ignore noise is its µnoise immunity¶ Both MOSFETs and bipolar transistors are used in gates All logic gates exhibit a propagation delay when responding to changes in their inputs  The most widely used logic families are CMOS and TTL  CMOS is available in a range of forms offering high speed or very low power consumption  TTL logic is also produced in many versions.