SEMINAR

ON

RISC & CISC

Presented by Intramantra Global Solution PVT LTD, Indore http://intramantra.com

INTRODUCTION RISC & CISC Performance Equation RISC VS. CISC

INTRODUCTION
About Micro-processor About Instruction & Instruction Set About Registers

RISC & CISC
Why it is called RISC & CISC ? What is RISC & CISC ?

To be continue«««««.

1 1 2 3 4 5 6

2

3

4

Main Memory

Registers

Execution Unit

In CISC Approach MULT 2:3 , 5:2
Compiler do very little work to translate

1 1 2 3 4 5 6

2

3

4

Main Memory

Registers

Execution Unit

In RISC Approach LOAD A , 2:3 LOAD B , 5:2 PROD A , B STORE 2:3, A

Performance Equation
instructions

time program

=

time cycle

*

cycles instruction

*

program

CISC
Emphasis on Hardware

vs.

RISC Emphasis on Software Reduced instruction Large code size Register-toRegister

Complex instruction Small code sizes Memory- toMemory

THANKS
Presented By :Sarvendra Purohit

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