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The key benefit from the application of computers is to be able to be programmed to perform a specific task. The sequence of instructions to the CPU of a computer that causes it to solve a problem is called a program. The art of designing this sequence is called programming. A computer may be applied to solve a problem by designing the program and interfaces, the rest of the computer system remains the same. Since the main computer components are common, they can be mass produced with corresponding economies of scale. The changes are basically in the program which can be altered at a small cost. Designing the program is a major part of designing a microcomputer system. The primary task of a computer is to execute programs. The program is stored in the memory and it instructs the computer to perform a particular task. It consists of a sequence of instructions which the computer understands. The computer keeps fetching instructions from the memory and executing it in a sequential manner, unless an instruction causes it to change the execution sequence, or causes the computer to halt. The computer fetches and executes instructions. The complete set of instructions which of a computer can interpret and execute is known as the INSTRUCTION SET of that particular type of computer. The program is written using instructions from this instruction set. The next question is what are these instructions like? A computer can only understand binary numbers. Therefore, an instruction is simply a binary bit pattern, ie, a binary number. The computer interprets this binary bit pattern as an instruction to a particular task. For example, the bit pattern 0010 1111 instructs the 8085 microprocessor to complement the contents of register A. The entire program is a sequence of binary numbers. This is called machine language program or object program. But there are some basic difficulties in working with machine language. Such programs are not in a format which the humans, ie, the programmer can easily understand and debug. For a computer 01111010B may be easy to understand, but not so for the programmer. They may find it tiresome and confusing. The situation is improved if the program is written in hexadecimal rather than 1
binary numbers. For example 7AH is easier to understand and remember than 01111010B. Writing and debugging of programs becomes easier. It is for this reason programming is done with hexadecimal numbers. The program in hexadecimal is converted to binary through a program called the hexadecimal loader. The hexadecimal loader converts hexadecimal numbers and loads it into the computer. This is a common program and is usually a part of the monitor.
SOFTWARE MODEL OF 8085.
The purpose of developing a software model is to aid the programmer in understanding the operation of a microprocessor system from the software point of view. In order to program a microprocessor, we need not know all its hardware features. The functions of the various pins of the microprocessor and their electrical characteristics are not of importance to the programmer, nor is the knowledge of the working of its internal circuits needed. He is only interested in the software resources of the microprocessor system and how they are organized. A programmer must know the various internal registers and flags within the microprocessor, understand their purpose, capabilities and their limitations. In other words he must understand the programming model of the microprocessor. Furthermore, he must also know how the memory and the I/O are organized and how it is addressed by the microprocessor to obtain instructions and data.
5.2.1 Programming Model of 8085. The programming model is the diagram of the internal registers and the flags within the microprocessor, which are of importance to the programmer. The programming model of 8085 is shown in Figure 5.1. The 8085 contains several registers which can be used by the programmer. Some of these registers are general purpose and can be used by the programmer in any manner. Others are special purpose registers and are used for a specific purpose. The registers B, C, D, E, H, L are 8-bit general purpose registers. They can be used either individually as 8-bit registers or as 16-bit register pairs. The valid register pairs are BC, DE, and HL. These register pairs are used to hold addresses or 16-bit numbers by some instructions. The register pair HL has a special significance. One is it can be used as a pointer to a memory location. Second, it acts as the accumulator for double byte 2
addition. The register pair BC and DE can also be used as pointers by a very limited instructions. Amongst the special purpose registers, the Accumulator and the Flags together are known as the Processor Status Word. They give complete information of the result of a particular arithmetic or logical instruction. The Accumulator, also known as register A is an 8-bit special purpose register. It is the primary source and destination for arithmetic and logical instructions. Almost every arithmetic and boolean instructions take one of the operands from the accumulator and the result is placed in the accumulator. The other operand can be either in the memory or any of the other registers. Also all data transfers between CPU and I/O take place through the accumulator. The Flag register (F) contains five bits that are used as flags. Each of these record processor status information and may control the processor operation. On the execution of certain instructions the flags change. More over certain instructions such as conditional calls and jumps use these flags for their execution. The Sign Flag bit (S) indicates whether the results of an operation is positive or negative. If the most significant bit of the result of an operation is '1', then this flag is set, otherwise it is reset. The Zero Flag bit (Z) indicates whether the result of an operation is zero or non-zero. It is set if the result is zero, else it is reset. The Auxiliary Carry Flag bit (AC) holds the carry between the least significant and most significant halves (nibbles) of the result. If there is a carry from the 3rd bit to the fourth bit, AC is set, else it is reset. The Parity Flag bit (P) indicates the parity of the result. If the parity is even then P is set , otherwise it is reset. ( Parity is the number of '1' in the result expressed as even or odd.) The Carry Flag bit (C) indicates a carry out of the most significant bit of the result. If the instruction results in a carry (from addition) or a borrow (from subtraction or comparison) out of the most significant bit, this flag is set, otherwise it is reset. The Program Counter (PC) keeps track of the address of the memory location containing the next instruction to be executed in the program memory. This is a 16-bit register.
Figure 5.1. The Programming Model Of 8085 Microprocessor.
Figure 5.2. Busses and Control Signals of 8085
This is also referred to as 64K. A memory location contains 8 bits of data. The 8085 has a 8-bit data bus. The main control signals are R 1. it can contain 8 bits of data.2. W 2. the 16 address lines can address 216= 65. It addresses the I/O when IO M 5 signal is / / '1'. we shall review the bus organization of 8085. In other words the 16bit address on the address bus selects one of the 64K memory locations which the 8085 microprocessor can address. 5 .The Stack Pointer (SP) keeps a track of the stack. The stack pointer contains the address of (points to) the last memory location filled on the stack. IO M 3. first out data structure the 8085 maintains in the memory.2. A memory location has therefore an address and a content. 5. 5. each with an unique address. The content is the data contained at that particular memory location. the Lower Address Bus and the Upper Address Bus. When IO M 6 is low.2. Once the memory location is selected the data transfer between the selected memory location and microprocessor can take place. Therefore 8-bits of data can be transferred to and fro from the microprocessor in parallel.536 memory / locations. ie. All stack operations are 16-bit. Therefore in short: i) ii) The memory can be considered to be an array of 64K memory locations. ie. The address lines are divided into two groups of 8 lines.2 Data and Address Busses of 8085 In order to understand how the memory and the I/O is organized.3 Memory Addressing and Memory Map. Each memory location is 8-bit wide. The address lines address R / D the memory when IO M 4 signal is '0'. The 8085 has 16 address lines. where 1K = 2 10= 1024. These busses and control signals are shown in Figure 5. The stack is a last-in. The stack grows towards decreasing memory locations. The Lower Address Bus and the Data Bus are multiplexed and they can be demultiplexed by using the ALE signal and a latch. With each addition to the stack the stack pointer is decreased by two and vice-versa. The memory address is the 16-bit address on the address bus which selects a memory location.
data storage. The SID and SOD lines are also shown as they can be programmed through software. It shows the internal registers of 8085 as well as the memory and the I/O space. It gives a clear picture of how instructions work and how they affect the registers. This is an invaluable conceptual aid in programming. The software model of 8085 is shown in Figure 5. the address on the address lines is for the I/O. program storage.2. flags. They can be disabled or enabled through software. 6 . A memory map is shown in Figure 5. The various functions assigned to the I/O can be depicted on it. stacks etc can be depicted on it. Similar to / memory addressing. Each I/O port location is also 8 bits wide. An I/O map is shown in Figure 5. An I/O map can be drawn showing the I/O organization of a computer system.5 The Software Model of 8085. Furthermore the type of memory interfaced and at what locations can also be shown on it. This model gives a clear indication of the various resources available to the programmer.2. 5. Various functions assigned to these memory locations. The Interrupts are also shown in the figure. Therefore there are 8 bits of unique address.A memory map can be drawn showing the memory organization of a computer system. The latter will be dealt with in a separate module. In other words it becomes his play field. eg.5.4 I/O Addressing and I/O Map. memory and the I/O. When IO M is high. But there is one difference. Therefore the 8085 can address only 28= 256 I/O ports. the address on the address bus selects one unique I/O port location and then data transfers between the I/O port and the 8085 can take place.4 5.3. The address is duplicated on the Lower Address Bus A0-A7 and the Upper Address Bus A8-A15. temporary storage.
7 .Figure 5.3.4. The Memory Map. The Memory Map Figure 5.
The I/O Map.4.Figure 5. 8 .
5.Figure 5. The Software Model of 8085 9 .
In other words the op-codes are described in terms of mnemonics for the benefit of the programmer. Mnemonics are abbreviations of the instruction. The op-code tells the 8085 CPU which operation is to be performed.6). This operand can be a 8-bit data or an I/O address. The op-codes are basically binary numbers. a) Single Byte Instructions: These instructions contain only the op-code. contain the operands to be used by the instruction. c) Three Byte Instructions: In these instructions the first byte is the op-code and the second and third bytes contain a 16-bit operand. if present.1 Instruction Format. A programmer will find it difficult to remember which op-code 2FH corresponds to. Op-codes and Mnemonics.3 REVIEW OF THE INSTRUCTION SET. The mnemonics are usually written in upper case. Multibyte instructions must be stored in successive memory locations. 5. For example. The first byte of all instructions is the op-code (operation code). The instruction set of 8085 was introduced in module on the 8085 CPU. The detailed instruction set is given the Appendix. b) Two Byte Instructions: In these instructions the first byte is the op-code and the second byte contains an 8-bit operand. The second byte contains the least significant byte (LSB) and the third byte contains the most significant byte (MSB) of the two byte data or address. one byte. This may be a 16-bit data or a memory address. The address of the first byte is the address of the instruction. It is recommended that the student goes thoroughly through the instruction set given in the Appendix. 5. namely. The other bytes. two byte and three byte instructions. The method of encoding this 16-bit operand in the instruction is a bit unusual. There are three different instruction formats ( Figure 5. 10 . In this section some of the aspects of the instruction set will be highlighted.2 Addressing Modes of 8085. For example if the 16-bit data is 1234H it is coded as 34 12 in the 2nd and 3rd bytes respectively of the instruction.3. Always remember that a 16-bit data is coded as LSB first and then MSB. Therefore the op-codes are described in terms of MNEMONICS. if register A is to be complemented the op-code is 0010 1111B or 2FH. Most of the instructions of 8085 are single byte instructions.5.3.
register indirect addressing and immediate addressing. Register A <─────────── 10 Register Addressing. or the register pairs BC.When 8085 executes an instruction it performs specified functions on data. Direct Addressing. reside in one of the internal registers. LDA is the mnemonic for the instruction Load Direct Accumulator and 1234H is the 16-bit address which contains the data to be loaded. They can be the registers B. or A. HL or SP. In the register indirect addressing. Thus the memory is addressed indirectly by the register pair. Assume the data is 10H. For example. DE. In direct addressing the instruction contains the actual address of the operand in the memory. whose address is contained in the 11 10 Memory Location 1234 . register addressing.A instruction. H. D. or as move A to B. consider MOV B. stored in the memory or held in the I/O. In register addressing the instruction specifies the register or register pair in which the operand is located. These may be a part of the instruction. The 8085 has four addressing modes. The op-code for LDA is 3AH. C. source register A. Register Indirect Addressing. L. These data are called its operands. namely direct addressing. Therefore the instruction which is 3 bytes long is 3A 34 12. The mnemonic MOV stands for move. The register pair HL is a special register for register indirect addressing. Consider the instruction LDA 1234H. It defines a register M in the memory at the location. This is a one byte instruction whose op-code is 47H. a register pair holds the address of the memory location containing the operand. The various methods the 8085 uses to access the operands are called its addressing modes. The instruction causes contents of register A to be copied to register B. The instruction is read as move destination register B. E. Notice that the address is coded LSB first and then MSB. A 16-bit memory address follows the op-code of the instruction. in the second and third bytes of the instruction.
The data may be 8-bit or 16-bit. For example. These op-codes are different for different variations of the instructions. depending on the type of instruction. It is a one byte instruction and the op-code for it is 7EH.reg2 has 63 variations and therefore 63 different op-codes.3. which total to 246 different op-codes. 5. This is a one byte instruction whose machine code is 2FH. In this mode of addressing the data is encoded in the instruction.3 Classification of Instructions. The instruction is coded in machine language as 3E 30. CMA stands for complement the accumulator. consider the instruction MVI A.M. Assume that at the time of execution of the instruction the register pair HL contains 1234H. but is assumed to be in a register usually the accumulator. This instruction moves content of M (located at memory address pointed by HL. 12 . Implicit Addressing.30H.7. namely 1234H) to register A. For example. Consider the instruction MOV A. Here the register A (the accumulator) is implied. It is a one byte instruction. The 8085 microprocessor has 74 different instructions. The data is placed immediately after the op-code. the MOV reg1.register pair HL. This is a two byte instruction whose opcode (the first byte) is 3EH. It is useful to refer to the software model of 8085. while going through the instruction set. In the previous sections we had encountered some of the instructions. Immediate Addressing. Consider the CMA instruction. The mnemonic MVI stands for move immediate. Here we shall go through the various groups of instructions. This is followed by the data to be moved to register A. In certain instructions the operand is not specified. See Figure 5.
Figure 5. HL points to Reg. j Figure 5. 13 .7.6. M in Memory. Instruction Types.
increment or decrement data in registers or memory. ORing. where exchange of data takes place. as follows: 1. I/O.These instructions modify the program flow by performing conditional or un-conditional jumps. Stack. These instructions can be subdivided into immediate. L and A and the memory.These instructions move data between registers or between registers and memory. The exception to this is the XCHG instruction. and Machine Control Group. the values of the flags remain the same before and after the data transfer instruction. In nearly all the data transfer instructions although the data is copied from one place to the other and not moved. 4. 2. indirect and register transfer instructions. Arithmetic Group . If one recalls the software model.3. 5. as well as load them with immediate data specified in the instruction itself. XORing. In data transfer instructions. One form. direct. E. H. these instructions transfer data between the registers B. ie. D. subtract.These instructions add. rotating or complementing data in registers or between memory and a register. Logical Group .The instruction set of 8085 has been grouped under five different functional headings. The registers i) Immediate Data Transfer Instructions: These instructions load the registers or register pairs of 8085 or a memory location M addressed indirectly by the HL register with the immediate data supplied with the instruction itself. as suggested by the mnemonics. The instructions in this group are used to transfer data around the registers and the memory.8-bit data 14 .4 Data Transfer Group.These instruction perform logical operations of ANDing. 3. 5. reading and writing to I/O ports and interrupt control and setting and clearing of flags. There are two forms of the instruction. calls or returns. Branch Group . the move immediate instruction is MVI r. the flags are not affected. These instructions perform stack operations. C. comparing. Direct memory to memory transfer is not possible. Data Transfer Group .
(Load Direct Accumulator for memory) STA memory address . In the first form. (Store Accumulator Indirect). LHLD memory address . (Store Direct Accumulator to memory) In the other form a 16-bit data. C. STAX rp . (Load Accumulator Indirect). The other form is the load immediate register pair instruction is LXI rp. HL or SP. The LHLD xxxx instruction loads the register L with the content of the memory address xxxx and register H with content of the memory location xxxx+1 as shown in Figure 5. SHLD memory address .loads the 8-bit data into the register specified. The register pairs can be BC. A mnemonic containing X as a letter. usually refers to a register pair operation.8. ie. The rp can be the B (register pair BC) or D (register pair DE). These are LDAX rp . B. There are two forms of these instructions one dealing with 8-bit data and the other with 16-bit data. 15 . These instructions load and store register A at a memory location whose address is contained in the specified register pair. (Store HL Direct). E. register A and the content of memory location specified. there are other types of indirect data transfer instructions also. H. DE. The other method of defining a register M in memory does not have a particular instruction. iii) Indirect Data Transfer: Although data can be transferred indirectly through the register M. In this method the register M is like any other register of 8085. D. (Load HL Direct). In SHLD instruction the contents of the HL stored in the memory in a similay way. the data transfers takes place between the accumulator. the data transfer takes place between the HL register pair and two consecutive memory locations. ii) Direct Data Transfer Instructions: In these instructions the data is transferred to and from the memory. The registers can be A. starting from the memory address specified. L or M.16-bit data LXI loads the specified register pair with the immediate 16-bit data supplied with the instruction. The address of the memory location is given in the instruction itself. LDA memory address .
9 The XCHG Instruction. Figure 5. 16 .8 The LHLD Instruction.Figure 5.
H. reg2 (Move reg2 to reg1) where reg1 and reg2 are the registers A. These instructions transfer 8-bit data between the various registers. (A) <-. The result of the addition is put in the accumulator. All arithmetic instructions affect the flags according to the rules indicated earlier (discussion on the software model). i) 8-bit binary addition instructions: The register A is assumed to contain one operand. The arithmetic group includes instructions for 8-bit addition and subtraction. In all the arithmetic and logical instructions requiring two operands one of the operands is assumed to be in the accumulator (register A) and the result of the operation is also put in the accumulator. As an example consider that A contains 40H and B contains EEH. This exchanges contents of DE and HL register pairs. 5. M. The second operand can be in any of the registers B.(A) + (register) ADD 8-bit data .9. instructions for incrementing and decrementing registers and register pairs. There 63 different MOV instructions. B. The instruction ADD B will cause the addition and the result 2EH will be put in register A. A.3. All subtraction operations are performed through the two's complement arithmetic and set the carry flag to indicate a borrow and clear it to indicate no borrow.iv) Register Transfer Data Instructions: This is the largest group of data transfer instructions. D. C. unless indicated otherwise. The flags will be set as under. 16bit addition. E. L. There are no operands specified as DE and HL are implicitly addressed.(A) + (register) implies that the content of register A is added to that of the specified register and the result is put in register A. See Figure 5. D.5 Arithmetic Group. C. These have the form MOV reg1. in the memory register M. H. E. or supplied as an immediate operand with the instruction. (A) <-. L. XCHG is a 16-bit instruction. 17 . The forms of instruction are ADD register .(A) + 8-bit data) The notation (A) <-. This is different from the other data transfer instructions as an exchange of data takes place instead of a simple move.
(A) + 8-bit data + (CY) where (CY) is the value (0 or 1) of the carry flag. The value of the carry flag is subtracted from the result. This instruction only affects the carry flag. The forms of the instructions are SBB reg .(register) .(A) . The register pair HL acts as the double byte accumulator. These instructions affect all flags except the CY flag. (A) <-. If the carry flag is set prior to this instruction. DAA is executed. iv) BCD addition: In BCD addition the operands are BCD numbers and binary addition is first done.S 0 Z 0 - AC 0 - P 1 - CY 1 ii) 8-bit binary addition with carry instructions: These instructions are similar to the ADD instructions. In case a borrow is generated. namely BC. 1 will be added to the result. HL or SP.(CY) vii) Increment and decrement register instructions: These instructions increment or decrement the specified register by one. These are very useful instructions when a register is being used as a counter.8-bit data . (A) <-. Then the Decimal Adjust Accumulator instruction. The forms of instruction are SUB reg .(HL) + ( register pair) vi) 8-bit binary subtraction: In the subtract instructions the accumulator contains one of the operands from which the other operand is subtracted. (A) <-. The forms of instructions are: ADC register .(CY) SBI 8-bit data . (HL) <-. The form of the instructions are 18 . The result is put in HL. One of the operands is in HL register pair and the other operand is in any of the register pairs. except that the carry flag is also taken into account. (A) <-. (A) <-. v) Double byte addition instruction: The DAD instruction is a double byte addition instruction. The correct BCD addition results will be available in the accumulator. This is helpful in multibyte addition. the carry flag is set.(A) .(A) .(A) + (register) + (CY) ADC 8-bit data . These are used for multi-byte subtractions. as we shall see later.(A) . where the overflow from previous bytes has to be considered.(register) SUI 8-bit data .8-bit data Subtract instructions with borrow take care of the previous borrow generated. The form of instruction is DAD register pair . (A) <-. DE. The result is put in the accumulator.
Only the flags are set. except that the result in not put in the accumulator. (A) ⊕ 8-bit data 11 where ⊕ is the symbol for XOR operation. viii) Increment and decrement register pair instructions: These instructions increment or decrement the specified register pairs. It effect none of the flags. (reg. (register) <-. (A) ∧ 7 (register) ANI 8-bit data . The register pair which can be incremented or decremented are BC. The accumulator contains one of the operands and also contains the results of the operation. Other flags are set according to the result. HL. i) The basic logic functions: The instructions for basic logic functions of AND. pair) <-. ORA register . (A) ⊕ (register) 10 XRI 8-bit data . In the XORing instruction the CY and 12 the AC flags are cleared. XORing. pair) + 1 DCX register pair . In the ORing instruction the CY and the AC flags are cleared.(reg. (reg. The logical group contain instructions for Comparing. ANA register . H. E.3.(reg. Complementing and rotating the operands. SP. (A) ∨ 13 (register) ORI 8-bit data . D.(register) + 1 DCR register . ANDing. XRA register . Other flags are set according to the result.1 The register can be a. In the ANDing instruction the CY flag is set and the AC flag is cleared.1 5. (A) ∧ 8 8-bit data where ∧ 9 is the symbol for AND operation. (register) <-. XOR and OR are given below. pair) <-. The form of instructions are INX register pair .(register) . L or M. Other flags are set according to the result. C. pair) . The forms of the instructions are 19 . (A) ∨ 14 8-bit data where ∨ 15 is the symbol for OR operation. DE. ORing.6 Logical Group.INR register . ii) The compare instructions: These instructions are similar to the SUB instructions. The XRA A instruction is frequently used to clear the flags as well as the accumulator. B.
The conditional instructions branch only when a condition is met. These are known as the branching or program control instructions. On encountering a return instruction in the sub-program the control returns to the main program. In all these instructions only the carry flag is affected. and Rotate A Right through Carry RAR. One of these instructions. The jump instructions allow the program to jump to any location in the memory and continue the program execution. STC and CMC. it complements the CY flag. logical instructions. . The call instructions transfers control temporarily to a sub-program. No flags are affected. Rotate Right Circular RRC. set and complement the carry flag respectively.7 Branch Group. These instructions are the Rotate Left Circular RLC. namely the jump and the call instructions. The 8085 has a variety of instructions which alter the normal sequence of program flow. These instructions do not alter the flags. If the Z flag is set then the two operands are equal. Rotate A Left through Carry RAL.CMP register CPI 8-bit data .(register) are set. No other flag except the carry flag is affected. 5. the CMA. call and return instructions can be unconditional or conditional. iv) Misc. The details of these instructions are shown in Figure 5.3. it sets the CY flag.8-bit data are set. Flags for (A) . The jump. STC . complements the accumulator. If the CY flag is set then the operand in the accumulator is smaller of the two.10. The conditions are related to the state of a particular status flag. 20 . The other two instructions. There are two basic forms of these instruction. There is no instruction for resetting the carry flag. CMC . iii) The rotate instructions: There are a set of four instructions that allow the contents of the accumulator to be rotated left or right. Each rotate instruction affects the contents of the accumulator and the carry flag. Flags for (A) .
10 The Rotate Instructions.Figure 5. 21 .
The corresponding value of the flag as well as comments on the condition are given. else the no operation occurs and the next instruction in sequence is executed. ie. Condition Condition flags Comment Z Z=1 if zero NZ Z=0 if not zero C CY = 1 if carry set NC CY = 0 if no carry M S=1 if minus P S=0 if plus PE P=1 if parity even PO P=0 if parity odd iii) The call instructions: These instructions cause the program to branch to a subroutine whose memory address is specified in the instruction. It is useful to recall that stack pointer 22 . this instruction causes the current value of PC to be saved on the stack. ii) The conditional jump instructions: In these instructions jump to the specified memory address occurs if the condition specified in the instruction is met. But before the program jumps by loading the PC with the new address. The following steps are performed by this instruction. The conditions are the same as described for the conditional jump instructions. The form of the instruction is JMP memory address This instruction loads the program counter PC with the specified address. The format for the instruction is Jcondition memory address The various conditions based on the status of the flags is given below. This instruction causes contents of HL register pair to be copied to PC. Therefore the instructions are now fetched sequentially from this new address. Ccondition memory address .i) The unconditional jump instructions: The jump instruction causes the next instruction to be executed from the address specified in the instruction. Unconditional call. The forms of instructions are CALL memory address . instead of next address in the program sequence. In other words the program jumps to the specified address. The other unconditional jump instruction is PCHL. For example JZ address implies jump if zero. This uses indirect register addressing. The HL register pair contains the address of the jump location. if the z flag is 1. Conditional call.
The SP is again incremented by 1 and the data in the memory location pointed to by SP is copied into the LSB of PC. The form of the instructions are RET . This group is a miscellaneous group. The PC is now loaded with the specified address. The stack pointer SP is decremented by 1 and MSB of PC is stored in the memory location pointed to by the SP. no action takes place and the next sequential instruction is executed. The stack pointer SP is incremented by 1 and data in the memory location pointed to by the SP is copied into the MSB of PC. The PC is therefore now loaded with the previously saved address on the stack by the call instruction. In the case of conditional call instruction. a number n between 0 and 7 is specified. This instruction does not require an address. These instructions deal with manipulation 23 . when it encounters a return. The SP is again decremented by 1 and the LSB of PC is stored in the memory location pointed to by SP. iv) The return instructions: This instruction are generally used together with the call instruction.SP points to the last filled memory location on the stack. In these instructions instead of an address. no action takes place and the next sequential instruction is executed. The RST instruction is a single byte as compared to the three byte CALL instruction. 5. The following steps are performed by this instruction. The form of instruction is RST n . if the condition is not met.8 Stack. The address is fixed and is equal to n * 8. and that the stack grows towards decreasing memory addresses. it returns to the original program from this subroutine. Conditional return The conditions are the same as described for the conditional jump instructions. Therefore RST 1 is the same as CALL 0008H. if the condition is not met.3. In the case of conditional return instruction. as the address is already saved on the stack by the call instruction. where n lies between 0 and 7. In all other aspects it is similar to a CALL instruction. If the 8085 is executing a subroutine because of a call instruction. I/O and Machine Control Group. v) The restart instructions: These are special unconditional call instructions. Unconditional return Rcondition .
The content of register L is exchanged with the content of memory location being pointed to by SP and the content of register H is exchanged with the content of the memory location following it. Interrupt control and serial I/O. It can replace an instruction. The POP instruction works in the reverse way. The SP is decremented to point to the next empty location on the stack and the higher order register B is copied to the stack. A series of NOP instructions can be put in a program to make space for future additions to a program. i) The no operation instruction: This NOP instruction is a single byte instruction and does nothing. HL and the PSW. The PUSH and the POP instructions save and restore the specified register pairs on the stack respectively.11 illustrates this instruction.of the stack. The other stack related instructions are SPHL and XTHL. The SP is again decremented and the lower order register C is copied on to the stack. During programming. iv) The I/O instructions: There are only two instructions which are related to I/O 24 . In other words. The only way the microprocessor can restart is through a reset or an interrupt. the I/O. iii) The stack manipulation instructions: These instructions are used manipulate the stack. Both these must come through external hardware. The content of HL is copied to SP. ii) The halt instruction: The HLT instruction is used to stop program execution. The SPHL is an instruction to load the stack pointer SP from the HL register pair. DE. The PUSH B instruction works in the following manner. This is useful in waiting for external interrupts. Some of these instructions will be dealt in detail in the next module. It is useful in timing matching and providing delays. But being an instruction it takes some time to execute. The XTHL instruction exchanges the content of the HL register pair with the most recent data on the stack. This is an indirect way of loading the SP in order to initialize the stack. Figure 5. if the registers are to be saved. if that instruction is not needed.The format of the instructions are PUSH register pair POP register pair The register pairs are BC.
11. 25 . The PUSH Instruction.Figure 5.
5 and RST7. The DI instruction is very useful in programs which require that no interrupt should occur during a particular program segment. waiting to be processed.5. The bits M5. The SID bit gives the status of the SID serial line. read interrupt mask instructions. In the OUT instruction the data present in the register A is sent to the specified output port. 26 . The RIM instruction: On execution of the RIM instruction the register A contains the data as given in Figure 5. I6.5 and RST7. The SIM instruction: In order to use the SIM instruction register A has to be loaded with the data as indicated in Figure 5. and M7. The individual mask settings and whether there are any pending interrupts can be known from RIM. The RIM and SIM instructions are also used for serial I/O on the SID and SOD pins of 8085. The R7. RST6. In the IN instruction the data from the specified port is copied into the A register. future interrupts are automatically disabled. This is done using SIM. If the interrupts are masked they are not recognized. The bit labelled M5. RIM and SIM instructions. respectively.5.5 are pending. Apart from the general masking of the interrupts individual interrupts can be masked or unmasked.5 indicate whether any of the RST5. The RIM instruction is used to read the serial data on the SID line and the SIM instruction is used to send serial data on the SOD line. This serial data is put on the SOD line on executing the SIM instruction. the set interrupt mask instruction. If instead of masking the interrupts the serial data is to be sent the data 0 or 1 is put in SOD and sod enable SOE is made 1. This enables the mask to be set on executing SIM instruction.5 and M7. v) Interrupt control instructions: These are the EI. The EI instruction unmasks the interrupts. The form of these instructions is IN port address OUT port address The port address is an 8-bit number.5 and I7.5.operations.5.5 is used to reset the RST7. In both these instructions data movement takes between the specified port and the accumulator. RST6. The interrupts are disabled by DI instruction in the beginning of the segment and then enabled by the EI instruction at the end of the section.13.5. Also the mask set enable is set to 1. M6.5. M6. DI. The bits I5. The interrupt enable flag IE indicates whether the interrupts are enabled or disabled. When an interrupt occurs.5 are set to 1 to disable them or 0 to enable them.5 indicate the individual masking of the interrupts RST5. ie. The EI instruction is used to enable them.5. The DI instruction masks all the interrupts except the unmaskable TRAP interrupt.5 flip flop.12.
13. Figure 5. 27 . Register A prior to execution of SIM. Register A after execution of RIM.Figure 5.12.
Each instruction takes a finite amount of time. The the method of writing assembly language programs has been introduced here informally. Moreover the memory requirements for storing the data has also to be considered. 5. the following time instructions will do the needful. Transfer the contents of memory location 2345H to 2400H. where a state is the time required for one system clock.1 Example of Direct Addressing. Unfortunately there is no direct instruction to do this.3.3. This is known as the Data Memory and is the amount of memory required by the data. 28 . This is the Program memory. as shown in Figure 5. ie. decoded and executed.4 SIMPLE PROGRAMMING EXAMPLES A few simple examples of programming are presented in this section. 5.9 Time and Space Requirements of Instructions. This also gives the number of bytes the instruction takes. This because the instructions have to be fetched. This example requires the transfer of data from one memory location to another. as well as the time required for its execution. Therefore data is first transferred to register A from memory location 2345H and then it is transferred from register A to memory location 2400H. The total time a program required is the sum of all instruction execution times. even if it is a NOP. 2 or 3 byte instructions. as well as the length of each instructions. whether they are 1. On going through the data movement group of instructions. While writing a program the programmer has to know the space required by his program. A complete description of the Instruction Set is given in the Appendix. The execution time is referred to as states.14. The other consideration is the time that is required by the program.4. This will depend on the number of instructions the program has.2.5. These examples have been based on the various addressing modes covered in Section 5.
but is not a part of a program. DESTN stands for memory location 2400 H.LDA STA 2345H . But this has to be translated in actual machine code. But to a programmer this is practically impossible to work with.e. Loads register A with contents of memory location 2345H Store register A at memory location 2400 H. The op-codes corresponding to mnemonics. SOURCE stands for memory location 2345 H. 5. addresses and data are expressed as hexadecimal numbers. If SOURCE stands for memory location 2345 H and DESTN stands for memory location 2400. hexadecimal numbers and labels in an assembly language program. A program written using MNEMONICS. These denote the symbolic address.. 2400H . This is an aid to understanding the program.2 Example of Register Addressing Registers D and E contain numbers which are to be added and the result is 29 . In the above program any thing after `. STA DESTN .' is considered a comment. Therefore the machine codes are usually entered into the computer memory in Hexadecimal form. This small program can also be written using symbolic addresses for these memory location. Therefore as an intermediate step this program can be written in machine code in the hexadecimal form. SOURCE and DESTN are known as labels. This can be done in two ways: a) Through a computer program known as an Assembler.4. Programs can be developed more meaningfully in assembly language using mnemonics. the above program can be written as LDA SOURCE . stand for the address of a memory location. b) Manually using the instruction set. This is of the form: 3A 45 23 32 00 24 On further converting it to binary machine code as 0011 1010 0100 0101 0010 0011 0011 0010 0000 0000 0010 0100 This binary form is what the computer understands. This cannot be understood by the computer. This is called hand assembly. i.
Figure 5.15 Example of Indirect Register Addressing 30 .14 Example of Direct Addressing. Figure 5.
complement A and store it in A itself The first instruction is an example of immediate addressing. It is not specified separately as an operand. The 8-bit data (A5H) is specified within the instruction itself. move contents of M to B.stored in register C. as shown in Figure 5. 31 . The result is also to be outputted to port address 02H. To store the number A5H in register B and its complement in register A. store A5 in register B.A . reg D is added to Acc. copy B to A . The expression (P + Q . this defines register M in memory . 5. Move the contents of memory location 2000 H to Register B.5 DETAILED PROGRAMMING EXAMPLE. LXI H. MVI B. load HL with address 2000H .R) is to be determined and the result is to be put in register B. Q and R are stored at memory locations 0800H.A . result is moved to C. Problem: Three signed numbers P. 0801H and 0802H. The assembly language program is given below: MOV E. .2000 H . MOV B. The third instruction is an example of implicit addressing.4. Here CMA meaning `complement the accumulator' implies the register A. 5.4 Example of Immediate and Implicit addressing. to which a 8 LEDs are connected.15. result in Acc MOV C.A5H MOV A. Any carry generated is neglected.4. The assembly program for this is given below.M 5. moves content of reg E to reg A ADD D .3 Example of Indirect Register addressing. In the example a register M is defined in the memory location 2000 H by loading this address in the register pair HL.B CMA .
system is halted. . . This is moved to register B. The following method is used to solve the problem. The accumulator is then loaded with data (P) from 0800H. P. Q and R are available in memory locations 0800H. The register M is now subtracted from the accumulator. The required output is a single byte integer equal to (P + Q . HL is loaded with 0802H (address of R). The register M is added to the accumulator. M which contains Q is added to Acc. Register A is also outputted to the I/O port 02H. . The input. The algorithm can be described by stating the inputs. Again the register pair HL is loaded with 0802H (address of R). The register pair HL is loaded with 0801H (the address of Q). The assembly language program for this can now easily be written using the instruction set.R) is now in register A. we will first develop an algorithm in plain and simple language. the translation to machine language is done. outputs and the method of solving the problem. The first instruction starts from 0803H and is three byte long. M which contains R is subtracted from Acc. Once the program has been developed. An algorithm is a procedure or a formula used to solve a problem. The program consists of 8 instructions of varying lengths. LXI LDA ADD LXI SUB MOV OUT HLT H. 0801H and 0802H. .In order to solve this example. . After outputting the system halts. The result (P + Q .R) to be stored in register B and also outputted to port address 02H. .A 02H . The op-code is 21H and it 32 . Finally we will go through the program step by step and see what actions take place in the software model of 8085 during program execution. immediately following the data. Acc is loaded with P from 0800H.0802H M B. HL is loaded with 0801H (address of Q).0801H 0800H M H. One of the decisions to be taken is about the location of the program in the memory. In this example the origin of the program is placed at 0803H. This problem can be in other possible ways also. data in A is outputted to I/O port 02H. This defines the register M at 0801H. . We shall then write the program in assembly language using mnemonics and finally code it in machine language using hand assembly. data of A is copied to B.
The next instruction therefore starts at 0806H. i. Assume that data and program have been entered in the memory of the microprocessor system and is lying at address 0800H onwards.e. together with the address of the instruction and machine code is given below. The op-codes are found from the instruction set given in the Appendix.e.0802H SUB M MOV B. and have been indicated by a '--'. 0801H. 0804H and 0805H respectively. Details of how to write an assembly level program will be taken up in the next lecture. 21H. The HL register pair is loaded with the address specified in the first instruction. This step is done by the monitor of the system. The machine code in hexadecimal is therefore 21 01 08.17. a pseudo-mnemonic DB is put against the address. The first three locations contain data.requires a 16 bit data. The program execution is to start from 0803H. Therefore. The assembly level program. No flags are affected. the program counter PC is loaded with 0803H the address of the first instruction.16 shows the software model of 8085. encoded as LSB first and then MSB. Figure 5. 0800H is copied to 33 . 01H and 08H are placed at memory locations 0803H.. The various registers and flags of 8085 could contain any data. This is shown in Figure 5. The contents of memory location specified in the LDA instruction. Address 0800 0801 0802 0803 0806 0809 080A 080D 080E 080F 0811 M/c Code 09 FE 05 210108 3A0008 86 210208 96 47 D302 76 Label Mnemonic Operands P: DB 09 Q: DB 0FEH R: DB 05 START: LXI H.19 show the execution of the second instruction LDA 0800H.0801H LDA 0800H ADD M LXI H.A OUT 02H HLT Figure 5. Figure 5.18 shows the software model after the execution of the first instruction. The PC now points to the second instruction at 0806H. In order to indicate that they contain data. i. In order to start the program execution.
Detailed Example -Step 1.Step 2.Figure 5. 35 . Figure 5.16.17 Detailed Example .
Step 3.18.19.Figure 5. 36 . Figure 5.Step 4. Detailed Example . Detailed Example .
20. The content of A is copied to B. AC = 1.M) is carried out and the result 02H is put in A. The status of flags are S = 0. The PC points to the next instruction. 5. Figure 5.6 ASSEMBLY LANGUAGE PROGRAMS AND ASSEMBLERS In the previous lectures of this module we have already encountered assembly language programs and we are familiar with some of its features. The C and AC flags are set and the other flags are reset. The PC now points to the HLT instruction. P = 0 and C = 0. The content of register A is copied to I/O port address 02 H. The flags are not affected.0802H. The content of this memory location is added to the accumulator. The register M is defined in the memory and its address is given by the current content of the HL register pair. Figure 5. Let us recapitulate some of the features. The assembly level program consists of a sequence of 37 . which is the current content of HL register pair. Figure 5. Figure 5. The flags are unaffected.2.A instruction.22 shows the software model after the execution of the SUB M instruction.23 depicts the results of the execution of MOV B. The PC points to the next instruction to be executed.register A. Flags are set according to the rules given in Section 5..24 shows the execution of the OUT 02H instruction. The operation (A . 0801H. The register M is now located at 0802. i.1. Z = 0. The PC points to the next instruction to be executed. The addition operation is explained below: 09H FEH Addition = = 0000 1001 1111 1110 ____________ 1 ← 0000 ← 0111 = Carry AC 07H. The software model after the execution of this instruction is shown in Figure 5. The next instruction to be executed is ADD M. No flags are affected.21 shows the execution of the LXI H. and the result is put in the accumulator.e. The HL register pair is loaded with the 16 bit data of the instruction.
Step 6.Figure 5.21 Detailed 38 .Step 6.20 Detailed Example . Figure 5. Example .
Detailed Example . Figure 5. 39 .Step 7.22. Detailed Example Step 8.Step 9.23.24.Figure 5. Detailed Example . Figure 5.
and symbolic or numeric data and addresses. namely. 5. In above example the label start is the symbolic address of the LXI H. It was also observed that some additional information is also required. These are written using mnemonics (symbolic op-codes) or assembler pseudo-operations together with symbolic or numeric data and addresses. the mnemonic. The assembler directives provide necessary information to the assembler. The labels are a string of alphanumeric characters. symbolic memory address that is used to refer to the address of the statement in the program.1 The Assembly Language Statement Each instructions in an assembly language program has four fields. This program cannot be executed directly and has to be translated into machine code by hand (hand assembly) or through a program called the assembler. such as the address of the origin of the program in the memory and the address of the data in the memory.e.. i. The assembly language program thus is a sequence of assembler directives and instructions. The label should not contain space or other special characters.. mnemonics. The assembler directives will be after the format for assembly language instruction is described. the operand and the comment. These fields are discussed below: The label field A label field is the first field in an assembly language instruction. The string usually contains five or six characters depending on the assembler.6. labels. These fields follow each other in the sequence specified. 0345 H.. the first of which is an alphabet. This additional information is given to the assembler through assembler directives or pseudo-operations. Comment HL loaded with pointer Each of the fields is separated from the other by a special symbol known as a delimiter for instance the comment field starts with a semicolon. the label. It may contain a label.e.0345H instruction. i. Labels are optional.e. i.instructions using symbolic op-codes. An example is shown below: Label START: Mnemonic LX1 Operand(s) H. If it is present it is separated from the next field by a colon `:'. Some assemblers do 40 .
it assumes the rest of the line is a comment. -. XOR and MOD.permit some limited special characters in a label. 41 .g. LABEL+1 would evaluate to the value of LABEL plus 1. If this is not indicated. In that case there are no other field on that line. These operations are usually of +. ORG or PC should not be used as a label. For example. For instance SUB.' or an asterisk *. If the entire line is a comment. This is indicated by a B. The assembler will otherwise signal an error. data or labels.'. But they are essential for understanding and documenting a program. ASCII data may be given if it is surrounded by a apostrophises. Comments have no effect on the object code and are ignored by the assembler. Any other entry in the field results in an error. the operands are separated by comma `. the data is assumed to be decimal. The Operand Field The operand field contains the name of registers. the operand field by a space. The Comment Field The comment field begins with a semicolon. e. The operands are separated from the comment field by a semicolon `. AND. The manual of the assembler being used should be consulted for details. The data may be expressed in binary. NOT. The Mnemonic Field This field must always contain a valid 8085 mnemonic or an assembler pseudo operation. The field is separated from the label. The label should not be mnemonic. `K'. These comments should be brief and to the point and bring out what the program is doing. It is a good programming practise use comments freely in a program. Some assemblers permit limited arithmetic and logical operation on the operand data.'. *. Most assemblers expect a 0 to precede hexadecimal data if it starts with an alphabet.D or H immediately following the data. OR. decimal or hexadecimal form. if present by a colon and from. If more than one operand is required. /. pseudo-instruction or name of a register. then it must start with a semicolon `. Whenever the assembler encounters a semicolon.
TITLE. but DB does. When used in the middle of a program. They may or may not lead to generation of machine code. ORG EQU. Equate (EQU) and Set (SET): These directives are similar but not the same. 12H is put in memory location X ASCII code is put at memory location Y ASCII codes of H and I are put at two memory locations . starting at Z. If the value of the label has to be changed later in 42 .6. DATA: DS 5 . LSB first and then MSB.5. starts from 1000 H. reserves 5 bytes of memory starting from memory . DS. . 1. These pseudo operation are placed in the mnemonic field of a statement. X: Y: Z: P: DB DB DB 12H `D' `H1' .e. SPC. . End (END): This signals the end of the program. END does not lead to any machine code generation. format. location DATA Origin (ORG): This informs the assembler about the starting location of the program. For example. K: DW 1234 . informs assembler that the next statement . It is the last instruction in a program.2 and 19 are put in memory locations starting from P.2. A label can be equated only once during assembly.19 Define Word (DW): This is used to store a 16-bit number in the memory. ORG 1000 H START: LX1 H. 200H . i. Define Byte (DB): This is used to define an 8-bit data in the memory. Other pseudo operations which we shall cover are DW. DB 1. the location of the start of segment of program which follow it is changed to the value indicated.g. SET.2 Assembler Directives The assembler directives also known as assembler pseudo operations. Define Storage (DS): This is used to reserve space in the program for data. . e. The EQU directive is used to equal a label to another label or value. Number 1234 is stored in the memory at K in the proper .
g. The assembly language program is called a source program and the machine code is the object code. In the second pass. the assembler also generates a listing. If there are no errors it indicates the machine codes corresponding to each statement. S-format or Intel Hex Format.3 Assemblers As mentioned earlier an assembler converts the software written in assembly language into machine language in the hexadecimal form. 5. Some labels may have been referred in the operand field prior to its definition in the label field (forward referencing). SCORE: VALUE: EQU 20 SET 5 . label SCORE has a value of 20 label VALUE has temporary value of 5. GLB and EXT for use with linker to link with other programs. TITLE and SPC for listing control. Most assemblers are two pass assemblers. and seme method has to be used to handle them. In the first pass it makes a table of labels found in the program. This symbol listing gives the symbol value corrosponding to the symbol name. It also gives a label or symbol listing at the end. It also keeps track of address of the labels. These assemblers cannot handle forward references automatically. They permit the programmer to define new op-codes termed as macros. It scans the source code twice. Macro assemblers are special types of assemblers.the program SET is used. Apart from this object code. IF and ENDIF for conditional assembly. Apart from these there are other assembler directives such as. the object code is determined using the generated label table. . The single-pass or the one pass assembler scans the source code only once. Discussion on these is beyond the scope of the present discussion. This code can be loaded into the microprocessor using loader. This contains the source code and the errors encountered during assembly.6. e. SET is used only for special cases in a program. In this pass it determines the address of all labels in the program. The object code is usually in a special object format. They may be an often 43 .
Whenever the macro name appears. For example. A meta-assemblers an assembler which can handle many different instruction sets.repeated group of instructions which occur many times in a program. it is replaced by this group of instructions during the assembly process. It is left to the user to define the instruction set used. an assembler for generating code for 8085 may be run on a PC. The other types of assemblers are the cross-assembler and the metaassembler. A cross assembler is an assembler that runs on a computer whose CPU is different than the one for which it assembles the program. A self assembler or a resident assembler on the other hand generates code for the same computer system on which it runs. 44 .
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