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The key benefit from the application of computers is to be able to be programmed to perform a specific task. The sequence of instructions to the CPU of a computer that causes it to solve a problem is called a program. The art of designing this sequence is called programming. A computer may be applied to solve a problem by designing the program and interfaces, the rest of the computer system remains the same. Since the main computer components are common, they can be mass produced with corresponding economies of scale. The changes are basically in the program which can be altered at a small cost. Designing the program is a major part of designing a microcomputer system. The primary task of a computer is to execute programs. The program is stored in the memory and it instructs the computer to perform a particular task. It consists of a sequence of instructions which the computer understands. The computer keeps fetching instructions from the memory and executing it in a sequential manner, unless an instruction causes it to change the execution sequence, or causes the computer to halt. The computer fetches and executes instructions. The complete set of instructions which of a computer can interpret and execute is known as the INSTRUCTION SET of that particular type of computer. The program is written using instructions from this instruction set. The next question is what are these instructions like? A computer can only understand binary numbers. Therefore, an instruction is simply a binary bit pattern, ie, a binary number. The computer interprets this binary bit pattern as an instruction to a particular task. For example, the bit pattern 0010 1111 instructs the 8085 microprocessor to complement the contents of register A. The entire program is a sequence of binary numbers. This is called machine language program or object program. But there are some basic difficulties in working with machine language. Such programs are not in a format which the humans, ie, the programmer can easily understand and debug. For a computer 01111010B may be easy to understand, but not so for the programmer. They may find it tiresome and confusing. The situation is improved if the program is written in hexadecimal rather than 1
binary numbers. For example 7AH is easier to understand and remember than 01111010B. Writing and debugging of programs becomes easier. It is for this reason programming is done with hexadecimal numbers. The program in hexadecimal is converted to binary through a program called the hexadecimal loader. The hexadecimal loader converts hexadecimal numbers and loads it into the computer. This is a common program and is usually a part of the monitor.
SOFTWARE MODEL OF 8085.
The purpose of developing a software model is to aid the programmer in understanding the operation of a microprocessor system from the software point of view. In order to program a microprocessor, we need not know all its hardware features. The functions of the various pins of the microprocessor and their electrical characteristics are not of importance to the programmer, nor is the knowledge of the working of its internal circuits needed. He is only interested in the software resources of the microprocessor system and how they are organized. A programmer must know the various internal registers and flags within the microprocessor, understand their purpose, capabilities and their limitations. In other words he must understand the programming model of the microprocessor. Furthermore, he must also know how the memory and the I/O are organized and how it is addressed by the microprocessor to obtain instructions and data.
5.2.1 Programming Model of 8085. The programming model is the diagram of the internal registers and the flags within the microprocessor, which are of importance to the programmer. The programming model of 8085 is shown in Figure 5.1. The 8085 contains several registers which can be used by the programmer. Some of these registers are general purpose and can be used by the programmer in any manner. Others are special purpose registers and are used for a specific purpose. The registers B, C, D, E, H, L are 8-bit general purpose registers. They can be used either individually as 8-bit registers or as 16-bit register pairs. The valid register pairs are BC, DE, and HL. These register pairs are used to hold addresses or 16-bit numbers by some instructions. The register pair HL has a special significance. One is it can be used as a pointer to a memory location. Second, it acts as the accumulator for double byte 2
addition. The register pair BC and DE can also be used as pointers by a very limited instructions. Amongst the special purpose registers, the Accumulator and the Flags together are known as the Processor Status Word. They give complete information of the result of a particular arithmetic or logical instruction. The Accumulator, also known as register A is an 8-bit special purpose register. It is the primary source and destination for arithmetic and logical instructions. Almost every arithmetic and boolean instructions take one of the operands from the accumulator and the result is placed in the accumulator. The other operand can be either in the memory or any of the other registers. Also all data transfers between CPU and I/O take place through the accumulator. The Flag register (F) contains five bits that are used as flags. Each of these record processor status information and may control the processor operation. On the execution of certain instructions the flags change. More over certain instructions such as conditional calls and jumps use these flags for their execution. The Sign Flag bit (S) indicates whether the results of an operation is positive or negative. If the most significant bit of the result of an operation is '1', then this flag is set, otherwise it is reset. The Zero Flag bit (Z) indicates whether the result of an operation is zero or non-zero. It is set if the result is zero, else it is reset. The Auxiliary Carry Flag bit (AC) holds the carry between the least significant and most significant halves (nibbles) of the result. If there is a carry from the 3rd bit to the fourth bit, AC is set, else it is reset. The Parity Flag bit (P) indicates the parity of the result. If the parity is even then P is set , otherwise it is reset. ( Parity is the number of '1' in the result expressed as even or odd.) The Carry Flag bit (C) indicates a carry out of the most significant bit of the result. If the instruction results in a carry (from addition) or a borrow (from subtraction or comparison) out of the most significant bit, this flag is set, otherwise it is reset. The Program Counter (PC) keeps track of the address of the memory location containing the next instruction to be executed in the program memory. This is a 16-bit register.
Figure 5.1. The Programming Model Of 8085 Microprocessor.
Figure 5.2. Busses and Control Signals of 8085
each with an unique address. The 8085 has 16 address lines. A memory location has therefore an address and a content.3 Memory Addressing and Memory Map. 5. ie. where 1K = 2 10= 1024. When IO M 6 is low. It addresses the I/O when IO M 5 signal is / / '1'. we shall review the bus organization of 8085.2. Once the memory location is selected the data transfer between the selected memory location and microprocessor can take place.2 Data and Address Busses of 8085 In order to understand how the memory and the I/O is organized. The stack is a last-in. it can contain 8 bits of data. the 16 address lines can address 216= 65.536 memory / locations. The content is the data contained at that particular memory location. The Lower Address Bus and the Data Bus are multiplexed and they can be demultiplexed by using the ALE signal and a latch.The Stack Pointer (SP) keeps a track of the stack. Therefore in short: i) ii) The memory can be considered to be an array of 64K memory locations. ie. In other words the 16bit address on the address bus selects one of the 64K memory locations which the 8085 microprocessor can address. IO M 3. first out data structure the 8085 maintains in the memory. The stack pointer contains the address of (points to) the last memory location filled on the stack. All stack operations are 16-bit. The stack grows towards decreasing memory locations. These busses and control signals are shown in Figure 5. The memory address is the 16-bit address on the address bus which selects a memory location. the Lower Address Bus and the Upper Address Bus. The address lines are divided into two groups of 8 lines. With each addition to the stack the stack pointer is decreased by two and vice-versa. Therefore 8-bits of data can be transferred to and fro from the microprocessor in parallel. Each memory location is 8-bit wide. The main control signals are R 1. This is also referred to as 64K.2. A memory location contains 8 bits of data. W 2. 5. 5 . The address lines address R / D the memory when IO M 4 signal is '0'. The 8085 has a 8-bit data bus.2.
The software model of 8085 is shown in Figure 5. This model gives a clear indication of the various resources available to the programmer. A memory map is shown in Figure 5. stacks etc can be depicted on it.5. This is an invaluable conceptual aid in programming. An I/O map is shown in Figure 5. Similar to / memory addressing. The Interrupts are also shown in the figure. the address on the address lines is for the I/O. It shows the internal registers of 8085 as well as the memory and the I/O space. 5.5 The Software Model of 8085. Therefore there are 8 bits of unique address. data storage. Various functions assigned to these memory locations. The various functions assigned to the I/O can be depicted on it. flags.4 5. When IO M is high. eg. But there is one difference. program storage. 6 . It gives a clear picture of how instructions work and how they affect the registers.4 I/O Addressing and I/O Map.2. The latter will be dealt with in a separate module.2.A memory map can be drawn showing the memory organization of a computer system. The SID and SOD lines are also shown as they can be programmed through software. The address is duplicated on the Lower Address Bus A0-A7 and the Upper Address Bus A8-A15. An I/O map can be drawn showing the I/O organization of a computer system. In other words it becomes his play field.3. Furthermore the type of memory interfaced and at what locations can also be shown on it. They can be disabled or enabled through software. the address on the address bus selects one unique I/O port location and then data transfers between the I/O port and the 8085 can take place. temporary storage. Therefore the 8085 can address only 28= 256 I/O ports. memory and the I/O. Each I/O port location is also 8 bits wide.
7 .3. The Memory Map Figure 5.Figure 5.4. The Memory Map.
Figure 5. The I/O Map. 8 .4.
Figure 5.5. The Software Model of 8085 9 .
3. The mnemonics are usually written in upper case. Mnemonics are abbreviations of the instruction. The other bytes. For example if the 16-bit data is 1234H it is coded as 34 12 in the 2nd and 3rd bytes respectively of the instruction.3. In this section some of the aspects of the instruction set will be highlighted. This may be a 16-bit data or a memory address. Always remember that a 16-bit data is coded as LSB first and then MSB. one byte.3 REVIEW OF THE INSTRUCTION SET. namely. There are three different instruction formats ( Figure 5. 10 . The first byte of all instructions is the op-code (operation code). The op-codes are basically binary numbers. The detailed instruction set is given the Appendix. Most of the instructions of 8085 are single byte instructions. if register A is to be complemented the op-code is 0010 1111B or 2FH.6).5. A programmer will find it difficult to remember which op-code 2FH corresponds to. Multibyte instructions must be stored in successive memory locations.1 Instruction Format. The method of encoding this 16-bit operand in the instruction is a bit unusual. It is recommended that the student goes thoroughly through the instruction set given in the Appendix. c) Three Byte Instructions: In these instructions the first byte is the op-code and the second and third bytes contain a 16-bit operand. Therefore the op-codes are described in terms of MNEMONICS. a) Single Byte Instructions: These instructions contain only the op-code.2 Addressing Modes of 8085. b) Two Byte Instructions: In these instructions the first byte is the op-code and the second byte contains an 8-bit operand. The instruction set of 8085 was introduced in module on the 8085 CPU. contain the operands to be used by the instruction. This operand can be a 8-bit data or an I/O address. 5. Op-codes and Mnemonics. For example. if present. The second byte contains the least significant byte (LSB) and the third byte contains the most significant byte (MSB) of the two byte data or address. The op-code tells the 8085 CPU which operation is to be performed. 5. two byte and three byte instructions. In other words the op-codes are described in terms of mnemonics for the benefit of the programmer. The address of the first byte is the address of the instruction.
or A. stored in the memory or held in the I/O. These data are called its operands. C. The op-code for LDA is 3AH. Direct Addressing. L. Consider the instruction LDA 1234H. source register A. H. For example. namely direct addressing. Therefore the instruction which is 3 bytes long is 3A 34 12. The instruction causes contents of register A to be copied to register B. The register pair HL is a special register for register indirect addressing. The various methods the 8085 uses to access the operands are called its addressing modes. DE. Thus the memory is addressed indirectly by the register pair. register addressing. HL or SP. reside in one of the internal registers. a register pair holds the address of the memory location containing the operand. A 16-bit memory address follows the op-code of the instruction.When 8085 executes an instruction it performs specified functions on data. LDA is the mnemonic for the instruction Load Direct Accumulator and 1234H is the 16-bit address which contains the data to be loaded. This is a one byte instruction whose op-code is 47H. In the register indirect addressing. In register addressing the instruction specifies the register or register pair in which the operand is located. register indirect addressing and immediate addressing. E. In direct addressing the instruction contains the actual address of the operand in the memory. Assume the data is 10H. or the register pairs BC. Register A <─────────── 10 Register Addressing. whose address is contained in the 11 10 Memory Location 1234 . They can be the registers B.A instruction. These may be a part of the instruction. Notice that the address is coded LSB first and then MSB. It defines a register M in the memory at the location. in the second and third bytes of the instruction. The mnemonic MOV stands for move. The 8085 has four addressing modes. consider MOV B. D. The instruction is read as move destination register B. or as move A to B. Register Indirect Addressing.
This is a two byte instruction whose opcode (the first byte) is 3EH. In this mode of addressing the data is encoded in the instruction. The mnemonic MVI stands for move immediate. The 8085 microprocessor has 74 different instructions. These op-codes are different for different variations of the instructions. but is assumed to be in a register usually the accumulator.30H. Immediate Addressing. 5. It is useful to refer to the software model of 8085. This instruction moves content of M (located at memory address pointed by HL. See Figure 5. In certain instructions the operand is not specified. Here we shall go through the various groups of instructions. depending on the type of instruction. In the previous sections we had encountered some of the instructions. which total to 246 different op-codes.reg2 has 63 variations and therefore 63 different op-codes. For example.M. This is a one byte instruction whose machine code is 2FH. Assume that at the time of execution of the instruction the register pair HL contains 1234H. The instruction is coded in machine language as 3E 30. The data may be 8-bit or 16-bit. the MOV reg1. It is a one byte instruction. Here the register A (the accumulator) is implied. The data is placed immediately after the op-code. CMA stands for complement the accumulator.7. 12 . namely 1234H) to register A. For example. It is a one byte instruction and the op-code for it is 7EH. This is followed by the data to be moved to register A. Consider the instruction MOV A. while going through the instruction set.register pair HL.3. Consider the CMA instruction. consider the instruction MVI A. Implicit Addressing.3 Classification of Instructions.
HL points to Reg. j Figure 5. Instruction Types.6. 13 .Figure 5.7. M in Memory.
Logical Group . These instructions can be subdivided into immediate.8-bit data 14 . In nearly all the data transfer instructions although the data is copied from one place to the other and not moved. 5. the values of the flags remain the same before and after the data transfer instruction. subtract. The instructions in this group are used to transfer data around the registers and the memory.These instruction perform logical operations of ANDing. Data Transfer Group . 3. rotating or complementing data in registers or between memory and a register. Branch Group . as well as load them with immediate data specified in the instruction itself. Arithmetic Group . One form. reading and writing to I/O ports and interrupt control and setting and clearing of flags. C. ORing. comparing.4 Data Transfer Group. 5. these instructions transfer data between the registers B. the move immediate instruction is MVI r. There are two forms of the instruction. where exchange of data takes place. These instructions perform stack operations. If one recalls the software model.3. The registers i) Immediate Data Transfer Instructions: These instructions load the registers or register pairs of 8085 or a memory location M addressed indirectly by the HL register with the immediate data supplied with the instruction itself. as suggested by the mnemonics. 4. H. E. direct. as follows: 1. calls or returns. indirect and register transfer instructions. D.These instructions modify the program flow by performing conditional or un-conditional jumps. 2. In data transfer instructions. increment or decrement data in registers or memory. and Machine Control Group.The instruction set of 8085 has been grouped under five different functional headings.These instructions move data between registers or between registers and memory. Direct memory to memory transfer is not possible. XORing. I/O. Stack. the flags are not affected.These instructions add. L and A and the memory. ie. The exception to this is the XCHG instruction.
The rp can be the B (register pair BC) or D (register pair DE). STAX rp . ii) Direct Data Transfer Instructions: In these instructions the data is transferred to and from the memory. D. DE. B. SHLD memory address . In the first form. (Load Direct Accumulator for memory) STA memory address . These instructions load and store register A at a memory location whose address is contained in the specified register pair. (Store Direct Accumulator to memory) In the other form a 16-bit data. the data transfers takes place between the accumulator. A mnemonic containing X as a letter. The register pairs can be BC. The LHLD xxxx instruction loads the register L with the content of the memory address xxxx and register H with content of the memory location xxxx+1 as shown in Figure 5. In this method the register M is like any other register of 8085. L or M. (Store Accumulator Indirect). E. These are LDAX rp . HL or SP. 15 . C. there are other types of indirect data transfer instructions also. (Load HL Direct). (Load Accumulator Indirect). In SHLD instruction the contents of the HL stored in the memory in a similay way. There are two forms of these instructions one dealing with 8-bit data and the other with 16-bit data. the data transfer takes place between the HL register pair and two consecutive memory locations. iii) Indirect Data Transfer: Although data can be transferred indirectly through the register M. The other form is the load immediate register pair instruction is LXI rp. The other method of defining a register M in memory does not have a particular instruction. starting from the memory address specified.16-bit data LXI loads the specified register pair with the immediate 16-bit data supplied with the instruction. (Store HL Direct). ie. LHLD memory address . The registers can be A. H.loads the 8-bit data into the register specified. LDA memory address . register A and the content of memory location specified. usually refers to a register pair operation. The address of the memory location is given in the instruction itself.8.
9 The XCHG Instruction.Figure 5. Figure 5.8 The LHLD Instruction. 16 .
D.5 Arithmetic Group. 17 . XCHG is a 16-bit instruction. The flags will be set as under. The second operand can be in any of the registers B. D. i) 8-bit binary addition instructions: The register A is assumed to contain one operand. E.iv) Register Transfer Data Instructions: This is the largest group of data transfer instructions.(A) + (register) implies that the content of register A is added to that of the specified register and the result is put in register A. All arithmetic instructions affect the flags according to the rules indicated earlier (discussion on the software model). L. The result of the addition is put in the accumulator. 5. All subtraction operations are performed through the two's complement arithmetic and set the carry flag to indicate a borrow and clear it to indicate no borrow. H. A. The forms of instruction are ADD register . This exchanges contents of DE and HL register pairs. In all the arithmetic and logical instructions requiring two operands one of the operands is assumed to be in the accumulator (register A) and the result of the operation is also put in the accumulator. H. The arithmetic group includes instructions for 8-bit addition and subtraction. See Figure 5.3. L. C.(A) + 8-bit data) The notation (A) <-.9. (A) <-. The instruction ADD B will cause the addition and the result 2EH will be put in register A. These have the form MOV reg1. reg2 (Move reg2 to reg1) where reg1 and reg2 are the registers A. C. M. There 63 different MOV instructions. or supplied as an immediate operand with the instruction.(A) + (register) ADD 8-bit data . There are no operands specified as DE and HL are implicitly addressed. These instructions transfer 8-bit data between the various registers. instructions for incrementing and decrementing registers and register pairs. This is different from the other data transfer instructions as an exchange of data takes place instead of a simple move. E. unless indicated otherwise. As an example consider that A contains 40H and B contains EEH. in the memory register M. (A) <-. 16bit addition. B.
HL or SP. (A) <-.(A) + (register) + (CY) ADC 8-bit data . iv) BCD addition: In BCD addition the operands are BCD numbers and binary addition is first done. The result is put in HL.(CY) vii) Increment and decrement register instructions: These instructions increment or decrement the specified register by one.(A) . DE.(CY) SBI 8-bit data .(A) . (HL) <-.S 0 Z 0 - AC 0 - P 1 - CY 1 ii) 8-bit binary addition with carry instructions: These instructions are similar to the ADD instructions. The correct BCD addition results will be available in the accumulator.(register) SUI 8-bit data . The register pair HL acts as the double byte accumulator.(A) + 8-bit data + (CY) where (CY) is the value (0 or 1) of the carry flag.(register) . The form of instruction is DAD register pair . The form of the instructions are 18 . 1 will be added to the result. This instruction only affects the carry flag. One of the operands is in HL register pair and the other operand is in any of the register pairs. (A) <-. (A) <-. In case a borrow is generated. These are very useful instructions when a register is being used as a counter. The result is put in the accumulator.8-bit data Subtract instructions with borrow take care of the previous borrow generated. The value of the carry flag is subtracted from the result. (A) <-. as we shall see later. (A) <-. The forms of instructions are: ADC register . where the overflow from previous bytes has to be considered.8-bit data . (A) <-. If the carry flag is set prior to this instruction. This is helpful in multibyte addition. These instructions affect all flags except the CY flag. These are used for multi-byte subtractions.(HL) + ( register pair) vi) 8-bit binary subtraction: In the subtract instructions the accumulator contains one of the operands from which the other operand is subtracted. The forms of the instructions are SBB reg . Then the Decimal Adjust Accumulator instruction. v) Double byte addition instruction: The DAD instruction is a double byte addition instruction. DAA is executed.(A) . the carry flag is set. except that the carry flag is also taken into account. The forms of instruction are SUB reg . namely BC.(A) .
XOR and OR are given below. (reg. Other flags are set according to the result. HL.3.1 The register can be a. Only the flags are set. C. The logical group contain instructions for Comparing. B. pair) <-. pair) <-. The accumulator contains one of the operands and also contains the results of the operation.(register) . D. Complementing and rotating the operands. ORing. (A) ⊕ (register) 10 XRI 8-bit data . pair) . L or M.INR register . (register) <-. XORing. XRA register . In the XORing instruction the CY and 12 the AC flags are cleared. pair) + 1 DCX register pair . (A) ⊕ 8-bit data 11 where ⊕ is the symbol for XOR operation. The form of instructions are INX register pair . Other flags are set according to the result. The register pair which can be incremented or decremented are BC. (A) ∨ 14 8-bit data where ∨ 15 is the symbol for OR operation. ORA register . ANA register . (reg. SP. H. ii) The compare instructions: These instructions are similar to the SUB instructions.(reg. In the ANDing instruction the CY flag is set and the AC flag is cleared. The forms of the instructions are 19 . viii) Increment and decrement register pair instructions: These instructions increment or decrement the specified register pairs.1 5.(reg. i) The basic logic functions: The instructions for basic logic functions of AND. (register) <-. The XRA A instruction is frequently used to clear the flags as well as the accumulator.6 Logical Group. (A) ∨ 13 (register) ORI 8-bit data . E. except that the result in not put in the accumulator.(register) + 1 DCR register . Other flags are set according to the result. ANDing. DE. In the ORing instruction the CY and the AC flags are cleared. It effect none of the flags. (A) ∧ 7 (register) ANI 8-bit data . (A) ∧ 8 8-bit data where ∧ 9 is the symbol for AND operation.
Rotate A Left through Carry RAL.3. it sets the CY flag. Each rotate instruction affects the contents of the accumulator and the carry flag. . call and return instructions can be unconditional or conditional. In all these instructions only the carry flag is affected. Flags for (A) . The call instructions transfers control temporarily to a sub-program. CMC . The jump instructions allow the program to jump to any location in the memory and continue the program execution. One of these instructions. The conditional instructions branch only when a condition is met. The details of these instructions are shown in Figure 5. STC and CMC. There are two basic forms of these instruction. complements the accumulator. and Rotate A Right through Carry RAR.7 Branch Group.10. namely the jump and the call instructions. The 8085 has a variety of instructions which alter the normal sequence of program flow. If the Z flag is set then the two operands are equal. On encountering a return instruction in the sub-program the control returns to the main program. The jump. There is no instruction for resetting the carry flag. Flags for (A) . 5. These are known as the branching or program control instructions. logical instructions.CMP register CPI 8-bit data .(register) are set. STC . iv) Misc. No flags are affected. iii) The rotate instructions: There are a set of four instructions that allow the contents of the accumulator to be rotated left or right. These instructions are the Rotate Left Circular RLC. 20 . These instructions do not alter the flags. set and complement the carry flag respectively. If the CY flag is set then the operand in the accumulator is smaller of the two. No other flag except the carry flag is affected. The conditions are related to the state of a particular status flag.8-bit data are set. it complements the CY flag. the CMA. The other two instructions. Rotate Right Circular RRC.
21 .10 The Rotate Instructions.Figure 5.
The forms of instructions are CALL memory address . Ccondition memory address . ie. if the z flag is 1. Conditional call. The form of the instruction is JMP memory address This instruction loads the program counter PC with the specified address. This instruction causes contents of HL register pair to be copied to PC. The format for the instruction is Jcondition memory address The various conditions based on the status of the flags is given below. In other words the program jumps to the specified address. Unconditional call. this instruction causes the current value of PC to be saved on the stack. The conditions are the same as described for the conditional jump instructions. For example JZ address implies jump if zero. ii) The conditional jump instructions: In these instructions jump to the specified memory address occurs if the condition specified in the instruction is met. instead of next address in the program sequence. It is useful to recall that stack pointer 22 . But before the program jumps by loading the PC with the new address. The following steps are performed by this instruction. Therefore the instructions are now fetched sequentially from this new address. Condition Condition flags Comment Z Z=1 if zero NZ Z=0 if not zero C CY = 1 if carry set NC CY = 0 if no carry M S=1 if minus P S=0 if plus PE P=1 if parity even PO P=0 if parity odd iii) The call instructions: These instructions cause the program to branch to a subroutine whose memory address is specified in the instruction. The HL register pair contains the address of the jump location.i) The unconditional jump instructions: The jump instruction causes the next instruction to be executed from the address specified in the instruction. else the no operation occurs and the next instruction in sequence is executed. The other unconditional jump instruction is PCHL. This uses indirect register addressing. The corresponding value of the flag as well as comments on the condition are given.
The form of the instructions are RET . iv) The return instructions: This instruction are generally used together with the call instruction. Conditional return The conditions are the same as described for the conditional jump instructions. These instructions deal with manipulation 23 . when it encounters a return. The PC is now loaded with the specified address. This group is a miscellaneous group.SP points to the last filled memory location on the stack. it returns to the original program from this subroutine. The following steps are performed by this instruction. In the case of conditional return instruction. no action takes place and the next sequential instruction is executed. if the condition is not met. The SP is again incremented by 1 and the data in the memory location pointed to by SP is copied into the LSB of PC. If the 8085 is executing a subroutine because of a call instruction. In these instructions instead of an address.3. The address is fixed and is equal to n * 8. The PC is therefore now loaded with the previously saved address on the stack by the call instruction. Therefore RST 1 is the same as CALL 0008H. and that the stack grows towards decreasing memory addresses. This instruction does not require an address. In the case of conditional call instruction. The RST instruction is a single byte as compared to the three byte CALL instruction. Unconditional return Rcondition . In all other aspects it is similar to a CALL instruction. v) The restart instructions: These are special unconditional call instructions. a number n between 0 and 7 is specified. 5. as the address is already saved on the stack by the call instruction. where n lies between 0 and 7. if the condition is not met. The SP is again decremented by 1 and the LSB of PC is stored in the memory location pointed to by SP. I/O and Machine Control Group. The stack pointer SP is decremented by 1 and MSB of PC is stored in the memory location pointed to by the SP. The form of instruction is RST n . no action takes place and the next sequential instruction is executed. The stack pointer SP is incremented by 1 and data in the memory location pointed to by the SP is copied into the MSB of PC.8 Stack.
Interrupt control and serial I/O. iv) The I/O instructions: There are only two instructions which are related to I/O 24 . This is useful in waiting for external interrupts. The only way the microprocessor can restart is through a reset or an interrupt. But being an instruction it takes some time to execute. Figure 5. This is an indirect way of loading the SP in order to initialize the stack. Some of these instructions will be dealt in detail in the next module. iii) The stack manipulation instructions: These instructions are used manipulate the stack.11 illustrates this instruction. if the registers are to be saved. A series of NOP instructions can be put in a program to make space for future additions to a program. The XTHL instruction exchanges the content of the HL register pair with the most recent data on the stack. if that instruction is not needed.The format of the instructions are PUSH register pair POP register pair The register pairs are BC. During programming. In other words. the I/O. i) The no operation instruction: This NOP instruction is a single byte instruction and does nothing. The PUSH B instruction works in the following manner. The other stack related instructions are SPHL and XTHL. The PUSH and the POP instructions save and restore the specified register pairs on the stack respectively.of the stack. The POP instruction works in the reverse way. ii) The halt instruction: The HLT instruction is used to stop program execution. Both these must come through external hardware. The content of register L is exchanged with the content of memory location being pointed to by SP and the content of register H is exchanged with the content of the memory location following it. The content of HL is copied to SP. The SPHL is an instruction to load the stack pointer SP from the HL register pair. The SP is decremented to point to the next empty location on the stack and the higher order register B is copied to the stack. The SP is again decremented and the lower order register C is copied on to the stack. It can replace an instruction. It is useful in timing matching and providing delays. DE. HL and the PSW.
The PUSH Instruction.Figure 5.11. 25 .
5. read interrupt mask instructions. future interrupts are automatically disabled. RST6. This serial data is put on the SOD line on executing the SIM instruction. waiting to be processed.12.5 indicate whether any of the RST5. Also the mask set enable is set to 1.5 and RST7.5 and I7. The EI instruction is used to enable them.13. DI. In the OUT instruction the data present in the register A is sent to the specified output port. RIM and SIM instructions. respectively. The RIM and SIM instructions are also used for serial I/O on the SID and SOD pins of 8085. In the IN instruction the data from the specified port is copied into the A register. The individual mask settings and whether there are any pending interrupts can be known from RIM.5. The bit labelled M5.5 are set to 1 to disable them or 0 to enable them. M6.5. and M7. The SIM instruction: In order to use the SIM instruction register A has to be loaded with the data as indicated in Figure 5.5 and RST7. Apart from the general masking of the interrupts individual interrupts can be masked or unmasked. v) Interrupt control instructions: These are the EI. 26 . The bits M5. the set interrupt mask instruction. The interrupt enable flag IE indicates whether the interrupts are enabled or disabled. M6. The RIM instruction is used to read the serial data on the SID line and the SIM instruction is used to send serial data on the SOD line.5.5 and M7. If the interrupts are masked they are not recognized. ie. The EI instruction unmasks the interrupts.5 are pending. The form of these instructions is IN port address OUT port address The port address is an 8-bit number. This enables the mask to be set on executing SIM instruction.5. RST6.5 indicate the individual masking of the interrupts RST5.operations. This is done using SIM. If instead of masking the interrupts the serial data is to be sent the data 0 or 1 is put in SOD and sod enable SOE is made 1.5 flip flop. The SID bit gives the status of the SID serial line. The DI instruction masks all the interrupts except the unmaskable TRAP interrupt. When an interrupt occurs.5 is used to reset the RST7. The RIM instruction: On execution of the RIM instruction the register A contains the data as given in Figure 5. The interrupts are disabled by DI instruction in the beginning of the segment and then enabled by the EI instruction at the end of the section. The R7.5. I6.5. In both these instructions data movement takes between the specified port and the accumulator. The bits I5. The DI instruction is very useful in programs which require that no interrupt should occur during a particular program segment.
Register A prior to execution of SIM. 27 . Figure 5.12. Register A after execution of RIM.13.Figure 5.
3. The execution time is referred to as states.2.1 Example of Direct Addressing. This example requires the transfer of data from one memory location to another. This will depend on the number of instructions the program has. The the method of writing assembly language programs has been introduced here informally. the following time instructions will do the needful. 2 or 3 byte instructions.4. Unfortunately there is no direct instruction to do this.5. The total time a program required is the sum of all instruction execution times. as well as the length of each instructions. These examples have been based on the various addressing modes covered in Section 5. This is known as the Data Memory and is the amount of memory required by the data.14. This also gives the number of bytes the instruction takes. 28 . as well as the time required for its execution. This because the instructions have to be fetched. The other consideration is the time that is required by the program. even if it is a NOP. where a state is the time required for one system clock. Transfer the contents of memory location 2345H to 2400H.9 Time and Space Requirements of Instructions. A complete description of the Instruction Set is given in the Appendix. ie. 5. whether they are 1.3. decoded and executed. 5. While writing a program the programmer has to know the space required by his program. Moreover the memory requirements for storing the data has also to be considered.4 SIMPLE PROGRAMMING EXAMPLES A few simple examples of programming are presented in this section. as shown in Figure 5. Each instruction takes a finite amount of time. This is the Program memory. On going through the data movement group of instructions. Therefore data is first transferred to register A from memory location 2345H and then it is transferred from register A to memory location 2400H.
LDA STA 2345H . 2400H . These denote the symbolic address. the above program can be written as LDA SOURCE . This is of the form: 3A 45 23 32 00 24 On further converting it to binary machine code as 0011 1010 0100 0101 0010 0011 0011 0010 0000 0000 0010 0100 This binary form is what the computer understands. In the above program any thing after `.4. This can be done in two ways: a) Through a computer program known as an Assembler. but is not a part of a program. This cannot be understood by the computer. This is called hand assembly.e. DESTN stands for memory location 2400 H. But this has to be translated in actual machine code. Therefore as an intermediate step this program can be written in machine code in the hexadecimal form. stand for the address of a memory location. SOURCE and DESTN are known as labels. Therefore the machine codes are usually entered into the computer memory in Hexadecimal form. b) Manually using the instruction set.2 Example of Register Addressing Registers D and E contain numbers which are to be added and the result is 29 .. This small program can also be written using symbolic addresses for these memory location. If SOURCE stands for memory location 2345 H and DESTN stands for memory location 2400. This is an aid to understanding the program. Programs can be developed more meaningfully in assembly language using mnemonics. The op-codes corresponding to mnemonics.' is considered a comment. A program written using MNEMONICS. hexadecimal numbers and labels in an assembly language program. i. 5. Loads register A with contents of memory location 2345H Store register A at memory location 2400 H. SOURCE stands for memory location 2345 H. addresses and data are expressed as hexadecimal numbers. STA DESTN . But to a programmer this is practically impossible to work with.
14 Example of Direct Addressing. Figure 5.Figure 5.15 Example of Indirect Register Addressing 30 .
The 8-bit data (A5H) is specified within the instruction itself. this defines register M in memory . MOV B. to which a 8 LEDs are connected. . The third instruction is an example of implicit addressing.4. 5. moves content of reg E to reg A ADD D .B CMA . The assembly language program is given below: MOV E.A . copy B to A . Here CMA meaning `complement the accumulator' implies the register A. 5. result in Acc MOV C. The expression (P + Q . result is moved to C.R) is to be determined and the result is to be put in register B. Q and R are stored at memory locations 0800H.3 Example of Indirect Register addressing. Any carry generated is neglected. It is not specified separately as an operand. The result is also to be outputted to port address 02H. Move the contents of memory location 2000 H to Register B. complement A and store it in A itself The first instruction is an example of immediate addressing.2000 H . move contents of M to B. load HL with address 2000H .15. 31 .4 Example of Immediate and Implicit addressing. To store the number A5H in register B and its complement in register A.5 DETAILED PROGRAMMING EXAMPLE. as shown in Figure 5. store A5 in register B. LXI H.4.A . 0801H and 0802H. In the example a register M is defined in the memory location 2000 H by loading this address in the register pair HL.M 5.stored in register C. MVI B. reg D is added to Acc. The assembly program for this is given below.A5H MOV A. Problem: Three signed numbers P.
A 02H . In this example the origin of the program is placed at 0803H. outputs and the method of solving the problem. . data of A is copied to B. This problem can be in other possible ways also. we will first develop an algorithm in plain and simple language. HL is loaded with 0801H (address of Q). The first instruction starts from 0803H and is three byte long.In order to solve this example.0801H 0800H M H. LXI LDA ADD LXI SUB MOV OUT HLT H. The algorithm can be described by stating the inputs. After outputting the system halts. HL is loaded with 0802H (address of R). . P. The register M is now subtracted from the accumulator. We shall then write the program in assembly language using mnemonics and finally code it in machine language using hand assembly. . The result (P + Q . data in A is outputted to I/O port 02H. immediately following the data. M which contains R is subtracted from Acc. One of the decisions to be taken is about the location of the program in the memory.0802H M B. The required output is a single byte integer equal to (P + Q . This defines the register M at 0801H. . Q and R are available in memory locations 0800H. The accumulator is then loaded with data (P) from 0800H. the translation to machine language is done. The register pair HL is loaded with 0801H (the address of Q). Finally we will go through the program step by step and see what actions take place in the software model of 8085 during program execution.R) to be stored in register B and also outputted to port address 02H.R) is now in register A. An algorithm is a procedure or a formula used to solve a problem. The following method is used to solve the problem. . The input. Register A is also outputted to the I/O port 02H. Acc is loaded with P from 0800H. M which contains Q is added to Acc. The program consists of 8 instructions of varying lengths. system is halted. Once the program has been developed. 0801H and 0802H. The op-code is 21H and it 32 . . The assembly language program for this can now easily be written using the instruction set. The register M is added to the accumulator. . This is moved to register B. Again the register pair HL is loaded with 0802H (address of R).
a pseudo-mnemonic DB is put against the address. Address 0800 0801 0802 0803 0806 0809 080A 080D 080E 080F 0811 M/c Code 09 FE 05 210108 3A0008 86 210208 96 47 D302 76 Label Mnemonic Operands P: DB 09 Q: DB 0FEH R: DB 05 START: LXI H.19 show the execution of the second instruction LDA 0800H. Therefore.0802H SUB M MOV B. In order to indicate that they contain data. Figure 5.e. The assembly level program. i. Assume that data and program have been entered in the memory of the microprocessor system and is lying at address 0800H onwards. encoded as LSB first and then MSB. Details of how to write an assembly level program will be taken up in the next lecture. In order to start the program execution.e. The contents of memory location specified in the LDA instruction. The PC now points to the second instruction at 0806H. together with the address of the instruction and machine code is given below. 21H. i.0801H LDA 0800H ADD M LXI H. The op-codes are found from the instruction set given in the Appendix. This step is done by the monitor of the system. 0804H and 0805H respectively.16 shows the software model of 8085. This is shown in Figure 5. The machine code in hexadecimal is therefore 21 01 08.. The next instruction therefore starts at 0806H. Figure 5. 0801H.18 shows the software model after the execution of the first instruction.requires a 16 bit data. The first three locations contain data.A OUT 02H HLT Figure 5. The various registers and flags of 8085 could contain any data. The HL register pair is loaded with the address specified in the first instruction. and have been indicated by a '--'. the program counter PC is loaded with 0803H the address of the first instruction. The program execution is to start from 0803H.17. No flags are affected. 0800H is copied to 33 . 01H and 08H are placed at memory locations 0803H.
17 Detailed Example .16. Figure 5. Detailed Example -Step 1.Figure 5.Step 2. 35 .
Detailed Example .19.Step 3. Figure 5.Figure 5.18.Step 4. 36 . Detailed Example .
24 shows the execution of the OUT 02H instruction. The register M is now located at 0802.M) is carried out and the result 02H is put in A. Let us recapitulate some of the features. The C and AC flags are set and the other flags are reset.. The flags are not affected. The next instruction to be executed is ADD M. The PC points to the next instruction. The flags are unaffected. and the result is put in the accumulator. The register M is defined in the memory and its address is given by the current content of the HL register pair. The operation (A . Figure 5.1.0802H.21 shows the execution of the LXI H. The content of A is copied to B. The assembly level program consists of a sequence of 37 . The addition operation is explained below: 09H FEH Addition = = 0000 1001 1111 1110 ____________ 1 ← 0000 ← 0111 = Carry AC 07H. Figure 5. The PC points to the next instruction to be executed. The content of this memory location is added to the accumulator. Figure 5. The HL register pair is loaded with the 16 bit data of the instruction. AC = 1. The content of register A is copied to I/O port address 02 H. The PC points to the next instruction to be executed.register A. P = 0 and C = 0.A instruction. Figure 5.6 ASSEMBLY LANGUAGE PROGRAMS AND ASSEMBLERS In the previous lectures of this module we have already encountered assembly language programs and we are familiar with some of its features. 0801H.22 shows the software model after the execution of the SUB M instruction. The software model after the execution of this instruction is shown in Figure 5. The status of flags are S = 0.2.23 depicts the results of the execution of MOV B.20. 5. No flags are affected. i. Flags are set according to the rules given in Section 5. which is the current content of HL register pair.e. Z = 0. The PC now points to the HLT instruction.
21 Detailed 38 . Example .20 Detailed Example .Step 6.Step 6.Figure 5. Figure 5.
Detailed Example .Figure 5. Figure 5.24. Figure 5.22. 39 .Step 7. Detailed Example Step 8. Detailed Example .23.Step 9.
Comment HL loaded with pointer Each of the fields is separated from the other by a special symbol known as a delimiter for instance the comment field starts with a semicolon. such as the address of the origin of the program in the memory and the address of the data in the memory. If it is present it is separated from the next field by a colon `:'. the mnemonic. In above example the label start is the symbolic address of the LXI H. the label.e.. i.e. The assembler directives provide necessary information to the assembler. namely. the first of which is an alphabet.e. The labels are a string of alphanumeric characters. The label should not contain space or other special characters. mnemonics.0345H instruction. Some assemblers do 40 . It may contain a label.. The string usually contains five or six characters depending on the assembler. This additional information is given to the assembler through assembler directives or pseudo-operations. This program cannot be executed directly and has to be translated into machine code by hand (hand assembly) or through a program called the assembler. An example is shown below: Label START: Mnemonic LX1 Operand(s) H. 5. 0345 H. i. Labels are optional. i. It was also observed that some additional information is also required. These fields are discussed below: The label field A label field is the first field in an assembly language instruction.instructions using symbolic op-codes.6.. These fields follow each other in the sequence specified. and symbolic or numeric data and addresses. These are written using mnemonics (symbolic op-codes) or assembler pseudo-operations together with symbolic or numeric data and addresses. symbolic memory address that is used to refer to the address of the statement in the program. labels. the operand and the comment. The assembly language program thus is a sequence of assembler directives and instructions. The assembler directives will be after the format for assembly language instruction is described.1 The Assembly Language Statement Each instructions in an assembly language program has four fields.
AND. These comments should be brief and to the point and bring out what the program is doing.g. These operations are usually of +. e. Comments have no effect on the object code and are ignored by the assembler. This is indicated by a B. If more than one operand is required.D or H immediately following the data. The data may be expressed in binary. *. the data is assumed to be decimal. ASCII data may be given if it is surrounded by a apostrophises. /. Some assemblers permit limited arithmetic and logical operation on the operand data. if present by a colon and from. then it must start with a semicolon `. the operand field by a space. decimal or hexadecimal form. The manual of the assembler being used should be consulted for details. data or labels.permit some limited special characters in a label. `K'. OR.'. But they are essential for understanding and documenting a program. The Mnemonic Field This field must always contain a valid 8085 mnemonic or an assembler pseudo operation. XOR and MOD. LABEL+1 would evaluate to the value of LABEL plus 1. For example. In that case there are no other field on that line.' or an asterisk *. The assembler will otherwise signal an error. The label should not be mnemonic. The field is separated from the label. The Operand Field The operand field contains the name of registers. For instance SUB. ORG or PC should not be used as a label. The operands are separated from the comment field by a semicolon `. NOT.'. Any other entry in the field results in an error. The Comment Field The comment field begins with a semicolon. Most assemblers expect a 0 to precede hexadecimal data if it starts with an alphabet. the operands are separated by comma `. 41 . Whenever the assembler encounters a semicolon. It is a good programming practise use comments freely in a program. pseudo-instruction or name of a register. If this is not indicated. it assumes the rest of the line is a comment. If the entire line is a comment. -.
SPC. Equate (EQU) and Set (SET): These directives are similar but not the same. X: Y: Z: P: DB DB DB 12H `D' `H1' . format. ORG EQU. . but DB does. informs assembler that the next statement . ORG 1000 H START: LX1 H. DB 1.e. When used in the middle of a program. These pseudo operation are placed in the mnemonic field of a statement. location DATA Origin (ORG): This informs the assembler about the starting location of the program. LSB first and then MSB. 12H is put in memory location X ASCII code is put at memory location Y ASCII codes of H and I are put at two memory locations . If the value of the label has to be changed later in 42 . DS.g. i.2 and 19 are put in memory locations starting from P. Define Storage (DS): This is used to reserve space in the program for data. the location of the start of segment of program which follow it is changed to the value indicated. 1. . End (END): This signals the end of the program. 200H . e.2. The EQU directive is used to equal a label to another label or value. starts from 1000 H. reserves 5 bytes of memory starting from memory .6. Other pseudo operations which we shall cover are DW. Define Byte (DB): This is used to define an 8-bit data in the memory. starting at Z. .19 Define Word (DW): This is used to store a 16-bit number in the memory.2 Assembler Directives The assembler directives also known as assembler pseudo operations. K: DW 1234 .5. A label can be equated only once during assembly. They may or may not lead to generation of machine code. SET. TITLE. Number 1234 is stored in the memory at K in the proper . It is the last instruction in a program. END does not lead to any machine code generation. DATA: DS 5 . For example.
In the second pass. The single-pass or the one pass assembler scans the source code only once. and seme method has to be used to handle them. SET is used only for special cases in a program.the program SET is used. The assembly language program is called a source program and the machine code is the object code. . Most assemblers are two pass assemblers. the object code is determined using the generated label table.g. In the first pass it makes a table of labels found in the program. Macro assemblers are special types of assemblers.6. IF and ENDIF for conditional assembly. e. Discussion on these is beyond the scope of the present discussion. Some labels may have been referred in the operand field prior to its definition in the label field (forward referencing). GLB and EXT for use with linker to link with other programs. S-format or Intel Hex Format. It also gives a label or symbol listing at the end. They may be an often 43 . the assembler also generates a listing. They permit the programmer to define new op-codes termed as macros. label SCORE has a value of 20 label VALUE has temporary value of 5. TITLE and SPC for listing control. SCORE: VALUE: EQU 20 SET 5 . This contains the source code and the errors encountered during assembly. It also keeps track of address of the labels. Apart from these there are other assembler directives such as.3 Assemblers As mentioned earlier an assembler converts the software written in assembly language into machine language in the hexadecimal form. It scans the source code twice. If there are no errors it indicates the machine codes corresponding to each statement. The object code is usually in a special object format. In this pass it determines the address of all labels in the program. 5. This code can be loaded into the microprocessor using loader. These assemblers cannot handle forward references automatically. Apart from this object code. This symbol listing gives the symbol value corrosponding to the symbol name.
A meta-assemblers an assembler which can handle many different instruction sets. A self assembler or a resident assembler on the other hand generates code for the same computer system on which it runs. Whenever the macro name appears. For example. 44 . It is left to the user to define the instruction set used. A cross assembler is an assembler that runs on a computer whose CPU is different than the one for which it assembles the program. The other types of assemblers are the cross-assembler and the metaassembler.repeated group of instructions which occur many times in a program. an assembler for generating code for 8085 may be run on a PC. it is replaced by this group of instructions during the assembly process.
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