PROGRAMMING - I

5.1

INTRODUCTION:

The key benefit from the application of computers is to be able to be programmed to perform a specific task. The sequence of instructions to the CPU of a computer that causes it to solve a problem is called a program. The art of designing this sequence is called programming. A computer may be applied to solve a problem by designing the program and interfaces, the rest of the computer system remains the same. Since the main computer components are common, they can be mass produced with corresponding economies of scale. The changes are basically in the program which can be altered at a small cost. Designing the program is a major part of designing a microcomputer system. The primary task of a computer is to execute programs. The program is stored in the memory and it instructs the computer to perform a particular task. It consists of a sequence of instructions which the computer understands. The computer keeps fetching instructions from the memory and executing it in a sequential manner, unless an instruction causes it to change the execution sequence, or causes the computer to halt. The computer fetches and executes instructions. The complete set of instructions which of a computer can interpret and execute is known as the INSTRUCTION SET of that particular type of computer. The program is written using instructions from this instruction set. The next question is what are these instructions like? A computer can only understand binary numbers. Therefore, an instruction is simply a binary bit pattern, ie, a binary number. The computer interprets this binary bit pattern as an instruction to a particular task. For example, the bit pattern 0010 1111 instructs the 8085 microprocessor to complement the contents of register A. The entire program is a sequence of binary numbers. This is called machine language program or object program. But there are some basic difficulties in working with machine language. Such programs are not in a format which the humans, ie, the programmer can easily understand and debug. For a computer 01111010B may be easy to understand, but not so for the programmer. They may find it tiresome and confusing. The situation is improved if the program is written in hexadecimal rather than 1

binary numbers. For example 7AH is easier to understand and remember than 01111010B. Writing and debugging of programs becomes easier. It is for this reason programming is done with hexadecimal numbers. The program in hexadecimal is converted to binary through a program called the hexadecimal loader. The hexadecimal loader converts hexadecimal numbers and loads it into the computer. This is a common program and is usually a part of the monitor.

5.2

SOFTWARE MODEL OF 8085.

The purpose of developing a software model is to aid the programmer in understanding the operation of a microprocessor system from the software point of view. In order to program a microprocessor, we need not know all its hardware features. The functions of the various pins of the microprocessor and their electrical characteristics are not of importance to the programmer, nor is the knowledge of the working of its internal circuits needed. He is only interested in the software resources of the microprocessor system and how they are organized. A programmer must know the various internal registers and flags within the microprocessor, understand their purpose, capabilities and their limitations. In other words he must understand the programming model of the microprocessor. Furthermore, he must also know how the memory and the I/O are organized and how it is addressed by the microprocessor to obtain instructions and data.

5.2.1 Programming Model of 8085. The programming model is the diagram of the internal registers and the flags within the microprocessor, which are of importance to the programmer. The programming model of 8085 is shown in Figure 5.1. The 8085 contains several registers which can be used by the programmer. Some of these registers are general purpose and can be used by the programmer in any manner. Others are special purpose registers and are used for a specific purpose. The registers B, C, D, E, H, L are 8-bit general purpose registers. They can be used either individually as 8-bit registers or as 16-bit register pairs. The valid register pairs are BC, DE, and HL. These register pairs are used to hold addresses or 16-bit numbers by some instructions. The register pair HL has a special significance. One is it can be used as a pointer to a memory location. Second, it acts as the accumulator for double byte 2

addition. The register pair BC and DE can also be used as pointers by a very limited instructions. Amongst the special purpose registers, the Accumulator and the Flags together are known as the Processor Status Word. They give complete information of the result of a particular arithmetic or logical instruction. The Accumulator, also known as register A is an 8-bit special purpose register. It is the primary source and destination for arithmetic and logical instructions. Almost every arithmetic and boolean instructions take one of the operands from the accumulator and the result is placed in the accumulator. The other operand can be either in the memory or any of the other registers. Also all data transfers between CPU and I/O take place through the accumulator. The Flag register (F) contains five bits that are used as flags. Each of these record processor status information and may control the processor operation. On the execution of certain instructions the flags change. More over certain instructions such as conditional calls and jumps use these flags for their execution. The Sign Flag bit (S) indicates whether the results of an operation is positive or negative. If the most significant bit of the result of an operation is '1', then this flag is set, otherwise it is reset. The Zero Flag bit (Z) indicates whether the result of an operation is zero or non-zero. It is set if the result is zero, else it is reset. The Auxiliary Carry Flag bit (AC) holds the carry between the least significant and most significant halves (nibbles) of the result. If there is a carry from the 3rd bit to the fourth bit, AC is set, else it is reset. The Parity Flag bit (P) indicates the parity of the result. If the parity is even then P is set , otherwise it is reset. ( Parity is the number of '1' in the result expressed as even or odd.) The Carry Flag bit (C) indicates a carry out of the most significant bit of the result. If the instruction results in a carry (from addition) or a borrow (from subtraction or comparison) out of the most significant bit, this flag is set, otherwise it is reset. The Program Counter (PC) keeps track of the address of the memory location containing the next instruction to be executed in the program memory. This is a 16-bit register.

3

Figure 5.1. The Programming Model Of 8085 Microprocessor.

Figure 5.2. Busses and Control Signals of 8085

4

The stack is a last-in. it can contain 8 bits of data. This is also referred to as 64K. In other words the 16bit address on the address bus selects one of the 64K memory locations which the 8085 microprocessor can address. It addresses the I/O when IO M 5 signal is / / '1'. W 2.536 memory / locations.2 Data and Address Busses of 8085 In order to understand how the memory and the I/O is organized.3 Memory Addressing and Memory Map. 5 . The 8085 has 16 address lines. The address lines address R / D the memory when IO M 4 signal is '0'. The stack grows towards decreasing memory locations. 5. A memory location contains 8 bits of data.2. With each addition to the stack the stack pointer is decreased by two and vice-versa.2. The 8085 has a 8-bit data bus. A memory location has therefore an address and a content. The Lower Address Bus and the Data Bus are multiplexed and they can be demultiplexed by using the ALE signal and a latch. When IO M 6 is low. Therefore 8-bits of data can be transferred to and fro from the microprocessor in parallel. The stack pointer contains the address of (points to) the last memory location filled on the stack. 5. ie. each with an unique address. The address lines are divided into two groups of 8 lines. ie. Each memory location is 8-bit wide. Once the memory location is selected the data transfer between the selected memory location and microprocessor can take place. The content is the data contained at that particular memory location. the Lower Address Bus and the Upper Address Bus. IO M 3.2. Therefore in short: i) ii) The memory can be considered to be an array of 64K memory locations. where 1K = 2 10= 1024. first out data structure the 8085 maintains in the memory. we shall review the bus organization of 8085. These busses and control signals are shown in Figure 5. All stack operations are 16-bit. The memory address is the 16-bit address on the address bus which selects a memory location. The main control signals are R 1. the 16 address lines can address 216= 65.The Stack Pointer (SP) keeps a track of the stack.

This is an invaluable conceptual aid in programming. Similar to / memory addressing. The latter will be dealt with in a separate module. The various functions assigned to the I/O can be depicted on it. Various functions assigned to these memory locations. The Interrupts are also shown in the figure. When IO M is high. But there is one difference.4 I/O Addressing and I/O Map. An I/O map can be drawn showing the I/O organization of a computer system. Therefore there are 8 bits of unique address. 6 . program storage. This model gives a clear indication of the various resources available to the programmer. Each I/O port location is also 8 bits wide.4 5. It gives a clear picture of how instructions work and how they affect the registers. Furthermore the type of memory interfaced and at what locations can also be shown on it. In other words it becomes his play field. They can be disabled or enabled through software.2.3. Therefore the 8085 can address only 28= 256 I/O ports. The software model of 8085 is shown in Figure 5. 5. eg.5 The Software Model of 8085. An I/O map is shown in Figure 5.A memory map can be drawn showing the memory organization of a computer system. The address is duplicated on the Lower Address Bus A0-A7 and the Upper Address Bus A8-A15. the address on the address bus selects one unique I/O port location and then data transfers between the I/O port and the 8085 can take place.2.5. the address on the address lines is for the I/O. It shows the internal registers of 8085 as well as the memory and the I/O space. The SID and SOD lines are also shown as they can be programmed through software. flags. memory and the I/O. stacks etc can be depicted on it. data storage. temporary storage. A memory map is shown in Figure 5.

The Memory Map.Figure 5.4. 7 .3. The Memory Map Figure 5.

Figure 5. The I/O Map. 8 .4.

5. The Software Model of 8085 9 .Figure 5.

This operand can be a 8-bit data or an I/O address. Most of the instructions of 8085 are single byte instructions.3. The mnemonics are usually written in upper case. one byte. There are three different instruction formats ( Figure 5. contain the operands to be used by the instruction. The second byte contains the least significant byte (LSB) and the third byte contains the most significant byte (MSB) of the two byte data or address. In other words the op-codes are described in terms of mnemonics for the benefit of the programmer. namely. 5. 10 . For example if the 16-bit data is 1234H it is coded as 34 12 in the 2nd and 3rd bytes respectively of the instruction. The address of the first byte is the address of the instruction. For example. The first byte of all instructions is the op-code (operation code).2 Addressing Modes of 8085. Multibyte instructions must be stored in successive memory locations.3 REVIEW OF THE INSTRUCTION SET. Op-codes and Mnemonics. if present. It is recommended that the student goes thoroughly through the instruction set given in the Appendix.6). 5. c) Three Byte Instructions: In these instructions the first byte is the op-code and the second and third bytes contain a 16-bit operand. two byte and three byte instructions. In this section some of the aspects of the instruction set will be highlighted. The op-code tells the 8085 CPU which operation is to be performed. The other bytes. The instruction set of 8085 was introduced in module on the 8085 CPU. This may be a 16-bit data or a memory address. Always remember that a 16-bit data is coded as LSB first and then MSB. if register A is to be complemented the op-code is 0010 1111B or 2FH.1 Instruction Format. Therefore the op-codes are described in terms of MNEMONICS. The op-codes are basically binary numbers.3. Mnemonics are abbreviations of the instruction. A programmer will find it difficult to remember which op-code 2FH corresponds to. a) Single Byte Instructions: These instructions contain only the op-code. The method of encoding this 16-bit operand in the instruction is a bit unusual. b) Two Byte Instructions: In these instructions the first byte is the op-code and the second byte contains an 8-bit operand. The detailed instruction set is given the Appendix.5.

whose address is contained in the 11 10 Memory Location 1234 . These may be a part of the instruction. a register pair holds the address of the memory location containing the operand. or the register pairs BC. The 8085 has four addressing modes. In register addressing the instruction specifies the register or register pair in which the operand is located. in the second and third bytes of the instruction. These data are called its operands. For example. The instruction causes contents of register A to be copied to register B. They can be the registers B. or A. register indirect addressing and immediate addressing. D. source register A. namely direct addressing. register addressing. reside in one of the internal registers. Register Indirect Addressing. In the register indirect addressing. Therefore the instruction which is 3 bytes long is 3A 34 12. stored in the memory or held in the I/O. H. Thus the memory is addressed indirectly by the register pair.A instruction. LDA is the mnemonic for the instruction Load Direct Accumulator and 1234H is the 16-bit address which contains the data to be loaded. It defines a register M in the memory at the location. Notice that the address is coded LSB first and then MSB. Consider the instruction LDA 1234H. L. C. Direct Addressing. Register A <─────────── 10 Register Addressing. The various methods the 8085 uses to access the operands are called its addressing modes. consider MOV B. The op-code for LDA is 3AH.When 8085 executes an instruction it performs specified functions on data. This is a one byte instruction whose op-code is 47H. E. or as move A to B. DE. The mnemonic MOV stands for move. The register pair HL is a special register for register indirect addressing. Assume the data is 10H. The instruction is read as move destination register B. HL or SP. A 16-bit memory address follows the op-code of the instruction. In direct addressing the instruction contains the actual address of the operand in the memory.

Implicit Addressing.reg2 has 63 variations and therefore 63 different op-codes. Assume that at the time of execution of the instruction the register pair HL contains 1234H. This instruction moves content of M (located at memory address pointed by HL. See Figure 5. CMA stands for complement the accumulator.7. 5. Here we shall go through the various groups of instructions. In certain instructions the operand is not specified. For example. which total to 246 different op-codes. In this mode of addressing the data is encoded in the instruction.M. Here the register A (the accumulator) is implied. For example.register pair HL. Consider the instruction MOV A. It is a one byte instruction and the op-code for it is 7EH. It is a one byte instruction. 12 . The data may be 8-bit or 16-bit. consider the instruction MVI A. while going through the instruction set. The 8085 microprocessor has 74 different instructions. It is useful to refer to the software model of 8085. Consider the CMA instruction. but is assumed to be in a register usually the accumulator. namely 1234H) to register A.30H. This is a two byte instruction whose opcode (the first byte) is 3EH.3. This is followed by the data to be moved to register A. In the previous sections we had encountered some of the instructions. The instruction is coded in machine language as 3E 30. depending on the type of instruction. Immediate Addressing. The data is placed immediately after the op-code. The mnemonic MVI stands for move immediate. These op-codes are different for different variations of the instructions.3 Classification of Instructions. the MOV reg1. This is a one byte instruction whose machine code is 2FH.

Instruction Types.Figure 5. j Figure 5. M in Memory.6. HL points to Reg.7. 13 .

Branch Group . 2. calls or returns. as suggested by the mnemonics. reading and writing to I/O ports and interrupt control and setting and clearing of flags. direct. indirect and register transfer instructions. In data transfer instructions. If one recalls the software model. The exception to this is the XCHG instruction. Arithmetic Group .These instruction perform logical operations of ANDing.The instruction set of 8085 has been grouped under five different functional headings. the move immediate instruction is MVI r. comparing. These instructions perform stack operations. 5.4 Data Transfer Group. The registers i) Immediate Data Transfer Instructions: These instructions load the registers or register pairs of 8085 or a memory location M addressed indirectly by the HL register with the immediate data supplied with the instruction itself. rotating or complementing data in registers or between memory and a register. In nearly all the data transfer instructions although the data is copied from one place to the other and not moved. increment or decrement data in registers or memory.These instructions modify the program flow by performing conditional or un-conditional jumps. subtract. Data Transfer Group . The instructions in this group are used to transfer data around the registers and the memory. ie. 5.3. these instructions transfer data between the registers B. Direct memory to memory transfer is not possible. These instructions can be subdivided into immediate. ORing. C. the flags are not affected. L and A and the memory.These instructions add. One form. the values of the flags remain the same before and after the data transfer instruction.These instructions move data between registers or between registers and memory. Logical Group . as follows: 1. where exchange of data takes place. D. Stack. There are two forms of the instruction. 4. as well as load them with immediate data specified in the instruction itself.8-bit data 14 . XORing. I/O. and Machine Control Group. 3. E. H.

(Load HL Direct). In this method the register M is like any other register of 8085. HL or SP. register A and the content of memory location specified. The address of the memory location is given in the instruction itself. ie. DE. E.16-bit data LXI loads the specified register pair with the immediate 16-bit data supplied with the instruction. These are LDAX rp . The register pairs can be BC. the data transfer takes place between the HL register pair and two consecutive memory locations. there are other types of indirect data transfer instructions also. usually refers to a register pair operation. B. (Store Accumulator Indirect). The other method of defining a register M in memory does not have a particular instruction. 15 . The registers can be A. A mnemonic containing X as a letter. starting from the memory address specified. (Load Accumulator Indirect). C. STAX rp . The rp can be the B (register pair BC) or D (register pair DE). LDA memory address . In the first form. ii) Direct Data Transfer Instructions: In these instructions the data is transferred to and from the memory. SHLD memory address .loads the 8-bit data into the register specified. H. There are two forms of these instructions one dealing with 8-bit data and the other with 16-bit data. (Store Direct Accumulator to memory) In the other form a 16-bit data. (Load Direct Accumulator for memory) STA memory address . D.8. In SHLD instruction the contents of the HL stored in the memory in a similay way. L or M. These instructions load and store register A at a memory location whose address is contained in the specified register pair. iii) Indirect Data Transfer: Although data can be transferred indirectly through the register M. The other form is the load immediate register pair instruction is LXI rp. LHLD memory address . (Store HL Direct). the data transfers takes place between the accumulator. The LHLD xxxx instruction loads the register L with the content of the memory address xxxx and register H with content of the memory location xxxx+1 as shown in Figure 5.

Figure 5.9 The XCHG Instruction. 16 .8 The LHLD Instruction.Figure 5.

The result of the addition is put in the accumulator. E. B. L. All subtraction operations are performed through the two's complement arithmetic and set the carry flag to indicate a borrow and clear it to indicate no borrow. D. The flags will be set as under. The forms of instruction are ADD register .5 Arithmetic Group. C. D.3. There are no operands specified as DE and HL are implicitly addressed. E. C. XCHG is a 16-bit instruction. H. (A) <-. In all the arithmetic and logical instructions requiring two operands one of the operands is assumed to be in the accumulator (register A) and the result of the operation is also put in the accumulator. or supplied as an immediate operand with the instruction. unless indicated otherwise. L. instructions for incrementing and decrementing registers and register pairs. This exchanges contents of DE and HL register pairs. in the memory register M. The instruction ADD B will cause the addition and the result 2EH will be put in register A. These instructions transfer 8-bit data between the various registers. 5.(A) + (register) implies that the content of register A is added to that of the specified register and the result is put in register A. M. As an example consider that A contains 40H and B contains EEH. There 63 different MOV instructions. See Figure 5. The arithmetic group includes instructions for 8-bit addition and subtraction. i) 8-bit binary addition instructions: The register A is assumed to contain one operand. H. 17 . (A) <-. 16bit addition. These have the form MOV reg1. The second operand can be in any of the registers B. A.(A) + 8-bit data) The notation (A) <-.(A) + (register) ADD 8-bit data .9.iv) Register Transfer Data Instructions: This is the largest group of data transfer instructions. This is different from the other data transfer instructions as an exchange of data takes place instead of a simple move. reg2 (Move reg2 to reg1) where reg1 and reg2 are the registers A. All arithmetic instructions affect the flags according to the rules indicated earlier (discussion on the software model).

(A) <-. The form of instruction is DAD register pair . The result is put in the accumulator. where the overflow from previous bytes has to be considered. If the carry flag is set prior to this instruction. This is helpful in multibyte addition. This instruction only affects the carry flag. The forms of instructions are: ADC register . The register pair HL acts as the double byte accumulator. iv) BCD addition: In BCD addition the operands are BCD numbers and binary addition is first done.(A) + (register) + (CY) ADC 8-bit data . One of the operands is in HL register pair and the other operand is in any of the register pairs. v) Double byte addition instruction: The DAD instruction is a double byte addition instruction. Then the Decimal Adjust Accumulator instruction. The correct BCD addition results will be available in the accumulator. (A) <-. except that the carry flag is also taken into account. namely BC.(A) + 8-bit data + (CY) where (CY) is the value (0 or 1) of the carry flag. as we shall see later. In case a borrow is generated. (HL) <-. The value of the carry flag is subtracted from the result.(A) . HL or SP. the carry flag is set.(A) . The forms of instruction are SUB reg . 1 will be added to the result. (A) <-. (A) <-. These are used for multi-byte subtractions.(HL) + ( register pair) vi) 8-bit binary subtraction: In the subtract instructions the accumulator contains one of the operands from which the other operand is subtracted. The form of the instructions are 18 . These are very useful instructions when a register is being used as a counter.(A) .(register) . The forms of the instructions are SBB reg .S 0 Z 0 - AC 0 - P 1 - CY 1 ii) 8-bit binary addition with carry instructions: These instructions are similar to the ADD instructions. (A) <-. The result is put in HL.8-bit data . DE.8-bit data Subtract instructions with borrow take care of the previous borrow generated.(register) SUI 8-bit data .(CY) vii) Increment and decrement register instructions: These instructions increment or decrement the specified register by one. These instructions affect all flags except the CY flag. DAA is executed. (A) <-.(A) .(CY) SBI 8-bit data .

The XRA A instruction is frequently used to clear the flags as well as the accumulator. In the ANDing instruction the CY flag is set and the AC flag is cleared. Other flags are set according to the result. pair) <-. ANA register . (A) ∧ 7 (register) ANI 8-bit data . ANDing.1 5. It effect none of the flags. B. (register) <-. (register) <-. (reg. E.3. ORA register . D. The form of instructions are INX register pair . DE. HL. ii) The compare instructions: These instructions are similar to the SUB instructions. (A) ⊕ (register) 10 XRI 8-bit data . XOR and OR are given below. L or M.(reg. XRA register . The logical group contain instructions for Comparing. In the ORing instruction the CY and the AC flags are cleared. pair) . pair) <-. The register pair which can be incremented or decremented are BC. Complementing and rotating the operands. In the XORing instruction the CY and 12 the AC flags are cleared. i) The basic logic functions: The instructions for basic logic functions of AND.6 Logical Group. (A) ∧ 8 8-bit data where ∧ 9 is the symbol for AND operation. Other flags are set according to the result. H. ORing. except that the result in not put in the accumulator. (A) ⊕ 8-bit data 11 where ⊕ is the symbol for XOR operation. (A) ∨ 14 8-bit data where ∨ 15 is the symbol for OR operation. SP.1 The register can be a. viii) Increment and decrement register pair instructions: These instructions increment or decrement the specified register pairs. XORing.(reg. The forms of the instructions are 19 . (reg. The accumulator contains one of the operands and also contains the results of the operation.INR register . pair) + 1 DCX register pair . Only the flags are set. Other flags are set according to the result.(register) + 1 DCR register . C. (A) ∨ 13 (register) ORI 8-bit data .(register) .

5. set and complement the carry flag respectively. iii) The rotate instructions: There are a set of four instructions that allow the contents of the accumulator to be rotated left or right. Each rotate instruction affects the contents of the accumulator and the carry flag. There are two basic forms of these instruction.(register) are set. There is no instruction for resetting the carry flag. it complements the CY flag.3. The jump. . STC and CMC. Rotate A Left through Carry RAL.CMP register CPI 8-bit data . The conditions are related to the state of a particular status flag. logical instructions. Rotate Right Circular RRC. 20 . call and return instructions can be unconditional or conditional. No flags are affected. and Rotate A Right through Carry RAR. the CMA. These are known as the branching or program control instructions. Flags for (A) . it sets the CY flag.10. If the CY flag is set then the operand in the accumulator is smaller of the two. One of these instructions.8-bit data are set. Flags for (A) . If the Z flag is set then the two operands are equal. On encountering a return instruction in the sub-program the control returns to the main program. The other two instructions. The 8085 has a variety of instructions which alter the normal sequence of program flow. These instructions are the Rotate Left Circular RLC. These instructions do not alter the flags. STC . No other flag except the carry flag is affected. CMC . In all these instructions only the carry flag is affected. iv) Misc.7 Branch Group. complements the accumulator. The jump instructions allow the program to jump to any location in the memory and continue the program execution. The call instructions transfers control temporarily to a sub-program. The details of these instructions are shown in Figure 5. namely the jump and the call instructions. The conditional instructions branch only when a condition is met.

Figure 5.10 The Rotate Instructions. 21 .

i) The unconditional jump instructions: The jump instruction causes the next instruction to be executed from the address specified in the instruction. ie. This uses indirect register addressing. The HL register pair contains the address of the jump location. The forms of instructions are CALL memory address . This instruction causes contents of HL register pair to be copied to PC. The corresponding value of the flag as well as comments on the condition are given. In other words the program jumps to the specified address. else the no operation occurs and the next instruction in sequence is executed. But before the program jumps by loading the PC with the new address. Ccondition memory address . The conditions are the same as described for the conditional jump instructions. For example JZ address implies jump if zero. The following steps are performed by this instruction. The format for the instruction is Jcondition memory address The various conditions based on the status of the flags is given below. Unconditional call. The form of the instruction is JMP memory address This instruction loads the program counter PC with the specified address. Therefore the instructions are now fetched sequentially from this new address. instead of next address in the program sequence. The other unconditional jump instruction is PCHL. Conditional call. this instruction causes the current value of PC to be saved on the stack. Condition Condition flags Comment Z Z=1 if zero NZ Z=0 if not zero C CY = 1 if carry set NC CY = 0 if no carry M S=1 if minus P S=0 if plus PE P=1 if parity even PO P=0 if parity odd iii) The call instructions: These instructions cause the program to branch to a subroutine whose memory address is specified in the instruction. ii) The conditional jump instructions: In these instructions jump to the specified memory address occurs if the condition specified in the instruction is met. if the z flag is 1. It is useful to recall that stack pointer 22 .

The following steps are performed by this instruction. I/O and Machine Control Group. The RST instruction is a single byte as compared to the three byte CALL instruction. v) The restart instructions: These are special unconditional call instructions. This group is a miscellaneous group. The stack pointer SP is incremented by 1 and data in the memory location pointed to by the SP is copied into the MSB of PC. if the condition is not met. The form of instruction is RST n . In the case of conditional return instruction.SP points to the last filled memory location on the stack. a number n between 0 and 7 is specified.8 Stack. iv) The return instructions: This instruction are generally used together with the call instruction. These instructions deal with manipulation 23 .3. If the 8085 is executing a subroutine because of a call instruction. This instruction does not require an address. In all other aspects it is similar to a CALL instruction. no action takes place and the next sequential instruction is executed. no action takes place and the next sequential instruction is executed. In the case of conditional call instruction. if the condition is not met. The form of the instructions are RET . In these instructions instead of an address. The SP is again decremented by 1 and the LSB of PC is stored in the memory location pointed to by SP. The PC is now loaded with the specified address. and that the stack grows towards decreasing memory addresses. 5. Unconditional return Rcondition . The PC is therefore now loaded with the previously saved address on the stack by the call instruction. The stack pointer SP is decremented by 1 and MSB of PC is stored in the memory location pointed to by the SP. as the address is already saved on the stack by the call instruction. it returns to the original program from this subroutine. when it encounters a return. Therefore RST 1 is the same as CALL 0008H. The address is fixed and is equal to n * 8. Conditional return The conditions are the same as described for the conditional jump instructions. where n lies between 0 and 7. The SP is again incremented by 1 and the data in the memory location pointed to by SP is copied into the LSB of PC.

The format of the instructions are PUSH register pair POP register pair The register pairs are BC. The PUSH B instruction works in the following manner. Both these must come through external hardware. iii) The stack manipulation instructions: These instructions are used manipulate the stack. The only way the microprocessor can restart is through a reset or an interrupt. Interrupt control and serial I/O. the I/O. DE. The SP is again decremented and the lower order register C is copied on to the stack. The content of HL is copied to SP. The XTHL instruction exchanges the content of the HL register pair with the most recent data on the stack. But being an instruction it takes some time to execute. i) The no operation instruction: This NOP instruction is a single byte instruction and does nothing. It can replace an instruction. The SP is decremented to point to the next empty location on the stack and the higher order register B is copied to the stack. if that instruction is not needed. This is useful in waiting for external interrupts. The content of register L is exchanged with the content of memory location being pointed to by SP and the content of register H is exchanged with the content of the memory location following it.of the stack. The POP instruction works in the reverse way. This is an indirect way of loading the SP in order to initialize the stack. Figure 5. iv) The I/O instructions: There are only two instructions which are related to I/O 24 .11 illustrates this instruction. The SPHL is an instruction to load the stack pointer SP from the HL register pair. The PUSH and the POP instructions save and restore the specified register pairs on the stack respectively. Some of these instructions will be dealt in detail in the next module. The other stack related instructions are SPHL and XTHL. During programming. if the registers are to be saved. It is useful in timing matching and providing delays. ii) The halt instruction: The HLT instruction is used to stop program execution. In other words. A series of NOP instructions can be put in a program to make space for future additions to a program. HL and the PSW.

Figure 5.11. 25 . The PUSH Instruction.

This is done using SIM. If the interrupts are masked they are not recognized.5 and RST7. I6. The bits I5.5. In the IN instruction the data from the specified port is copied into the A register. RST6. respectively. The EI instruction unmasks the interrupts.5 flip flop. ie. RIM and SIM instructions.5.5 and M7. Apart from the general masking of the interrupts individual interrupts can be masked or unmasked. and M7. The SIM instruction: In order to use the SIM instruction register A has to be loaded with the data as indicated in Figure 5. Also the mask set enable is set to 1. DI. v) Interrupt control instructions: These are the EI.12. the set interrupt mask instruction. 26 .5 indicate whether any of the RST5. M6. waiting to be processed. In the OUT instruction the data present in the register A is sent to the specified output port. This serial data is put on the SOD line on executing the SIM instruction. In both these instructions data movement takes between the specified port and the accumulator. The DI instruction is very useful in programs which require that no interrupt should occur during a particular program segment.operations. M6. The interrupts are disabled by DI instruction in the beginning of the segment and then enabled by the EI instruction at the end of the section.5. The individual mask settings and whether there are any pending interrupts can be known from RIM. The interrupt enable flag IE indicates whether the interrupts are enabled or disabled. The bits M5.5 indicate the individual masking of the interrupts RST5. The EI instruction is used to enable them. future interrupts are automatically disabled. This enables the mask to be set on executing SIM instruction.5. read interrupt mask instructions. The DI instruction masks all the interrupts except the unmaskable TRAP interrupt.5 and I7. The SID bit gives the status of the SID serial line.5 are set to 1 to disable them or 0 to enable them. The R7. The form of these instructions is IN port address OUT port address The port address is an 8-bit number.5 are pending.5 is used to reset the RST7. The RIM and SIM instructions are also used for serial I/O on the SID and SOD pins of 8085.5. The RIM instruction is used to read the serial data on the SID line and the SIM instruction is used to send serial data on the SOD line.5. When an interrupt occurs.5 and RST7. The RIM instruction: On execution of the RIM instruction the register A contains the data as given in Figure 5.5. If instead of masking the interrupts the serial data is to be sent the data 0 or 1 is put in SOD and sod enable SOE is made 1. The bit labelled M5. RST6.13.

13. Register A prior to execution of SIM.12. Register A after execution of RIM. Figure 5.Figure 5. 27 .

5.9 Time and Space Requirements of Instructions. Unfortunately there is no direct instruction to do this. The the method of writing assembly language programs has been introduced here informally. 5. Transfer the contents of memory location 2345H to 2400H. This is known as the Data Memory and is the amount of memory required by the data. decoded and executed. ie. even if it is a NOP. as well as the time required for its execution. where a state is the time required for one system clock.3.4. the following time instructions will do the needful. This example requires the transfer of data from one memory location to another. whether they are 1. 28 .14. as well as the length of each instructions. This because the instructions have to be fetched. Each instruction takes a finite amount of time. The execution time is referred to as states. On going through the data movement group of instructions. These examples have been based on the various addressing modes covered in Section 5. This will depend on the number of instructions the program has. Moreover the memory requirements for storing the data has also to be considered. Therefore data is first transferred to register A from memory location 2345H and then it is transferred from register A to memory location 2400H. The total time a program required is the sum of all instruction execution times.3. as shown in Figure 5. 2 or 3 byte instructions. This is the Program memory.4 SIMPLE PROGRAMMING EXAMPLES A few simple examples of programming are presented in this section. The other consideration is the time that is required by the program. 5.2. While writing a program the programmer has to know the space required by his program. This also gives the number of bytes the instruction takes. A complete description of the Instruction Set is given in the Appendix.1 Example of Direct Addressing.

4.e.. hexadecimal numbers and labels in an assembly language program. This is called hand assembly. This is an aid to understanding the program. The op-codes corresponding to mnemonics. SOURCE stands for memory location 2345 H.' is considered a comment.LDA STA 2345H . This is of the form: 3A 45 23 32 00 24 On further converting it to binary machine code as 0011 1010 0100 0101 0010 0011 0011 0010 0000 0000 0010 0100 This binary form is what the computer understands.2 Example of Register Addressing Registers D and E contain numbers which are to be added and the result is 29 . but is not a part of a program. This small program can also be written using symbolic addresses for these memory location. SOURCE and DESTN are known as labels. b) Manually using the instruction set. STA DESTN . If SOURCE stands for memory location 2345 H and DESTN stands for memory location 2400. DESTN stands for memory location 2400 H. In the above program any thing after `. addresses and data are expressed as hexadecimal numbers. i. 2400H . These denote the symbolic address. the above program can be written as LDA SOURCE . Programs can be developed more meaningfully in assembly language using mnemonics. This can be done in two ways: a) Through a computer program known as an Assembler. But to a programmer this is practically impossible to work with. But this has to be translated in actual machine code. This cannot be understood by the computer. stand for the address of a memory location. Loads register A with contents of memory location 2345H Store register A at memory location 2400 H. Therefore the machine codes are usually entered into the computer memory in Hexadecimal form. 5. Therefore as an intermediate step this program can be written in machine code in the hexadecimal form. A program written using MNEMONICS.

15 Example of Indirect Register Addressing 30 . Figure 5.14 Example of Direct Addressing.Figure 5.

The expression (P + Q .A . reg D is added to Acc. The result is also to be outputted to port address 02H. result in Acc MOV C. To store the number A5H in register B and its complement in register A. 5. In the example a register M is defined in the memory location 2000 H by loading this address in the register pair HL.4. Any carry generated is neglected.5 DETAILED PROGRAMMING EXAMPLE. 0801H and 0802H. MOV B. The 8-bit data (A5H) is specified within the instruction itself.4 Example of Immediate and Implicit addressing. Problem: Three signed numbers P.15.4.A5H MOV A. 31 .3 Example of Indirect Register addressing. load HL with address 2000H .A . moves content of reg E to reg A ADD D . The assembly language program is given below: MOV E.R) is to be determined and the result is to be put in register B.B CMA . move contents of M to B.M 5. result is moved to C. MVI B. copy B to A . complement A and store it in A itself The first instruction is an example of immediate addressing. Q and R are stored at memory locations 0800H. The assembly program for this is given below. It is not specified separately as an operand. as shown in Figure 5. Move the contents of memory location 2000 H to Register B. 5. to which a 8 LEDs are connected. store A5 in register B.stored in register C. .2000 H . The third instruction is an example of implicit addressing. this defines register M in memory . LXI H. Here CMA meaning `complement the accumulator' implies the register A.

0801H and 0802H. Finally we will go through the program step by step and see what actions take place in the software model of 8085 during program execution. In this example the origin of the program is placed at 0803H. This problem can be in other possible ways also. data of A is copied to B. P. . . HL is loaded with 0802H (address of R). the translation to machine language is done. The result (P + Q . . HL is loaded with 0801H (address of Q). immediately following the data. Again the register pair HL is loaded with 0802H (address of R). The input. data in A is outputted to I/O port 02H. The register pair HL is loaded with 0801H (the address of Q). The register M is added to the accumulator. An algorithm is a procedure or a formula used to solve a problem. . .0801H 0800H M H.A 02H . One of the decisions to be taken is about the location of the program in the memory. Acc is loaded with P from 0800H. The op-code is 21H and it 32 . Register A is also outputted to the I/O port 02H. outputs and the method of solving the problem. The algorithm can be described by stating the inputs. The following method is used to solve the problem. This defines the register M at 0801H.0802H M B.In order to solve this example. . The first instruction starts from 0803H and is three byte long. The accumulator is then loaded with data (P) from 0800H.R) to be stored in register B and also outputted to port address 02H.R) is now in register A. After outputting the system halts. LXI LDA ADD LXI SUB MOV OUT HLT H. The program consists of 8 instructions of varying lengths. This is moved to register B. system is halted. M which contains R is subtracted from Acc. Once the program has been developed. M which contains Q is added to Acc. . Q and R are available in memory locations 0800H. The required output is a single byte integer equal to (P + Q . The register M is now subtracted from the accumulator. we will first develop an algorithm in plain and simple language. The assembly language program for this can now easily be written using the instruction set. We shall then write the program in assembly language using mnemonics and finally code it in machine language using hand assembly.

The HL register pair is loaded with the address specified in the first instruction. This step is done by the monitor of the system. and have been indicated by a '--'. together with the address of the instruction and machine code is given below.. Therefore. The various registers and flags of 8085 could contain any data. The op-codes are found from the instruction set given in the Appendix. The first three locations contain data. The program execution is to start from 0803H. 01H and 08H are placed at memory locations 0803H. The PC now points to the second instruction at 0806H. Assume that data and program have been entered in the memory of the microprocessor system and is lying at address 0800H onwards. the program counter PC is loaded with 0803H the address of the first instruction. 0801H.0801H LDA 0800H ADD M LXI H.17. 0800H is copied to 33 . Address 0800 0801 0802 0803 0806 0809 080A 080D 080E 080F 0811 M/c Code 09 FE 05 210108 3A0008 86 210208 96 47 D302 76 Label Mnemonic Operands P: DB 09 Q: DB 0FEH R: DB 05 START: LXI H. 0804H and 0805H respectively. No flags are affected. The assembly level program. In order to start the program execution. Figure 5. In order to indicate that they contain data. This is shown in Figure 5.A OUT 02H HLT Figure 5.19 show the execution of the second instruction LDA 0800H.16 shows the software model of 8085.18 shows the software model after the execution of the first instruction. The machine code in hexadecimal is therefore 21 01 08. encoded as LSB first and then MSB.e. i.0802H SUB M MOV B. 21H. i.e. The next instruction therefore starts at 0806H. Figure 5. a pseudo-mnemonic DB is put against the address.requires a 16 bit data. The contents of memory location specified in the LDA instruction. Details of how to write an assembly level program will be taken up in the next lecture.

34 .

Figure 5.16. Detailed Example -Step 1.17 Detailed Example .Step 2. Figure 5. 35 .

Figure 5.Figure 5. 36 .18.Step 3. Detailed Example .19.Step 4. Detailed Example .

1. The operation (A . The PC points to the next instruction to be executed. Flags are set according to the rules given in Section 5. The assembly level program consists of a sequence of 37 .22 shows the software model after the execution of the SUB M instruction. AC = 1. The next instruction to be executed is ADD M. The content of register A is copied to I/O port address 02 H. Figure 5. P = 0 and C = 0. The HL register pair is loaded with the 16 bit data of the instruction. The flags are unaffected. Let us recapitulate some of the features. No flags are affected. Figure 5. The software model after the execution of this instruction is shown in Figure 5.e.2. and the result is put in the accumulator..23 depicts the results of the execution of MOV B.0802H. Z = 0.20. which is the current content of HL register pair. The PC points to the next instruction. The addition operation is explained below: 09H FEH Addition = = 0000 1001 1111 1110 ____________ 1 ← 0000 ← 0111 = Carry AC 07H. The status of flags are S = 0.6 ASSEMBLY LANGUAGE PROGRAMS AND ASSEMBLERS In the previous lectures of this module we have already encountered assembly language programs and we are familiar with some of its features. The PC now points to the HLT instruction. The content of A is copied to B. The PC points to the next instruction to be executed. 0801H.A instruction. i.24 shows the execution of the OUT 02H instruction. 5. Figure 5. The C and AC flags are set and the other flags are reset. The register M is now located at 0802. Figure 5.register A.21 shows the execution of the LXI H. The content of this memory location is added to the accumulator. The flags are not affected. The register M is defined in the memory and its address is given by the current content of the HL register pair.M) is carried out and the result 02H is put in A.

Step 6.Step 6.Figure 5.21 Detailed 38 . Example .20 Detailed Example . Figure 5.

Step 7. Detailed Example . 39 . Figure 5.23. Figure 5.22.Figure 5.Step 9. Detailed Example .24. Detailed Example Step 8.

.e.1 The Assembly Language Statement Each instructions in an assembly language program has four fields.e. The assembler directives provide necessary information to the assembler. i.e. 5. the operand and the comment. i. 0345 H. If it is present it is separated from the next field by a colon `:'. An example is shown below: Label START: Mnemonic LX1 Operand(s) H. the label. The string usually contains five or six characters depending on the assembler. the first of which is an alphabet. These are written using mnemonics (symbolic op-codes) or assembler pseudo-operations together with symbolic or numeric data and addresses.0345H instruction. These fields follow each other in the sequence specified. Comment HL loaded with pointer Each of the fields is separated from the other by a special symbol known as a delimiter for instance the comment field starts with a semicolon. i. The label should not contain space or other special characters. labels. This additional information is given to the assembler through assembler directives or pseudo-operations.instructions using symbolic op-codes. namely.6. These fields are discussed below: The label field A label field is the first field in an assembly language instruction. and symbolic or numeric data and addresses. This program cannot be executed directly and has to be translated into machine code by hand (hand assembly) or through a program called the assembler. Some assemblers do 40 .. The labels are a string of alphanumeric characters. It was also observed that some additional information is also required. symbolic memory address that is used to refer to the address of the statement in the program. mnemonics. The assembler directives will be after the format for assembly language instruction is described.. The assembly language program thus is a sequence of assembler directives and instructions. It may contain a label. the mnemonic. Labels are optional. In above example the label start is the symbolic address of the LXI H. such as the address of the origin of the program in the memory and the address of the data in the memory.

The label should not be mnemonic. The assembler will otherwise signal an error. In that case there are no other field on that line.g. The field is separated from the label. But they are essential for understanding and documenting a program. If more than one operand is required. If this is not indicated. The operands are separated from the comment field by a semicolon `. Most assemblers expect a 0 to precede hexadecimal data if it starts with an alphabet. -. 41 . pseudo-instruction or name of a register.'. e. the operands are separated by comma `. Any other entry in the field results in an error. decimal or hexadecimal form. If the entire line is a comment. if present by a colon and from. *. LABEL+1 would evaluate to the value of LABEL plus 1. it assumes the rest of the line is a comment. /. the data is assumed to be decimal.'. OR. NOT. then it must start with a semicolon `. Whenever the assembler encounters a semicolon. The Comment Field The comment field begins with a semicolon. The Operand Field The operand field contains the name of registers. ASCII data may be given if it is surrounded by a apostrophises. The Mnemonic Field This field must always contain a valid 8085 mnemonic or an assembler pseudo operation. the operand field by a space. AND.' or an asterisk *. The manual of the assembler being used should be consulted for details. Comments have no effect on the object code and are ignored by the assembler.permit some limited special characters in a label. It is a good programming practise use comments freely in a program. XOR and MOD. data or labels. These operations are usually of +. `K'. The data may be expressed in binary.D or H immediately following the data. These comments should be brief and to the point and bring out what the program is doing. For example. This is indicated by a B. For instance SUB. Some assemblers permit limited arithmetic and logical operation on the operand data. ORG or PC should not be used as a label.

It is the last instruction in a program.2 and 19 are put in memory locations starting from P. DB 1. These pseudo operation are placed in the mnemonic field of a statement. informs assembler that the next statement . SET. X: Y: Z: P: DB DB DB 12H `D' `H1' . TITLE. For example. ORG EQU.g. location DATA Origin (ORG): This informs the assembler about the starting location of the program. End (END): This signals the end of the program. 12H is put in memory location X ASCII code is put at memory location Y ASCII codes of H and I are put at two memory locations . A label can be equated only once during assembly. DATA: DS 5 . SPC. Define Storage (DS): This is used to reserve space in the program for data. the location of the start of segment of program which follow it is changed to the value indicated. 1. starts from 1000 H. i. K: DW 1234 . END does not lead to any machine code generation. 200H . Other pseudo operations which we shall cover are DW.e.5. e.6. but DB does. . The EQU directive is used to equal a label to another label or value. Define Byte (DB): This is used to define an 8-bit data in the memory. .19 Define Word (DW): This is used to store a 16-bit number in the memory. starting at Z. reserves 5 bytes of memory starting from memory . format. LSB first and then MSB. DS. ORG 1000 H START: LX1 H. Equate (EQU) and Set (SET): These directives are similar but not the same. They may or may not lead to generation of machine code. When used in the middle of a program.2 Assembler Directives The assembler directives also known as assembler pseudo operations. Number 1234 is stored in the memory at K in the proper .2. . If the value of the label has to be changed later in 42 .

It scans the source code twice. The object code is usually in a special object format. It also keeps track of address of the labels. label SCORE has a value of 20 label VALUE has temporary value of 5. The single-pass or the one pass assembler scans the source code only once. Some labels may have been referred in the operand field prior to its definition in the label field (forward referencing).3 Assemblers As mentioned earlier an assembler converts the software written in assembly language into machine language in the hexadecimal form. The assembly language program is called a source program and the machine code is the object code. e.the program SET is used. Most assemblers are two pass assemblers. SCORE: VALUE: EQU 20 SET 5 . Macro assemblers are special types of assemblers. If there are no errors it indicates the machine codes corresponding to each statement. In this pass it determines the address of all labels in the program. the object code is determined using the generated label table. These assemblers cannot handle forward references automatically. and seme method has to be used to handle them. . Apart from this object code. This symbol listing gives the symbol value corrosponding to the symbol name. 5. Discussion on these is beyond the scope of the present discussion. In the first pass it makes a table of labels found in the program. the assembler also generates a listing.g. GLB and EXT for use with linker to link with other programs. This code can be loaded into the microprocessor using loader. S-format or Intel Hex Format. It also gives a label or symbol listing at the end. TITLE and SPC for listing control.6. They permit the programmer to define new op-codes termed as macros. Apart from these there are other assembler directives such as. This contains the source code and the errors encountered during assembly. They may be an often 43 . In the second pass. IF and ENDIF for conditional assembly. SET is used only for special cases in a program.

44 . it is replaced by this group of instructions during the assembly process.repeated group of instructions which occur many times in a program. The other types of assemblers are the cross-assembler and the metaassembler. It is left to the user to define the instruction set used. A meta-assemblers an assembler which can handle many different instruction sets. A cross assembler is an assembler that runs on a computer whose CPU is different than the one for which it assembles the program. A self assembler or a resident assembler on the other hand generates code for the same computer system on which it runs. Whenever the macro name appears. For example. an assembler for generating code for 8085 may be run on a PC.

Sign up to vote on this title
UsefulNot useful