Introduction to VLSI Design

Amit Kumar Mishra ECE Department IIT Guwahati

Tale of two queries!
Y R U here?  Y M I here? 

Landmarks Moore¶s axiom  Some more funda  Free CAD tool  Parting notes  .

Dynamo .Moore¶s Law Gordon Moore: co-founder of Intel  Predicted that the number of transistors per chip would grow exponentially (double every 18 months)  Exponential improvement in technology is a natural trend:  e.Automobile .g. Steam Engines .

Transistors Moore¶s Law Microprocessors 10M 1M 100K 10K 1K 100 10 1 1975 1980 1985 1990 1995 [©Keutzer] 4004 8086 80386 68020 68000 PPC603 Pentium 80486 Pentium Pro PPC601 MIPS R4000 68040 8080 10x/6 years .

DSP.com . FPGA Embedded systems Used in cars. factories Network cards  System-on-chip (SoC) Images: amazon. ROM. Controllers Memory chips RAM. EEPROM Analog Mobile communication. audio/video processing   Programmable PLA.IC Products    Processors CPU.

IC Product Market Shares Source: Electronic Business .

0Q 0.5Q 1.8Q 0.com/ .25Q Pentium® Processor Pentium® Pro & Pentium® II Processors Source: http://www.35Q 0.intel.Example: Intel Processor Sizes Silicon Process Technology Intel386TM DX Processor Intel486TM DX Processor 1.6Q 0.

Heterogeneity on Chip  Greater diversity of on-chip elements Processors Software Memory Analog Heterogeneity More transistors doing different things! [©Keutzer] .

greater design risk.Stronger Market Pressures Decreasing design window  Less tolerance for design revisions  Time-to-market Exponentially more complex. greater variety. and a smaller design window! [©Keutzer] .

FPGA)  System-on-a-Chip  .VLSI Design Styles Full Custom  Application-Specific Integrated Circuit (ASIC)  Programmable Logic (PLD.

Full Custom Design      Each circuit element carefully ³handcrafted´ Huge design effort High Design & NRE Costs / Low Unit Cost High Performance Typically used for high-volume applications .

Unit Cost Medium Performance .ASIC      Constrained design using pre-designed (and sometimes pre-manufactured) components Also called semi-custom design CAD tools greatly reduce design effort Low Design Cost / High NRE Cost / Med.

Programmable Logic (FPGA)     Pre-manufactured components with programmable interconnect CAD tools greatly reduce design effort Low Design Cost / Low NRE Cost / High Unit Cost Lower Performance .

FPGA) Analog   Open issues Keeping design cost low Verifying correctness of design .g.System-on-chip (SOC) Idea: combine several large blocks Predesigned custom cores (e. microcontroller) ³intellectual property´ (IP) ASIC logic for special-purpose hardware Programmable Logic (PLD..

The Inverted Pyramid Electronic Systems > $1 Trillion Semiconductor > $220 B CAD $3 B [©Keutzer] .

Where is the money?  Gaps to be filled: System-semiconductor gap Semiconductor-CAD gap .

A free CAD flow for all who care! Alliance CAD tools  "Architecture des Systèmes intégrés et Micro électronique" department of LIP6  875 000 Transistor design done  Limit is your processor power and your design abilities!  .

Scenario in India??? HUGE outsourcing  Loads of startups (WHY?)  VLSI design is nowhere a single nation job  Fabrication labs (fabs) in USA getting sold out  India getting 4 fabs by next year!  .

Thank You Best of Luck for End-Sems and Internships .

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