9.

7 Let R
2
be the resistance seen looking into the collector of Q
2
.
R
out
= r
o1
+ (1 +g
m1
r
o1
) (r
π1
R
2
)
Note that this expressoin is maximized as R
2
→∞. This gives us
R
out,max
= r
o1
+ (1 +g
m1
r
o1
) r
π1
9.9
R
out

1
I
C1
V
A
V
T
βV
A
V
T
V
A
+βV
T
(Eq. 9.9)
=
1
I
C1
V
A
V
T
βV
T
=
βV
A
I
C1
= βr
o
This resembles Eq. (9.12) because the assumption that
V
A
≫βV
T
can be equivalently expressed as
V
A
I
C
≫β
V
T
I
C
r
o
≫r
π
This is the same assumption used in arriving at Eq. (9.12).
9.12
I
D
= 0.5 mA
R
out
= r
o1
+ (1 +g
m1
r
o1
) r
o2
=
1
λI
D
+

1 +

2
W
L
µ
n
C
ox
I
D
1
λI
D

1
λI
D
≥ 50 kΩ
λ ≤ 0.558 V
−1
9.15 (a)
V
D1
= V
DD
−I
D
R
D
= 1.3 V > V
G1
−V
TH
= V
b1
−V
TH
V
b1
< 1.7 V
(b)
V
b1
= 1.7 V
V
GS1
= V
b1
−V
X
= V
TH
+

2I
D

W
L

1
µ
n
C
ox
= 0.824 V
V
X
= 0.876 V
9.16 (a) Looking down from the source of M
1
, we see an equivalent resistance of
1
gm2
r
o2
. Thus, we have
R
out
= g
m1
r
o1

1
g
m2
r
o2

(b)
R
out
= g
m1
r
o1
r
o2
(c) Putting two transistors in parallel, their transconductances will add and their output resistances
will be in parallel (i.e., we can treat M
1
and M
3
as a single transistor with g
m
= g
m1
+g
m3
and
r
o
= r
o1
r
o3
). This can be seen from the small-signal model.
R
out
= (g
m1
+g
m3
) (r
o1
r
o3
) r
o2
(d) Let’s draw the small-signal model and apply a test source to find R
out
.
+
v
gs1

g
m1
v
gs1
r
o1
+
v
gs2


v
t
+
i
t
g
m2
v
gs2
r
o2
i
t
= g
m2
v
gs2

v
gs1
r
o2
= g
m1
v
gs1
+
v
gs2
+v
gs1
r
o1
v
gs1
= g
m2
r
o2
v
t
−i
t
r
o2
i
t
= g
m1
(g
m2
r
o2
v
t
−i
t
r
o2
) +
v
t
+g
m2
r
o2
v
t
−i
t
r
o2
r
o1
i
t

1 +g
m1
r
o2
+
r
o2
r
o1

= v
t

g
m1
g
m2
r
o2
+
1 +g
m2
r
o2
r
o1

i
t
(g
m1
r
o1
r
o2
) = v
t
(g
m1
g
m2
r
o1
r
o2
)
R
out
=
v
t
i
t
=
1
g
m2
9.17
I
D
= 0.5 mA
R
out
= r
o1
+ (1 +g
m1
r
o1
) r
o2
=
1
λI
D
+

1 +

2

W
L

1
µ
p
C
ox
I
D
1
λI
D

1
λI
D
= 40 kΩ

W
L

1
=

W
L

2
= 8
9.20 (a)
G
m
= g
m1
R
out
=
1
g
m2
r
o1
A
v
= −g
m1

1
g
m2
r
o1

(b)
G
m
= −g
m2
R
out
=
1
g
m2
r
o2
r
o1
A
v
= g
m2

1
g
m2
r
o2
r
o1

(c) Let’s draw the small-signal model to find G
m
.
v
in
r
π1
+
v
π1

R
E
g
m1
v
π1
r
o1
i
out
i
out
= −
v
π1
r
π1
+
v
in
−v
π1
R
E
v
π1
= v
in
+ (i
out
− g
m1
v
π1
) r
o1
v
π1
(1 +g
m1
r
o1
) = v
in
+i
out
r
o1
v
π1
=
v
in
+i
out
r
o1
1 +g
m1
r
o1
i
out
= −
v
in
+i
out
r
o1
r
π1
(1 +g
m1
r
o1
)
+
v
in
R
E

v
in
+i
out
r
o1
R
E
(1 +g
m1
r
o1
)
i
out
¸
1 +
r
o1
r
π1
(1 +g
m1
r
o1
)
+
r
o1
R
E
(1 + g
m1
r
o1
)

= v
in
¸
1
R
E

1
r
π1
(1 +g
m1
r
o1
)

1
R
E
(1 +g
m1
r
o1
)

i
out
r
π1
R
E
(1 +g
m1
r
o1
) +r
o1
R
E
+r
o1
r
π1
r
π1
R
E
(1 +g
m1
r
o1
)
= v
in
r
π1
(1 +g
m1
r
o1
) −R
E
−r
π1
r
π1
R
E
(1 + g
m1
r
o1
)
i
out
[r
π1
R
E
(1 +g
m1
r
o1
) +r
o1
R
E
+r
o1
r
π1
] = v
in
[r
π1
(1 +g
m1
r
o1
) −R
E
−r
π1
]
G
m
=
i
out
v
in
=
r
π1
(1 +g
m1
r
o1
) −R
E
−r
π1
r
π1
R
E
(1 +g
m1
r
o1
) + r
o1
R
E
+r
o1
r
π1

g
m1
1 +g
m1
R
E
(if r
π1
, r
o1
are large)
R
out
= r
o2
[r
o1
+ (1 +g
m1
r
o1
) (r
π1
R
E
)]
A
v
= −
r
π1
R
E
(1 +g
m1
r
o1
) −R
E
−r
π1
r
π1
R
E
(1 +g
m1
r
o1
) +r
o1
R
E
+r
o1
r
π1
{r
o2
[r
o1
+ (1 +g
m1
r
o1
) (r
π1
R
E
)]}
(d)
G
m
= g
m2
R
out
= r
o2
[r
o1
+ (1 +g
m1
r
o1
) (r
π1
R
E
)]
A
v
= −g
m2
{r
o2
[r
o1
+ (1 +g
m1
r
o1
) (r
π1
R
E
)]}
(e) Let’s draw the small-signal model to find G
m
.
+
v
gs1

R
S
v
in
g
m1
v
gs1
r
o1
i
out
Since the gate and drain are both at AC ground, the dependent current source looks like a resistor
with value 1/g
m1
. Thus, we have:
G
m
=
i
out
v
in
= −
1
R
S
+
1
gm1
r
o1
= −
1
R
S
+
ro1
1+gm1ro1
= −
1 +g
m1
r
o1
r
o1
+R
S
+g
m1
r
o1
R
S
≈ −
g
m1
1 +g
m1
R
S
(if r
o1
is large)
R
out
= [r
o2
+ (1 +g
m2
r
o2
) R
E
] [r
o1
+ (1 +g
m1
r
o1
) R
S
]
A
v
=
1 +g
m1
r
o1
r
o1
+R
S
+g
m1
r
o1
R
S
{[r
o2
+ (1 +g
m2
r
o2
) R
E
] [r
o1
+ (1 + g
m1
r
o1
) R
S
]}
(f) We can use the result from part (c) to find G
m
here. If we simply let r
π
→∞ (and obviously we
replace the subscripts as appropriate) in the expression for G
m
from part (c), we’ll get the result
we need here.
G
m
= lim
rπ2→∞
r
π2
R
E
(2 +g
m2
r
o2
) −R
E
−r
π2
r
π2
R
E
(2 +g
m2
r
o2
) +r
o2
R
E
+r
o2
r
π2
=
g
m2
r
o2
r
o2
+R
E
+g
m2
r
o2
R
E

g
m2
1 +g
m2
R
E
(if r
o2
is large)
R
out
= [r
o2
+ (1 +g
m2
r
o2
) R
E
] [r
o1
+ (1 +g
m1
r
o1
) R
S
]
A
v
= −
g
m2
r
o2
r
o2
+R
E
+g
m2
r
o2
R
E
{[r
o2
+ (1 +g
m2
r
o2
) R
E
] [r
o1
+ (1 +g
m1
r
o1
) R
S
]}
(g) Once again, we can use the result from part (c) to find G
m
here (replacing subscripts as appro-
priate).
G
m
=
r
π2
R
E
(1 +g
m2
r
o2
) −R
E
−r
π2
r
π2
R
E
(1 +g
m2
r
o2
) +r
o2
R
E
+r
o2
r
π2

g
m2
1 +g
m2
R
E
(if r
π2
, r
o2
are large)
R
out
= R
C
[r
o2
+ (1 +g
m2
r
o2
) (r
π2
R
E
)]
A
v
= −
r
π2
R
E
(1 +g
m2
r
o2
) −R
E
−r
π2
r
π2
R
E
(1 +g
m2
r
o2
) +r
o2
R
E
+r
o2
r
π2
{R
C
[r
o2
+ (1 +g
m2
r
o2
) (r
π2
R
E
)]}
9.22
A
v
= −g
m1
[r
o2
+ (1 +g
m2
r
o2
) (r
π2
r
o1
)]
I
C1
≈ I
C2
= I
1
V
A1
= V
A2
= V
A
A
v
≈ −
I
1
V
T
¸
V
A
I
1
+

1 +
V
A
V
T

βV
T
I
1

V
A
I
1

= −500
V
A1
= V
A2
= 0.618 V
−1
9.23 (a) Although the output resistance of this stage is the same as that of a cascode, the transconductance
of this stage is lower than that of a cascode stage. A cascode has G
m
= g
m
, where as this stage
has G
m
=
gm2
1+gm2ro1
.
(b)
G
m
=
g
m2
1 +g
m2
r
o1
R
out
= r
o2
+ (1 +g
m2
r
o2
) (r
π2
r
o1
)
A
v
= −G
m
R
out
= −
g
m2
1 +g
m2
r
o1
[r
o2
+ (1 +g
m2
r
o2
) (r
π2
r
o1
)]
9.24
G
m
= −g
m1
R
out
= r
o2
+ (1 +g
m2
r
o2
) (r
π2
r
o1
)
A
v
= g
m1
[r
o2
+ (1 +g
m2
r
o2
) (r
π2
r
o1
)]
9.25 (a)
G
m
= g
m2
R
P
r
π1
1
gm1
+R
P
r
π1
R
out
= r
o1
+ (1 +g
m1
r
o1
) (r
π1
r
o2
R
P
)
A
v
= −g
m2
R
P
r
π1
1
gm1
+R
P
r
π1
[r
o1
+ (1 +g
m1
r
o1
) (r
π1
r
o2
R
P
)]
(b)
G
m
= g
m2
R
out
= r
o1
R
P
+ [1 +g
m1
(r
o1
R
P
)] (r
π1
r
o2
)
A
v
= −g
m2
{r
o1
R
P
+ [1 +g
m1
(r
o1
R
P
)] (r
π1
r
o2
)}
(c)
G
m
=
g
m2
1 +g
m2
R
E
R
out
= r
o1
+ (1 +g
m1
r
o1
) [r
π1
(r
o2
+ (1 +g
m2
r
o2
) (r
π2
R
E
))]
A
v
= −
g
m2
1 + g
m2
R
E
{r
o1
+ (1 +g
m1
r
o1
) [r
π1
(r
o2
+ (1 +g
m2
r
o2
) (r
π2
R
E
))]}
(d)
G
m
= g
m2
R
out
= r
o1
+ (1 +g
m1
r
o1
) (r
π1
r
o2
r
o3
)
A
v
= −g
m2
[r
o1
+ (1 +g
m1
r
o1
) (r
π1
r
o2
r
o3
)]
9.26
A
v
= −g
m1
{[r
o2
+ (1 +g
m2
r
o2
) (r
π2
r
o1
)] [r
o3
+ (1 +g
m3
r
o3
) (r
π3
r
o4
)]}
= −
I
C
V
T
¸
V
A,N
I
C
+

1 +
V
A,N
V
T

β
N
V
T
I
C

V
A,N
I
C

¸
V
A,P
I
C
+

1 +
V
A,P
V
T

β
P
V
T
I
C

V
A,P
I
C

= −
I
C
V
T

VA,N
IC
+

1 +
VA,N
VT

βNVT
IC

VA,N
IC

VA,P
IC
+

1 +
VA,P
VT

βPVT
IC

VA,P
IC

VA,N
IC
+

1 +
VA,N
VT

βNVT
IC

VA,N
IC

+

VA,P
IC
+

1 +
VA,P
VT

βPVT
IC

VA,P
IC

= −
I
C
V
T
¸
VA,N
IC
+

1 +
VA,N
VT

βNVT VA,N
I
2
C

β
N
V
T
I
C
+
V
A,N
I
C

¸¸
VA,P
IC
+

1 +
VA,P
VT

βP VT VA,P
I
2
C

β
P
V
T
I
C
+
V
A,P
I
C

¸
¸
VA,N
IC
+

1 +
VA,N
VT

βNVT VA,N
I
2
C

β
N
V
T
I
C
+
V
A,N
I
C

¸
+
¸
VA,P
IC
+

1 +
VA,P
VT

βPVT VA,P
I
2
C

β
P
V
T
I
C
+
V
A,P
I
C

¸
= −
I
C
V
T
1
I
2
C

V
A,N
+

1 +
VA,N
VT

βNVT VA,N
βNVT +VA,N

V
A,P
+

1 +
VA,P
VT

βPVT VA,P
βPVT +VA,P

1
IC

V
A,N
+

1 +
VA,N
VT

βNVT VA,N
βNVT +VA,N

+
1
IC

V
A,P
+

1 +
VA,P
VT

βPVT VA,P
βPVT +VA,P

= −
1
V
T

V
A,N
+

1 +
VA,N
VT

βNVT VA,N
βNVT +VA,N

V
A,P
+

1 +
VA,P
VT

βPVT VA,P
βPVT +VA,P

V
A,N
+

1 +
VA,N
VT

βNVT VA,N
βNVT +VA,N

+

V
A,P
+

1 +
VA,P
VT

βP VT VA,P
βPVT +VA,P

The result does not depend on the bias current.
9.28
A
v
≈ −g
m1
g
m2
r
o1
r
o2
(Eq. 9.69)
= −

2

W
L

1
µ
n
C
ox
I
D

2

W
L

2
µ
n
C
ox
I
D

1
λI
D

2
= −2µ
n
C
ox
I
D

W
L

1

W
L

2

1
λI
D

2
= −2µ
n
C
ox
1
I
D
1
λ
2

W
L

1

W
L

2
|
A
v
|
I
D
9.30 From Problem 28, we have
A
v
= −2µ
n
C
ox
1
I
D
1
λ
2

W
L

1

W
L

2
If we increase the transistor widths by a factor of N, we will get a new voltage gain A

v
:
A

v
= −2µ
n
C
ox
1
I
D
1
λ
2

N
2

W
L

1

W
L

2
= −2Nµ
n
C
ox
1
I
D
1
λ
2

W
L

1

W
L

2
= NA
v
Thus, the gain increases by a factor of N.
9.31 From Problem 28, we have
A
v
= −2µ
n
C
ox
1
I
D
1
λ
2

W
L

1

W
L

2
If we decrease the transistor widths by a factor of N, we will get a new voltage gain A

v
:
A

v
= −2µ
n
C
ox
1
I
D
1
λ
2

1
N
2

W
L

1

W
L

2
= −2
1
N
µ
n
C
ox
1
I
D
1
λ
2

W
L

1

W
L

2
=
1
N
A
v
Thus, the gain decreases by a factor of N.
9.32
G
m
= −g
m2
R
out
= r
o2
[r
o3
+ (1 +g
m3
r
o3
) r
o4
]
A
v
= g
m2
{r
o2
[r
o3
+ (1 +g
m3
r
o3
) r
o4
]}
9.33
A
v
= −g
m1
{[r
o2
+ (1 +g
m2
r
o3
) r
o1
] [r
o3
+ (1 +g
m3
r
o3
) r
o4
]}
= −500
g
m1
= g
m2
=

2

W
L

µ
n
C
ox
I
D
g
m3
= g
m4
=

2

W
L

µ
p
C
ox
I
D
r
o1
= r
o1
=
1
λ
n
I
D
r
o3
= r
o4
=
1
λ
p
I
D
I
D
= 1.15 mA
9.34 (a)
G
m
= g
m1
R
out
= [(r
o2
R
P
) + (1 +g
m2
(r
o2
R
P
)) r
o1
] [r
o3
+ (1 +g
m3
r
o3
) r
o4
]
A
v
= −g
m1
{[(r
o2
R
P
) + (1 +g
m2
(r
o2
R
P
)) r
o1
] [r
o3
+ (1 +g
m3
r
o3
) r
o4
]}
(b)
G
m
= g
m1
r
o1
R
P
1
gm2
+r
o1
R
P
R
out
= [r
o2
+ (1 +g
m2
r
o2
) (r
o1
R
P
)] [r
o3
+ (1 +g
m3
r
o3
) r
o4
]
A
v
= −g
m1
r
o1
R
P
1
gm2
+r
o1
R
P
{[r
o2
+ (1 +g
m2
r
o2
) (r
o1
R
P
)] [r
o3
+ (1 +g
m3
r
o3
) r
o4
]}
(c)
G
m
= g
m5
R
out
= [r
o2
+ (1 +g
m2
r
o2
) (r
o1
r
o5
)] [r
o3
+ (1 +g
m3
r
o3
) r
o4
]
A
v
= −g
m5
{[r
o2
+ (1 +g
m2
r
o2
) (r
o1
r
o5
)] [r
o3
+ (1 +g
m3
r
o3
) r
o4
]}
(d)
G
m
= g
m5
R
out
= [r
o2
+ (1 +g
m2
r
o2
) r
o1
] [r
o3
+ (1 +g
m3
r
o3
) (r
o4
r
o5
)]
A
v
= −g
m5
{[r
o2
+ (1 +g
m2
r
o2
) r
o1
] [r
o3
+ (1 +g
m3
r
o3
) (r
o4
r
o5
)]}
9.36
I
1
=
1
2
µ
n
C
ox
W
L

R
2
R
1
+R
2
V
DD
−V
TH

2
(Eq. 9.85)
∂I
1
∂V
DD
=
W
L
µ
n
C
ox

R
2
R
1
+R
2
V
DD
−V
TH

R
2
R
1
+R
2
=
R
2
R
1
+R
2
g
m
Intuitively, we know that g
m
is the derivative of I
1
with respect to V
GS
, or g
m
=
∂I1
∂VGS
. Since V
GS
is
linearly dependent on V
DD
by the relationship established by the voltage divider (meaning
∂VGS
∂VDD
is a
constant), we’d expect
∂I1
∂VDD
to also be proportional to g
m
, since
∂I1
∂VDD
=
∂VGS
∂VDD
·
∂I1
∂VGS
=
∂VGS
∂VDD
g
m
.
9.37
I
1
=
1
2
µ
n
C
ox
W
L

R
2
R
1
+R
2
V
DD
−V
TH

2
(Eq. 9.85)
∂I
1
∂V
TH
= −µ
n
C
ox
W
L

R
2
R
1
+R
2
V
DD
−V
TH

The sensitivity of I
1
to V
TH
becomes a more serious issue at low supply voltages because as V
DD
becomes smaller with respect to V
TH
, V
TH
has more control over the sensitivity. When V
DD
is large
enough, it dominates the last term of the expression, reducing the control of V
TH
over the sensitivity.
9.38 As long as V
REF
> 0, the circuit operates in negative feedback, so that V
+
= V

= 0 V.
I
C1
= I
S1
e
−V1/VT
=
V
REF
R
1
V
1
= −V
T
ln

V
REF
R
1
I
S1

= V
BE2
If V
REF
> R
1
I
S1
, then we have V
BE2
< 0, and I
X
= 0. If V
REF
< R
1
I
S1
, then we have:
I
X
= I
S2
e
−VT ln

V
REF
R
1
I
S1

/VT
= I
S2
e
−ln

V
REF
R
1
I
S1

= I
S2
R
1
I
S1
V
REF
Thus, if V
REF
> R
1
I
S1
(which will typically be true, since I
S1
is typically very small), then we get no
output, i.e., I
X
= 0. When V
REF
< R
1
I
S1
, we get an inverse relationship between I
X
and V
REF
.
9.39 As long as V
REF
> 0, the circuit operates in negative feedback, so that V
+
= V

= 0 V.
I
C1
= I
S1
e
−V1/VT
=
V
REF
R
1
V
1
= −V
T
ln

V
REF
R
1
I
S1

= −V
BE2
If V
REF
< R
1
I
S1
, then we have V
BE2
< 0, and I
X
= 0. If V
REF
> R
1
I
S1
, then we have:
I
X
= I
S2
e
VT ln

V
REF
R
1
I
S1

/VT
= I
S2
V
REF
R
1
I
S1
=
I
S2
I
S1
V
REF
R
1
=
I
S2
I
S1
I
C1
Thus, if V
REF
< R
1
I
S1
, then we get no output, i.e., I
X
= 0. When V
REF
> R
1
I
S1
(which will typically
be true, since I
S1
is typically very small), we get a current mirror relationship between Q
1
and Q
2
(with I
X
copying I
C1
), where the reference current for Q
1
is
VREF
R1
(ensured by the op-amp).
9.46 (a)
I
copy
= 5I
C,REF
I
REF
= I
C,REF
+I
B,REF
+I
B1
= I
C,REF
+
I
C,REF
β
+
I
copy
β
= I
C,REF
+
I
C,REF
β
+
5I
C,REF
β
= I
C,REF

1 +
1
β
+
5
β

=
I
copy
5

6 + β
β

I
copy
=

β
6 +β

5I
REF
(b)
I
copy
=
I
C,REF
5
I
REF
= I
C,REF
+I
B,REF
+I
B1
= I
C,REF
+
I
C,REF
β
+
I
copy
β
= I
C,REF
+
I
C,REF
β
+
I
C,REF

= I
C,REF

1 +
1
β
+
1

= 5I
copy

6 + 5β

I
copy
=


6 + 5β

I
REF
5
(c)
I
copy
=
3
2
I
C,REF
I
2
=
5
2
I
C,REF
I
REF
= I
C,REF
+ I
B,REF
+I
B1
+I
B2
= I
C,REF
+
I
C,REF
β
+
I
copy
β
+
I
2
β
= I
C,REF
+
I
C,REF
β
+
3I
C,REF

+
5I
C,REF

= I
C,REF

1 +
1
β
+
3

+
5

=
2
3
I
copy

10 + 2β

I
copy
=


10 + 2β

3
2
I
REF
9.49
V
GS,REF
= V
TH
+

2I
REF
µ
n
C
ox
W
L
V
GS1
= V
GS,REF
−I
1
R
P
= V
TH
+

2I
REF
µ
n
C
ox
W
L
− I
1
R
P
= V
TH
+

2I
REF
µ
n
C
ox
W
L

I
REF
2
R
P
I
1
=
1
2
µ
n
C
ox
W
L

2I
REF
µ
n
C
ox
W
L

I
REF
2
R
P

2
=
I
REF
2

2I
REF
µ
n
C
ox
W
L

I
REF
2
R
P
=

I
REF
µ
n
C
ox
W
L
I
REF
2
R
P
=

2I
REF
µ
n
C
ox
W
L

I
REF
µ
n
C
ox
W
L
=


2 −1

I
REF
µ
n
C
ox
W
L
R
P
=
2

2 −1

I
REF
µ
n
C
ox
W
L
Given this choice of R
P
, I
1
does not change if the threshold voltages of the transistors change by the
same amount ∆V . Looking at the expression for I
1
in the derivation above, we can see that it has no
dependence on V
TH
(note that R
P
does not depend on V
TH
either).
9.54
I
C1
= 1 mA
I
E1
R
E
=
1 +β
n
β
n
I
C1
R
E
= 0.5 V
R
E
== 0.5 V
R
E
= 495.05 Ω
R
out,a
= r
o1
+ (1 +g
m1
r
o1
) (r
π1
R
E
)
= 85.49 kΩ
R
out,b
= r
o1
+ (1 +g
m1
r
o1
) (r
π1
r
o2
)
= 334.53 kΩ
The output impedance of the circuit in Fig. 9.72(b) is significantly larger than the output impedance
of the circuit in Fig. 9.72(a) (by a factor of about 4).
9.56 (a)
R
out
= r
o1
+ (1 +g
m1
r
o1
) r
o2
= 200 kΩ
r
o1
= r
o2
=
1
λI
D
g
m1
= g
m2
=

2
W
L
µ
n
C
ox
I
D

W
L

1
=

W
L

2
= 1.6
(b)
V
b2
= V
GS2
= V
TH
+

2I
D
W
L
µ
n
C
ox
= 2.9 V
9.57 (a) Assume I
C1
≈ I
C2
, since β ≫1.
A
v
= −g
m1
[r
o2
+ (1 +g
m2
r
o2
) (r
π2
r
o1
)]
g
m1
= g
m2
=
I
1
V
T
r
o1
= r
o2
=
V
A
I
1
r
π1
= r
π2
= β
V
T
I
1
A
v
= −
I
1
V
T
¸
V
A
I
1
+

1 +
V
A
V
T

β
VT
I1
VA
I1
β
VT
I1
+
VA
I1
¸
= −
1
V
T
¸
V
A
+

1 +
V
A
V
T

βV
T
V
A
βV
T
+V
A

= −500
V
A
= 0.618 V
(b)
V
in
= V
BE1
= V
T
ln

I
1
I
S1

= 714 mV
(c)
V
b1
= V
BE2
+V
CE1
= V
BE2
+ 500 mV
= V
T
ln

I
1
I
S2

+ 500 mV
= 1.214 V
9.58 Assume all of the collector currents are the same, since β ≫1.
P = I
C
V
CC
= 2 mW
I
C
= 0.8 mA
V
in
= V
T
ln

I
C
I
S

= 726 mV
V
b1
= V
BE2
+V
CE1
= V
T
ln

I
C
I
S

+V
BE1
−V
BC1
= 1.252 V
V
b3
= V
CC
−V
T
ln

I
C
I
S

= 1.774 V
V
b2
= V
CC
−V
EC4
−V
EB3
= V
CC
−(V
EB4
−V
CB4
) −V
T
ln

I
C
I
S

= 1.248 V
A
v
= −g
m1
{[r
o2
+ (1 +g
m2
r
o2
) (r
π2
r
o1
)] [r
o3
+ (1 +g
m3
r
o3
) (r
π3
r
o4
)]}
= 4887
9.62
R
out
= R
C
= 500 Ω
A
v
= g
m2
R
C
=
I
C
R
C
V
T
= 20
I
C
= 1.04 mA
P = (I
C
+I
REF
) V
CC
= 3 mW
I
REF
= 0.16 mA
I
C
=
A
E1
A
E,REF
I
REF
A
E1
A
E,REF
= 6.5
A
E,REF
= A
E
A
E1
= 6.5A
E
9.63
I
copy
= nI
C,REF
I
REF
= I
C,REF
+I
B,REF
+I
B1
= I
C,REF
+
I
C,REF
β
+
I
copy
β
= I
C,REF
+
I
C,REF
β
+
nI
C,REF
β
= I
C,REF

1 +
1
β
+
n
β

=
I
copy
n

n + 1 +β
β

I
copy
=

β
n + 1 +β

nI
REF
Since nI
REF
is the nominal value of I
copy
, the error term,
β
n+1+β
, must be between 0.99 and 1.01 so
that the actual value of I
copy
is within 1 % of the nominal value. Since the upper constraint (that the
error term must be less than 1.01) results in a negative value of n (meaning that we can only get less
than the nominal current if we include the error term), we only care about the lower error bound.
β
n + 1 +β
≥ 0.99
n ≤ 0.0101
I
REF
≥ 50 mA
We can see that in order to decrease the error term, we must use a smaller value for n (in the ideal
case, we have n approaching zero and the error term approaching
β
1+β
). However, the smaller value of
n we use, the larger value we must use for I
REF
, meaning the more power we must consume. Thus,
we have a direct trade-off between accuracy and power consumption.
9.64
I
C,M
=
A
E,M
A
E,REF1
I
C,REF1
I
REF1
= I
C,REF1
+I
B,REF1
+I
B,M
= I
C,REF1
+
I
C,REF1
β
n
+
I
C,M
β
n
= I
C,REF1
+
I
C,REF1
β
n
+
A
E,M
I
C,REF1
A
E,REF1
β
n
= I
C,REF1

1 +
1
β
n
+
A
E,M
A
E,REF1
β
n

=
A
E,REF1
A
E,M
I
C,M

A
E,REF1
β
n
+A
E,REF1
+A
E,M
A
E,REF1
β
n

I
C,M
=

A
E,REF1
β
n
A
E,REF1
β
n
+A
E,REF1
+A
E,M

A
E,M
A
E,REF1
I
REF
Using a similar derivation to find I
C2
, we have:
I
C1
= I
C2
=

A
E,REF2
β
p
A
E,REF2
β
p
+A
E,REF2
+A
E2

A
E2
A
E,REF2
I
C,M
=

A
E,REF1
β
p
A
E,REF1
β
p
+A
E,REF1
+A
E,M

A
E,REF2
β
p
A
E,REF2
β
p
+A
E,REF2
+A
E2

A
E,M
A
E,REF1
·
A
E2
A
E,REF2
I
REF
We want the error term to be between 0.90 and 1.10 so that I
C2
is within 10 % of its nominal value.
Since the error term cannot exceed 1 (since we only lose current through the base), we only have to
worry about the lower bound.

A
E,REF1
β
n
A
E,REF1
β
n
+A
E,REF1
+ A
E,M

A
E,REF2
β
p
A
E,REF2
β
p
+A
E,REF2
+A
E2

≥ 0.90
Let’s let the reference transistors Q
REF1
and Q
REF2
have unit size A
E
. Then we have:

β
n
β
n
+ 1 +
AE,M
AE

β
p
β
p
+ 1 +
AE2
AE

> 0.90
We can pick any A
E,M
and A
E2
such that this constraint is satisfied. One valid solution is A
E,M
= A
E
,
A
E2
= 3.466A
E
, and I
REF
= 0.2885 mA. This gives a nominal value for I
C2
of 1 mA with an error
of 10 %. This solution is not unique (for example, another solution would be A
E,M
= A
E2
= A
E
and
I
REF
= 1 mA, which gives a nominal current of 1 mA and an error of 5.73 %).
9.68
A
v
= g
m1
r
o3
= g
m1
1
λ
p
I
D1
= 20
R
in
=
1
g
m1
r
o2
=
r
o2
1 +g
m1
r
o2
=
1
λnID1
1 +g
m1
1
λnID1
= 50 Ω
g
m1
= 19.5 mS
I
D1
= 4.88 mA
g
m1
=


n
C
ox

W
L

1
I
D1

W
L

1
= 390
We need to size the rest of the transistors to ensure they provide the correct bias current to the amplifier
and to ensure they are all in saturation. V
G3
will be important in determining how we should bias
V
G5
, since in order for M
5
to be in saturation, we require V
G3
> V
G5
−V
THn
, and V
G3
is fixed by the
previously calculated value of I
D1
.
V
G3
= V
DD
−V
SG3
= V
DD

|V
THp
| +

2I
D1
µ
p
C
ox

W
L

3

= 0.363 V
Let’s let I
REF
= I
D5
= 1 mA (which ensures we meet our power constraint, since P = (I
REF
+I
D5
+I
D1
) V
DD
=
12.4 mW) and V
GS,REF
= V
GS5
= 0.5 V (which ensures M
5
operates in saturation). Then we have
I
REF
=
1
2
µ
n
C
ox

W
L

REF
(V
GS,REF
− V
TH
)
2

W
L

REF
=

W
L

5
=
360
0.18
(W/L)
3
(W/L)
4
=
I
D3
I
D4

W
L

4
=
8.2
0.18
(W/L)
2
(W/L)
REF
=
I
D2
I
REF

W
L

2
=
1756
0.18

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