This action might not be possible to undo. Are you sure you want to continue?

BooksAudiobooksComicsSheet Music### Categories

### Categories

### Categories

### Publishers

Scribd Selects Books

Hand-picked favorites from

our editors

our editors

Scribd Selects Audiobooks

Hand-picked favorites from

our editors

our editors

Scribd Selects Comics

Hand-picked favorites from

our editors

our editors

Scribd Selects Sheet Music

Hand-picked favorites from

our editors

our editors

Top Books

What's trending, bestsellers,

award-winners & more

award-winners & more

Top Audiobooks

What's trending, bestsellers,

award-winners & more

award-winners & more

Top Comics

What's trending, bestsellers,

award-winners & more

award-winners & more

Top Sheet Music

What's trending, bestsellers,

award-winners & more

award-winners & more

P. 1

Sistem+Digital+A|Views: 57|Likes: 0

Published by mengkaan

See more

See less

https://www.scribd.com/doc/48096137/Sistem-Digital-A

02/03/2011

text

original

Kuliah 5: Desain Rangkaian Kombinasional

Teknik Komputer Universitas Gunadarma

1

**Topik 5 ± Desain Rangkaian Kombinasional
**

Task:

Given a description of problem (logical statement), find the corresponding digital circuits that produce the output (answer) given a set of inputs (condition).

ContohContoh-2:

Parking lot controller Elevator controller Prime number indicator Adder, subtractor, «

11.13) Row 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 N3 N2 N1 N0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 1 1 0 1 0 0 0 1 0 1 0 1 1 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 1 0 0 0 1 1 1 1 0 0 1 1 0 1 1 1 1 0 1 1 1 1 F 0 1 1 1 0 1 0 1 0 0 0 1 0 1 0 0 .2. BruteBrute-force design methodology: Truth table p canonical sum p SoP or sum of minterms p AND-OR / NAND-NAND ANDNAND- Example: prime number detector F = 72222(1. find the corresponding Boolean expression and digital circuit.7.BruteBrute-force approach Design: given a description or truth table.3.5.

Minterm list -> canonical sum .

Algebraic simplification Recall (T8) X · Y + X · Y¶ = X Simplify equation to reduce number of gates & gate inputs .

Resulting circuit .

T13. ABEL.g. Verilog. T13¶) KarnaughKarnaugh-map (K-map) (K Graphical representation of the truth table Offers visualization of (T10. T10¶. VHDL. T10¶) Works for functions with less than 6 variables E. « Real world: use programs to minimize logic circuits . especially (T10..Combinational circuit design/minimization Objective: Minimizing # logic gates Minimizing # inputs to the logic gates Note different logic gates may have different # transistors General idea: simplify the Boolean expression using the theorems.

KarnaughKarnaugh-map usage Plot 1s corresponding to minterms of function. # of 1s in set must be power of 2 OK to cross edges Variable is 1 p include variable Variable is 0 p include complement of variable Variable is both 0 and 1 p variable not included Read off product terms. Circle largest possible rectangular sets of 1s. one per circled set. Circled sets and corresponding product terms are called `prime implicants¶ Minimum number of gates and gate inputs .

5.7) Rules of thumb: Group (prime implicant) as large (many 1s) as possible As few groups as possible Overlaps are OK .2.3 variable example: F = 7(1.

4 variable K-map example KNote how it maps to the rows of the truth table .

PrimePrime-number detector revisited .

. we missed one simplificationsimplification.Compare with the previous circuit When we solved algebraically.the circuit below has three less gate inputs.

Design example: alarm controller Problem statement: The ALARM output is 1 if PANIC is 1. DOOR. GARAGE are all 1 This can be put in logic expressions as follows: ALARM = PANIC + ENABLE · SECURE¶ SECURE = WINDOW · DOOR · GARAGE ALARM = PANIC + ENABLE · (WINDOW · DOOR · GARAGE)¶ Multiply out and use (T13). we get the SoP form ALARM = PANIC + ENABLE · WINDOW¶ + ENABLE · DOOR¶+ ENABLE · GARAGE¶ . or if ENABLE is 1 and the house is not secure. The house is secure if WINDOW.

K-map with don¶t-cares don¶tIn some cases. Such combinations are called don¶t-cares and the output don¶tis represented in the truth table and K-maps as `d¶. Do not circle any set that only contains d¶s. the output of a combinational circuit doesn¶t matter for certain input combinations. . KWhen using K-maps to minimize such functions: K Allow d¶s to be included when grouping sets of 1¶s to make the sets as large as possible.

N0 (1.11.12.14.3.15) N3 N3 N2 From K-map: Prime Implicants: N3¶· N0 N2¶· N1 N1 N0 N3¶· N0 00 01 4 11 12 8 10 N2 · N0 N2 · N0 00 0 d 1 5 13 Distinguished 1-cells: Cell 1 covered by N3¶· N0 Cell 2 covered by N2¶· N1 Here not all prime implicants are essential prime implicants that must be included minimum SOP expression: F = N3¶ · N0 + N2¶ · N1 01 11 N1 1 7 1 15 d d 14 9 N0 3 1 1 6 1 11 d 10 2 10 d N2 d N2¶· N1 .7) + d(10.N1.5.N2.2.N2.N1.13.Example with don¶t-cares don¶t Prime number detection for BCD numbers (takes value between 0-9) minterms 10-15 are treated as don t-cares: F(N3.N0) = 7 N3.

5-variable K-maps KThe K-map for a 5-variable logic function is organized K5as two 4-variable K-maps: 4K Can be visualised as being one 4-variable map on top of 4another 4-variable map 4W WX YZ WX W 00 00 01 3 7 6 0 1 4 5 01 11 1 13 15 14 8 10 YZ 00 00 16 17 01 0 1 3 11 8 9 31 30 10 4 5 7 6 Z 9 11 10 Z Y 01 19 Y 11 10 X 11 18 10 X V=0 V=1 .

9.6.13.31) W WX YZ WX W YZ 00 00 01 3 7 6 0 1 4 5 01 11 1 8 10 00 00 16 17 01 0 1 3 11 8 9 31 30 10 4 5 7 6 1 1 1 1 X 13 15 14 1 1 9 1 Z 01 19 Y 1 1 1 Z 11 10 Y 11 10 1 11 18 1 10 X V=0 V=1 .Z) = 7 V.W.5-variable K-map example KF(V.11.25.29.Y.X.X.W.7.Y.5.27.Z(4.15.

KW WX YZ 0 WX W 00 00 1 4 5 7 6 01 11 12 8 10 YZ 00 16 01 20 21 23 22 11 28 29 31 30 10 24 25 27 26 1 1 1 1 X 13 15 14 00 01 3 Y 1 9 1 Z 17 01 19 Y 1 1 1 Z 11 2 1 11 10 1 11 18 1 10 10 X V¶ · W¶· X V=0 W·Z V=1 Minimum SOP: F = V · W · X + W · Z .5-variable K-map example ± cont.

find a minimal PoS expression for KF(X.7) Truth Table Row X Y Z 0 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 F 0 1 1 0 0 1 1 0 XY Z 0 X 00 2 01 6 11 4 10 0 1 1 0 3 0 0 7 0 5 Z Y .Y.Z (0.3.Z) = 4 X.K-map product-of-sum minimization product-ofUsing K-map.Y.4.

X XY Z 0 (Y + Z) 10 00 2 01 6 11 4 Truth Table Row X Y Z 0 0 0 0 1 0 0 1 2 0 1 0 3 0 1 1 4 1 0 0 5 1 0 1 6 1 1 0 7 1 1 1 F 0 1 1 0 0 1 1 0 0 1 0 3 7 5 0 0 Y (Y¶ + Z¶) 1 0 Z Minimum PoS: F = (Y + Z) · (Y + Z ) .K-map PoS minimization ± cont.

8.Z) = 4 W.X.K-map PoS minimization ± another example Using K-map. find a minimal POS expression for KF(W.10.Z (1.13.X.Y.15) W WX YZ 0 00 4 01 11 12 8 10 00 01 11 Y 1 5 13 0 9 0 0 7 15 0 Z 11 3 0 2 6 14 0 10 10 0 X 0 .3.12.14.Y.

K-map PoS minimization ± another example W WX YZ 0 00 4 01 11 12 8 10 00 01 11 Y 1 5 13 0 9 0 (W¶ + Z) (W + X + Z¶) 0 7 15 0 Z 11 3 0 2 6 14 0 10 10 0 0 (W¶ + X¶) X Minimum POS: F = (W + X + Z ) · (W + Z) · (W + X ) .

. Steady-state Output SteadyTiming Diagram X X 1 p 0 1 0 1 0 propagation delay Time X X Transient output Steady-state output Transient output: the temporary output due to the gate propagation delay(s) Gate propagation delay: the time it takes to pull up (or down) the output signals due to the change at the input ± depends on the transistor level implementation.Combinational Circuit: Transient vs.

1 0 0 1 0 1 0 1 0 1 Static-0 Hazard Static-1 Hazard Dynamic Hazard Example Static hazards: StaticStatic-0 hazard: The output should be 0 but goes momentary to 1 as a result of an input change ± possible in AND-OR circuits ANDStaticStatic-1 hazard: The output should be 1 but goes momentary to 0 as a result of an input change ± possible in OR-AND circuits OR- Dynamic hazards: The output changes more than once as a result of a single input change (impossible in 2-level circuits). 2- .Hazards in combinational circuits Output glitch: a momentary (transient) fluctuation in output signal due to changes in input signal.

Example: static-1 hazard staticA static-1 hazard exists in the following AND-OR circuit when X=1. Y=1 staticANDand Z changes from 1 to 0 (assume all gates have propagation delay ( Circuit X Z 1 p 0 1 xtra propagation delay between Z and Z X·Z Z 0 p 1 1 p 0 p 1 Timing Diagram Z F 1 0 1 0 1 0 1 0 ( ( 1 p 0 Z Y·Z Y 1 Y·Z X XY K-map Z 00 0 01 2 3 11 6 10 4 5 X·Z X·Z Z Y·Z F 0 1 1 1 Y 7 1 1 1 1 0 ( Steady-state output Time .

For the previous example the static-1 hazard is eliminated by staticincluding the additional product term X · Y New F = X · Z + Y · Z + X · Y X X·Y Z 0 X X·Z Z X·Y F 00 0 1 3 01 2 11 6 10 4 5 1 1 Y 7 1 X·Z Z Z 1 Y·Z 1 X·Y Y Y·Z . additional product terms (prime staticimplicants) are needed to cover such cells thus covering the transition of the variable causing the hazard. To eliminate static-1 hazards.Eliminate static-1 hazard using K-map staticKStaticStatic-1 hazards are found using k-maps by finding adjacent 1 cells kthat are covered by different product terms.

The procedure to find and eliminate static-0 hazards using KstaticKmaps is done in a dual way to finding static-1 hazards. To eliminate static-0 hazards. additional sum terms (prime staticimplicates) are needed to cover such cells thus covering the transition of the variable causing the hazard. staticStaticStatic-0 hazards are found using k-maps by finding adjacent 0 kcells that are covered by different sum terms.Eliminate static-0 hazard using K-map staticKA static-0 hazard occurs in OR-AND circuits when an input staticORvariable and its complement are connected to two different OR gates. .

50.48.71.19 (e). 4. 4.65 4. 4.68.20 (e).45 4. 4.13 (f). but think about them!!) 4.Homework #2 Turn in: (show your steps) 4. 4.14 (f) 4.52.72 (f). 4. 4. 4.85 .21 (e) 4.46 for hints) 4.73 (f) Self exercise: (you do not need to turn in these.22 (d) 4. 4. 4.55 (a) (b) (c) 4.84.47 (refer to 4.

16818387-TUGAS-ARKOM

Ari Fungsi Terbilang Excel

Ari Fungsi Terbilang Excel

10 Kualitas Pribadi yang Disukai

- Read and print without ads
- Download to keep your version
- Edit, email or read offline

Are you sure?

This action might not be possible to undo. Are you sure you want to continue?

CANCEL

OK

You've been reading!

NO, THANKS

OK

scribd

/*********** DO NOT ALTER ANYTHING BELOW THIS LINE ! ************/ var s_code=s.t();if(s_code)document.write(s_code)//-->