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Find out moreTOPIC - USE OF MATRICS AND DETERMINANT IN ELECTRONIC CIRCUIT

SUBMITTED TO : VINAY SIR

SUBMITTED BY : SUNIL KUMAR ROLL. NO. R216A01 SECTION : 216

Tech. 2. Department of mathmetics. VINAY KUMAR sir. for her help and co-ordination in completing this term paper.(ME) would like to thank Lovely Professional university for introducing such a concept of term paper with presentation.NO. which are selected from among rows and columns of the coefficient matrix. A matrix reordering method for reordering elements of a coefficient matrix whose structure corresponds to coefficients of linear simultaneous equations whose solutions are to be produced by parallel processing of processors of a computer inaccordance with Gaussian elimination. I would also like to thank my faculty Mr. said matrix reordering method comprising the steps of: based on a number of non-zero elements included in the coefficient matrix and an accumulative processing time of the Gaussian elimination of the coefficient matrix. I would also like to thank my friends and classmates for encouraging me and helping me in every way for the completion of this term paper. determining a first combination of row and column and a second combination of row and column.: 10806948 ACKNOWLEDGEMENT I . 1. A matrix reordering method for reordering elements of a coefficient matrix whose structure corresponds tocoefficients Of linear simultaneous equations whose solutions areto be produced by parallel processing of processors of a computer in accordance with Gaussian elimination.TECH(ME) REGD. a student of B.PROG: B. said matrix . INTRODUCTION 1.SUNIL KUMAR. and performing replacement of elements between the first combination of row and column and the second combination of row and column within the coefficient matrix using the coefficient matrix for solving the linear simultaneous equations.

reordering method comprising the steps of: based on a number of non-zero elements included in the coefficient matrix and lengths of critical paths created by the Gaussian elimination of the coefficient matrix. and performing replacement of elements between the first combination of row and column and the second combination of row and column within the coefficient matrix using the coefficient matrix for solving the linear simultaneous equations. determining a first combination of row and column and a second combination of row and column. said matrix reordering apparatus comprising: a determining means for based on a number of non-zero elements included in the coefficient matrix and lengths of critical paths created by the Gaussian elimination of the coefficient matrix. and a replacing means for performing replacement of elements between the first combination of row and column and the second combination of row and column within the coefficient matrix wherein the apparatus is operable to use the coefficient matrix for solving the linear simultaneous equations. so that the secondary replacement is performed on elements of the symmetric coefficient matrix between the third and fourth combinations of rows and columns. said electronic circuit simulation method comprising the steps of: based on a number of non-zero elements included in the coefficient matrix and an accumulative processing time of the Gaussian elimination of the coefficient matrix. and a replacing means for performing replacement of elements between the first combination of row and column and the second combination of row and column within the coefficient matrix wherein the apparatus is operable to use the coefficient matrix for solving the linear simultaneous equations. which are selected based on symmetry of the symmetric coefficient matrix. which are selected from among rows and columns of the coefficient matrix. A matrix reordering apparatus for reordering elements of a coefficient matrix whose structure corresponds to coefficients of linear simultaneous equations whose solutions are to be produced by parallel processing of processors of a computer in accordance with Gaussian elimination. which are selected from among rows and columns of the coefficient matrix. 4. A matrix reordering apparatus for reordering elements of a coefficient matrix whose structure corresponds to coefficients of linear simultaneous equations whose solutions are to be produced by parallel processing of processors of a computer in accordance with Gaussian elimination. 6. 8. An electronic circuit simulation method using matrix reordering for reordering elements of a coefficient matrix that represents electronic elements of a given electronic circuit by linear . determining a first combination of row and column and a second combination of row and column. 5. selectively performing either the replacement of elements between the first and second combinations of rows and columns or secondary replacement of elements between a third combination of row and column and a fourth combination of row and column. which are selected from among rows and columns of the coefficient matrix. determining a first combination of row and column and a second combination of row and column. said matrix reordering apparatus comprising: a determining means for based on a number of non-zero elements included in the coefficient matrix and an accumulative processing time of the Gaussian elimination of the coefficient matrix. determining a first combination of row and column and a second combination of row and column. 7. which are selected from among rows and columns of the coefficient matrix. 3. An electronic circuit simulation method using matrix reordering for reordering elements of a coefficient matrix that represents electronic elements of a given electronic circuit by linear simultaneous equations whose solutions are to be produced by parallel processing of processors of a computer in accordance with Gaussian elimination. A matrix reordering method according to claim 1 or 2 further comprising the step of: in accordance with a prescribed condition. which are selected based on symmetry of the coefficient matrix. A matrix reordering method according to claim 3 further comprising the step of: creating a symmetric coefficient matrix by transposition of a non-symmetric coefficient matrix that is given as the coefficient matrix. and performing replacement of elements between the first combination of row and column and the second combination of row and column within the coefficient matrix using the coefficient matrix for solving the linear simultaneous equations.

so that the secondary replacement is performed on elements of the symmetric coefficient matrix between the third and fourth combinations of rows and columns. performing replacement of elements between the first pivot and the second pivot within the coefficient matrix. 9. which are selected based on symmetry of the coefficient matrix. selectively performing either the replacement of elements between the first and second combinations of rows and columns or secondary replacement of elements between a third combination of row and column and a fourth combination of row and column. and a replacing means for performing replacement of elements between the first combination of row and column and the second combination of row and column within the coefficient matrix wherein the apparatus is operable to use the coefficient matrix for solving the linear simultaneous equations. which are newly produced by the Gaussian elimination of the first pivot. said electronic circuit simulation method comprising the steps of: based on a number of non-zero elements included in the coefficient matrix and lengths of critical paths created by the Gaussian elimination of the coefficient matrix.simultaneous equations whose solutions are to be produced by parallel processing of processors of a computer in accordance with Gaussian elimination. which are selected from among rows and columns of the coefficient matrix. determining a first combination of row and column and a second combination of row and column. . 10. to the coefficient matrix using the coefficient matrix for solving the linear simultaneous equations. determining a first combination of row and column and a second combination of row and column. An electronic circuit simulation apparatus using matrix reordering for reordering elements of a coefficient matrix that represents electronic elements of a given electronic circuit by linear simultaneous equations whose solutions are to be produced by parallel processing of processors of a computer in accordance with Gaussian elimination. said electronic circuit simulation apparatus comprising the steps of: a determining means for based on a number of non-zero elements included in the coefficient matrix and lengths of critical paths created by the Gaussian elimination of the coefficient matrix. An electronic circuit simulation method according to claim 9 further comprising the step of: creating a symmetric coefficient matrix by transposition of a non-symmetric coefficient matrix that is given as the coefficient matrix. and performing replacement of elements between the first combination of row and column and the second combination of row and column within the coefficient matrix using the coefficient matrix for solving the linear simultaneous equations. which are selected based on symmetry of the symm11. 13. selecting from among the pivots included in the coefficient matrix a second pivot whose critical path length is minimum. A matrix reordering method for reordering elements of a coefficient matrix created based on coefficients of linear simultaneous equations whose solutions are to be produced by parallel processing of processors of a computer in accordance with Gaussian elimination. said electronic circuit simulation apparatus comprising: a determining means for based on a number of non-zero elements included in the coefficient matrix and an accumulative processing time of the Gaussian elimination of the coefficient matrix. and adding new non-zero elements. which are selected from among rows and columns of the coefficient matrix. An electronic circuit simulation method according to claim 7 or 8 further comprising the step of: in accordance with a prescribed condition. 12. said matrix reordering method comprising the steps of: selecting from among pivots included in the coefficient matrix a first pivot whose degree corresponding to a number of non-zero elements is under a threshold. An electronic circuit simulation apparatus using matrix reordering for reordering elements of a coefficient matrix that represents electronic elements of a given electronic circuit by linear simultaneous equations whose solutions are to be produced by parallel processing of processors of a computer in accordance with Gaussian elimination. determining a first combination of row and column and a second combination of row and column. which are selected from among rows and columns of the coefficient matrix. and a replacing means for performing replacement of elements between the first combination of row and column and the second combination of row and column within the coefficient matrix wherein the apparatus is operable to use the coefficient matrix for solving the linear simultaneous equations.

16. b r e cg r la r y n ru Ae rc M1 2 M1 3 M2 2 M3 2 M2 3 M3 3 M1 4 M2 4 M3 4 r aA b r ) A e l n mea.14. which are newly produced by the Gaussian elimination of the partial matrix. A matrix reordering method according to claim 14 wherein the reordering is started if a degree or a parameter of theMatrices Applied to Electric Circuits 3 I t o u t ntoM nr d c io M3 4 x M1 1 = M2 1 3 M 1 A m tr a ix is as t o e f e mn ) a a g dinr w le e ts rr n e o Wa i amt i ? ht s arx rtata laurraa fa mes(w e n ug a ryo n . A matrix reordering method according to claim 13 further comprising the step of: performing reordering of a partial matrix whose elements are not eliminated and are selected from among the elements of the coefficient matrix in accordance with a nested dissection method. 15. are added to the coefficient matrix. so that the reordering is performed on the symmetric coefficient matrix. A matrix reordering method according to claim 14 further comprising the step of: creating a symmetric coefficient matrix by transposition of a non-symmetric coefficient matrix that is given as the coefficient matrix. so that non-zero elements. ix u m tr s M1ou n 2 c l ms hv nm a inx g od r re (e d ra ‘m b n’o y r a hv g s a in .

If you distribute this work in part. These restrictions are here to protect us as authors. . subject to the following restrictions: • • • • The copyright notice above and this permission notice must be preserved complete on all complete or partial copies.3 . I'm going to have a crack at it. Small portions may be reproduced as illustrations for reviews or quotes in other works without this permission notice if proper citation is given. and a means for obtaining a complete version provided. not to restrict you as learners and educators. Basically. partly due to the fact of no really good explanation of it. Z) is directly proportional to the current passing through it (the resistance/impedance is the proportionality constant) Kirchhoff's Voltage Law (KVL): the algebraic sum of the voltages around any loop of N elements is zero (like pressure drops through a closed pipe loop) IT 1 1 D1 1 M tr a i . This article may be reproduced in whole or in part. R (or impedance. Any translation or derived work must be approved by the author in writing before distribution. and how to prevent them.2 M tr n ta n a ix o tio It took me a bit to figure this out. I wanted to know why keyboard "ghosting" and "masking" happen. I wanted to understand how keyboard matrices work. Specifically. Write to the author and ask. without fee. 1 1 E c elem t in a m trix h s i ah en a a ‘a d ss ’ o lo a n w ich d re r c tio h sy stemo d u le su e f ob ffix s: a dth n e se o d cn in ic te th d a s a a21 a31 a41 a12 a22 a32 a42 Fundamentals Ohm's Law states the voltage across a resistor. instructions for obtaining the complete version of this manual must be included. Exceptions to these rules may be granted for academic purposes. So.

2. much like points on a graph. the keyboard controller will scan all columns. The keyboard controller detects this closed circuit and registers it as a key press. I want to keep it simple. key B is at node C2R1. and D. Each key has a unique grid location. Switch Open 3. C. B. .Kirchhoff's Current Law (KCL): the algebraic sum of the currents entering any node is zero. The Matrix Circuit Keyboards use a matrix with the rows and columns made up of wires. Scanning to Detect Key Presses In order to detect key presses. When a key is pressed. and key D is at node C2R2. key C is at node C1R2. Conceptual Matrix Circuit This keyboard only has 4 keys: A. the controller detects which rows are "activated". sum of currents entering equals sum of currents leaving (like mass flow at a junction in a pipe) s fixes the masking problem for the same reason. Key A is at node C1R1.e. the diode stops the current. In reality this is pretty useless which is why real keyboards use many more rows and columns. activating each one by one. The electronic circuit for this matrix looks something (not exactly) like this: Figure 2. However. i. a column wire makes contact with a row wire and completes a circuit.. Here is a simple keyboard matrix: Figure 1. Each key acts like a switch. When a column is activated.

The controller now knows that both nodes C2R2 and C2R2 are deactivated.In order to detect key presses. The matrix will look like this: Figure 5. the keyboard controller will scan all columns. Scanning Column 2 Neither key B nor D are pressed so neither row R1 nor R2 is activated. Scanning Column 1 Neither key A nor C are pressed. activating each one by one. The controller now knows that both nodes C1R1 and C1R2 are deactivated. When a To step through this procedure. 4. so neither row R1 nor R2 is activated. the controller activates column C1 and checks rows R1 and R2: Figure 3. Single Key Presses Now. let's say the the A key is pressed. Then it activates column C2 and checks rows R1 and R2 again: Figure 4. The A Key is Pressed .

Row 1 is Activated This time. the controller knows that the A key is pressed.Key A corresponds to node C1R1. we can see how C1R1 is detected. here is the circuit with switch A closed: Figure 6. So the controller now knows that node C1R1 is pressed. neither row R1 nor R2 are activated. Since C1R1 corresponds to the A key. By going back to the circuit. the controller activates column C1 and detects which rows are activated: Figure 7. The A Switch is Closed Walking through the scanning procedure again. When the controller activates column C2. First. row R1 is activated. Neither Row is Activated . Both switches B and D are open: Figure 8.

the circuit goes back to the original.When the A key is released. The A and D Keys are Pressed Both nodes C1R1 and C2R2 should be detected. Here is the circuit with both switches A and D closed: Figure 10. 5. Multiple Key Presses Now we will cover multiple key presses. The matrix will look like this: Figure 9. The A and D Switches are Closed . and the controller detects the node C1R1 is no longer activated. Let's say that both keys A and D are pressed at the same time.

6. In this example. row R2 is activated.Scanning column C1 then column C2 produces an outcome like this: Figure 11. and D Keys are Pressed . The matrix looks like this: Figure 13. The A. B. Row 2 is Activated When column C1 is activated. When column C2 is activated. Three Simultaneous Key Presses and Ghosting When three keys are pressed at the same time. Row 1 is Activated Figure 12. hence node C2R2 is activated. row R1 is active. ghosting may occur. keys A. and D are pressed. B. hence node C1R1 is activated.

Switch C is open. The keyboard does not know that switch C is open and generates a "ghost" key press. and D Switches are Closed When activating column C1. C2R1. In my simple example. and C2R2 will be detected. any 3 keys causes ghosting. the circuit now looks like this: Figure 15. The A. bypassing the open switch C. but in a bigger matrix only 3 corners of a rectangle cause it. Rows 1 and 2 are Activated If you get the feeling something is not right. B. so the key is not really pressed. However. you are correct! This is where the ghosting problem comes to play. The keyboard controller does not know this and incorrectly generates a C key press. Let's look at the circuit view again: Figure 14. Ghosting will show up when any 3 corners of a rectangle in the matrix are pressed at once. here is the circuit when activating column C2: Figure 16. so both nodes C1R1 and C1R2 are activated. node C1R2 corresponds to the C key. nodes C1R1. Row R1 is activated as well as row R2. Node C1R1 is expected as it corresponds to the A key that is pressed. What happens is that closing switch B and switch D at the same time creates an electrical path from C1 to R2.If everything goes well. Rows 1 and 2 are Activated . Just for completion.

Just put diodes in series with each switch. nothing changes as the controller already thought that C was pressed. like so: Figure 17. 7. both the ghosting and masking problems are eliminated. The Masking Problem Take the scenario above where keys A. Schematic with Diodes Let's go back to the scenario where A. Now press the C key.As expected. Activating columns C1 and C2 now look like this: Figure 18. and D are all pressed. B. and D are pressed simultaneously. Only Row 1 is Activated . 8. Release the B key. Given the ghosting affect. The key release is not detected because switch B is bypassed by the closed switches A and C. Getting Rid Of Ghosting and Masking By using diodes. Aha! The same problem occurs. B. nodes C2R1 and C2R2 are activated corresponding to the B and D keys.

power diodes. Other common types of diodes are rectifier diodes to rectify AC current to DC. both R1 and R2 as expected. I will explain what I do know (or think I know). light emitting diodes If you go looking at an electronics store. which can handle more current without breaking down and/or melting. Since the wall current "switches" at 60 times per second. Thanks goes out to a reader who would like to remain anonymous for clearing up much this information for me. the 1N4001 must be within a 60Hz tolerance. only node C1R1 is activated and C1R2 is not. the clerk said that I should use the 1N4148 due to faster switching time.Figure 19. this is where my knowledge fades. until a reader clarified this issue. Also. you need to know how to actually build a circuit with diodes to fix this problem. When column C1 is activated. 9. I know the theory but not the practice (that's what happens when you take a college class but never use that information outside the classroom. The 1N4001s were designed to rectify the AC wall current. What Diode Parts to Use Now that the theory has been explained. Unfortunately. I was going to use these. you need what is called a switching diode. This is plenty fast for a keyboard switch unless you can press a button faster than 60 times per second (doubtful :). you will probably stumble across a diode by the name of 1N4001. I was unsure if the 1N4001s would actually work. In this case. when column C2 is activated. For over a year. There are many kinds of diodes for all different purposes. Row 1 and 2 are Activated Voila! The diodes stop the current from flowing in the "wrong" direction back up switch B. but when I went to buy them. :-) Nonetheless. and everyone's favorite. .

Since this is much faster than the 1N4001. of VL = VS c. we also introduce and reinforce a general problem modeling methodology. and demonstrate the usefulness of matrix algebra for realizing a solution to these problems Nodal Analysis Example 1. 10. this is my recommendation. a. Conclusion It's pretty simple: Use diodes in series with your switches! What kind of diodes. Matrix Methods for Electrical Systems Summary: This module introduces matrix algebra as a tool for solving multivariable problems. This makes the 1N4148 the more "proper" and economical choice. Setting up a model for a nerve cell. Label the nodal voltages. Apply KCL. Solve for VT for instance. 2. we use matrices to simply express the electrical properties of the nerve cell.The 1N4148s are designed for fast switching and have a switching time of 4 nanoseconds.90 for a pack of 30. By working several examples. Since the 1N4148 sell for $0. KCL at top node gives IS = IL + IC b. you may ask? Use 1N4148 switching diodes and you'll have no problems! . even if it is overkill. Supernode constraint eq. this is what the clerk was talking about. and utilize matrix algebra to solve for the potential differences across nodes and axial and membrane current.

matrices in particular. Let us group like terms in the above system of equations e1 = i1 (R1 + R3) .i1 R3 + i2(R2 + R3) and then write it in matrix form as follows The above is a matrix equation that may be solved using any known method to solve systems of equations. .i2) loop 2: e2 = R2 i2 + R3 (i2 . However electric cicuits can be much more complicated that the one above and matrices are suitable to answer the above question. R2 and R3 are resistors. We now apply Kichhoff's law to each loop. i1 is the current flowing across R1 and i2 is the current flowing across R2. R and i be matrices given by The solution to the above matrix equation is given by where R -1 is the inverse matrix of R and is given by.A tutorial on how mathema tics. R1. e2. Let e. how do you calculate i1 and i2? This circuit is simple involvesand only two equations. R1 and R3 and loop 2: e2. R2 and R3. loop 1: e1. There are two closed loops in the above circuit. R1. R2 and R3 are known.i2 R3 e2 = . loop 1: e1 = R1 i1 + R3 (i1 . e1 and e2 are sources of voltages. are applied to model electric circuits.i1) Question: If e1.

portal.org/dave/keyboard-html www.dribin.in www.com www.acm.matrixelectronicmeasuring.wikipidia.edu.REFERENCES The source is internet.co.org www.stmarys.org www.ca .in www.eg www.google. The sites are www.shams.books.analyzemath.asu.

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