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1. INTRODUCTION

1.1 PURPOSE OF THE LAB:

Electronic Circuit Analysis Laboratory

This manual has been prepared for use in the course Electronics & Communication Engineering, Electronic Circuits Laboratory. The laboratory exercises are designed in such a way as to reinforce the concepts taught in the lectures. Before performing the experiments, the students must be aware of the basic safety rules for minimizing any potential dangers. The specific objective of each experiment should be kept in mind throughout the laboratory session. The conclusions based on the experiments and other observed phenomena must be clearly discussed in the laboratory report. 1.2 PURPOSE OF THE PRELAB: In each lab, you are given prelab questions. These are intended to help you prepare for the lab. You should write your response in this manual. These questions are not handed in, and they are not graded. If you do not understand a prelab question, be sure to ask your Instructor.

**2. CIRCUIT ANALYSIS USING PSPICE
**

PURPOSE 1. To learn the basic features of PSpice. 2. To use PSpice for the following: i) Analysis by using Schematic Editor. ii) Analysis by using Circuit File Editor. INTRODUCTION TO SPICE The rapid change in the field of electrical engineering is paralleled by programs that use the computers increased capabilities in the solution of both traditional and novel problems. With the availability of tools for computer-aided circuit analysis, circuits of great complexity can be designed and analyzed within a shorter time and with less effort compared to the traditional methods. PSpice is a member of the SPICE (Simulation Program with Integrated Circuit Emphasis) family of circuit simulators. In the following exercises you will use PSpice to solve some circuits and to determine the quantities of interest. Simulation Program with Integrated Circuit Emphasis (SPICE) SPICE is a computer simulation and modeling program used by engineers to mathematically predict the behavior of electronic circuits. Developed at the University of California at Berkeley, SPICE can be used to simulate circuits of almost all complexities. However, SPICE is generally used to predict the behavior of low to mid frequency (DC to around 100MHz) circuits. SPICE has the ability to simulate components ranging from the most basic passive elements such as resistors and capacitors to sophisticated semiconductor devices such as MESFETs and MOSFETs. Using these intrinsic components as the basic building blocks for larger models, designers and chip manufacturers have been able to define a truly vast and diverse number of SPICE models. Most commercially available simulators include more than 15,000 different components.

Vardhaman College of Engineering, Hyderabad

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Department of ECE

Electronic Circuit Analysis Laboratory

A circuit must be presented to SPICE in the form of a netlist. The netlist is a text description of all circuit elements such as transistors and capacitors, and their corresponding connections. Modern schematic capture and simulation tools such as Multisim allow users to draw circuit schematics in a user-friendly environment, and automatically translate the circuit diagrams into netlists. Both netlist and corresponding circuit schematic are presented here in this manual, and some are left to the students to write on their own for practice. Types Of Spice The commercially supported versions of SPICE2 can be divided into two types: mainframe versions and PC–based versions. The mainframe versions are: HSPICE, RAD-SPICE(Meta-Software) IG-SPICE(A.B.Associates) Precise(Electronic Engineering Software) PSpice(Microsim) AccuSim(Mentor Graphics) Cadence-SPICE(Cadence Design) SPICE-Plus(valid Logic) The PC-versions are AllSpice(Acotech) IS-SPICE(Intusoft) Z-SPICE(Z-Tech) SPICE-Plus(Analog Design Tools) DSPICE(Daisy Systems) PSpice(Microsim) Types of Analysis Pspice allows various types of analysis. Each analysis is invoked by including its command statement. The types of analysis and their corresponding. (dot) commands are described below: DC Analysis is used for circuits with time-invariant sources(e.g., steady-state dc sources). DC Analysis Commands: • DC sweep of an input voltage/current source, a model parameter, or temperature over a range of values (.DC) • DC operating point to obtain all node voltages (.OP) • Small-signal transfer function with small-signal gain, input resistance, and output resistance (Thevenin’s equivalent) (.TF) • DC small-signal sensitivities (.SENS) Transient Analysis is used for circuits with time-variant sources (e.g., ac sources and switched dc sources). Transient Analysis Commands: • Circuit behavior in response to time varying sources (.TRAN) • DC and Fourier components of the transient analysis results (.FOUR) AC Analysis is used for small-signal analysis of circuits with sources of variable frequencies. AC Analysis Commands: • Circuit response over a range of source frequencies (.AC) • Noise generation at an output node for every frequency (.NOISE)

Vardhaman College of Engineering, Hyderabad

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Department of ECE

Limitation Of Spice

Electronic Circuit Analysis Laboratory

As a circuit simulator, Pspice has the following limitations: 1. The student version of Pspice is restricted to circuits with 10 transistors only. 2. The program is not interactive; that is, the circuit cannot be analyzed for various component values without editing the program statements. 3. Pspice does not support an iterative method of solution. If the elements of a circuit are specified, the output can be predicted. On the other hand, if the output is specified, Pspice cannot be used to synthesize the circuit elements. 4. The input impedance cannot be determined directly. 5. The PC version needs 512kilobytes of memory (RAM) to run. 6. Distortion analysis is not available in Pspice. 7. The output impedance of a circuit cannot be printed or plotted directly. Circuit Descriptions A circuit is described to a computer by using a file called the circuit file, which is normally typed from a keyboard. The circuit file contains the circuit details of components and elements, the information about the sources, and the commands for what to calculate and what to provide as output. The circuit file is the input to the SPICE program, which after executing the commands, produces the results in another file called the output file. A circuit must be specified in terms of element names, element values, nodes, variable parameters, and sources. The description and analysis of a circuit require specifications as follows: • Element values • Nodes • Circuit elements • Element models • Sources • Types of analysis • Output variables • PSpice output commands • Format of circuit files • Format of output files Element Values: The element values are written in standard floating point notation with optional scale and unit suffixes. Some values without suffixes that are allowable in PSpice are 5 .5 5.0 5E+3 5.0E+3 5.E+3 There are two types of suffixes: the scale suffix and the unit suffix. The scale suffix multiplies the number that it follows. The scale suffixes recognized by PSpice are F = 1E-15 P = 1E-12 N = 1E-9 U = 1E-6 M = 1E-3 MIL = 25.4E-6 K = 1E3 MEG = 1E6 G = 1E9 T = 1E12

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A name must start with a letter symbol corresponding to the element. therefore. Node numbers must be integers from 0 to 9999 for SPICE. Voltage/Current Sources EXP FILE PULSE PWL SFFM SIN exponential pulse user data file pulsed (single pulse or periodic waveform) piece-wise linear (table driven arbitrary waveform) single frequency FM waveform sine wave Sinusoidal Voltage Source: This source generates a damped sinusoidal signal. In the absence of a scale suffix. If the nodes are interchanged. Examples: VSIG 3 0 SIN (-1V 2. Circuit Elements: Circuit elements are identified by names. Nodes: The location of an element is identified by the node numbers. Each element is connected between two nodes. Hyderabad Page 4 . Transient spec syntax: SIN (VO VA FREQ [TD] [THETA] [PHASE]) where items in [] are optional parameters. Node 0 is predefined as the ground. Sources: The format for sources is <source name><positive node><negative node><source model> where the voltage of node N+ is specified with respect to node N-. All nodes must be connected to at least two elements and should. but after it can contain either letters or numbers. The format of describing passive elements is <element name><positive node><negative node><value> Where positive node current is assumed to flow into positive node N+ and out of negative node N-.5V 10MEG 1NS 1E10 90) VAC in 0 SIN 0 120V 60Hz Vardhaman College of Engineering. the first suffix may be a unit suffix. appear at least twice. the direction of the current through the element will be reversed. Node numbers are assigned to the circuit. Names can be up to 8 characters long for SPICE2 and up to 131 characters long for PSpice. provided it is not symbol of a scale suffix.Department of ECE The unit suffixes that are normally used are V=volt A=amp HZ=hertz OHM=ohm( ) H=henry F=farad DEG=degree Electronic Circuit Analysis Laboratory The first suffix always the scale suffix and the unit suffix follows the scale suffix. but need not be sequential.

Department of ECE Parameters VO VA FREQ TD THETA PHASE offset amplitude frequency delay damping factor initial phase Default Values none none 1/TSTOP 0. Hyderabad Page 5 . A continuation line is identified by a plus sign (+) in the first column of the next line. the best thing is to run the circuit file by using that command or statement and see what happens. iv) The output description. 3.END command). ii) The circuit description. which defines the circuit elements and the set of model parameters. 5. and v) The end of the program (the . SPICE/PSpice is user-friendly software. If you are not sure of any command or statement. preceded by an asterisk (*). If a PSpice statement is more than one line. 2. a comment is preceded by a semicolon (.or lower case. 6. which defines the way the output is to be presented. A comment line may be included anywhere. It is possible to control the type and amount by various commands. Within a statement.0 0. The continuation lines must follow one another in the proper order. The format for a circuit file is as follows: Title Circuit description Analysis description Output description . SPICE/PSpice will display a message on the screen indicating that there is an error and will suggest looking at the output file for details. The output falls into four types: Vardhaman College of Engineering. The order of the remaining lines is not important and does not affect the results of simulations. PSpice statement or comments can be in either upper.END command. for PSpice only.). The first line is the title line. If there is any error in the circuit file.0 0. which describes the type of circuit or any comments. The last line must be the . 7. the statement can continue on the next line. 4. Format Of Output Files The results of simulation by SPICE/PSpice are stored in an output file. iii) The analysis description. it gives an error message in the output file that identifies a problem. and it may contain any type of text.0 Electronic Circuit Analysis Laboratory Units V V Hz sec 1/sec degrees The shape of the waveform is described by the following table: Time Value 0 to TD VO TD to TSTOP VO + VA * exp(-(time-TD)*THETA) * sin(2pi * FREQ * (time-TD)+PHASE) Format Of Circuit Files A circuit file that can be read by SPICE/PSpice may be divided into five parts: i) The title. which defines the type of analysis.END (end-of-file statement) Notes: 1.

Prints and plots by .33 0 2 1. 2. Spice Models BJT Models: Statement syntax: .AC.PLOT and . These include the output from the .33 0.5 1 1 0 0 RB Vardhaman College of Engineering. .Department of ECE Electronic Circuit Analysis Laboratory 1.FOUR analyses. . A description of the circuit itself that includes the netlist. Hyderabad Page 6 .TF.MODEL <model name> <type> [(<parameter list>)] where <type> is one of the following: NPN PNP npn BJT pnp BJT NPN and PNP Model Parameters: Name* AF BF BR CJC CJE CJS EG FC IKF IKR IRB IS ISC (C4) ISE (C2) ITF KF MJC MJE MJS NC NE NF NR PTF RB RBM Description Flicker noise exponent Ideal maximum forward gain Ideal maximum reverse gain B-C zero-bias depletion capacitance B-E zero-bias depletion capacitance Zero-bias collector-substrate capacitance Energy gap for temperature effect on IS Forward bias depletion capacitance coeff. These include the various kinds of summary information about the whole run.SENS.11 0. Direct output from some of the analyses without the . . including times required by various analyses and the amount of memory used. 3. specifies multiple of IS High-current parameter for effect on TF Flicker noise coefficient B-C junction exponential factor B-E junction exponential factor Substrate junction exponential factor B-C leakage emission coefficient B-E leakage emission coefficient Forward current emission coefficient Reverse current emission coefficient Excess phase at Freq=1/(TF*2) Hz Zero-bias base resistance Minimum base resistance at high currents Units F F F eV A A A A A A A degrees Ohms Ohms Default 1 100 100 0 0 0 1.TRAN analyses. 4.NOISE. the model parameter list. Run statistics.PRINT commands.PRINT commands. and . This includes the output from . and so on. specifies multiple of IS B-E leakage saturation current If >=1. the device list. and .DC. .PLOT and .OP. Corner for forward gain high current roll-off Corner for reverse gain high current roll-off Current where base resistance falls half way to its minimum value Transport saturation current B-C leakage saturation current If >=1.5 infinite infinite infinite 1E-16 0 0 0 0 0.

75 0. Hyderabad Page 7 . C Default 0 0 0 27 RC Collector resistance RE Emitter resistance TF Ideal forward transit time TNOM Nominal model temperature (TREF) (T_MEASURED) TR Ideal reverse transit time TRB1 RB linear temperature coefficient TRB2 RB quadratic temperature coefficient TBC1 RC linear temperature coefficient TBC2 RC quadratic temperature coefficient TRE1 RE linear temperature coefficient TRE2 RE quadratic temperature coefficient TRM1 RBM linear temperature coefficient TRM2 RBM quadratic temperature coefficient VAF Forward Early voltage VAR Reverse Early voltage VJC B-C built-in potential VJE B-E built-in potential VJS Substrate junction built-in potential VTF Voltage describing VBC dependence of TF XCJC Fraction of B-C depletion capacitance connected to internal base node XTB Forward and reverse gain temperature exponent XTF Coefficient for bias dependence of TF XTI Temperature exponent for effect on IS * Name in parenthesis is alias for parameter name.75 0.Department of ECE Name* Description Electronic Circuit Analysis Laboratory Units Ohms Ohms sec deg.75 infinite 1 0 0 3 Vardhaman College of Engineering. sec V V V V V V - 0 0 0 0 0 0 0 0 0 infinite infinite 0.

No. 4: RC Phase Shift Oscillator Exp. No. Hyderabad Page 8 . No. 6: Class B Complementary Symmetry Power Amplifier Vardhaman College of Engineering. No.Department of ECE Electronic Circuit Analysis Laboratory 3. 1: Common Emitter Amplifier Exp. No. 2: Two stage RC coupled Amplifier Exp. 5: Class A Power Amplifier Exp. PART – I SIMULATION USING PSPICE Exp. 3: Current Shunt Feedback Amplifier Exp. No.

3. For example.1. Objective: 1. To simulate the Common Emitter amplifier in Pspice and study the transient and frequency response. The formula is XdB = 20log10(|X|). The voltage ratio that corresponds to – 3 dB. In this lab you will use “decibels”. – 1 COMMON EMITTER AMPLIFIER Prelab: Study the operation and working principle of CE amplifier. for example the voltage ratio corresponding to a gain of 15 dB is 10(15/20) = 5. The gain in dB of an amplifier with a gain of 0. You can compute a voltage ratio by taking the exponent of 10. or dB. If the gain A of an amplifier is 100. The gain in dB of an amplifier with a gain of 10. c. Software Tool: 1. This is a dimensionless ratio. Circuit Diagram: Vardhaman College of Engineering. 3. 2.000.01 has a gain of -40 dB. To determine the phase relationship between the input and output voltages by performing the transient analysis.623. Study the procedure of using Spice tool (Schematic & Circuit File). Hyderabad Page 9 . where X is any dimensionless ratio. EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool. for example an amplifier with a gain of 0. b. To determine the maximum gain. 2. X might be the gain A of an amplifier. you can also say that the amplifier has a gain of 40 dB. 4. Identify all the formulae you will need in this Lab. Note that negative values correspond to a ratio of less than unity. 3dB gain. lower and upper cutoff frequencies and bandwidth of CE amplifier by performing the AC analysis.Department of ECE PART – I Electronic Circuit Analysis Laboratory EXPERIMENT NO. Calculate the following: a. in logarithmic form.

56E-14 BF=200 NE=2 IKF=0. As a consequence of this.e. RE to provide a low reactance path to the amplified ac signal. It sets the proper operating point for the CE amplifier.333E-10 CJC= 8.TRAN 1E-006 0. The functions of these components are as follows: 1. It blocks any dc component present in the signal and passes only ac signal for amplification. If it is not inserted. the drop IC RC increases considerably. So forward bias is increased i.000E-12 TR= 4. amplified voltage appears across RC. there is a phase shift of 180° between the input and output. biasing conditions are maintained constant.AC DEC 10 10 1E+007 *Output description .END Theory: The practical circuit of CE amplifier is shown in the figure. Input capacitor C1: This capacitor couples the signal to the transistor. the voltage between collector and emitter (Vce) decreases. Operation: When positive half of the signal is applied. the base current is increased.280E-11 + RB= 10. Because of this. It blocks dc and passes only ac part of the amplified signal. Vardhaman College of Engineering.002 .0 RC= .500E-11 TF= 5. Output Coupling Capacitor C2: The coupling capacitor C2 couples the output of the amplifier to the load or to the next stage of the amplifier.00 ISE= 1.MODEL 2N2222 NPN(IS=2. Emitter Bypass Capacitor CE: An emitter bypass capacitor CE is connected in parallel with the emitter resistance.END (end-of-file statement) . 4. Hyderabad Page 10 . It consists of different circuit components.500 ISC= 1. the voltage between base and emitter (Vbe) is increased because it is already positive with respect to ground. This will reduce the output voltage. Therefore the positive going input signal appears as a negative going output signal i. Due to transistor action.56 + BR= 5.280E-11 + CJE= 2. When this current flows through RC.00 NC= 2.. reducing the gain of the amplifier.Department of ECE Circuit File: Electronic Circuit Analysis Laboratory *Title * Circuit file for CE Amplifier *Circuit description Q1 1 2 3 2n2222 RC 1 4 10k R1 2 4 47k R2 0 2 5k RS 5 6 500 RE 0 3 2k RL 0 7 10k C1 6 2 1u CE 0 3 10u C2 1 7 1u Vcc 4 0 12 Vs 5 0 AC 10m SIN 0 10m 1k . R2 and RE form the voltage divider biasing circuit for the CE amplifier.. Biasing Circuit: The resistances R1. the amplified ac signal passing through RE will cause a voltage drop across it. 3.e.000E-08 KF=3E-16 + AF=1) *Analysis description . the collector current IC is increased β times. In this way. 2.PROBE *.

2. Move the symbol to the desired location using the mouse. we have to do the analysis setup. select the Wire menu command. You can also change the attributes by double-clicking on a part on the schematic. This is a text file.Department of ECE Procedure: 1. Once analysis setup is over. Move the cursor to the wire starting position and click the left mouse button or press Enter. To draw a wire. Before simulation. Now you can move the other end of wire to the desired location. Hyderabad Page 11 . mirror and flip. To simulate the circuit file. do the calculations. the analysis is to be performed. From the analysis note down the readings. The junction symbol (a large dot) indicates an electrical connection between wires or between a wire and a part pin. plot the graph. Vardhaman College of Engineering. Before simulation. You can change the view of most symbols by performing the following operations: rotate. Wires and junctions are used to wire together parts and indicate electrical connections. then perform Run Simulation. Schematic: i) ii) iii) iv) v) Electronic Circuit Analysis Laboratory vi) vii) viii) ix) x) xi) xii) xiii) xiv) xv) Select the components from the symbol library and place it on the schematic window. Three different modes of circuit analysis: DC. The selected symbol is displayed on the screen in red. select the Analysis|Run Simulation menu command from the Schematic. the simulator writes any applicable error messages to the simulation output file.CIR") is the input file for the simulator program. Once circuit construction is completed. From the analysis note down the readings. we have to do the analysis setup. To simulate a circuit. plot the graph. Write the circuit file for the given schematic assuming the node numbers. which contains the circuit netlist. do the calculations. and optional parameters. Three different modes of circuit analysis: DC. AC (frequency response) and transient. AC (frequency response) and transient. If there are any errors during the simulation. select the Analysis|Run Simulation menu command from the circuit file menu. Circuit File: i) ii) iii) iv) v) vi) vii) viii) ix) The SPICE circuit file (default filename extension ". Most parts (components) require that you specify the following set of attributes: reference name. then perform Run Simulation. Save the circuit file. simulation command and device model statements. the simulator writes any applicable error messages to the simulation output file. value or model name. Once analysis setup is over. If there are any errors during the simulation.

Department of ECE Observations/Graphs: i) Transient Response: Electronic Circuit Analysis Laboratory ii) Frequency Response: (Absolute gain Vs Frequency): Vardhaman College of Engineering. Hyderabad Page 12 .

From the transient analysis the phase relationship between input and output voltage signals is ___________ degrees. No. Absolute Gain Max. 2. Hyderabad Page 13 .Department of ECE (Gain in dB Vs Frequency): Electronic Circuit Analysis Laboratory Inference: 1. 1 2 3 4 5 6 Parameter Max. Gain in dB 3dB Gain Lower Cutoff Frequency Upper Cutoff Frequency Bandwidth Value Vardhaman College of Engineering. From the frequency response curve the following results are calculated: S.

State the reason for fall in gain at low and high frequencies. 8. What is meant by unity gain frequency? 7. What is the effect of bypass capacitor on frequency response? 4.Department of ECE Criticism: Electronic Circuit Analysis Laboratory 1. Define lower and upper cutoff frequencies for an amplifier. 5. Hyderabad Page 14 . In the dc equivalent circuit of an amplifier. Why the CE amplifier provides a phase reversal? 2. Why do you plot the frequency response curve on a semi-log paper? Vardhaman College of Engineering. 6. What do we represent gain in decibels? 9. how are capacitors treated? 3. Define Bel and Decibel.

Department of ECE WORKSPACE Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 15 .

Study the purpose of using multistage amplifiers. Hyderabad Page 16 . To simulate the Two Stage RC Coupled Amplifier in PSpice and study the transient and frequency response. 3. Study the effect of cascading on Bandwidth. lower and upper cutoff frequencies and bandwidth of Two Stage RC Coupled Amplifier by performing the AC analysis. 4. Identify all the formulae you will need in this Lab. To determine the phase relationship between the input and output voltages by performing the transient analysis. 2. To determine the maximum gain. Circuit Diagram: Circuit File: Left to the student to write on his/her own Vardhaman College of Engineering.Department of ECE Electronic Circuit Analysis Laboratory PART – I EXPERIMENT NO. Study the procedure of using Spice tool (Schematic & Circuit File). 5. – 2 TWO STAGE RC COUPLED AMPLIFIER Prelab: 1. Learn the different types of coupling methods. 3dB gain. Software Tool: EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool. 4. To determine the effect of cascading on gain and bandwidth. Objective: 1. 3. 2.

Hyderabad Page 17 . When a number of amplifier stages are used in succession (one after the other) it is called a multistage amplifier or a cascade amplifier. the capacitor CC is also called a blocking capacitor. In this way. the gain increases and the bandwidth decreases.Department of ECE Theory: Electronic Circuit Analysis Laboratory An amplifier is the basic building block of most electronic systems. Also. the dc voltage at the output of one stage should not be permitted to go to the input of the next. the dc biasing of the next stage is not interfered with. RC coupling scheme finds applications in almost all audio small-signal amplifiers used in record players. etc. Figure shows how to couple two stages of amplifiers using RC coupling scheme. the output of one stage makes the input of the next stage. public-address systems. Much higher gains can be obtained from the multi-stage amplifiers. Procedure: Procedure is same as that of Experiment No. The voltage level of a signal can be raised to the desired level if we use more than one stage. tape recorders. We must use a suitable coupling network between two stages so that a minimum loss of voltage occurs when the signal passes through this network to the next stage. If it does. The coupling capacitor blocks the dc voltage of the first stage from reaching the base of the second stage. This is the most widely used method. 1 Observations/Graphs: i) Transient Response: Vardhaman College of Engineering. a single-stage amplifier is not sufficient to build a practical electronic system. In this scheme. Just as one brick does not make a house. For this reason. the biasing conditions of the next stage are disturbed. radio receivers. the signal developed across the collector resistor RC of the first stage is coupled to the base of the second stage through the capacitor CC. As the number of stages increases. The gain of the single stage is not sufficient for practical applications. In a multi-stage amplifier. television receivers.

Department of ECE ii) Frequency Response: (Gain in dB Vs Frequency) Electronic Circuit Analysis Laboratory (Comparing single stage and two stage amplifier response) Vardhaman College of Engineering. Hyderabad Page 18 .

From the frequency response curve the following results are calculated: S. it is observed that. Why do you need more than one stage of amplifiers in practical circuits? 2.___________________________ ___________________________________________________________________. Gain in dB 3dB Gain Lower Cutoff Frequency Upper Cutoff Frequency Bandwidth Value 3. What is the effect of cascading on gain and bandwidth? 3. What is loading effect in multistage amplifiers? Vardhaman College of Engineering. 1 2 3 4 5 Parameter Max. Hyderabad Page 19 . it is observed that. From the AC response. Criticism: 1. What happens to the 3dB frequencies if the number of stages of amplifiers increases? 4.Department of ECE Inference: Electronic Circuit Analysis Laboratory 1. Why we use a logarithmic scale to denote voltage or power gains. _____________________________ __________________________________________________________________. 2. instead of using the simpler linear scale? 5. From the transient analysis. No.

Department of ECE WORKSPACE Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 20 .

2. Circuit Diagram: Circuit File: Left to the student to write on his/her own Vardhaman College of Engineering. Study the concept of feedback in amplifiers. lower and upper cutoff frequencies and bandwidth of Current Shunt Feedback Amplifier by performing the AC analysis. Study the procedure of using Spice tool (Schematic & Circuit File). To simulate the Current Shunt Feedback Amplifier in PSpice and study the transient and frequency response. Study the characteristics of current shunt feedback amplifier. Software Tool: EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool. 3.Department of ECE PART – I Electronic Circuit Analysis Laboratory EXPERIMENT NO. – 3 CURRENT SHUNT FEEDBACK AMPLIFIER Prelab: 1. To determine the maximum gain. Identify all the formulae you will need in this Lab. 4. To determine the effect of feedback on gain and bandwidth. 2. Objective: 1. Hyderabad Page 21 . 3dB gain. 3.

may be altered considerably by the use of feedback for a given amplifier. A current shunt feedback amplifier circuit is illustrated in the figure. current and voltage gain and bandwidth. There are two types of feedback. 1 Observations/Graphs: i) Transient Response: Vardhaman College of Engineering. Procedure: Procedure is same as that of Experiment No. This is a true current amplifier. such as input impedance. It is called a series-derived. Negative feedback helps to increase the bandwidth. shunt-fed feedback. and noise. A portion of the output signal is taken from the output of the amplifier and is combined with the normal input signal and thereby the feedback is accomplished.Department of ECE Theory: Electronic Circuit Analysis Laboratory Feedback plays a very important role in electronic circuits and the basic parameters. They are i) Positive feedback and ii) Negative feedback. The shunt connection at the input reduces the input resistance and the series connection at the output increases the output resistance. modify input and output resistances as desired. distortion. decrease gain. output impedance. Hyderabad Page 22 .

Department of ECE

ii) Frequency Response:

Electronic Circuit Analysis Laboratory

Inference: 1. From the frequency response curve the following results are calculated: S. No. 1 2 3 4 5 Parameter Max. Gain in dB 3dB Gain Lower Cutoff Frequency Upper Cutoff Frequency Bandwidth Value

2. From the AC response, it is observed that, ______________________________ ___________________________________________________________________.

Criticism: 1. State the merits and demerits of negative feedback in amplifiers. 2. If the bypass capacitor CE in an RC coupled amplifier becomes accidentally open circuited, what happens to the gain of the amplifier? Explain. 3. When will a negative feedback amplifier circuit be unstable? 4. What is the parameter which does not change with feedback? 5. What type of feedback has been used in an emitter follower circuit?

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Department of ECE

**Electronic Circuit Analysis Laboratory
**

WORKSPACE

Vardhaman College of Engineering, Hyderabad

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Department of ECE

PART – I

**Electronic Circuit Analysis Laboratory
**

EXPERIMENT NO. – 4

**RC PHASE SHIFT OSCILLATOR USING TRANSISTORS
**

Prelab: 1. 2. 3. 4. Study the concept of positive feedback. Study the operation and working principle of RC phase shift oscillator. Identify all the formulae you will need in this Lab. Study the procedure of using Spice tool (Schematic & Circuit File).

Objective: 1. To simulate the RC Phase Shift oscillator using PSpice and study the transient response. 2. To determine the frequency of oscillation and compare its value with the theoretical value. Software Tool:

**EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool.
**

Circuit Diagram:

Circuit File: Left to the student to write on his/her own Theory: Any circuit which is used to generate an ac voltage without an ac input signal is called an oscillator. Positive feedback is used in oscillators. Based on the type of components used, the oscillators are classified in to two types. They are LC oscillators and RC oscillators. In the RC phase shift oscillator the required phase shift of 180° in the feedback loop from output to input is obtained by using R and C components. Figure shows the circuit of RC phase shift oscillator using cascaded connection of high pass filter. Here, a common emitter amplifier is followed by three sections of RC phase shift network, the output of the last section being returned to the input.

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for the given frequency fr. then φ will become 90°. Therefore. φ. Procedure: Procedure is same as that of Experiment No. Therefore. Thus such a RC ladder network produces a total phase shift of 180° between its input and output voltages for the given frequency. the phase shift of each RC section is 60°. the thereby satisfying Barkhausen condition for oscillation.Department of ECE Electronic Circuit Analysis Laboratory 1 The phase shift. in practice the value of R is adjusted such that φ becomes 60°. 1 Observations/Graphs: Transient Response: Vardhaman College of Engineering. it is required that the amplifier gain |A| must be more than 29 for oscillator operation. In order that |Aβ| shall not be less than unity. it is found that the feedback factor of the network is |β| = 1/29. If R is made zero. the total phase shift from the base of the transistor around the circuit and back to the base will be exactly 360° or 0°. But making R=0 is impracticable because if R is zero. given by each RC section is φ = tan-1 ωCR . The frequency of oscillation is given by fr = 1 2πRC 6 At this frequency. then the voltage across it will become zero. at the specific frequency fr. If the values of R and C are so chosen that. Hyderabad Page 26 .

Find the percentage feedback to produce sustained oscillators if amplifier gain is 60.18 fr = ________Hz Criticism: 1. Where does the starting voltage for an oscillator? 5. 8.Department of ECE Inference: Electronic Circuit Analysis Laboratory The theoretical and practical calculation of the frequency of oscillation of RC phase shift oscillator is calculated as follows: Theoretical Calculations R = 10k C = 0. If the percentage feedback for sustained oscillations in an oscillator is 5%. An RC phase shift oscillator circuit has 3 identical RC networks with R=100 . Hyderabad Page 27 . What is the condition of phase shift oscillator to produce sustained oscillations? 4.01u fr = Practical Calculations T= ________ms f= 1/T= __________Hz 1 2πRC 6 + 4k Where k = Rc/R = 0. Find the frequency of oscillation. What is Barkhausen criterion? 2. Why are RC oscillators preferred for the generation of low frequencies? 6. Vardhaman College of Engineering. what is the required gain of amplifier? 7. What is the maximum phase shift provided by the single RC network? 3. C=10µF.

Department of ECE WORKSPACE Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 28 .

Hyderabad . The theoretical efficiency of transformer coupled or inductively coupled class A power amplifier is 50%. Identify all the formulas you will need in this Lab. – 5 CLASS A POWER AMPLIFIER Prelab: 1. So this amplifier can amplify input signals of small amplitude. 2. To determine the Collector efficiency of Class A power amplifier. Software Tool: EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool. where PAC and PDC values are calculated as follows: PDC Page 29 Vardhaman College of Engineering. Objective: 1. Thus the operating point is selected in such a way that the transistor operates only over the linear region of its load line. Study the procedure of using Spice tool (Schematic & Circuit File). 3. Circuit Diagram: Circuit File: Left to the student to write on his/her own Theory: Class A power amplifier is one in which the output current flows during the entire cycle (360°) of input signal.Department of ECE Electronic Circuit Analysis Laboratory PART – I EXPERIMENT NO. 4. The formula for calculating collector efficiency is %η = PAC ×100 . To simulate the Class A power amplifier in PSpice and study the transient response. Study the difference between voltage and power amplifiers. Study the operation and working principle of Class A power amplifier. 2. Practically it is in the range of 30 – 35%.

Hyderabad Page 30 . I rms = m = QVrms = 8 2 2 2 2 2 2 PAC = V pp 2 8 RL or I pp 2 RL 8 Procedure: Procedure is same as that of Experiment No. I rms = m QVrms = 2 2 2 Vm 2 I 2R or m L 2 RL 2 Using Peak to Peak values: PDC = VCC × IDC PAC = Vrms × Irms = V pp I pp V pp I pp Vm I = .Department of ECE Using RMS values: PDC = VCC × IDC PAC = Vrms × Irms Using Peak values: PDC = VCC Electronic Circuit Analysis Laboratory × IDC PAC = Vrms × Irms = PAC = Vm I m Vm I . 1 Observations/Graphs: i) Transient Response: Vardhaman College of Engineering.

Hyderabad Page 31 . Inference: 1. 2. Vardhaman College of Engineering. From transient it is observed that the Class A power amplifier conducts for ____________ angle.Department of ECE ii) Frequency Response: Electronic Circuit Analysis Laboratory Calculations: PDC = VCC × IDC PAC = or 8 RL 8 P %η = AC ×100 PDC V pp 2 I pp 2 RL Theoretical Efficiency = ___________________. Practical Efficiency =___________________. The collector efficiency of class A power amplifier is ______________.

Department of ECE Criticism: Electronic Circuit Analysis Laboratory 1. What is need for power amplifier? 4. 2. Draw the block diagram of public address system. Why a power amplifier is also known as a large signal amplifier? 3. What is the difference between voltage amplifier and power amplifier? 5. Why voltage amplifier cannot work as power amplifier? 6. What is collector efficiency? Vardhaman College of Engineering. Why a power amplifier is always preceded by a voltage amplifier? 7. What is heat sink? Why it is used with power transistors? 8. Hyderabad Page 32 .

Hyderabad Page 33 .Department of ECE WORKSPACE Electronic Circuit Analysis Laboratory Vardhaman College of Engineering.

Vardhaman College of Engineering. Hyderabad Page 34 . Study the procedure of using Spice tool (Schematic & Circuit File). Identify all the formulas you will need in this Lab. 3. Modified Class B Complementary Power Amplifier Circuit File: Left to the student to write on his/her own Theory: The use of both the input and output transformers in an ordinary push-pull amplifier circuit is eliminated using a circuit called complementary-symmetry push-pull amplifier circuit. Software Tool: EdwinXP / Topspice / Multisim / Microsim / or any other equivalent tool. that is.Department of ECE PART – I Electronic Circuit Analysis Laboratory EXPERIMENT NO. Circuit Diagram: Fig. Class B Complementary Symmetry Symmetry Power Amplifier Fig. one transistor is PNP and the other is NPN. To simulate the Class B Complementary Symmetry power amplifier in PSpice and study the transient response. 2. – 6 CLASS B COMPLEMENTARY SYMMETRY POWER AMPLIFIER Prelab: 1. Study the operation and working principle of Class B power amplifier. To eliminate the cross-over distortion using modified circuitry. Objective: 1. This uses a pair of transistors having complementary symmetry. 2.

Since the transistors are of opposite type. Hyderabad Page 35 . Hence. All modern power amplifier circuits are transformerless and use complementary transistors. The two transistors – though of opposite type – must be matched. they conduct in opposite half-cycles of the input. The signal applied at the input goes to the base of both the transistors. This results in a half-cycle of output voltage across the load resistor. during the positive half-cycle of the input signal. is forward-biased and conducts. the bias is adjusted such that the operating point corresponds to the cut-off points. If there is an imbalance in the characteristics of the two transistors. the PNP transistor T1 is reverse biased and does not conduct. For example. both transistors are cut-off and no collector current flows. Increasing availability of complementary transistors is making the use of class-B transformer coupled stages obsolete. no centre-tapped output transformer is required. on the other hand. Since the collector current from each transistor flows through the load during the alternate half-cycles of the input signal. even harmonics will no longer be cancelled. Transient response of Class B Complementary Symmetry Power Amplifier Vardhaman College of Engineering. with no signal input. since each transistor must be biased suitably. Procedure: Procedure is same as that of Experiment No. The other half-cycle of output across the load is provided by the conduction of transistor T1 (the transistor T2 remains cut-off) during the negative half-cycle of the input. 1 Observations/Graphs: Transient Response: Fig. The transistors T1 and T2 are operated in class-B. This would result in considerable distortion.Department of ECE Electronic Circuit Analysis Laboratory Note that the complementary symmetry circuit requires two power supplies. The NPN transistor T2. That is.

Using modified circuitry. Transient response of Modified Class B Complementary Power Amplifier which eliminates cross-over distortion Inference: 1. What is cross-over distortion? 2. What is the difference between Push-pull power amplifier and complementary symmetry power amplifier? Vardhaman College of Engineering. 2. Criticism: 1. Hyderabad Page 36 . ______________________________________________.Department of ECE Electronic Circuit Analysis Laboratory Fig. we observe that _______________________________________________________. How to eliminate cross-over distortion? 3. From transient response of Class B complementary symmetry power amplifier. What is harmonic distortion? 4. What is the maximum efficiency of class B Complementary Symmetry Power amplifier? 5.

Department of ECE WORKSPACE Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 37 .

No. No. 4: Single Tuned Voltage Amplifier Exp. No. 5(b): Colpitt’s Oscillator Exp. No. No. 6: Class C Power Amplifier Vardhaman College of Engineering. 3: Class B Complementary Symmetry Power Amplifier Exp. 2: RC Phase Shift Oscillator using transistors Exp. 1: Common Emitter Amplifier Exp. PART – II TESTING USING HARDWARE LABORATORY Exp. 5(a): Hartley Oscillator Exp. Hyderabad Page 38 . No.Department of ECE Electronic Circuit Analysis Laboratory 4. No.

To plot the transient response waveforms and observe that the CE amplifier produces a phase reversal. Function Generator.Department of ECE PART – II Electronic Circuit Analysis Laboratory EXPERIMENT NO. To plot the frequency response curve and thus determine the lower and upper cutoff frequencies. 4. 5. 3. Apparatus: 1. 8.1 Common Emitter Amplifier Vardhaman College of Engineering. To measure the voltage gain of the amplifier in the mid-frequency region. Capacitors – 1u (2). 6.1. 7. Resistors – 500. RPS – 12V. Transistor – 2n2222. CRO. 10u. Circuit Diagram: Fig. and Bandwidth of the amplifier. 5k. 2k. To measure the maximum signal which can be amplified by the amplifier without having clipped output. 3. To measure the voltage gain of the amplifier for different values of load resistance. Connecting wires and Probes. Hyderabad Page 39 . 5. 10k (2). 2. 2. 47k. Breadboard. – 1 COMMON EMITTER AMPLIFIER Objective: 1. 2. 4.

Procedure: 1. AV = V VO . Connect the circuit diagram as shown in the fig. 6. The resistor RE stabilizes it against temperature variations. The capacitor CE bypasses the resistor RE for the ac signal. As it offers very low impedance path for ac.Department of ECE Theory: Electronic Circuit Analysis Laboratory In the amplifier circuit shown in the figure.1. 2. Repeat the above steps from 4 to 6 for different values of load resistance. the resistors R1. When this changing collector current passes through the load resistance RC. Hyderabad Page 40 . As the output voltage is much more than the input voltage. and Rac is the load resistance in the circuit. because of which the base-current changes. R2 and RE fix the operating point. Find the voltage gain.1. Since collector current depends upon the base current. Expected Waveforms/Graphs: 1. 4. Transient Response: 2. AV(dB) = 20 log O V VS S . Increase Vs till undistorted waveform is seen on the CRO. the base-emitter voltage changes. The voltage gain of this amplifier is given by the formula AV = βRac r in ∠180° Where rin is the dynamic input resistance.2 (a) Transient Response (b) Frequency Response f2 Freq. Set Vs = 0 at 1 KHz. Frequency Response: Vin t Vout Gain Amax Amax/√2 t f1 Fig.1. the collector current also changes. the emitter terminal is almost at ground potential. 7. 2. β is the current amplification factor. Measure the input voltage Vs. When the ac signal is applied to the base. 3. an ac voltage is produced at the output. Vardhaman College of Engineering. 2. the circuit works as an amplifier circuit. Plot AV Vs Frequency using Semi-log paper. 5. 8. Vary the frequency from dc to 1MHz in convenient steps and measure the VO at every frequency for constant input.

Voltage gain of the amplifier with variation in Load: S. Hyderabad Page 41 . 1 2 Load Resistor. Vin (mV) Output Voltage. Vout (V) Absolute Gain Gain in dB 2. No.Department of ECE Observations: Electronic Circuit Analysis Laboratory 1. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Vardhaman College of Engineering. Vin (mV) Output Voltage. Voltage gain of the amplifier with variation in Frequency: Input Frequency (Hz) Input Voltage. No. RL( ) Input Voltage. Vout (V) Absolute Gain Gain in dB S.

6. 8. and upper cut-off frequency is _________Hz. Maximum signal handling capacity of the amplifier (at 1kHz) is ____________mV. The gain bandwidth product is ______________Hz. Vardhaman College of Engineering.Department of ECE Electronic Circuit Analysis Laboratory Inference: 1. 4. The absolute voltage gain of the amplifier in the mid frequency region is ___________. 5. The voltage gain in dB of the amplifier in the mid frequency region is ___________dB. 3. Hyderabad Page 42 . 7. 2. The lower cut-off frequency is ________Hz. The voltage gain _______________ as the load resistance _________________. The phase relation between the input and output voltage waveforms is __________. The Bandwidth of the amplifier is ____________Hz.

Department of ECE WORKSPACE Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 43 .

Calculate the practical frequency of oscillations. Breadboard. 0. 10K(5). Capacitors – 10u(3). 100K. CRO. Calculate the theoretical frequency of oscillations by using the formula fr = 1 2π RC 6 5. Connect the circuit on the breadboard as per the circuit diagram. Vardhaman College of Engineering. 2. 2. 3. 4. 4. Connecting wires and Probes.Department of ECE Electronic Circuit Analysis Laboratory PART – II EXPERIMENT NO. 6. 3. 5. Apparatus: 1. – 2 RC PHASE SHIFT OSCILLATOR USING TRANSISTORS Objective: To measure the frequency of oscillation of RC phase shift oscillator and compare with that of the theoretical value. Circuit Diagram: Procedure: 1.01u(3) RPS – 5V. Transistor – 2n2222. Connect the output of the circuit to the Channel 1 of the CRO using BNC Probe. Note down the amplitude and time period of the output waveform. 7. Resistors – 56K. Hyderabad Page 44 .

frequency fr = 1 Hz = ____________Hz. Hyderabad Page 45 . Therefore. fr = fr = 1 2π RC 6 Observations: Inference: Frequency of the oscillations: Time period T of the ac signal available at the output = _____________s. 2π RC 6 Vardhaman College of Engineering.Department of ECE Expected Waveforms/Graphs: Electronic Circuit Analysis Laboratory Vout t Calculations: Theoretical Frequency of Oscillations.

Hyderabad Page 46 .Department of ECE WORKSPACE Electronic Circuit Analysis Laboratory Vardhaman College of Engineering.

Observe the cross over distortion in the output. Connect the circuit as shown in the figure. Vardhaman College of Engineering. 3. Apply sinusoidal input voltage of 1V. Transistors – 2n2222 (NPN) or SL100 (NPN). 4. 1 kHz to the circuit from the function generator and observe it on the channel 1 of the CRO. Connecting wires and Probes.Department of ECE PART – II Electronic Circuit Analysis Laboratory EXPERIMENT NO. 2. Circuit Diagram: Procedure: 1. Connect the output to the channel 2 of the CRO. 6. 3. 5. – 3 CLASS B COMPLEMENTARY SYMMETRY POWER AMPLIFIER Objective: To observe the cross over distortion present in the Class B Complementary Symmetry power amplifier. Breadboard. Hyderabad Page 47 . 4. 2. CRO. RPS – 12V. Apparatus: 1. 2n2907A (PNP) or SK100 (PNP). Resistor – 10K (1).

we observe that____________________________________________________________ ______________________________________________________________________.Department of ECE Electronic Circuit Analysis Laboratory Expected Waveforms/Graphs: Vin t Vout t Inference: From transient response of class B complementary symmetry power amplifier. Vardhaman College of Engineering. Hyderabad Page 48 .

Department of ECE WORKSPACE Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 49 .

Hyderabad . 4. 7. 1K. To measure the gain at resonant frequency. 10u (2). RPS – 12V. 5. 100u. 10K. Circuit Diagram: Theory: A tuned amplifier uses one or more parallel tuned LC circuit as the load impedance. Inductor – 10mH. The resonant frequency of tuned amplifier is given by fr = 1 2π LC Page 50 Vardhaman College of Engineering. To measure the resonant frequency of a single tuned voltage amplifier. 2. 8. Objective: 1. – 4 SINGLE TUNED VOLTAGE AMPLIFIER Prelab: 1. Tuned amplifiers are properly referred to as radio frequency (RF) amplifiers. Resistors – 100. 510. 6.Department of ECE PART – II Electronic Circuit Analysis Laboratory EXPERIMENT NO. Capacitors – 100n. Connecting wires and Probes. CRO. Apparatus: 1. 47K. 2. 2. Study the operation of Single Tuned Voltage Amplifiers. Transistor – 2n2222. Tuned amplifiers are used for amplifying electrical signals consisting of either a single radio frequency (>30KHz) or a narrow band of frequencies in the RF (radio frequency) region. Breadboard. Study the concept of Resonance and Parallel Tuned Circuit. 3.

Expected Waveforms/Graphs: Theoretical Calculations: fr = 1 2π LC 1 −3 2π 10 ×10 × 100 ×10−9 = 5. Apply maximum undistorted input signal. Vary the frequency conveniently and note down the output voltage. 2. Calculate the gain at resonant frequency. 5. Plot the curve between gain and resonant frequency. Calculate the resonant frequency and compare it with the theoretical value. Electronic Circuit Analysis Laboratory Connect the circuit as per the circuit diagram. 4. 6.Department of ECE Procedure: 1. 3.03 KHz Practical Calculations: = Vardhaman College of Engineering. Hyderabad Page 51 .

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Input Frequency (Hz) Input Voltage. What is neutralization? Vardhaman College of Engineering. the factors that affect its value. What is stagger tuning? 5. 3. No. The maximum gain at resonant frequency is _______________________. and its relationship to amplifier bandwidth. What is tuned amplifier? 2. Vin (mV) Electronic Circuit Analysis Laboratory Output Voltage. Hyderabad Page 52 .Department of ECE Observations: S. Discuss the quality (Q) factor of a tuned amplifier. How does tuned amplifier acts as a filter? 4. Vout (V) Absolute Gain Gain in dB Inference: The resonant frequency of single tuned voltage amplifier is ______________________. Criticism: 1.

Department of ECE Electronic Circuit Analysis Laboratory WORKSPACE Vardhaman College of Engineering. Hyderabad Page 53 .

Hartley oscillator Theory: The Hartley Oscillator is shown in the fig. 4. 6. 100 Ω) 5. each 1 No.033 µf. 15. Potentiometer (47 KΩ) Capacitors (10 µf) Capacitors (0. Study the procedure for conducting the experiment in the lab. L2 and a capacitor C determines the frequency of oscillator.01 µf. 0. 100 mH) Bread board 1 No. 0. 1 No.022 µf. 1 No. Objectives: To determine the frequency of oscillations of Hartley oscillator. 2. 10. Regulated power supply CRO Transistor (2N2222) Resistors (100 KΩ. 8. 0.1. 1 No. 3 Nos. Hyderabad Page 54 . – 5(a) HARTLEY OSCILLATOR PreLab: 1.047 µf) Inductors (2 mH.Department of ECE Electronic Circuit Analysis Laboratory PART – II EXPERIMENT NO. The condition for sustained oscillations is h fe = L1 L2 . each 1 No. 7. The frequency of Colpitt’s oscillator is given by fr = 1 2π ( L1 + L2 )C . Apparatus: 1. 1 KΩ. Study the operation and working principle of Hartley Oscillator. The feedback network consisting of inductors L1. 1 No. Connecting wires Circuit Diagram: Fig. Vardhaman College of Engineering. each 1 No. 9. 10 KΩ. 2. 3.

7. 2. 5. 3. 6. which elements provide required dc bias to the transistor? In Hartley oscillator. 6. where L = L1 + L2 and C = C1 or C2 or C3 or C4 Observations: S. 15.01 C2 = 0. Connect CRO at the output terminals of the circuit. Expected Graph: VO t Fig.1 with C1.033 C4 = 0. which elements determine the frequency of the output signal? What are the advantages of Hartley over colpitt’s oscillator? What is piezo electric effect? Draw the ac equivalent circuit of a crystal.No. What is the most frequently used material in crystal oscillator? Vardhaman College of Engineering. 4. 4. 5. Repeat the above steps for different values of capacitors C2. Hyderabad Page 55 . What is the condition for sustained oscillations in Hartley oscillator? In Hartley oscillator. fO = 1 2π LC .Department of ECE Procedure: 1. 2.2 Output Waveform Calculations: Frequency of oscillations.047 fT (Hz) fP (Hz) fT is theoretical frequency of oscillations fP is practical frequency of oscillations Frequency of given Hartley oscillator is determined both practically and theoretically Inference: Criticism: 1. Note down the amplitude and frequency of the output signal.022 C3 = 0. Adjust the potentiometer until undistorted sinusoidal output is observed on CRO. C3. This frequency will be the frequency of oscillations of Hartley oscillator. and C4. 1 2 3 4 Where L1 (mH) 100 100 100 100 L2 (mH) 2 2 2 2 C (µf) C1 = 0. Electronic Circuit Analysis Laboratory Connect the circuit on the bread board as shown in fig 15. 3.

Department of ECE Workspace Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 56 .

1 No.01 µf) Inductors (5mH) Bread board Connecting wires 1 No. Hyderabad Page 57 . 3. 6. 8. 47 KΩ) Capacitors (100 µf. 10 KΩ. 0. Circuit Diagram: Fig. Apparatus: 1. The frequency of Colpitt’s oscillator is given by fr = 1 2π C1 + C2 LC1C2 . The condition for sustained oscillations is h fe = C2 C1 . 1. 4. 2. 16. 1 No.1 µf. 7. Colpitt’s Oscillator Theory: The Colpitt’s Oscillator is shown in the fig. Study the procedure for conducting the experiment in the lab. each 1 No. The feedback network consisting of capacitors C1.s 1 No.Department of ECE PART – II Electronic Circuit Analysis Laboratory EXPERIMENT NO. 1 No. – 5(b) COLPITT’S OSCILLATOR PreLab: 1. Objectives: To determine the frequency of oscillations of Colpitt’s oscillator. Regulated power supply CRO Transistor (2N2222) Resistors (1 KΩ. each 3 No. 2. 0. 5. Study the operation and working principle of Colpitt’s Oscillator. Vardhaman College of Engineering. C2 and an inductor L determines the frequency of oscillator.1.5KΩ.

fO = 1 2π LC . 3. Note down the amplitude and frequency of the output signal. Criticism: 1. 4. 2. Electronic Circuit Analysis Laboratory Connect the circuit on the bread board as shown in fig 16. 3.Department of ECE Procedure: 1. where C = C1C2 C1 + C2 Observations: Theoretical frequency of oscillations Practical frequency of oscillations = = Inference: Frequency of given Colpitt’s oscillator is determined both practically and theoretically. Expected Graph: VO t Calculations: Frequency of oscillations. What is the condition for sustained oscillations in Colpitt’s oscillator? In Colpitt’s oscillator. which elements provide required dc bias to the transistor? In Colpitt’s oscillator. Hyderabad Page 58 . 2. 5.1 Connect CRO at the output terminals of the circuit. which elements determine the frequency of the output signal? What are the applications of Colpitt’s oscillator? What are the differences between Colpitt’s oscillator and Hartley oscillator? Vardhaman College of Engineering. 4. This frequency will be the frequency of oscillations of Colpitt’s oscillator.

Department of ECE Workspace Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 59 .

Department of ECE PART – II Electronic Circuit Analysis Laboratory EXPERIMENT NO. Apparatus: 1. 2.1 µf-1. Regulated power supply CRO Transistor Resistors (560Ω. 1 No. 10KΩ. Circuit Diagram: Vardhaman College of Engineering. 8. 2. 22µf-2) Inductors (2. 3. Study the operation and working principle of Class C Power Amplifier. 56Ω. 1 No. each 1 No. Objectives: To determine the efficiency of Class C Power Amplifier. 1 No. Hyderabad Page 60 . each 4 Nos. – 6 CLASS C POWER AMPLIFIER PreLab: 1. 6. 7. 470Ω) Capacitors (100 µf-1. Study the procedure for conducting the experiment in the lab. 0. 1 No. 4.5mH) Bread board Connecting wires 1 No. 5.

Connect the circuit as shown in the figure. and as a result the collector losses are still less so that the efficiency is very high. Calculate bandwidth from the graph. Note down the corresponding output voltage from CRO for each frequency. Calculate the efficiency η =( Pac/ Pdc)x 100 V pp 2 8 RL or I pp 2 RL 8 . 6. The load is a tuned circuit (parallel resonant circuit) which converts the non-sinusoidal output to nearly sinusoidal form. Hyderabad Page 61 . 4. 2. in radio and television transmitters where efficiency is of atmost importance. the average collector current is much less. Calculate the resonant frequency using 1 2π LC 8. 10. Calculate the DC input power using Pdc =VCC IC. 12. The resulting output current is non sinusoidal. Because of the flow of collector current less than 180°. Vardhaman College of Engineering. Plot the graph between gain (dB) and frequency. At that point noted down the ammeter reading and output voltage from CRO. By keeping input voltage constant. The class C operation is achieved by reverse biasing the emitter-base junction. The main application of a class C operation is in communication. 11. Class C amplifiers are mostly used in high frequency applications. To calculate efficiency fix the input frequency at resonant frequency. 5. 7. conduction takes place for less than one half cycle (typically 120° to 150°). the transistor is in the active region for less than half cycle. By varying the input voltage observe the maximum distortionless waveform. Connect the input signal (say 15 to 18V). In class C operation. Calculate the AC output power using Pac = 13.Department of ECE Electronic Circuit Analysis Laboratory Theory: In a class C amplifier. vary the frequency in regular steps. Procedure: 1. The tuned circuit helps in rejecting harmonics that are developed in the transistor due to its class C operation. The output current remains zero for more than half cycle. which sets the dc operating point below cutoff and allows only the portion of the input signal that overcomes the reverse bias to cause collector current flow. The class C operated amplifier is used as a radio-frequency amplifier in transmitters. In this operation. 9. as shown in figure 2-15 view D. 3. collector current flows for less than one half cycle of the input signal. The DC current drawn from the power supply is very small. And also this operation is used with resonant or tuned circuits as for example.

Vout (V) Absolute Gain Gain in dB Vardhaman College of Engineering. S. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Input Frequency (Hz) Input Voltage. Vin (mV) Output Voltage. No.Department of ECE Expected Graph: Electronic Circuit Analysis Laboratory Gain Amax Amax/√2 f1 Observations: f2 Freq. Hyderabad Page 62 .

Department of ECE Calculations: Electronic Circuit Analysis Laboratory Resonant frequency: PDC= PAC= Efficiency = Inference: Vardhaman College of Engineering. Hyderabad Page 63 .

Department of ECE WORKSPACE Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 64 .

No. No. Hyderabad Page 65 . 1: Thevenin’s Analysis Exp. 4: Cascode Amplifier Vardhaman College of Engineering. PART – III EXTRA EXPERIMENTS/EXERCISES FOR PRACTICE IN PSPICE Exp. 3: Darlington Pair Amplifier Exp. 2: Series RLC circuit Exp.Department of ECE Electronic Circuit Analysis Laboratory 5. No. No.

Exercise – 2: A pulse input is applied to the RLC circuit as shown in the figure.4)/Vin. Vardhaman College of Engineering. The capacitor volyage V(3) and the current through R1 i. (b) the input resistance Rin = Vin/Iin . Use PSpice to calculate and print (a) the voltage gain Av = V(2. and (d) Thevenin’s voltage VTh between nodes 2 and 4. Use PSPICE to calculate and plot the transient response from 0 to 400us with a time increment of 1us. I(R1) are to be plotted. Hyderabad Page 66 . (c) Thevenin’s (output) resistance Rout=RTh between nodes 2 and 4.Department of ECE Exercise – 1: Electronic Circuit Analysis Laboratory A DC Circuit is shown in the figure.e..

Vardhaman College of Engineering.Department of ECE Electronic Circuit Analysis Laboratory Exercise – 3: A bipolar Darlington pair amplifier is shown in figure. The input voltage is 5V. Calculate and print the voltage gain. and the output resistance. the input resistance. Hyderabad Page 67 .

Perform the experiment to plot the transient and frequency responses using SPICE schematic and circuit file editors.Department of ECE Exercise – 4: Electronic Circuit Analysis Laboratory A cascade amplifier circuit is shown in the figure below. Hyderabad Page 68 . Vardhaman College of Engineering.

Hyderabad Page 69 .Department of ECE WORKSPACE Electronic Circuit Analysis Laboratory Vardhaman College of Engineering.

Hyderabad Page 70 .Department of ECE Workspace Electronic Circuit Analysis Laboratory Vardhaman College of Engineering.

Department of ECE Workspace Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 71 .

Hyderabad Page 72 .Department of ECE Workspace Electronic Circuit Analysis Laboratory Vardhaman College of Engineering.

Department of ECE Workspace Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 73 .

Department of ECE Workspace Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 74 .

Department of ECE Workspace Electronic Circuit Analysis Laboratory Vardhaman College of Engineering. Hyderabad Page 75 .

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