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Technical Specifications

Technical Specifications

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Super Sensitive Security Integrated System

Technical Specifications



Super Sensitive Security Integrated System

Technical Specifications: Title of the project : Security integrated system based on wireless access Protocol for industrial applications with SMS Alert System using GSM Modem Domain


Embedded Systems Design
Embedded C, Keil, Proload

Microcontroller Power Supply Display Crystal Security Channels Access Sensor

: : : : : :

AT89S52 +5V, 750mA Regulated Power Supply LED 5mm 11.0592MHz 5 Reed Switch / Magnetic sensors, IR Sensor Vibration Sensor, Piezo Electric sensor

Panic Alert Communication Device Applications Developed By Phone

: : : : :

Push-to-on switch GSM Modem Industries, Banks, Jeweler Shops, Home security M/S Wine Yard Technologies 040-64646363, www.WineYardTechnologies.com



Super Sensitive Security Integrated System




This Project describes a design of effective security alarm system that can monitor an industry with eight different sensors. the LED 'alarm armed' will flash during the exit-delay. This LED shows whether the sensor has been activated and whether the wiring to the sensor is in order. This micro controller provides all the functionality . 'Alarm triggered LED’ turns off only when the alarm is switched off with key switch Sw1. GREENFORT ENGINEERING COLLEGE 4 . When the buzzer is armed. The uniqueness of this project is. These numbers are stored in EEPROM.Super Sensitive Security Integrated System Abstract: Security is primary concern for every one. This time can be varied by adopting small changes in the source code. These sensors need to have their contacts closed when in the inactive state (i. Unauthorized access. A maximum of 5 sensors can be connected to the buzzer. The project is built around the AT89S52 micro controller from Atmel. is this new signal level passed on for processing by the micro controller program. After the exit-delay. Fire accident. each sensor needs to have its tamper connection wired as well. wall braking. It also takes care of filtering of the signals at the inputs. IR detection. the LED will light continuously. Normally Closed). Only after an input has remained unchanged for 30 milliseconds. This LED will also continue to be on until the alarm is switched off. The LED 'alarm triggered LED' flashes during the entry-delay and will turn on continuously once an actual alarm has been generated. In addition. The LED 'tamper' lights up when the tamper input is opened.e. and fire detection can be monitored by the status of each individual sensor and is indicated with an LED. it can be determined afterwards which sensor (or tamper input) caused the alarm to trigger. This numbers can be changed at any time by the user using a 4X4 key pad. it sends an caution SMS to four mobile numbers. When an alarm has taken place. A power supply voltage of +5 VDC is available for each sensor at the corresponding wiring terminals. The alarm is also fitted with a so-called 'panic button'.

GREENFORT ENGINEERING COLLEGE 5 . Bridge type full wave rectifier is used to rectify the ac out put of secondary of 230/12V step down transformer.Super Sensitive Security Integrated System This project uses regulated 5V. 7805 three terminal voltage regulator is used for voltage regulation. 750mA power supply.

Super Sensitive Security Integrated System BLOCK DIAGRAM GREENFORT ENGINEERING COLLEGE 6 .

Super Sensitive Security Integrated System Block Diagram: GREENFORT ENGINEERING COLLEGE 7 .


VCD player. Appliances such as the air-conditioner. printer. Each of these appliances will have a processor and special hardware to meet the specific requirement of the application along with the GREENFORT ENGINEERING COLLEGE 9 . DVD player.Super Sensitive Security Integrated System INTRODUCTION TO EMBEDDED SYSTEMS INTRODUCTION TO EMBEDDED SYSTEMS An embedded system can be defined as a computing device that does a specific focused job. fax machine. mobile phone etc. are examples of embedded systems.

data communication. remote controls for TV and air-conditioner. they do not have secondary storage devices such as the CDROM or the floppy disk. In contrast. particularly the memory. Consumer appliances: At home we use a number of embedded systems which include digital camera. The desktop/laptop computer is a general purpose computer. called real-time systems. Embedded systems have very limited resources. video recorders etc.consumer electronics. engine spark control. VCO player. wireless communication. electronic toys. DVD player. In some embedded systems. The embedded software is also called “firm ware”. the software in the embedded systems is always fixed listed below: · Embedded systems do a very specific task. biomedical engineering. The embedded system market is one of the highest growth areas as these systems are used in very market segment. telecommunications. office automation. You can use it for a variety of applications such as playing games. Embedded systems have to work against some deadlines. transportation. Embedded systems are constrained for power. As many embedded systems operate through a battery. software development and so on. the deadlines are stringent. industrial automation. GREENFORT ENGINEERING COLLEGE 10 . the power consumption has to be very low.Super Sensitive Security Integrated System embedded software that is executed by the processor for meeting that specific requirement. microwave oven. The palmtops are powerful embedded systems using which we can carry out many general-purpose tasks such as playing games and word processing. video game consoles. A specific job has to be completed within a specific time. Application Areas Nearly 99 per cent of the processors manufactured end up in embedded systems. accounting. air-conditioning. Today’s high-tech car has about 20 embedded systems for transmission control. digital diary. word processing. Missing a deadline may cause a catastrophe-loss of life or damage to property. · Some embedded systems have to operate in extreme environmental conditions such as very high temperatures and humidity. navigation etc. Generally. they cannot be programmed to do different things. Even wristwatches are now becoming embedded systems. . military and so on.

Computer networking: Computer networking products such as bridges. web cameras are embedded systems. oil exploration. key telephone. Asynchronous Transfer Mode (ATM). blood pressure measuring devices. are embedded systems . the embedded systems can be categorized as subscriber terminals and network equipment. Packet Assemblers Dissemblers GREENFORT ENGINEERING COLLEGE 11 . These include pharmaceutical. modem. other than the end systems (desktop computers) we use to access the networks. robots are used. printer. analyze the packets and send them towards the destination after doing necessary protocol conversion. humidity. and then take appropriate action based on the monitored levels to control other devices or to send information to a centralized monitoring station. terminal adapters. ISDN phones. voltage. multiple access systems. fax machine. The subscriber terminals such as key telephones.Super Sensitive Security Integrated System Office automation: The office automation products using em embedded systems are copying machine. The embedded systems for industrial use are designed to carry out specific tasks such as monitoring the temperature.. nuclear energy. X. For example. electricity generation and transmission. X-ray scanners. endoscopy etc. which are programmed to do specific jobs. routers. The two networks may be running different protocol stacks. These equipments include diagnostic aids such as ECG. The router’s function is to obtain the data packets from incoming pores. Telecommunications: In the field of telecommunications. sugar. current etc. pressure. radiation. Medical electronics: Almost every medical equipment in the hospital is an embedded system. colonscopy. Integrated Services Digital Networks (ISDN). Most networking equipments. cement. a router interconnects two networks.25 and frame relay switches are embedded systems which implement the necessary data communication protocols. Industrial automation: Today a lot of industries use embedded systems for process control. In hazardous industrial environment. scanner etc. Developments in medical electronics have paved way for more accurate diagnosis of diseases. The network equipment includes multiplexers. EEG. The robots are now becoming very powerful and carry out many interesting and complicated tasks such as hardware assembly. where human presence has to be avoided. equipment used in blood analysis.

Used to encrypt the data/voice being transmitted on communication links such as telephone lines. IP phone. Developing embedded systems for security applications is one of the most lucrative businesses nowadays. data communication. The mobile phone is one of the marvels of the last decade of the 20’h century. Test equipment such as oscilloscope. biomedical engineering. The measuring equipment we use in laboratories to measure parameters such as weight. the test and measuring equipment are now becoming portable facilitating easy testing and measurement in the field by field-personnel. temperature. Security devices at homes. We need to protect our homes and offices. spectrum analyzer. and also the information we transmit and store. manufacturing. offices. are all embedded systems. humidity. mobile switching centers are also powerful embedded systems. voltage. pressure. sate11ite modems etc. every industrial segment. The Personal Digital Assistants and the palmtops can now be used to access multimedia services over the Internet. IP gatekeeper etc. telecommunication.Super Sensitive Security Integrated System (PADs). protocol analyzer. airports etc. Mobile communication infrastructure such as base station controllers. Thank to miniaturization. GREENFORT ENGINEERING COLLEGE 12 . current etc. Embedded systems find applications in . Wireless technologies: Advances in mobile communications are paving way for many interesting applications using embedded systems. transportation. avionics. defense. Biometric systems using fingerprint and face recognition are now being extensively used for user authentication in banking applications as well as for access control in high security buildings. radio communication test set etc. Security: Security of persons and information has always been a major issue.consumer electronics. process control and industrial automation. security etc. logic analyzer. Insemination: Testing and measurement are the fundamental requirements in all scientific and engineering activities. Encryption devices are nearly 99 per cent of the processors that are manufactured end up in~ embedded systems. IP gateway. It is a very powerful embedded system that provides voice communication while we are on the move. for authentication and verification are embedded systems. are the latest embedded systems that provide very low-cost voice communication over the Internet. are embedded systems built around powerful processors.

Well. of the size of a credit card. has a small micro-controller and memory. and it interacts with the smart card reader! ATM machine and acts as an electronic wallet. the list goes on. or at least feel. It is no exaggeration to say that eyes wherever you go. also expanded as Any Time Money) machines. Smart card technology has the capability of ushering in a cashless society. you can see.Super Sensitive Security Integrated System Finance: Financial dealing through cash and cheques are now slowly paving way for transactions using smart cards and ATM (Automatic Teller Machine. the work of an embedded system! Overview of Embedded System Architecture GREENFORT ENGINEERING COLLEGE 13 . Smart card.

In such a case. you need to integrate the application software with the operating system and then transfer the entire software on to the memory chip. This hardware also contains memory chips onto which the software is loaded. As shown in Fig. it is advisable to have an operating system. the software will continue to run for a long time you don’t need to reload new software. toys etc. The embedded system architecture can be represented as a layered architecture as shown in Fig. there are significant differences.. It is not compulsory to have an operating system in every embedded system. Now. However. The operating system runs above the hardware. · Central Processing Unit (CPU) · Memory (Read-only Memory and Random Access Memory) · Input Devices · Output devices GREENFORT ENGINEERING COLLEGE 14 . The same architecture is applicable to any computer including a desktop computer. Once the software is transferred to the memory chip. and the application software runs above the Fig 4. there is no need for an operating system and you can write only the software specific to that application. let us see the details of the various building blocks of the hardware of an embedded system. For small appliances such as remote control units.1 LAYERED ARCHITECTURE OF EMBEDDED SYSTEM operating system. For applications involving complex processing. The software residing on the memory chip is also called the ‘firmware’. the building blocks are. air conditioners.Super Sensitive Security Integrated System Every embedded system consists of custom-built hardware built around a Central Processing Unit (CPU).

GREENFORT ENGINEERING COLLEGE 15 . The contents of the RAM will be erased if power is switched off to the chip.Super Sensitive Security Integrated System · Communication interfaces · Application-specific circuitry Fig 4. but you need to use many external components with them. the firmware is stored in the ROM. analog-to digital converter etc. serial communication interface. A micro-controller is a low-cost processor. whereas ROM retains the contents even if the power is switched off. So.2 BLOCK DIAGRAM Central Processing Unit (CPU): The Central Processing Unit (processor. When power is switched on. On the other hand. So. there will be many other components such as memory. D5P is used mainly for applications in which signal processing is involved such as audio and video processing. in short) can be any of the following: microcontroller. microprocessors are more powerful. for small applications. the program is program is executed. a micro-controller is the best choice as the number of external components required will be very less. microprocessor or Digital Signal Processor (DSP). Memory: The memory is categorized as Random Access 11emory (RAM) and Read Only Memory (ROM). the processor reads the ROM. Its main attraction is that on the chip itself.

A keypad may be used to input only the digits. they take inputs from sensors or transducers 1’fnd produce electrical signals that are in turn fed to other systems. The entire hardware has to be given power supply either through the 230 volts main supply or through a battery. or for visual indication of alarms. Some embedded systems will have a few Light Emitting Diodes (LEDs) to indicate the health status of the system modules. depending on its application. RS485.Super Sensitive Security Integrated System Input devices: Unlike the desktops. There will be no keyboard or a mouse. A small Liquid Crystal Display (LCD) may also be used to display some important parameters. interact with other embedded systems at they may have to transmit data to a desktop. RS422. The hardware has to design in such a way that the power consumption is minimized. Ethernet etc. the embedded systems are provided with one or a few communication interfaces such as RS232. Universal Serial Bus (USB). Many embedded systems used in process control do not have any input device for user interaction. transducers. Communication interfaces: The embedded systems may need to. GREENFORT ENGINEERING COLLEGE 16 . Application-specific circuitry: Sensors. the input devices to an embedded system have very limited capability. Many embedded systems will have a small keypad-you press one key to give a specific command. To facilitate this. special processing and control circuitry may be required fat an embedded system. IEEE 1394. Output devices: The output devices of the embedded systems also have very limited capability. This circuitry interacts with the processor to carry out the necessary work. and hence interacting with the embedded system is no easy task.


this voltage is given to a voltage regulator to obtain a pure constant dc voltage. The ac. So in order to get a pure dc voltage. 230V AC 50Hz D. the output voltage from the rectifier is fed to a filter to remove any ac components present even after rectification. input i.1: Power supply GREENFORT ENGINEERING COLLEGE 18 ..e.Super Sensitive Security Integrated System BLOCK DESCRIPTION POWER SUPPLY: The input to the circuit is applied from the regulated power supply. The output obtained from the rectifier is a pulsating dc voltage.C Output Step down transform Bridge Rectifie Filter Regulator Fig 5. Now. 230V from the mains supply is step down by the transformer to 12V and is fed to a rectifier.

But these voltages cannot be obtained directly. into pulsating D.Super Sensitive Security Integrated System Transformer: Usually. Thus the a.C. Fig 5. 230V is to be brought down to the required voltage level. Fig 5. DC voltages are required to operate various electronic equipment and these voltages are 5V.C. a step down transformer is employed to decrease the voltage to a required level.e. Thus. It converts A.3 RECTIFIER GREENFORT ENGINEERING COLLEGE 19 . This is done by a transformer. 9V or 12V.. a bridge rectifier is used because of its merits like good stability and full wave rectification. The rectifier may be a half wave or a full wave rectifier. In this project.2 TRANSFORMER Rectifier: The output from the transformer is fed to the rectifier.c input available at the mains supply i.

The circuit has four diodes connected to form a bridge.Super Sensitive Security Integrated System The Bridge rectifier is a circuit. diodes D2 and D4 conduct whereas. The ac input voltage is applied to the diagonally opposite ends of the bridge. The load resistance is connected between the other two ends of the bridge. The Bridge rectifier circuit is shown in the figure. The conducting diodes D2 and D4 will be in series with the load resistance RL and hence the current flows through RL in the same direction as in the previous half cycle.4 BRIDGE RECTIFIER GREENFORT ENGINEERING COLLEGE 20 . Thus a bi-directional wave is converted into a unidirectional wave. For the positive half cycle of the input ac voltage. For the negative half cycle of the input ac voltage. diodes D1 and D3 conduct. which converts an ac voltage to dc voltage using both half cycles of the input ac voltage. The conducting diodes will be in series with the load resistance RL and hence the load current flows through RL. Fig 5. whereas diodes D2 and D4 remain in the OFF state. D1 and D3 remain OFF.

C. In order to obtain these voltage levels. 7805 and 7812 voltage regulators are to be used.5 VOLTAGE REGULATOR GREENFORT ENGINEERING COLLEGE 21 . The first number 78 represents positive supply and the numbers 05. It removes the ripples from the output of rectifier and smoothens the D. if either of the two is varied. However. power supply of 5V and 12V are required. Output received from this filter is constant until the mains voltage and load is maintained constant. In this project. Therefore a regulator is applied at the output stage. it regulates the input applied to it. 12 represent the required output voltage levels.Super Sensitive Security Integrated System Filter: Capacitive filter is used in this project. voltage received at this point changes. A voltage regulator is an electrical regulator designed to automatically maintain a constant voltage level.C. Fig 5. Voltage regulator: As the name itself implies. D.

Super Sensitive Security Integrated System AT89S52 Microcontroller GREENFORT ENGINEERING COLLEGE 22 .

proload tool has been used to burn the program onto the microcontroller. Flash and NV-RAM. 8051 is available in different memory types such as UV-EPROM. The features. meaning that the CPU can work on only 8 bits of data at a time.  2. A microcontroller has a CPU in addition to a fixed amount of RAM. Microcontroller is a programmable device. ROM. but today it has largely been superseded by a vast range of enhanced devices with 8051compatible processor cores that are manufactured by more than 20 independent manufacturers including Atmel. I/O ports and a timer embedded all on a single chip. GREENFORT ENGINEERING COLLEGE 23 . The fixed amount of on-chip ROM.7V to 6V Operating Range. pin description of the microcontroller and the software tools used are discussed in the following sections.  Fully Static Operation: 0 Hz to 24 MHz. FEATURES OF AT89S52:  4K Bytes of Re-programmable Flash Memory.Super Sensitive Security Integrated System MICROCONTROLLERS: Microprocessors and microcontrollers are widely used in embedded systems products.  RAM is 128 bytes. In order to program the device. Data larger than 8 bits has to be broken into 8-bit pieces to be processed by the CPU. RAM and number of I/O ports in microcontrollers makes them ideal for many applications in which cost and space are critical. The present project is implemented on Keil Uvision.  Two-level Program Memory Lock. 8051 is an 8-bit processor. The Intel 8051 is Harvard architecture. single chip microcontroller (µC) which was developed by Intel in 1980 for use in embedded systems. It was popular in the 1980s and early 1990s. Infineon Technologies and Maxim Integrated Products.

The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. serial port and interrupt system to continue functioning.  Six Interrupt Sources. which provides a highly flexible and cost-effective solution to many embedded control applications. the Atmel AT89S52 is a powerful microcomputer. By combining a versatile 8-bit CPU with Flash on a monolithic chip.  Two 16-bit Timer/Counters.Super Sensitive Security Integrated System  128 x 8-bit Internal RAM. high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable memory.  Low-power Idle and Power-down Modes.  32 Programmable I/O Lines. Description: The AT89S52 is a low-voltage. GREENFORT ENGINEERING COLLEGE 24 .  Programmable Serial UART Channel. timer/counters. The Idle Mode stops the CPU while allowing the RAM. the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes. In addition. The power-down mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset.

Super Sensitive Security Integrated System PIN DIAGRAM: AT89SS52 Fig 6.1 Pin diagram GREENFORT ENGINEERING COLLEGE 25 .

Super Sensitive Security Integrated System Fig 6.2: Block diagram GREENFORT ENGINEERING COLLEGE 26 .

GREENFORT ENGINEERING COLLEGE 27 . Either a quartz crystal or ceramic resonator may be used. but minimum and maximum voltage high and low time specifications must be observed. To drive the device from an external clock source. as shown in Figure 11. XTAL2 should be left unconnected while XTAL1 is driven. since the input to the internal clocking circuitry is through a divide-by-two flip-flop. GND Pin 20 is the ground. The voltage source is +5V. XTAL1 and XTAL2 XTAL1 and XTAL2 are the input and output. There are no requirements on the duty cycle of the external clock signal. as shown in the below figure. respectively.Super Sensitive Security Integrated System PIN DESCRIPTION: Vcc Pin 40 provides supply voltage to the chip. of an inverting amplifier that can be configured for use as an on-chip oscillator.

C2 = 30 pF ± 10 pF for Crystals = 40 pF ± 10 pF for Ceramic Resonators GREENFORT ENGINEERING COLLEGE 28 .Super Sensitive Security Integrated System Fig: 6.3 Oscillator Connections C1.

PSEN (Program store enable) This is an output pin. Upon applying a high pulse to this pin.4 External Clock Drive Configuration RESET Pin9 is the reset pin. EA (External access) Pin 31 is EA. In such cases. It is an input and is active high. It is an active low signal. If the code is stored on an external ROM. The 8051 family members all come with on-chip ROM to store programs. This is often referred to as a power-on reset.Super Sensitive Security Integrated System Fig: 6. GREENFORT ENGINEERING COLLEGE 29 . It is an input pin and must be connected to either Vcc or GND but it cannot be left unconnected. the EA pin is connected to Vcc. the EA pin must be connected to GND to indicate that the code is stored externally. the microcontroller will reset and terminate all the activities.

ports P1. With external pull-up resistors connected to P0. allowing it to be used for both address and data. 1. making them 8-bit ports. Port 2 is designated as A8-A15 indicating its dual function. When ALE=0. it provides data D0-D7. both P1 and P2 are used as simple I/O. P2 and P3 are configured as input ports. ALE indicates if P0 has address or data. When there is no external memory connection. just like P1 and P2. Port 3 GREENFORT ENGINEERING COLLEGE 30 . P2 and P3 each use 8 pins. All the ports upon RESET are configured as input. Port 1 and Port 2 With no external memory connection. This is due to the fact that P0 is an open drain.Super Sensitive Security Integrated System ALE (Address latch enable) This is an output pin and is active high. While P0 provides the lower 8 bits via A0-A7. since P0-P3 have value FFH on them. P1. Upon reset. ALE is used for demultiplexing address and data with the help of an internal latch. 2 and 3 The four ports P0. But the ports P1. Port 0(P0) Port 0 is also designated as AD0-AD7. Therefore. it is the job of P2 to provide bits A8-A15 of the address. the pins of P0 must be connected to a 10K-ohm pull-up resistor. With external memory connections. it can be used as a simple I/O. port 2 must be used along with P0 to provide the 16-bit address for the external memory. P2 bnnsssssssand P3 do not need any pull-up resistors since they already have pull-up resistors internally. Ports 0. but when ALE=1. it has address A0-A7.

depending upon the chip rating and manufacturer. In the 8051 family. But the exact frequency of 11. The program dumped GREENFORT ENGINEERING COLLEGE 31 . to calculate the machine cycle for the 8051. The assembly language program is written and this program has to be dumped into the microcontroller for the hardware kit to function according to the software. In the original version of 8051. The length of the machine cycle depends on the frequency of the crystal oscillator. the calculation is made as 1/12 of the crystal frequency and its inverse is taken.Super Sensitive Security Integrated System Port 3 occupies a total of 8 pins. It can be used as input or output. Therefore. these clock cycles are referred to as machine cycles. The crystal oscillator.0592 MHz crystal oscillator is used to make the 8051 based system compatible with the serial port of the IBM PC. The frequency can vary from 4 MHz to 30 MHz. Table: Port 3 Alternate Functions Machine cycle for the 8051 The CPU takes a certain number of clock cycles to execute an instruction. along with on-chip circuitry. pins 10 through 17. Port 3 has an additional function of providing some extremely important signals such as interrupts. the same as port 1 and port 2. provides the clock source for the 8051 CPU. one machine cycle lasts 12 oscillator periods. P3 does not need any pull-up resistors.

ALE is active only during a MOVX or MOVC instruction. EA/VPP (External Access Enable) GREENFORT ENGINEERING COLLEGE 32 . Before that. With the bit set. this Flash memory has to be programmed and is discussed in the next section. PSEN is activated twice each machine cycle. ALE operation can be disabled by setting bit 0 of SFR location 8EH. ALE/PROG Address Latch Enable is an output pulse for latching the low byte of the address during accesses to external memory. ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be used for external timing or clocking purposes. except that two PSEN activations are skipped during each access to external data memory. PSEN (Program Store Enable) It is the read strobe to external program memory. Otherwise. This pin is also the program pulse input (PROG) during Flash programming. Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. In normal operation.Super Sensitive Security Integrated System in the microcontroller is stored in the Flash memory in the microcontroller. When the AT89S8252 is executing code from external program memory. If desired. the pin is weakly pulled high.

but when ALE=1. ALE is used for de multiplexing address and data with the help of an internal latch. ports P1. it can be used as a simple I/O. that if lock bit 1 is programmed. it provides data D0-D7. allowing it to be used for both address and data. P2 and P3 are configured as input ports. 2 and 3 The four ports P0. This is due to the fact that P0 is an open drain. Therefore. ALE indicates if P0 has address or data. When ALE=0. GREENFORT ENGINEERING COLLEGE 33 . just like P1 and P2. All the ports upon RESET are configured as input. Upon reset. Ports 0. however. making them 8-bit ports. P2 and P3 do not need any pull-up resistors since they already have pull-up resistors internally. P1. Port 0(P0) Port 0 is also designated as AD0-AD7. since P0-P3 have value FFH on them. the pins of P0 must be connected to a 10K-ohm pull-up resistor. P2 and P3 each use 8 pins. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming when 12-volt programming is selected. 1. With external pull-up resistors connected to P0. EA should be strapped to VCC for internal program executions. it has address A0-A7. EA will be internally latched on reset. When there is no external memory connection. But the ports P1. Note.Super Sensitive Security Integrated System EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH.

4. P1. P1. respectively.6.1 can be configured to be the timer/counter 2 external count input (P1.5. Port 1 pins that are externally being pulled low will source current because of the internal pull-ups.0 and P1. As inputs.7 can be configured as the SPI slave port select.0/T2) and the timer/counter 2 trigger input (P1. data input/output and shift clock input/output pins. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins. P1. Some Port 1 pins provide additional functions. and P1. they are pulled high by the internal pull-ups and can be used as inputs.Super Sensitive Security Integrated System Port 1 Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. Port 1 also receives the low-order address bytes during Flash programming and verification.1/T2EX). Table: Port1 Alternate functions GREENFORT ENGINEERING COLLEGE 34 . Furthermore. P1.

Super Sensitive Security Integrated System
Programmable Clock Out: A 50% duty cycle clock can be programmed to come out on P1.0. This pin, besides being a regular I/0 pin, has two alternate functions. It can be programmed to input the external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging from 61 Hz to 4 MHz (for a 16MHz operating frequency). Port 2 With no external memory connection, P2 are used as simple I/O. With external memory connections, port 2 must be used along with P0 to provide the 16-bit address for the external memory. Port 2 is designated as A8-A15 indicating its dual function. While P0 provides the lower 8 bits via A0-A7, it is the job of P2 to provide bits A8-A15 of the address. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. Port 3 Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current because of the pull-ups. Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89S8252, as shown in the following table.



Super Sensitive Security Integrated System

Table: Port 3 Alternate functions

8051 Microcontroller Memory Organisation The microcontroller memory is divided into Program Memory and Data Memory. Program Memory (ROM) is used for permanent saving program being executed, while Data Memory (RAM) is used for temporarily storing and keeping intermediate results and variables. Depending on the model in use (still referring to the whole 8051 microcontroller family) at most a few Kb of ROM and 128 or 256 bytes of RAM can be used. However… All 8051 microcontrollers have 16-bit addressing bus and can address 64 kb memory. It is neither a mistake nor a big ambition of engineers who were working on basic core development. It is a matter of very clever memory organization which makes these controllers a real “programmers’ tidbit“.

Program Memory The oldest models of the 8051 microcontroller family did not have any internal program memory. It was added from outside as a separate chip. These models are recognizable by their label beginning with 803 (for ex. 8031 or 8032). All later models have a few Kbytes ROM embedded, Even though it is enough for writing most of the programs, there are situations when



Super Sensitive Security Integrated System
additional memory is necessary. A typical example of it is the use of so called lookup tables. They are used in cases when something is too complicated or when there is no time for solving equations describing some process. The example of it can be totally exotic (an estimate of selfguided rockets’ meeting point) or totally common (measuring of temperature using non-linear thermo element or asynchronous motor speed control). In those cases all needed estimates and approximates are executed in advance and the final results are put in the tables (similar to logarithmic tables).

Fig 6.5 How does the microcontroller handle external memory depend on the pin EA logic state?



P0 and P2 are not available to the user because they are used for data and address transmission. the execution is continued by reading additional memory.Super Sensitive Security Integrated System EA=0 In this case. Afterwards. a program from built-in ROM is to be executed first (to the last location). internal program memory is completely ignored. EA=1 In this case. GREENFORT ENGINEERING COLLEGE 38 . the pins ALE and PSEN are used too. Besides. in both cases. only a program stored in external memory is to be executed.

A direct addressing GREENFORT ENGINEERING COLLEGE 39 . producers have embedded an additional memory block of 128 locations into the latest versions of the 8051 microcontrollers. which means that each bit being there has its own address from 0 to 7Fh. In order to differentiate between these two physically separated memory spaces. this block contains in total of 128 bits with separate addresses (The 0th bit of the 20h byte has the bit address 0 and the 7th bit of the 2Fh byte has the bit address 7Fh).Super Sensitive Security Integrated System Data Memory As already mentioned. Prior to access them. In both cases. Naturally. serial data buffers etc. a bank containing that register must be selected. Additional Memory Block of Data Memory In order to satisfy the programmers’ permanent hunger for Data Memory. while for later models this number is incremented by additional 128 available registers. The previous versions have the total memory size of 256 locations. this microcontroller family includes many other registers such as: hardware counters and timers. Using trick in this case means that additional memory block shares the same addresses with existing locations intended for the SFRs (80h. input/output ports. these first 256 memory locations (addresses 0-FFh) are the base of the memory. Locations available to the user occupy memory space with addresses from 0 to 7Fh. Common to all types of the 8051 microcontrollers. Next memory block (in the range of 20h to 2Fh) is bit. The first block consists of 4 banks each including 8 registers designated as R0 to R7.FFh).addressable. In order to keep already existing 8-bit architecture and compatibility with other existing models a little trick has been used. Data Memory is used for temporarily storing and keeping data and intermediate results created and used during microcontroller’s operating. Since there are 16 such registers. The third groups of registers occupy addresses 2Fh-7Fh (in total of 80 locations) and does not have any special purpose or feature. it’s not so simple…The problem is that electronics performing addressing has 1 byte (8 bits) on disposal and due to that it can reach only the first 256 locations. First 128 registers and this part of RAM is divided in several blocks. Besides. different ways of addressing are used.

6 Microcontroller internal structure GREENFORT ENGINEERING COLLEGE 40 . while the locations from additional RAM are accessible using indirect addressing.Super Sensitive Security Integrated System is used for all locations in the SFRs. Fig: 6.

Super Sensitive Security Integrated System GREENFORT ENGINEERING COLLEGE 41 .

7) and PSEN#. The 8051 microcontroller has two separate reading signals RD#(P3. I/O ports P2 and P3 are used for their addressing and data transmission. The first one is activated byte from external data memory (RAM) should be read.Super Sensitive Security Integrated System How to extend memory? In case on-chip memory is not enough. From the users’ perspective. it is possible to add two external memory chips with capacity of 64Kb each. while another one is activated to read byte from external GREENFORT ENGINEERING COLLEGE 42 . everything functions quite simple if properly connected because the most operations are performed by the microcontroller itself.

In this way.Super Sensitive Security Integrated System program memory (ROM). Even though the additional memory is rarely used with the latest versions of the microcontrollers. the pin PSEN is activated and the microcon troller reads content from memory chip. i. • A signal on the pin ALE closes the IC circuit 74HCT573 and immediately afterwards 8 higher bits of address (A8-A15) appear on the port. All 8051 microcontrollers use two ways of addressing depending on which part of memory should be accessed: GREENFORT ENGINEERING COLLEGE 43 . It is called Hardward architecture. addressing is performed in the same way. the microcontroller will activate its control output ALE and set the first 8 bits of address (A0-A7) on P0.e. Each instruction consists of two parts. processor processes data according to the program instructions. One part describes what should be done and another part indicates what to use to do it. a desired location in additional program memory is completely addressed. A typical example of such memory extension using special chips for RAM and ROM is shown on the previous picture. The same connections are used both for data and lower address byte. In this way. with no intervention in the program. This later part can be data (binary number) or address where the data is stored. IC circuit 74HCT573 which "lets in" the first 8 bits to memory address pins is activated. • When the program during execution encounters the instruction which resides in external memory (ROM). it will be described here in short what happens when memory chips are connected according to the previous scheme. Addressing While operating. while reading or writing is performed via signals which appear on the control outputs RD or WR. Similar occurs when it is a needed to read some location from external Data Memory. These both signals are active at logical zero (0) level. It is important to know that the whole process is performed automatically. Now. The only thing left over is to read its content. • Pins on P0 are configured as inputs.

the instruction can process data (how depends on the type of instruction: addition. Since only 8 bits are available. the processor knows that indirect addressing is used and jumps over memory space reserved for the SFRs. On indirect addressing. For all latest versions of the microcontrollers with additional memory block (those 128 locations in Data Memory). Obviously.Super Sensitive Security Integrated System Direct Addressing On direct addressing. a register which contains address of another register is specified in the instruction. a number being changed during operating a variable can reside at that specified address. Simply. copy…). when during operating.). the registers R0. In this way it is possible to access any location in the range of 64K. R1 or Stack Pointer are used for specifying 8-bit addresses. If memory extension in form of additional memory chip is used then the 16-bit DPTR Register (consisting of the registers DPTRL and DPTRH) is used for specifying addresses. Indirect Addressing On indirect addressing. GREENFORT ENGINEERING COLLEGE 44 . Only after that. while another half is reserved for the SFRs. it is possible to access only registers of internal RAM in this way (128 locations in former or 256 locations in latest versions of the microcontrollers). this is the only way of accessing them. a value is obtained from a memory location while the address of that location is specified in instruction. the instruction including “@” sign is encountered and if the specified address is higher than 128 (7F hex. this is how only the first 255 locations in RAM can be accessed in this case the first half of the basic RAM is intended to be used freely. A value used in operating process resides in that another register. For example: Only RAM locations available for use are accessed by indirect addressing (never in the SFRs). For example: Since the address is only one byte in size ( the greatest number is 255). subtraction.

Super Sensitive Security Integrated System SFRs (Special Function Registers) SFRs are a kind of control table used for running and monitoring microcontroller’s operating. Even though there are 128 free memory locations intended for their storage. serial connection etc. has its name. It also enables the use of programs written a long time ago for the microcontrollers which are out of production now. Rest of locations are intensionally left free in order to enable the producers to further improved models keeping at the same time compatibility with the previous versions.). address in the scope of RAM and clearly defined purpose ( for example: timer control. Each of these registers. GREENFORT ENGINEERING COLLEGE 45 . the basic core. has only 21 such registers. interrupt. even each bit they include. shared by all types of 8051 controllers.

it must go through accumulator. Once an arithmetical operation is preformed by the ALU. If a data should be transferred from one register to another. this is the most commonly used register that none microcontroller can be imagined without (more than a half 8051 microcontroller's instructions used use the accumulator in some way). GREENFORT ENGINEERING COLLEGE 46 .Super Sensitive Security Integrated System A Register (Accumulator) This is a general-purpose register which serves for storing intermediate results during operating. A number (an operand) should be added to the accumulator prior to execute an instruction upon it. the result is placed into the accumulator. For such universal purpose.

each of registers is called by name so that their exact address is not so important for the user. PC will automatically. write necessary addresses into the microcontroller. All other instructions in the program can use this register as a spare accumulator (A). During programming. During compiling into machine code (series of hexadecimal numbers recognized as instructions by the microcontroller). instead of registers’ name. R Registers (R0-R7) GREENFORT ENGINEERING COLLEGE 47 .Super Sensitive Security Integrated System B Register B register is used during multiply and divide operations which can be performed only upon numbers stored in the A and B registers.

These registers are stored in four banks in the scope of RAM. the Atmel AT89S52 is a powerful microcomputer. The Idle Mode stops the CPU while allowing the RAM. Even they are not true SFRs. The device is manufactured using Atmel’s high-density nonvolatile memory technology and is compatible with the industry-standard MCS-51 instruction set. they are used for temporary storing variables and intermediate results. Which of the banks will be active depends on two bits included in the PSW Register. R2 . Description: The AT89S52 is a low-voltage. GREENFORT ENGINEERING COLLEGE 48 . The power-down mode saves the RAM contents but freezes the oscillator disabling all other chip functions until the next hardware reset. which provides a highly flexible and cost-effective solution to many embedded control applications.R7). Similar to the accumulator. they deserve to be discussed here because of their purpose. In addition.. By combining a versatile 8-bit CPU with Flash on a monolithic chip. serial port and interrupt system to continue functioning. timer/counters.Super Sensitive Security Integrated System This is a common name for the total 8 general purpose registers (R0.. high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable memory. R1. The bank is active when the R registers it includes are in use. the AT89S52 is designed with static logic for operation down to zero frequency and supports two software selectable power saving modes.

provides the clock source for the 8051 CPU. Therefore. But the exact frequency of 11. The frequency can vary from 4 MHz to 30 MHz. these clock cycles are referred to as machine cycles. The crystal oscillator. to calculate the machine cycle for the 8051. In the original version of 8051. In the 8051 family.0592 MHz crystal oscillator is used to make the 8051 based system compatible with the serial port of the IBM PC. along with on-chip circuitry.Super Sensitive Security Integrated System Machine cycle for the 8051 The CPU takes a certain number of clock cycles to execute an instruction. depending upon the chip rating and manufacturer. one machine cycle lasts 12 oscillator periods. The length of the machine cycle depends on the frequency of the crystal oscillator. the calculation is made as 1/12 of the crystal frequency and its inverse is taken. GREENFORT ENGINEERING COLLEGE 49 .


The ability to display numbers. are considered as useful characteristics. which means that they cannot be activated by standard IC circuits. In contrast.Super Sensitive Security Integrated System LIQUID CRYSTAL DISPLAY: LCD stands for Liquid Crystal Display. A model described here is for its low price and great possibilities most frequently used in practice. Incorporation of a refreshing controller into the LCD. These components are “specialized” for being used with the microcontrollers. It displays all the alphabets. This is in contrast to LEDs. It is based on the HD44780 microcontroller (Hitachi) and can display messages in two lines with 16 characters each . backlight etc. appearance of the pointer. They are used for writing different messages on a miniature LCD. characters and graphics. punctuation marks. LCD is finding wide spread use replacing LEDs (seven segment LEDs or other multi segment LEDs) because of the following reasons: 1. thereby relieving the CPU of the task of refreshing the LCD. mathematical symbols etc. 2. The declining prices of LCDs. Ease of programming for characters and graphics. Greek letters. GREENFORT ENGINEERING COLLEGE 51 . In addition. the LED must be refreshed by the CPU to keep displaying the data. which are limited to numbers and a few characters. it is possible to display symbols that user makes up on its own. Automatic shifting message on display (shift left and right). 4. 3.

Their function is described in the table below: Function Ground Power supply Contrast Pin Number 1 2 3 4 Name Vss Vdd Vee RS R/W Control of operating 5 6 7 8 9 10 11 12 13 14 E D0 D1 D2 D3 D4 D5 D6 D7 Data / commands Description 0V +5V 0 .Super Sensitive Security Integrated System PINS FUNCTIONS There are pins along one side of the small printed board used for connection to the microcontroller. There are total of 14 pins marked with numbers (16 in case the background light is built in).Vdd D0 – D7 are interpreted as 0 commands 1 D0 – D7 are interpreted as data 0 Write data (from controller to LCD) 1 Read data (from LCD to controller) Access to LCD disabled 0 Normal operating 1 Data/commands are transferred to From 1 to 0 LCD 0/1 Bit 0 LSB 0/1 Bit 1 0/1 Bit 2 0/1 Bit 3 0/1 Bit 4 0/1 Bit 5 0/1 Bit 6 0/1 Bit 7 MSB Logic State - GREENFORT ENGINEERING COLLEGE 52 .

When used during operating. Each character consists of 5x7 dot matrix. Contrast on display depends on the power supply voltage and whether messages are displayed in one or two lines. a resistor for current limitation should be used (like with any LE diode). Fig 7.Super Sensitive Security Integrated System LCD SCREEN: LCD screen consists of two lines with 16 characters each. Some versions of displays have built in backlight (blue or green diodes). variable voltage 0-Vdd is applied on pin marked as Vee.1 LCD DISPLAY SCREEN GREENFORT ENGINEERING COLLEGE 53 . For that reason. Trimmer potentiometer is usually used for that purpose.

64mS 1. This address is either previously defined or the address of previously transferred character is automatically incremented. which depends on logic state on pin RS: RS = 1 .Super Sensitive Security Integrated System LCD BASIC COMMANDS All data transferred to LCD through outputs D0-D7 will be interpreted as commands or as data.64mS 40uS 40uS 40uS 40uS 40uS 40uS 40uS 40uS 0 0 0 0 0 0 0 0 0 1 1 BF 0 D7 D6 D5 D4 D3 D2 D1 D0 1 D7 D6 D5 D4 D3 D2 D1 D0 GREENFORT ENGINEERING COLLEGE 54 . Displaying position is determined by DDRAM address.D7 are commands which determine display mode.D7 are addresses of characters that should be displayed. Built in processor addresses built in “map of characters” and displays corresponding symbols. List of commands which LCD recognizes are given in the table below: Command Clear display Cursor home Entry mode set Display on/off control Cursor/Display Shift Function set Set CGRAM address Set DDRAM address Read “BUSY” flag (BF) Write to CGRAM or DDRAM Read from CGRAM or DDRAM RS RW D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 0 0 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 I/ 0 0 0 1 D 0 0 1 D U 0 1 D/C R/L x 1 DL N F x CGRAM address DDRAM address DDRAM address 0 0 0 0 0 0 1 x S B x x Execution Time 1.Bits D0 .Bits D0 . RS = 0 .

Super Sensitive Security Integrated System

I/D 1 = Increment (by 1) 0 = Decrement (by 1)

R/L 1 = Shift right 0 = Shift left

S 1 = Display shift on 0 = Display shift off

DL 1 = 8-bit interface 0 = 4-bit interface

D 1 = Display on 0 = Display off

N 1 = Display in two lines 0 = Display in one line

U 1 = Cursor on 0 = Cursor off

F 1 = Character format 5x10 dots 0 = Character format 5x7 dots

B 1 = Cursor blink on 0 = Cursor blink off

D/C 1 = Display shift 0 = Cursor shift

LCD CONNECTION Depending on how many lines are used for connection to the microcontroller, there are 8bit and 4-bit LCD modes. The appropriate mode is determined at the beginning of the process in a phase called “initialization”. In the first case, the data are transferred through outputs D0-D7 as it has been already explained. In case of 4-bit LED mode, for the sake of saving valuable I/O GREENFORT ENGINEERING COLLEGE


Super Sensitive Security Integrated System
pins of the microcontroller, there are only 4 higher bits (D4-D7) used for communication, while other may be left unconnected. Consequently, each data is sent to LCD in two steps: four higher bits are sent first (that normally would be sent through lines D4-D7), four lower bits are sent afterwards. With the help of initialization, LCD will correctly connect and interpret each data received. Besides, with regards to the fact that data are rarely read from LCD (data mainly are transferred from microcontroller to LCD) one more I/O pin may be saved by simple connecting R/W pin to the Ground. Such saving has its price. Even though message displaying will be normally performed, it will not be possible to read from busy flag since it is not possible to read from display.

LCD INITIALIZATION Once the power supply is turned on, LCD is automatically cleared. This process lasts for approximately 15mS. After that, display is ready to operate. The mode of operating is set by default. This means that: 1. Display is cleared 2. Mode DL = 1 Communication through 8-bit interface N = 0 Messages are displayed in one line F = 0 Character font 5 x 8 dots



Super Sensitive Security Integrated System

3. Display/Cursor on/off D = 0 Display off U = 0 Cursor off B = 0 Cursor blink off 4. Character entry ID = 1 Addresses on display are automatically incremented by 1 S = 0 Display shift off Automatic reset is mainly performed without any problems. Mainly but not always! If for any reason power supply voltage does not reach full value in the course of 10mS, display will start perform completely unpredictably. If voltage supply unit can not meet this condition or if it is needed to provide completely safe operating, the process of initialization by which a new reset enabling display to operate normally must be applied. Algorithm according to the initialization is being performed depends on whether connection to the microcontroller is through 4- or 8-bit interface. All left over to be done after that is to give basic commands and of course- to display messages.



contrast should be adjusted. GREENFORT ENGINEERING COLLEGE 58 . To adjust the contrast.Super Sensitive Security Integrated System Fig: 7. As the voltage of this preset is varied. a preset is used which can behave like a variable voltage device.2 Procedure on 8-bit initialization. the voltage should be varied. the contrast of the LCD can be adjusted. For this. CONTRAST CONTROL: To have a clear view of the characters on the LCD.

For example to set the frequency of an alarm tone or the sensitivity of a light-sensitive circuit. They are designed to be mounted directly onto the circuit board and adjusted only when the circuit is built. for example to set the switching point of a circuit with a sensor.4 Potentiometer Symbol Presets These are miniature versions of the standard variable resistor. or control the volume (loudness) in an amplifier circuit. If the terminals at the ends of the track are connected across the power supply.Super Sensitive Security Integrated System Fig: 7. A small screwdriver or similar tool is required to adjust presets.3 Variable resistor Potentiometer Variable resistors used as potentiometers have all three terminals connected. Fig 7. This arrangement is normally used to vary voltage. GREENFORT ENGINEERING COLLEGE 59 . then the wiper terminal will provide a voltage which can be varied from zero up to the maximum of the supply.

Super Sensitive Security Integrated System Presets are much cheaper than standard variable resistors so they are sometimes used in projects where a standard variable resistor would normally be used.5 P1.1 P2.7 D0 D1 D2 D3 D4 D5 D6 D7 (CONTRAST CONTROL) 15 16 Vcc Gnd FOR BACKLIGHT PURPOSE GREENFORT ENGINEERING COLLEGE 60 .6 P1.3 P1.2 4 (RS) 5 (R/W) 6(EN) LCD 1 2 3 Vcc Gnd PRESET 89C51 P1. Fig 7.0 P2.4 P1. Multiturn presets are used where very precise adjustments must be made. The screw must be turned many times (10+) to move the slider from one end of the track to the other.5 Preset Symbol LCD INTERFACING WITH THE MICROCONTROLLER P2. giving very fine control.0 P1.1 P1.2 P1.


various systems have been developed without the benefit of standardized specification. Throughout the evolution of cellular telecommunications. GREENFORT ENGINEERING COLLEGE 62 . The GSM standard is intended to address these problems. GSM-Introduction • • • • Architecture Technical Specifications Frame Structure Channels • Security • Characteristics and features • Applications Definition: Global System for Mobile (GSM) is a second generation cellular standard developed to cater voice services and data delivery using digital modulation. This presented many problems directly related to compatibility. GSM is the name of standardization group established in 1982 to create a common European mobile telephone standard that would formulate specifications for a pan-European mobile cellular radio system operating at 900MHZ.Super Sensitive Security Integrated System GLOBAL SYSTEM FOR MOBILE COMMUNICATION It is a globally accepted standard for digital cellular communication. especially with the development of digital radio technology.

initiative of GSM IN WORLD GREENFORT ENGINEERING COLLEGE 63 . GSM is named as “Global System for Mobile communication “ • Today many providers all over the world use GSM (more than 135 Countries in Asia. Europe.Super Sensitive Security Integrated System GSM-History • Developed by Group Special Mobile (founded 1982) which was an CEPT (Conference of European Post and Telecommunication) • Aim : to replace the incompatible analog system • Presently the responsibility of GSM standardization resides with special mobile group under ETSI ( European telecommunication Standards Institute ) • Full set of specifications phase-I became available in 1990 • Under ETSI. America) • More than 1300 million subscribers in world and 45 million subscribers in India. Africa. Australia.

1 GSM IN WORLD GSM IN INDIA GSM SERVICES Fig 8.Super Sensitive Security Integrated System Fig 8.2 GSM IN INDIA  Tele-services  Bearer or Data Services  Supplementary services Tele-services • Telecommunication services that enable voice communication GREENFORT ENGINEERING COLLEGE 64 .

ISDN etc at rates from 300 to 9600 bps  Short Message Service (SMS) – up to 160 character alphanumeric data transmission to/from the mobile terminal  Unified Messaging Services(UMS)  Group 3 fax  Voice mailbox  Electronic mail Supplementary services Call related services : • • • • • • Call Waiting.Notification of an incoming call while on the handset Call Hold.All calls.Link multiple calls together CLIP – Caller line identification presentation GREENFORT ENGINEERING COLLEGE 65 . or incoming calls Call Forwarding.Calls can be sent to various numbers defined by the user Multi Party Call Conferencing .Super Sensitive Security Integrated System via mobile phones • Offered services .Emergency calling Bearer or Data Services  Include various data services for information transfer between GSM and other networks like PSTN.Put a caller on hold to take another call Call Barring. outgoing calls.Mobile telephony .

Subscriber Identity Module (SIM) GREENFORT ENGINEERING COLLEGE 66 . Mobile Equipment (ME) 2.Super Sensitive Security Integrated System • • CLIR – Caller line identification restriction CUG – Closed user group GSM System Architecture-I  Mobile Station (MS) Mobile Equipment (ME) Subscriber Identity Module (SIM)  Base Station Subsystem (BSS) Base Transceiver Station (BTS) Base Station Controller (BSC)  Network Switching Subsystem(NSS) Mobile Switching Center (MSC) Home Location Register (HLR) Visitor Location Register (VLR) Authentication Center (AUC) Equipment Identity Register (EIR) System Architecture Mobile Station (MS) The Mobile Station is made up of two entities: 1.

Subscriber Identity Module (SIM)  Smart card contains the International Mobile Subscriber Identity (IMSI)  Allows user to send and receive calls and receive other subscribed services  Encoded network identification details .Super Sensitive Security Integrated System Mobile Equipment  Portable.8W – 20 W  160 character long SMS.Kc and A3. Base Transceiver Station (BTS) 2. hand held device  Uniquely identified by an IMEI (International Mobile Equipment Identity)  Voice and data transmission  Monitoring power and signal quality of surrounding cells for optimum handover  Power level : 0.Key Ki.A5 and A8 algorithms  Protected by a password or PIN  Can be moved from phone to phone – contains key information to activate the phone System Architecture Base Station Subsystem (BSS) Base Station Subsystem is composed of two parts that communicate across the standardized Abis interface allowing operation between components made by different suppliers 1.vehicle mounted. Base Station Controller (BSC) System Architecture Base Station Subsystem (BSS) Base Transceiver Station (BTS): GREENFORT ENGINEERING COLLEGE 67 .

multiplexes.encrypts.  Frequency hopping  Communicates with Mobile station and BSC  Consists of Transceivers (TRX) units Base Station Controller (BSC)  Manages Radio resources for BTS  Assigns Frequency and time slots for all MS’s in its area  Handles call set up  Transcoding and rate adaptation functionality  Handover for each MS  Radio Power control  It communicates with MSC and BTS System Architecture Network Switching Subsystem(NSS) Mobile Switching Center (MSC)  Heart of the network  Manages communication between GSM and other networks  Call setup function and basic switching  Call routing  Billing information and collection  Mobility management .modulates and feeds the RF signals to the antenna.Super Sensitive Security Integrated System  Encodes.Registration GREENFORT ENGINEERING COLLEGE 68 .

Permanent database about mobile subscribers in a large service area (generally one per GSM network operator) Database contains IMSI. MSRN. Location Area. roaming restrictions. MS ISDN. and supplementary services. SRES. TMSI. authentication key  Authentication Center (AUC) Protects against intruders in air interface Maintains authentication keys and algorithms and provides security triplets ( RAND. MSISDN. System Architecture Network Switching Subsystem  Home Location Registers (HLR) .Location Updating . prepaid/postpaid.Super Sensitive Security Integrated System . Kc) Generally associated with HLR  Equipment Identity Register (EIR) GREENFORT ENGINEERING COLLEGE 69 .  Visitor Location Registers (VLR) Temporary database which updates whenever new MS enters its area.Inter BSS and inter MSC call handoff  MSC does gateway function while its customer roams to other network by using HLR/VLR. by HLR database Controls those mobiles roaming in its area Reduces number of queries to HLR Database contains IMSI.

Super Sensitive Security Integrated System
- Database that is used to track handsets using the IMEI (International Mobile Equipment Identity) Made up of three sub-classes: The White List, The Black List and the Gray List Only one EIR per PLMN

GSM Specifications-1  RF Spectrum GSM 900 Mobile to BTS (uplink): Bandwidth : 2* 25 Mhz GSM 1800 Mobile to BTS (uplink): 1710-1785 Mhz BTS to Mobile(downlink) 1805-1880 Mhz Bandwidth : 2* 75 Mhz 890-915 Mhz BTS to Mobile(downlink):935-960 Mhz

GSM Specification-II  Carrier Separation : 200 Khz  Duplex Distance : 45 Mhz

 No. of RF carriers : 124  Access Method : TDMA/FDMA

 Modulation Method : GMSK  Modulation data rate : 270.833 Kbps



Super Sensitive Security Integrated System





Super Sensitive Security Integrated System
Call Routing  Call Originating from MS  Call termination to MS

Fig 8.4 CALL ROUTING Outgoing Call 1. 2. 3. 4 5 6. MS sends dialed number to BSS BSS sends dialed number to MSC MSC checks VLR if MS is allowed the requested service. If so, MSC asks BSS to MSC routes the call to GMSC GMSC routes the call to local exchange of called user Answer back (ring back) tone is routed from called user to MS via GMSC, MSC, BSS

allocate resources for call.



Forward responsible MSC to GMSC 7. 5. Forward Call to current MSC GREENFORT ENGINEERING COLLEGE 73 . Request MSRN from VLR 6. Signal Setup to HLR 4. Forwarding call to GSMC 3. Calling a GSM subscribers 2.5 INCOMING CALL 1.Super Sensitive Security Integrated System Incoming Call Fig 8.

17.Super Sensitive Security Integrated System 8. Get current status of MS 10.6 HANDOVERS METHOD  Between 1 and 2 – Inter BTS / Intra BSC  Between 1 and 3 – Inter BSC/ Intra MSC  Between 1 and 4 – GREENFORT ENGINEERING COLLEGE 74 . 15. Set up connection Handovers Fig 8. MS answers 14. 9. 13. 11. Security checks 16. Paging of MS 12.

A8 algorithm for key generation Characteristics of GSM Standard  Fully digital system using 900.A5 algorithm for encryption .1800 MHz frequency band.  User/terminal authentication for fraud control.  8 full rate or 16 half rate TDMA channels per carrier.  Low speed data services (upto 9.  SIM is provided 4-8 digit PIN to validate the ownership of SIM  3 algorithms are specified : .  Encryption of speech and data transmission over the radio path.Super Sensitive Security Integrated System Inter MSC Security in GSM  On air interface.6 Kb/s). GSM uses encryption and TMSI instead of IMSI. Advantages of GSM over Analog system: GREENFORT ENGINEERING COLLEGE 75 .A3 algorithm for authentication .  Support of Short Message Service (SMS).  Compatibility with ISDN.  TDMA over radio carriers(200 KHz carrier spacing.  Full international roaming capability.

leading to wider range of services GSM Applications  Mobile telephony  GSM-R  Telemetry System .6 x 8 kbps)  GPRS (General Packet Radio service)  Data rate: 14.8 Kbps (9.  Better security against fraud (through terminal validation and user authentication).2 Kbps  EDGE (Enhanced data rate for GSM Evolution) GREENFORT ENGINEERING COLLEGE 76 .  Compatibility with ISDN.Super Sensitive Security Integrated System  Capacity increases  Reduced RF transmission power and longer battery life.Fleet management .5 Generation ( Future of GSM)  HSCSD (High Speed ckt Switched data)  Data rate : 76.6 Kbps (data rate)  2.Toll Collection .Automatic meter reading .Remote control and fault reporting of DG sets  Value Added Services Future Of GSM  2nd Generation  GSM -9.4 .  Encryption capability for information security and privacy.  International roaming capability.115.

Super Sensitive Security Integrated System  Data rate: 547.2 Kbps (max)  3 Generation  WCDMA(Wide band CDMA)  Data rate : 0.0 Mbps SERIAL COMMUNICATION GREENFORT ENGINEERING COLLEGE 77 .348 – 2.

Super Sensitive Security Integrated System SERIAL COMMUNICATION The main requirements for serial communication are: 1. RS 232 cable 4. HyperTerminal GREENFORT ENGINEERING COLLEGE 78 . MAX 232 IC 5. Microcontroller 2. PC 3.

Similarly lower byte register of Timer1 is TL1 and higher byte register is TH1. Lower byte register of Timer 0 is TL0 and higher byte is TH0.0 and P3. Since the 8051 has an 8-bit architecture. will be enabled to start the serial communication. They can be used either as timers to generate a time delay or as counters to count events happening outside the microcontroller. Fig: 9. TMOD (timer mode) register: GREENFORT ENGINEERING COLLEGE 79 . each 16-bit timer is accessed as two separate registers of low byte and high byte. UART. which is inbuilt in the microcontroller. Both Timer 0 and Timer 1 are 16-bit wide.1 of microcontroller are set.1 Architecture for Serial Communication TIMERS: The 8051 has two timers: Timer 0 and Timer 1.Super Sensitive Security Integrated System When the pins P3.

The timers in the 8051 have both.Super Sensitive Security Integrated System Both timers 0 and 1 use the same register TMOD to set the various operation modes. These instructions start and stop the timers as long as GATE=0 in the TMOD register. M1 : Mode bit 1 M0 : Mode bit 0 GREENFORT ENGINEERING COLLEGE 80 . (MSB) (LSB) GATE C/T M1 M0 GATE C/T M1 M0 TIMER 1 TIMER 0 GATE: Every timer has a means of starting and stopping. The start and stop of the timer are controlled by the way of software by the TR (timer start) bits TR0 and TR1. Cleared for timer operation and set for counter operation. Some timers do this by software. some by hardware and some have both software and hardware controls. C/T: Timer or counter selected.TMOD is an 8-bit register in which the lower 4 bits are set aside for Timer 0 and the upper 4 bits for Timer 1. The hardware way of starting and stopping the timer by an external source is achieved by making GATE=1 in the TMOD register. the lower 2 bits are used to set the timer mode and the upper 2 bits to specify the operation. In each case.

it starts to count up by incrementing the TL register. the 8051 give a copy of it to TL. it sets high the TF (timer flag). TL is reloaded automatically with the original value kept by the TH register. When the timer starts. TF1 goes high. When the TL register rolls from FFH to 0 and TF is set to 1. After TH is loaded with the 8-bit value. This mode 2 is an 8-bit timer and therefore it allows only values of 00H to FFH to be loaded into the timer’s register TH.Super Sensitive Security Integrated System M1 0 M0 0 Mode 0 Operating Mode 13-bit timer mode 8-bit timer/counter THx with TLx as 5-bit prescaler 0 1 1 16-bit timer mode 16-bit timer/counters THx and TLx are cascaded 1 0 2 8-bit auto reload timer/counter THx holds a value that is to be reloaded into TLx each time it overflows 1 1 3 Split timer mode The mode used here to generate a time delay is MODE 2. When it rolls over from FFH to 00H. ASYNCHRONOUS AND SYNCHRONOUS SERIAL COMMUNICATION GREENFORT ENGINEERING COLLEGE 81 . If Timer 0 is used. It counts up until it reaches its limit of FFH. TF0 goes high and if Timer 1 is used.

In parallel data transfers. asynchronous and synchronous. In serial communication. To transfer to a device located many meters away. the two devices initially synchronize GREENFORT ENGINEERING COLLEGE 82 . while the asynchronous method transfers a single byte at a time. Although a lot of data can be transferred in a short amount of time by using many wires Fig: 9. The fact that serial communication uses a single data line instead of the 8-bit data line instead of the 8-bit data line of parallel communication not only makes it cheaper but also enables two computers located in two different cities to communicate over the telephone. often 8 or more lines are used to transfer data to a device that is only a few feet away.2 communication using cables between pc to microcontroller in parallel. With synchronous communications. thereby making possible fast data transfer using only a few wires. The synchronous method transfers a block of data at a time. Serial data communication uses two methods.Super Sensitive Security Integrated System Computers transfer data in two ways: parallel and serial. the data is sent one bit at a time. the serial method is best suitable. The 8051 has serial communication capability built into it. the distance cannot be great.

The baud rate is fixed to 9600bps in order to interface with the microcontroller using a crystal of 11. The rate of data transfer in serial data communication is stated as bps (bits per second).Super Sensitive Security Integrated System themselves to each other. because additional bits to mark the beginning and end of each data byte are not required. this baud rate is generally limited to 100. There are special IC chips made by many manufacturers for serial data communications. each character that is sent is either actual data or an idle character. In the asynchronous method. and thus does not require sending and receiving idle characters. The start bit indicates when the data byte is about to begin and the stop bit signals when it ends. These chips are commonly referred to as UART(universal asynchronous receiver-transmitter) and USART(universal synchronous-asynchronous receiver-transmitter). RS232 CABLE: GREENFORT ENGINEERING COLLEGE 83 .0592 MHz. The data transfer rate of a given computer system depends on communication ports incorporated into that system. And in asynchronous serial data communication. Synchronous communications allows faster data transfer rates than asynchronous methods.000bps. Asynchronous means "no synchronization". Even when data is not really being sent. but the stop bit can be one or two bits. The requirement to send these additional two bits causes asynchronous communication to be slightly slower than synchronous however it has the advantage that the processor does not have to deal with the additional idle characters. This is called framing. and then continually send characters to stay in sync. The start bit is always one bit. the beginning and end of each byte of data must be identified by start and stop bits. Another widely used terminology for bps is baud rate. However. The 8051 has a built-in UART. a constant flow of bits allows each device to know where the other is at any given time. The serial ports on IBM-style PCs are asynchronous devices and therefore only support asynchronous serial communications. The start bit is always a 0 (low) and stop bit (s) is 1 (high). the data such as ASCII characters are packed between a start and a stop bit. That is.

MAX 232: Max232 IC is a specialized circuit which makes standard voltages as required by RS232 standards. voltage converters such as MAX232 are used to convert the TTL logic levels to the RS232 voltage levels and vice versa. This IC provides best noise rejection and very reliable against discharges and short circuits.3 RS-232 Converter using MAX232 To ensure data transfer between PC and microcontroller. an interfacing standard called RS232 is used. For this reason.Super Sensitive Security Integrated System To allow compatibility among data communication equipment. the baud rate and voltage levels of Microcontroller and PC should be the same. Fig:9. to connect any RS232 to a microcontroller system. its input and output voltage levels are not TTL compatible. The voltage levels of microcontroller are logic1 GREENFORT ENGINEERING COLLEGE 84 . Since the standard was set long before the advent of the TTL logic family. MAX232 IC chips are commonly referred to as line drivers.

So. MAX232 IC is used. stop bit and data bits of data framing. RS232 voltage levels are considered and they are: logic 1 is taken as -3V to -25V and logic 0 as +3V to +25V.4 SCON.6 SCON. Thus this IC converts RS232 voltage levels to microcontroller voltage levels and vice versa..7 SCON. But for PC.Super Sensitive Security Integrated System and logic 0 i. SM0 SM1 SM2 REN TB8 SCON.5 SCON. in order to equal these voltage levels.3 Serial port mode specifier Serial port mode specifier Used for multiprocessor communication Set/cleared by software to enable/disable reception Not widely used GREENFORT ENGINEERING COLLEGE SM0 85 SM1 SM2 REN TB8 RB8 TI RI .4Pin diagram of MAX 232 IC SCON (serial control) register: The SCON register is an 8-bit register used to program the start bit. logic 1 is +5V and logic 0 is 0V. Fig: 9.e.

for each character a total of 10 bits are transferred. Set by hardware at the beginning of the stop bit in mode 1.Super Sensitive Security Integrated System RB8 TI SCON. Set by hardware at the beginning of the stop bit in mode 1. SM0 0 0 1 1 SM1 0 1 0 1 Serial Mode 0 Serial Mode 1. 8-bit data. In the SCON register.1 Not widely used Transmit interrupt flag. RI SCON. In serial mode 1. Must be cleared by software. the data framing is 8 bits. followed by 8 bits of data and finally 1 stop bit. where the first bit is the start bit. Must be cleared by software. only mode 1 is widely used. when serial mode 1 is chosen. MAX 232 INTERFACING WITH MICROCONTROLLER: GREENFORT ENGINEERING COLLEGE 86 . 1 start bit Serial Mode 2 Serial Mode 3 Of the four serial modes.0 Receive interrupt flag. And the most important is serial mode 1 allows the baud rate to be variable and is set by Timer 1 of the 8051. 1 stop bit. 1 stop bit and 1 start bit. which makes it compatible with the COM port of IBM/ compatible PC’s.2 SCON.

the negative terminal has to be connected to ground.5 MAX 232 INTERFACING WITH MICROCONTROLLER: LED INTERFACING: LED stands for Light Emitting Diode.0 is initialized to zero and thus now a voltage GREENFORT ENGINEERING COLLEGE 87 .0) Tx 10 0 12 R1in R1out Fig 9. With this. Microcontroller port pins cannot drive these LEDs as these require high currents to switch on.0”. In order to have a current flow. To ensure the voltage difference between the terminals and as the positive terminal of LED is connected to power supply Vcc. first there should be a current flow through the LED. a voltage difference should exist between the LED terminals. the port pin P1. Thus the positive terminal of LED is directly connected to Vcc.Super Sensitive Security Integrated System 89S52 MAX 232 11 DB-9 14 2 TxD ( P3. Thus this ground value is provided by the microcontroller port pin. This can be achieved by writing an instruction “CLR P1. This current limiting resistor is connected to protect the port pins from sudden flow of high currents from the power supply. power supply and the negative terminal is connected to port pin through a current limiting resistor. Thus in order to glow the LED.1) 11 T1in T1out 13 3 Rx 5(Gnd) RxD (P3.

GREENFORT ENGINEERING COLLEGE 88 . low consumption and simple use.Super Sensitive Security Integrated System difference is established between the LED terminals and accordingly.6 LED Interfacing with the microcontroller Light-emitting diode (LED) Light-emitting diodes are elements for light signalization in electronics.bulbs at first place. LED and switches can be connected to any one of the four port pins. current flows and therefore the LED glows. For their low price. They perform similar to common diodes with the difference that they emit light when current flows through them. colors and sizes. they have almost completely pushed aside other light sources. Vcc P1.0 Fig: 9. They are manufactured in different shapes.

Low Current diodes get ful brightness at ten times lower current while Super Bright diodes produce more intensive light than Standard ones. it is necessary to know voltage drop in forward direction. diode’s which made for the in table types GREENFORT ENGINEERING COLLEGE 89 .7 LED It is important to know that each diode will be immediately destroyed unless its current is limited. Since the 8051 microcontrollers can provide only low input current and since their pins are configured as outputs when voltage level on them is equal to 0. depends on what material a diode is of and what colour it is. there are three main of LEDs. This means that a conductor must be connected in parallel to a diode. Values typical most frequently used diodes are shown below: As seen. direct connectining to LEDs is carried out as it is shown on figure (Low current LED. cathode is connected to output pin). Standard ones get ful brightness at current of 20mA.Super Sensitive Security Integrated System Fig 9. In order to correctly determine value of this conductor.

Fig 9. several consecutive bounces can be noticed prior to maintain stable state. It is about contact bounce.8 SWITCHES AND PUSH BUTTONS Nevertheless. error occurs in almost 100% of cases! GREENFORT ENGINEERING COLLEGE 90 . The reasons for this are: vibrations. slight rough spots and dirt. This is about something commonly unnoticeable when using these components in everyday life. There is also no need for additional explanation of how these components operate. it is not so simple in practice.a common problem with m e c h a n i c a l switches.or miliseconds).Super Sensitive Security Integrated System Switches and Pushbuttons There is nothing simpler than this! This is the simplest way of controlling appearance of some voltage on microcontroller’s input pin... Anyway. but long enough to be registered by the microcontroller. Concerning pulse counter. If contact switching does not happen so quickly. whole this process does not last long (a few micro.

the problem is definitely resolved! Besides. in contrast to flash .Super Sensitive Security Integrated System The simplest solution is to connect simple RC circuit which will “suppress” each quick voltage change. Since the bouncing time is not defined. the values shown on figure are sufficient. changes logic state on its output with the first pulse triggered by contact bounce. In the most cases. In addition. Even though this is more expensive solution (SPDT switch). GREENFORT ENGINEERING COLLEGE 91 . a simple software solution is commonly applied too: when a program tests the state of some input pin and finds changes. If the change is confirmed it means that switch (or pushbutton) has changed its position. In addition to these hardware solutions. effects of disturbances are eliminated too and it can be adjusted to the worst-quality contacts. since the condensator is not used. the check should be done one more time after certain time delay. If complete safety is needed. The main advantage of EEPROM is that one can program and erase its contents while it is in system board. the values of elements are not strictly determined. such as the fact that its method of erasure is electrical and therefore instant. radical measures should be taken! The circuit. very short pulses can be also registered in this way. in EEPROM one can select which byte to be erased. in which the entire contents of ROM are erased. The advantages of such solution are obvious: it is free of charge. EEPROM (Electrically Erasable Programmable Read only memory) EEPROM has several advantages over other memory devices. shown on the figure (RS flip-flop).

Page write (up to 8 bytes). the cost per bit for EEPROM is much higher when compared to other devices. Two wire serial interface. 2. Single supply voltage: 3v to 5. • • • • • • • • • Hardware write control versions: st24w04 and st25w04. Features of 24C04 EEPROM: • • 1 million erase/write cycles with 40 years data retention.5v to 5. In general. Byte. fully i2c bus compatible.5v for st24x04 versions. Byte and multibyte write (up to 4 bytes). The EEPROM used in this project is 24C04 type. random and sequential read modes Self timed programming cycle Automatic address incrementing Enhanced ESD/Latch up performances DIP Pin Connections SO Pin Connection GREENFORT ENGINEERING COLLEGE 92 . Programmable write protection.5v for st25x04 versions.Super Sensitive Security Integrated System It does not require physical removal of the memory chip from its socket.

Super Sensitive Security Integrated System Fig: 9.9 Signal Names GREENFORT ENGINEERING COLLEGE 93 .

E1) so that up to 4 x 4K devices may be attached to the I2C bus and selected individually. The memories are compatible with the I2C standard. Read and write operations are initiated by a START condition generated by the bus master. plus one read/write bit and terminated by an acknowledge bit. unique device identification code (1010) corresponding to the I2C bus definition. The memories behave as a slave device in the I2C protocol with all memory operations synchronized by the serial clock.Super Sensitive Security Integrated System Fig: 9. Table: Device Select Mode GREENFORT ENGINEERING COLLEGE 94 . organized as 2 blocks of 256 x8 bits. two wire serial interface which uses a bi-directional data bus and serial clock. The START condition is followed by a stream of 7 bits (identification code 1010). The memories carry a built-in 4 bit. This is used together with 2 chip enable inputs (E2.10 Logic Diagram DESCRIPTION The 24C04 is a 4 Kbit electrically erasable programmable memory (EEPROM). They are manufactured in ST Microelectronics’ Hi-Endurance Advanced CMOS technology which guarantees an endurance of one million erase/write cycles with a data retention of 40 years. Both Plastic Dual-in-Line and Plastic Small Outline packages are available.

A stable VCC must be applied before applying any logic signal. Power On Reset: VCC lock out write protect. GREENFORT ENGINEERING COLLEGE 95 . In the same way. all operations are disabled and the device will not respond to any command. a Power On Reset (POR) circuit is implemented. When data is read by the bus master. all operations are disabled and the device will not respond to any command. In order to prevent data corruption and inadvertent write operations during power up. when VCC drops down from the operating voltage to below the POR threshold value.Super Sensitive Security Integrated System Table: Operating Modes When writing data to the memory it responds to the 8 bits received by asserting an acknowledge bit during the 9th bit time. Until the VCC voltage has reached the POR threshold value. Data transfers are terminated with a STOP condition. the internal reset is active. it acknowledges the receipt of the data bytes in the same way.

location 1FFh as in below figure). The SDA pin is bi-directional and is used to transfer data in or out of the memory. Chip Enable (E1 . Protect Enable (PRE). A resistor can be connected from the SCL line to VCC to act as a pull up. in addition to the status of the Block Address Pointer bit (b2. GREENFORT ENGINEERING COLLEGE 96 . sets the PRE write protection active. It is an open drain output that may be wire-OR’ed with other open drain or open collector signals on the bus. These chip enable inputs are used to set the 2 least significant bits (b2. Serial Data (SDA). The PRE input pin.E2). b3) of the 7 bit device select code. A resistor must be connected from the SDA bus line to VCC to act as pull up.Super Sensitive Security Integrated System SIGNAL DESCRIPTIONS Serial Clock (SCL). The SCL input pin is used to synchronize all data in and out of the memory. These inputs may be driven dynamically or tied to VCC or VSS to establish the device select code.

This protocol defines any device that sends data onto the bus as a transmitter and any device that reads the data as a receiver. GREENFORT ENGINEERING COLLEGE 97 . the MODE input is internally read as VIH (Multibyte Write mode).Super Sensitive Security Integrated System Fig: 9. The MODE input is available on pin 7 and may be driven dynamically. The Write Control signal is used to enable (WC = VIH) or disable (WC =VIL) the internal write protection. The device that controls the data transfer is known as the master and the other as the slave. The master will always initiate a data transfer and will provide the serial clock for synchronization. An hardware Write Control feature (WC) is offered only for ST24W04 and ST25W04 versions on pin 7. This feature is useful to protect the contents of the memory from any erroneous erase/write cycle. the WC input is internally read as VIL and the memory area is not write protected. VIH for Multibyte Write mode or VIL for Page Write mode. Write Control (WC).11 Memory Protection Mode (MODE). DEVICE OPERATION I2C Bus Background The ST24/25x04 supports the I2C protocol. When unconnected. When unconnected. It must be at VIL or VIH for the Byte Write mode. The ST24/25x04 is always slave devices in all communications.

12 I2C Protocol Start Condition. A START condition must precede any command for data transfer. START is identified by a high to low transition of the SDA line while the clock SCL is stable in the high state.Super Sensitive Security Integrated System Fig: 9. Except during a GREENFORT ENGINEERING COLLEGE 98 .

STOP is identified by a low to high transition of the SDA line while the clock SCL is stable in the high state. The 8th bit sent is the read or write bit (RW). The following 2 bits identify the specific memory on the bus. forces the standby state. E1. either master or slave. A STOP condition at the end of a Write command triggers the internal EEPROM write cycle. The 7th bit sent is the block number (one block = 256 bytes). An acknowledge signal is used to indicate a successful data transfer. A STOP condition terminates communication between the ST24/25x04 and the bus master. For these memories the 4 bits are fixed as 1010b. Following this. Memory Addressing. Acknowledge Bit (ACK). The bus transmitter. To start communication between the bus master and the slave ST24/25x04. will release the SDA bus after sending 8 bits of data. During data input the ST24/25x04 sample the SDA bus signal on the rising edge of the clock SCL. the master must initiate a START condition. During the 9th clock pulse period the receiver pulls the SDA bus low to acknowledge the receipt of the 8 bits of data. the ST24/25x04 continuously monitor the SDA and SCL signals for a START condition and will not respond unless one is given. Thus up to 4 x 4K memories can be connected on the same bus giving a memory capacity total of 16 Kilobits. this bit is set to ’1’ for read and ’0’ GREENFORT ENGINEERING COLLEGE 99 . the master sends onto the SDA bus line 8 bits (MSB first) corresponding to the device select code (7 bits) and a READ or WRITE bit. corresponding to the I2C bus definition. E1. They are matched to the chip enable signals E2.Super Sensitive Security Integrated System programming cycle. Stop Condition. after and only after a No Acknowledge. The 4 most significant bits of the device select code are the device type identifier. After a START condition any memory on the bus will identify the device code and compare the following 2 bits to its chip enable inputs E2. Data Input. A STOP condition at the end of a Read command. Note that for correct device operation the SDA signal must be stable during the clock low to high transition and the data must change ONLY when the SCL line is low.

If a match is found. Fig: 9.Super Sensitive Security Integrated System for write operations. The MODE pin may GREENFORT ENGINEERING COLLEGE 100 . the corresponding memory will acknowledge the identification on the SDA bus during the 9th bit time.13 AC Waveforms Write Operations The Multibyte Write mode (only available on the ST24/25C04 versions) is selected when the MODE pin is at VIH and the Page Write mode when MODE pin is at VIL.

Page Write. The master then terminates the transfer by generating a STOP condition. as this pin has to be connected to either VIH or VIL. the programming time is then doubled to a maximum of 20ms. For the Multibyte Write mode. to minimize the stand-by current. GREENFORT ENGINEERING COLLEGE 101 . the 7 following bytes being written in the 7 following bytes of this same row.Super Sensitive Security Integrated System be driven dynamically with CMOS input levels. The byte address of 8 bits provides access to one block of 256 bytes of the memory. The master sends from one up to 4 bytes of data. The memory acknowledges this and waits for a byte address. any write command with WC = 1 will not modify the memory content. Writing more than 4 bytes in the Multibyte Write mode may modify data bytes in an adjacent row (one row is 8 bytes long). The duration of the write cycle is Tw = 10ms maximum except when bytes are accessed on 2 rows (that is have different values for the 6 most significant address bits A7-A2). After receipt of the byte address the device again responds with an acknowledge. For the ST24/25W04 versions. However it is not a recommended operating mode. In the Byte Write mode the master sends one data byte. However. the MODE pin must be at VIH. Multibyte Write. the Multibyte Write can properly write up to 8 consecutive bytes as soon as the first address of these 8 bytes is the first address of the row. The Write mode is independent of the state of the MODE pin which could be left floating if only this mode was to be used. which is acknowledged by the memory. The Multibyte Write mode can be started from any address in the memory. The transfer is terminated by the master generating a STOP condition. which are each acknowledged by the memory. Byte Write. Following a START condition the master sends a device select code with the RW bit reset to ’0’.

The master sends from one up to 8 bytes of data. The transfer is terminated by the master generating a STOP condition. the memory disconnects itself from the bus in order to copy the data from the internal latches to the memory cells. the internal byte address counter (3 least significant bits only) is incremented. Care must be taken to avoid address counter ’roll-over’ which could result in data being overwritten. The Page Write mode allows up to 8 bytes to be written in a single write cycle. provided that they are all located in the same ’row’ in the memory: that is the 5 most significant memory address bits (A7-A3) are the same inside one block. the time seen by the system may be reduced by an ACK polling sequence issued by the master. the generation by the master of the STOP condition starts the internal memory program cycle. the MODE pin must be at VIL. During the internal write cycle. since the typical time is shorter. Note that. All inputs are disabled until the completion of this cycle and the memory will not respond to any request. Minimizing System Delays by Polling on ACK. which are each acknowledged by the memory. After each byte is transferred. The maximum value of the write time (Tw) is given from the AC Characteristics.Super Sensitive Security Integrated System For the Page Write mode. GREENFORT ENGINEERING COLLEGE 102 . for any write mode.

This Address Pointer can therefore address a boundary in steps of 8 bytes.14 Write Cycle Polling using ACK Data in the upper block of 256 bytes of the memory may be write protected.Super Sensitive Security Integrated System Fig: 9. The boundary address is user defined by writing it in the Block Address Pointer. The Block Address Pointer is an 8 bit EEPROM register located at the address 1FFh. GREENFORT ENGINEERING COLLEGE 103 . The memory is write protected between a boundary address and the top of memory (address 1FFh) when the PRE input pin is taken high and when the Protect Flag (bit b2 in location 1FFh) is set to ’0’. which defines the bottom boundary address and 3 LSBs which must be programmed at ’0’. It is composed by 5 MSBs Address Pointer.

the location 1FFh can be used as a normal EEPROM byte. all the 3 LSBs of the Block Address Pointer must also be programmed at ’0’. Fig: 9. – set the protection by writing the correct bottom boundary address in the Address Pointer (5 MSBs of location 1FFh) with bit b2 (Protect flag) set to ’0’. The area will now be protected when the PRE input pin is taken High.15 Write Modes Sequence GREENFORT ENGINEERING COLLEGE 104 . up to.Super Sensitive Security Integrated System The sequence to use the Write Protected feature is: – write the data to be protected into the top of the memory. but not including. While the PRE input pin is read at ’0’ by the memory. Note that for a correct functionality of the memory. location 1FFh.

The master does NOT acknowledge the byte output. The memory acknowledges this and outputs the byte addressed by the internal byte address counter. The output data is from consecutive byte addresses. following a START condition. the address counter will ’roll. GREENFORT ENGINEERING COLLEGE 105 . Sequential Read. The master has to NOT acknowledge the byte output. in this case the master DOES acknowledge the data byte output and the memory continues to output the next byte in sequence. On delivery. For the Current Address Read mode. but terminates the transfer with a STOP condition. This mode can be initiated with either a Current Address Read or a Random Address Read. To terminate the stream of bytes. the memory content is set at all "1’s" (or FFh). The memory acknowledges this and outputs the byte addressed. Current Address Read. The memory has an internal byte address counter. This counter is then incremented. this counter is incremented. This is followed by another START condition from the master and the byte address is repeated with the RW bit set to ’1’. A dummy write is performed to load the address into the address counter. Random Address Read. but terminates the transfer with a STOP condition. After a count of the last memory address.over’ and the memory will continue to output data. the master must NOT acknowledge the last byte output.Super Sensitive Security Integrated System Read Operations Read operations are independent of the state of the MODE pin. Each time a byte is read. with the internal byte address counter automatically incremented after each byte output. but MUST generate a STOP condition. However. the master sends a memory address with the RW bit set to ’1’.

If the master does not pull the SDA line low during this time. In all read modes the ST24/25x04 wait for an acknowledge during the 9th bit time. Fig: 9. the ST24/25x04 terminate the data transfer and switches to a standby state.Super Sensitive Security Integrated System Acknowledge in Read Mode.16 Read Modes Sequence GREENFORT ENGINEERING COLLEGE 106 .

Super Sensitive Security Integrated System KEYPAD GREENFORT ENGINEERING COLLEGE 107 .

2Telephone keypad INTERFACING THE KEYPAD TO 8051 At the lowest level. Fig: 10. 4*4 keypad 3. In such systems. RAM. otherwise there is no connection between rows and columns. 4*3 keypad 2.1 Calculator keypad Fig: 10. The keypad used in this project is 4*3 keypad. The keypads are mainly three types: 1. it is the function of GREENFORT ENGINEERING COLLEGE 108 . a row and a column make a contact. A single microcontroller (consisting of a microprocessor. an 8*8 matrix of keys can be connected to a microprocessor. EPROM and several ports all on a single chip) takes care of hardware and software interfacing of the keypad. Therefore. The CPU accesses both rows and columns through ports. keyboards are organized in a matrix of rows and columns. 4*8 keypad.Super Sensitive Security Integrated System KEYPAD: Keypads and LCDs are the most widely used input/output devices of the 8051 and a basic understanding of them is essential. with two 8-bit ports. When a key is pressed.

identify which one has been activated and present it to the motherboard.3 4*3 Matrix Keypad Connections to Ports GREENFORT ENGINEERING COLLEGE 109 .Super Sensitive Security Integrated System programs stored in EPROM of the microcontroller to scan the keys continuously. Fig: 10.

GREENFORT ENGINEERING COLLEGE 110 . Grounding rows and reading the columns: To detect a pressed key. If the data read from the columns is D2-D0 =111. the microcontroller will go through a process of identifying the key. Now this will be easy since the microcontroller knows at any time which row and column are being accessed.Super Sensitive Security Integrated System Scanning and identifying the key: The rows are connected to an output port and the columns are connected to an input port. one of the columns will have 0 since the key pressed provides the path to ground. Starting with the top row. However. if one of the column bits has a zero. then it reads the columns. for example. If all the rows are grounded and a key is pressed. After a key press is detected.e. If the data read is all 1s. It grounds the next row.. if D2-D0=110. reading the input port will yield 1s for all columns since they are all connected to high (Vcc). this means that a key in the D0 column has been pressed. This process continues until the row is identified. After identification of the row in which the key has been pressed. this means that a key press has occurred i. It is the function of the microcontroller to scan the keypad continuously to detect and identify the key pressed. no key has been pressed and the process continues until a key press is detected. the microcontroller grounds it by providing a low to row D0 only and then it reads the columns. no key in that row is activated and the process is moved to the next row. reads the columns and checks for any zero. the microcontroller grounds all rows by providing 0 (zero) to the output latch. the next task is to find out which column the pressed key belongs to. If no key has been pressed.

Super Sensitive Security Integrated System SENSORS GREENFORT ENGINEERING COLLEGE 111 .

sealed in a dry inert-gas atmosphere within a glass capsule. when the magnetic field ceases. The hermetic sealing of a reed switch makes them suitable for use GREENFORT ENGINEERING COLLEGE 112 . Good electrical contact is assured by plating a thin layer of precious metal over the flat contact portions of the reeds. thereby protecting the contact from contamination. A magnetic field from an electromagnet or a permanent magnet will cause the contacts to pull together. closing when a magnetic field is present. they are protected against atmospheric corrosion. or normally closed and opening when a magnetic field is applied. thus completing an electrical circuit. The basic reed switch consists of two identical flattened ferromagnetic reeds.1 Reed Switch The contacts may be normally open. and open the circuit. The reeds are sealed in the capsule in such a way that their free ends overlap and are separated by a small air gap.Super Sensitive Security Integrated System MAGNETIC SENSORS OR REED SWITCHES: The reed switch is an electrical switch operated by an applied magnetic field. Since the contacts of the reed switch are sealed away from the atmosphere. The stiffness of the reeds causes them to separate. Fig: 11.

REED SENSOR: A reed sensor is a device built using a reed switch with additional functionality like ability to withstand higher shock. Reed switches are commonly used in mechanical systems as proximity switches as well as in door and window sensors in burglar alarm systems and tamper proofing methods. How does a reed switch work? When a magnetic force is generated parallel to the reed switch. which attract each other. Typical pull-in sensitivities for commercial devices are in the 10 to 60 AT range. Infrared-absorbing glass is used. a metal reed is inserted in each end of a glass tube and the end of the tube heated so that it seals around a shank portion on the reed. additional intelligent circuitry. corresponding to the current in a coil multiplied by the number of turns. etc. The overlapping ends of the reeds become opposite magnetic poles. The leads of the switch must be handled carefully to prevent breaking the glass envelope.Super Sensitive Security Integrated System in explosive atmospheres where tiny sparks from conventional switches would constitute a hazard. easier mounting. Uses: Reed switches are widely used for electrical circuit control. where each key had a magnet and a reed GREENFORT ENGINEERING COLLEGE 113 . Sensitivity is measured in units of Ampere-turns. so an infrared heat source can concentrate the heat in the small sealing zone of the glass tube. The glass used must have a high electrical resistance and must not contain volatile components such as lead oxide and fluorides. In production. the reeds become flux carriers in the magnetic circuit. One important quality of the switch is its sensitivity. The thermal coefficient of expansion of the glass material and metal parts must be similar to prevent breaking the glass-to-metal seal. If the magnetic force between the poles is strong enough to overcome the restoring force of the reeds. the amount of magnetic energy necessary to actuate it. the reeds will be drawn together. particularly in the communications field. These were formerly used in the keyboards for computer terminals.

5. they can be used to form many different types of relays. to as high as 120W. magnetic field will be generated and the reeds are drawn together and thus the reed switch is triggered and this change is applied to the microcontroller for further processing. 3. and contact resistance is as low as 50 milliohms. Vibration Detector: Here we use a ceramic piezoelectric buzzer plate for vibration detection.Super Sensitive Security Integrated System switch actuated by depressing the key. Fig 11. Advantages: 1. Free from contamination. They are hermetically sealed in glass environment. 4. Speed sensors on bicycles use a reed switch to detect when the magnet on the wheel passes the sensor. When the floating magnet comes in contact with any of the reed switches. Reed switches are immune to electrostatic discharge (ESD) and do not require any external ESD protection circuits. The isolation resistance between the contacts is as high as 1015 ohms. and are safe to use in harsh industrial and explosive environments. When the reed switches are combined with magnets and coils. They can directly switch loads as low as a few microwatts without the help of external amplification circuits. 2. Six reed switches are used in our project to indicate different levels of the petrochemical liquid in the process container.2 VIBRATION SENSOR GREENFORT ENGINEERING COLLEGE 114 . Piezoceramic buzzers generate sound through the bending vibrations of a thin metal plate adhered to a piezoceramic disc.

As a result. a safe.Super Sensitive Security Integrated System These buzzers feature low power consumption.3 PANIC SWITCH GREENFORT ENGINEERING COLLEGE 115 . an increasing number of piezoceramic buzzers are now used to generate an artificial voice in combination with voice synthesizing ICs. sounders and buzzers.the arrangement of this is as shown in the figure below. The arrangement of this sensor in our project is as shown in the figure above which is sensed by the microcontroller. Panic Switch: This is nothing but a simple switch which is connected in the sensor board. wide frequency ranges. such as piezoceramic diaphragms. spark-free and non-contact structure. Fig 11. FDK has capitalized on many years of piezoceramics production and outstanding ceramic processing technologies and thin film forming techniques. to meet loud sound outputs. and many other requirements. We will be placing it at the door so that a small vibration at the door also can be detected. To produce high-quality piezoceramic buzzers. By adding a sophisticated audio know-how to this manufacturing expertise. After sensing the signal the corresponding action is done by the microcontroller which is preprogrammed. and a small size and light weight for an easy mounting to printed circuit boards. FDK offers a large array of electronic tone generating products.

In comparison with the standard GaAs on GaAs technology these emitters achieve more than 100 % radiant power improvement at a similar wavelength. Features • Extra high radiant power and radiant intensity • High reliability • Low forward voltage • Suitable for high pulse current operation • Standard T-1¾ (∅ 5 mm) package • Angle of half intensity ϕ = ± 17° • Peak wavelength λp = 940 nm • Good spectral matching to Si photodetectors GREENFORT ENGINEERING COLLEGE 116 . bluegrey tinted plastic packages.4 IR TX TSAL6200 is a high efficiency infrared emitting diode in GaAlAs on GaAs technology. Therefore these emitters are ideally suitable as high performance replacements of standard emitters.Super Sensitive Security Integrated System The response of this switch is monitored by the microcontroller and the corresponding action takes place. The forward voltages at low current and at high pulse current roughly correspond to the low values of the standard technology. molded in clear.: Fig 11. IR Section: IR Tx.

PIN diode and preamplifier are assembled on lead frame.10 cycles/burst. supporting all major transmission codes. The demodulated output signal can directly be decoded by a microprocessor. TSOP17XX is the standard IR remote control receiver series. GREENFORT ENGINEERING COLLEGE 117 . the epoxy package is designed as IR filter.Super Sensitive Security Integrated System Applications Infrared remote control units with high power requirements Free air transmission systems Infrared source for optical counters and card readers IR source for smoke detectors.. – series are miniaturized receivers for infrared remote control systems. Features • • • • • • • • • Photo detector and preamplifier in one package Internal filter for PCM frequency Improved shielding against electrical field disturbance TTL and CMOS compatibility Output active low Low power consumption High immunity against ambient light Continuous data transmission possible (up to 2400 bps) Suitable burst length . IR Rx: Description The TSOP17.

. Burst length should be 10 cycles/burst or longer. GREENFORT ENGINEERING COLLEGE 118 .Super Sensitive Security Integrated System Block Diagram Fig 11. is designed in that way that unexpected output pulses due to noise or disturbance signals are avoided. 38kHz).g. The data signal should fullfill the following condition: • • Carrier frequency should be close to center frequency of the band pass (e. an integrator stage and an automatic gain control are used to suppress such disturbances.5Application Circuit The circuit of the TSOP17. burst length and duty cycle. The distinguishing mark between data signal and disturbance signal are carrier frequency. A bandpassfilter.

However the sensitivity is reduced to that level that no unexpected pulses will occur.Super Sensitive Security Integrated System • • • After each burst which is between 10 cycles and 70 cycles a gap time of at least 14 cycles is necessary. When a disturbance signal is applied to the TSOP17.8ms a corresponding gap time is necessary at some time in the data stream.6 ARRANGEMENT OF SENSORS GREENFORT ENGINEERING COLLEGE 119 . Fig 11.. The arrangement of this sensors is as shown below. Up to 1400 short bursts per second can be received continuously. This gap time should have at least same length as the burst. it can still receive the data signal. For each burst which is longer than 1.

Super Sensitive Security Integrated System WORKING GREENFORT ENGINEERING COLLEGE 120 .

In this way. Switch ON the power supply. GREENFORT ENGINEERING COLLEGE 121 . Turn ON GSM modem &wait for 30 sec. in this project we are using three types of SENSORS i. Whenever the person wants to enter into the room. In this project we can store maximum of 4 mobile numbers into EEPROM with the help of keypad. For example:  When coming to IR sensor.. 4. industries etc…. 5. Depending upon the situations Corresponding sensor will be activated. CODE “2754” around 16 seconds. VIBRATION MAGNETIC SENSOR & IR SENSOR. Then switch ON the TOGGLE SWITCH in order to store the mobile numbers into EEPROM. it is used for security purpose. 6. 2.e. If ever we want to change the numbers that are stored in our EEPROM. SENSOR.Super Sensitive Security Integrated System WORKING PROCEDURE: 1. If he fails to enter the CODE within that delay then a message will be displayed as “INVALID PERSON IN THE ROOM” and through GSM. we are able to provide full-fledged security to our homes. Here.e. first he/she needs to enter the key i. that corresponding message is sent to all. then we will switch ON the TOGGLE SWITCH and select the particular mode and enter the number through KEYPAD. 3..

Super Sensitive Security Integrated System Schematic of GSM based security system FIG 12.1 SCHEMATIC DIAGRAM OF GSM BASED SECURITY SYSTEM GREENFORT ENGINEERING COLLEGE 122 .

Super Sensitive Security Integrated System Software Tools GREENFORT ENGINEERING COLLEGE 123 .

2. GREENFORT ENGINEERING COLLEGE 124 . Install the Keil Software in the PC in any of the drives. After installation. You can create a new folder and then a new file or can create directly a new file. The window asks the user to give the project name with which it should be created and the destination location. an icon will be created with the name “Keil uVision3”. A small window with the title bar “Create new project” opens. open project etc. STEPS TO WRITE AN ASSEMBLY LANGUAGE PROGRAM IN KEIL AND HOW TO COMPILE IT: 1. Double click on this icon to start the keil compiler. Keil compiler also supports C language code. 3. The project can be created in any of the drives available. Just drag this icon onto the desktop so that it becomes easy whenever you try to write programs in keil. Now to start using the keil. import project. output window in the bottom and an ash coloured space for the program to be written. 5. A page opens with different options in it showing the project workspace at the leftmost corner side. Click on “New project”.Super Sensitive Security Integrated System KEIL SOFTWARE: Keil compiler is a software used where the machine language code is written and compiled. A small window opens showing the options like new project. 7. click on the option “project”. the machine source code is converted into hex code which is to be dumped into the microcontroller for further processing. 6. 4. After compilation.

A window opens with different options like device. 9. save it with any name but with the . a window opens where a list of vendors will be displayed and you have to select the device for the target you have created. 15. target. Click on this microcontroller and have a look at its features. After the program is completed. 12. 13. 17. First click on “target”. The most appropriate microcontroller with which most of the projects can be implemented is the AT89S52. After the file is saved in the given destination location. A new page opens and you can start writing program in it. When you click on any one of the microcontrollers. You can notice that after you save the program. output etc. Check for this file where you have saved and add it. Now add this file to the target by giving a right click on the source group.Super Sensitive Security Integrated System 8.asm extension. The most widely used vendor is Atmel. A small window opens asking whether to copy the startup code into the file you have created just now. Right click on the target and select the first option “Options for target”. Save the program in the file you have created earlier. So click on Atmel and now the family of microcontrollers manufactured by Atmel opens. A list of options open and in that select “Add files to the source group”. Just click on “No” to proceed further. 16. GREENFORT ENGINEERING COLLEGE 125 . Now you can see the TARGET and SOURCE GROUP created in the project workspace. 11. Now click on “OK” to select this microcontroller. the predefined keywords will be highlighted in bold letters. Now click on “File” and in that “New”. 14. 10. You can select any one of the microcontrollers according to the requirement. the features of that particular microcontroller will be displayed on the right side of the page.

After this is done. The icon with the letter “d” indicates the debug mode.0592 MHz to interface with the PC. Since the set frequency of the microcontroller is 11. GREENFORT ENGINEERING COLLEGE 126 . The hex file created as shown earlier will be dumped into the microcontroller with the help of software called Proload. 24. This is because the program what we write here in the keil will later be dumped into the microcontroller and will be stored in the inbuilt ROM in the microcontroller. Now click the option “Output” and give any name to the hex file to be created in the “Name of executable” text area and put a tick to the “Create HEX file” option present in the same window. You can change the folder by clicking on “Select folder for Objects”.Super Sensitive Security Integrated System 18. The hex file can be created in any of the drives. 19. 23. just enter this frequency value in the Xtal (MHz) text area and put a tick on the Use onchip ROM. To check for the output. project window etc. You can even use the shortcut key F7 to compile the program written. Now to check whether the program you have written is errorless or not. click on the icon exactly below the “Open file” icon which is nothing but Build Target icon. memory window. 20. 25. 22. Depending on the program you have written. Click on this icon and now click on the option “View” and select the appropriate window to check for the output. 21. there are several windows like serial window. select the appropriate window to see the output by entering into debug mode. click the icon “debug” again to come out of the debug mode.

Super Sensitive Security Integrated System WORKING WITH KEIL GREENFORT ENGINEERING COLLEGE 127 .

Then Click on New Project GREENFORT ENGINEERING COLLEGE 128 . Click on the Keil u Vision Icon on Desktop 2.Super Sensitive Security Integrated System WORKING WITH KEIL: INTRODUCTION TO KEIL SOFTWARE ABOUT KEIL: 1. The following fig will appear 3. Click on the Project menu from the title bar 4.

Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\ GREENFORT ENGINEERING COLLEGE 129 .Super Sensitive Security Integrated System 5.

Click on the + Symbol beside of Atmel GREENFORT ENGINEERING COLLEGE 130 . Select the component for u r project. Then Click on Save button above. 7.Super Sensitive Security Integrated System 6. i. Atmel…… 8.e.

11. Then Click on “OK” The Following fig will appear GREENFORT ENGINEERING COLLEGE 131 . Select AT89C51 as shown below 10.Super Sensitive Security Integrated System 9.

Super Sensitive Security Integrated System 12. 14. 13. you would get another option “Source group 1” as shown in next page. 15. Click on the file option from menu bar and select “new” GREENFORT ENGINEERING COLLEGE 132 . Then Click either YES or NO………mostly “NO” Now your project is ready to USE Now double click on the Target1.

17. and just maximize it by double clicking on its blue boarder. The next screen will be as shown in next page. Now start writing program in either in “C” or “ASM” 133 GREENFORT ENGINEERING COLLEGE .Super Sensitive Security Integrated System 16.

then save it with extension “. Now right click on Source group 1 and click on “Add files to Group Source” GREENFORT ENGINEERING COLLEGE 134 . For a program written in Assembly. asm” and for “C” based program save it with extension “ .Super Sensitive Security Integrated System 18.C” 19.

Now select as per your file extension given while saving the file GREENFORT ENGINEERING COLLEGE 135 . Now you will get another window. 20. on which by default “C” files will appear.Super Sensitive Security Integrated System 20.

Super Sensitive Security Integrated System 21. 23. 24. Any error will appear if so happen. Click only one time on option “ADD” Now Press function key F7 to compile. The new window is as follows GREENFORT ENGINEERING COLLEGE 136 . If the file contains no error. 22. then press Control+F5 simultaneously.

26.Super Sensitive Security Integrated System 25. Then Click “OK” Now Click on the Peripherals from menu bar. and check your required port as shown in fig below GREENFORT ENGINEERING COLLEGE 137 .

Super Sensitive Security Integrated System 27. Drag the port a side and click in the program file. GREENFORT ENGINEERING COLLEGE 138 .

Super Sensitive Security Integrated System 28. Now keep Pressing function key “F11” slowly and observe. You are running your program successfully GREENFORT ENGINEERING COLLEGE 139 . 29.

It should be noted that this programmer kit contains a power supply section in the board itself but in order to switch on that power supply. com port. Click on the Proload icon in the PC. Click on browse option to select the hex file to be dumped into the microcontroller and then click on “Auto program” to program the microcontroller with that particular hex file. A window appears providing the information like Hardware model. device type. 7. Once the machine code is converted into hex code. As this programmer kit requires power supply to be operated. Install the Proload Software in the PC. 3. a source is required. Now the system board behaves according to the program written in the microcontroller. Now connect the Programmer kit to the PC (CPU) through serial cable. Power up the programmer kit from the ac supply through adapter. Flash size etc. 2. Thus this is accomplished from the power supply board with an output of 12volts or from an adapter connected to 230 V AC. that hex code has to be dumped into the microcontroller placed in the programmer kit and this is done by the Proload.Super Sensitive Security Integrated System PROLOAD: Proload is a software which accepts only hex files. Steps to work with Proload: 1. The status of the microcontroller can be seen in the small status window in the bottom of the page. 4. This microcontroller has a program in it written in such a way that it accepts the hex file from the keil compiler and dumps this hex file into the microcontroller which is to be programmed. Now place the microcontroller in the GIF socket provided in the programmer kit. remove the microcontroller from the programmer kit and place it in your system board. this power supply is given from the power supply circuit designed above. After this process is completed. GREENFORT ENGINEERING COLLEGE 140 . 6. 5. Programmer kit contains a microcontroller on it other than the one which is to be programmed.

Super Sensitive Security Integrated System Source Code GREENFORT ENGINEERING COLLEGE 141 .

sbit buzzer1 = P2^5. sbit rw = P2^1.h" #include"GSM. ////////////////////////////////////////////////////////////////////////////////////////////////////////// GREENFORT ENGINEERING COLLEGE 142 .h" sfr ldata = 0x90.Super Sensitive Security Integrated System SOURCE CODE: #include"reg52. sbit SCL=P2^7.i.h" #include"intrins. sbit lock = P3^7.Pno[10].received = 0. //P1 #define keys P0 sbit buzzer = P2^4. sbit alt = P3^2.alert=1. sbit en = P2^2. sbit SDA=P2^6. sbit rs = P2^0.h" #include"string.count. unsigned char buffer[35]. sbit m2 = P3^5.vib=1.t.h" #include"EEPROM. sbit ir = P3^3. bit receive. sbit m1 = P3^4.ch.

longdelay().use=0. longdelay(). GREENFORT ENGINEERING COLLEGE 143 . message(0x80. longdelay(). longdelay(). longdelay(). longdelay(). longdelay(). longdelay(). longdelay(). longdelay(). longdelay(). longdelay(). longdelay()."ENTER THE KEY "). longdelay(). longdelay().Super Sensitive Security Integrated System void sms_function(void) { unsigned char j=0. longdelay(). longdelay(). longdelay(). longdelay(). longdelay(). longdelay(). longdelay(). longdelay(). longdelay(). longdelay().

if(lock==1) { message(0x80. delay(100).i<=9.i++) { Pno[i]=read(i). } send_com("ate0"). longdelay(). longdelay(). longdelay()." UNAUTHORISED "). if(use==0) { sms_init(). longdelay(). longdelay(). for(i=0. buzzer1=1." PERSON IN ROOM ").Super Sensitive Security Integrated System longdelay(). longdelay(). use=1. command(0x01). longdelay(). } GREENFORT ENGINEERING COLLEGE 144 . delay(100). new_line(). message(0xC0. longdelay(). buzzer=0.

i<=19. delay(100). delay(500). delay(500). delay1(1000).j=0.i++. delay(500).i++. delay(500). delay(500).j=0.i<=29.j++) { Pno[j]=read(i). } send_msg(Pno). } send_msg(Pno). delay(500). GREENFORT ENGINEERING COLLEGE 145 .Super Sensitive Security Integrated System send_msg(Pno). delay(500). delay(500). delay(500). for(i=10. for(i=20. delay1(1000). delay(500). delay(100). delay(500).j++) { Pno[j]=read(i). delay(500).

i++. GREENFORT ENGINEERING COLLEGE 146 . } } ///////////////////////////////////////////////////////////////////////////////////////////////////////// void command(unsigned char value) { ldata = value. } send_msg(Pno). delay(500).i<=39." SUCCESSFULLY "). message(0XC0. delay(100). rs = 0." KEY ENTERED ").Super Sensitive Security Integrated System delay1(1000). delay1(1000). } else { message(0X80. for(i=30. delay(500).j=0. while(1).j++) { Pno[j]=read(i). rw = 0. while(1). delay(500).

} ///////////////////////////////////////////////////////////////////////////////////////////////////////// void delay(unsigned int r) { unsigned int p. rw = 0. } //////////////////////////////////////////////////////////////////////////////////////////////////////////// void conv(unsigned char x) { unsigned char d1.p++) for(q=0. rs = 1. GREENFORT ENGINEERING COLLEGE 147 . for(p=0. delay(1). en = 1.q. delay(1).t.Super Sensitive Security Integrated System en = 1.q<=200. en = 0.q++).p<r. } ///////////////////////////////////////////////////////////////////////////////////////////////////////// void lcddata(unsigned char value) { ldata = value. en = 0.d2.

} ///////////////////////////////////////////////////////////////////////////////////////////////////////////// void lcd_init(void) { command(0x38). command(0x80). TMOD = 0X20. } //////////////////////////////////////////////////////////////////////////////////////////////////////////// void main(void) { TH1 = 0xFA. lcddata(d2). delay(5). d2=d2+0x30. TR1 = 1. d1=x%10.Super Sensitive Security Integrated System t=x/10. d2=t%10. lcddata(d1). command(0x01). lcd_init(). SCON = 0X50. buzzer=1. command(0x06). command(0x0c). buzzer1=0. GREENFORT ENGINEERING COLLEGE 148 . d1=d1+0x30. command(0x0e).

"TO CHANGE NO2"). message(0XC0. GREENFORT ENGINEERING COLLEGE 149 . longdelay()."PRESS #"). longdelay(). message(0X80. myfunction1(0). message(0X80. longdelay()." longdelay(). myfunction1(10). longdelay(). "). longdelay()."PRESS #"). "). message(0XC0. longdelay(). message(0X80. message(0X80. message(0xc0. longdelay()."TO CHANGE NO3")."PRESS #"). myfunction1(20). longdelay()."SYSTEM ACTIVATED"). myfunction1(30). longdelay(). message(0X80. message(0xc0."LOCK THE KEY while(lock==0).Super Sensitive Security Integrated System t=0."TO CHANGE NO1"). longdelay(). longdelay()."TO CHANGE NO4"). message(0xc0. longdelay(). message(0X80."PRESS #"). message(0xc0."SYSTEM ACTIVATED").

} command(0XC0). vib=1. while(1) { if(alt==0) { alert=0."--------------------"). ///////////////////////////////// if(m1==1) { alert=0. } ///////////////////////////////// if(ir==1) GREENFORT ENGINEERING COLLEGE 150 . alert=1. longdelay(). longdelay(). longdelay().Super Sensitive Security Integrated System longdelay(). } ///////////////////////////////// if(m2==1) { alert=0. message(0XC0.

///////////////////////////////// if(alert==0) { sms_function().Super Sensitive Security Integrated System alert=0. } ///////////////////////////////// } } ///////////////////////////////////////////////////////////////////////////////////////////////////////// GREENFORT ENGINEERING COLLEGE 151 . } if(vib==0) { sms_function().

Super Sensitive Security Integrated System




Super Sensitive Security Integrated System

1) Sophisticated security 2) Monitors all hazards and threats 3) Alert message to mobile phone for remote information 4) Mobile number can be changed at any time

1) Banks 2) Offices 3) Industries 4) Jeweler Shops and Home Applications



Super Sensitive Security Integrated System




Super Sensitive Security Integrated System CONCLUSION: In this project work. whatever the sensor is activated we will be getting the acknowledgement from GSM modem to our mobile numbers which are stored in EEPROM and GSM network operators have roaming facilities. user can often continue to use there mobile phones when they travel to other countries etc. GREENFORT ENGINEERING COLLEGE 155 .. The programming and interfacing of microcontroller has been mastered during the implementation. This work includes the study of GSM modem using sensors. The biggest advantage of using this project is . we have studied and implemented a complete working model using a Microcontroller.

Super Sensitive Security Integrated System REFERENCE GREENFORT ENGINEERING COLLEGE 156 .

WWW. 8051 MICROCONTROLLER AND EMBEDDED SYSTEMS BY MAZZIDI 4.Electronic projects.com 2.com 8. Magazines 5. Electronics for you 6. WWW. Electrikindia 7.Super Sensitive Security Integrated System REFERENCE: 1.com GREENFORT ENGINEERING COLLEGE 157 .google. WWW. howstuffworks. EMBEDDED SYSTEM BY RAJ KAMAL 3.

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