• Unsigned Numbers

• Signed Numbers

Single Precision Floating Point (Real) Numbers

Double Precision Floating Point (Real) Numbers

Book:

by Barry B Brey
 Reference Material

• Uploaded in your Out Look account

– Copy of Ebook (The Intel Micro processors by Barry B Brey)

– Copy of Intel 8086 Reference Manual/Data sheet

x86 Microprocessor Family
The x86 Family
 THE 8086 Microprocessor
• Characteristics
– 16 bit microprocessor
– 16 bit data bus
• it can read from or write to memory and I/O ports
either 8 or 16 bits at a time
– 20 bit address bus
• it can address 220 memory locations (1 M Bytes)
 THE 8086 Microprocessor
• The 8086 µProcessor or CPU controls memory and I/O through
instructions
• 8086 µProcessor performs three main functions:
– Data transfer between memory, I/O and itself
– Simple arithmetic and logic operations
– Program flow through simple decisions
• Data and instructions are stored in memory
• 8086 µProcessor can execute millions/billions of instructions per second
8086 Architecture
 8086 Architecture
• Bus Interface Unit (BIU)
– Handles all transfers of data and addresses on the
buses for the execution unit

• Execution Unit (EU)

– The main work horse
– Tells BIU where to fetch an instruction, decodes it,
and then executes it
8086 Pin-Out Diagram
 Programming Model
Multi Purpose Registers:
• A: Accumulator (8, 8, 16 bits)
– Special use: Used by multiplication and division instructions
• B: Base Index (8,8,16 bits)
– Special use: Base index for off set address
• C: Count (8,8,16 bits)
– Special use: Used as a counter by some instructions
• D: Data (8,8,16 bits)
– Special use: Used by multiplication and division instructions
• BP: Base Pointer (16 bits)
– Special use: Used as memory pointer
• DI: Destination Index (16 bits)
– Special use: Used as destination pointer by some instruction
• SI: Source Index (16 bits)
– Special use: Used as source pointer by some instruction
 Programming Model
Special Purpose Registers:
• IP: Instruction Pointer (16 bits)
– Holds address of next instruction in the memory
• SP: Stack Pointer (16 bits)
– Holds address of ‘Stack” in the memory
• FLAGES: (16 bits)
– Indicates status of the microprocessor

Segment Registers
• CS: Code Segment Register (16 bits)
– Holds starting address of Code Segment of memory
• DS: Data Segment Register (16 bits)
– Holds starting address of Data Segment of memory
• ES: Extra Segment Register (16 bits)
– Holds starting address of Extra Data Segment of memory
• SS: Stack Segment Register (16 bits)
– Holds starting address of Stack Segment of memory
 Programming Model
Flag Register: (FLAGES)
 Programming Model
Flag Register: (FLAGES)
 Programming Model
Flag Register: (FLAGES)

This bit enables or disables hardware external interrupt

 Memory Addressing Scheme
• Real Mode Memory Addressing
– Microprocessor address space: 1 Mbytes
– 1 MByte Memory is called ‘Real Memory OR ‘Conventional Memory’
• Segments and Offset Address: 1 Mbyte Memory can be organized in
various 64 k-Bytes segments
– Segment address points at the beginning of the 64 K-Byte memory segment
– Segment address is stored in one of the ‘Segment Registers’ (CS, DS, ES, SS)
– Offset address selects a memory location within the 64 K-Bytes memory
segment
– Offset address can be stored in any general purpose or in a few special
purpose registers (A, B, C, D, IP, SP, BP)
– All memory addresses consists of a Segment Address plus an Offset Address
 Memory Addressing Scheme

• Memory Segmentation Scheme

– There are four segment registers, so at a time memory
can be segmented in four segments of 64 K Byte each
– No fixed rule:
• A programmer may use only one segment in the program (In this
case usable memory restricted to 64 K Bytes)

• May use 2, 3 4 or even more than four segments (64 K Bytes each) in
the program

– Memory Segments:
• Code Segment: holds program

• Data Segment: holds data

• Extra Segment: holds data, also used for string operations

• Stack Segment: holds temporary data as LIFO stack

 Memory Addressing Scheme

How to compute 20 bit physical address?

• We need a 20 bit memory address, whereas IP and
other registers are 16 bit wide, How to generate a
20 bit address
• Contents of segment register (16 bits) and offset
registers (16 bits) are added internally with one
nibble offset to form a 20 bit memory address
• Contents of Segment Register (16 bits) points at the
starting address of the 64 k Byte segment
• Contents of Offset Register (16 bits) carries the
offset address of memory locations within the
segment
 Physical Address Computation
How to compute 20 bit physical address?
• Segment registers are 16 bit wide. How they can
provide a 20 bit wide physical address?
– Address in segment register: 1000H
– Offset address: 2000H
– Physical address?

• 1000H, in segment register appended with a 0H on

its rightmost end to make it 10000H
• 10000H + 2000H = 12000H
• Physical address= 12000H
• This scheme is used to generate a 20 bit address
using 16 bit registers
 Physical Address Computation
How to compute 20 bit physical address?
• A segment register specifies the upper 16 bits of the address.
• Another register specifies the lower 16 bits of the address.
• These registers are then added together in a special way.
Memory Segmentation
Segment Registers/Off Set Registers
 Memory Segmentation
Total memory space : 220 = 1.048M Bytes
16 memory locations
Reserved for Reset jump
address

1.047 M memory locations

Available for code and data

1K memory locations
Reserved for Interrupt
vectors
 Memory Segmentation

• Starting and Ending addresses of a

64 K Byte memory segment
 Memory Segmentation

• Starting and Ending addresses of a

64 K Byte memory segment

Segment Starting Ending

Register Address Address
3000h 30000h 3FFFFH
FFFEh FFFE0h 1FFFDh
AB11h AB110h BB10Fh
2345h 23450h 3344Fh
0EFFh 0EFF0h 1EFEFh
 Memory Segmentation
Instruction Pointer Register (IP)
• IP contains 16-bit address of the next code byte in the Code Segment (CS)
• IP holds an Offset Address of Code Segment
• This Offset Address must be added to the Segment Address contained in the CS
register
– Example:
• CS contains the value 3000H
• IP contains the value 4200H
• What’s the physical address of the next code byte?
• Physical Address ? 34200h
• You can represent above address in following notation also:-
– Segment-Register: offset
– 3000h:4200h
 Memory Segmentation
– Find the physical memory address of the next instruction executed by the
microprocessor for the following CS:IP combinations:

CS:IP Physical Address Instruction

in Code Segment
1000h:2200h 12200h
1A00h:B000h 25000h
2300h:1A00h 24A00h
0EFFh:1000h 0FFF0h
 Memory Segmentation
– Find the physical memory address of the data stored in following memory
locations with given ‘Segment register : offset register’ combinations:

Segment register : offset register Physical Address of data

DS: BX = 1000h:1200h 11200h
DS: DI = A000h:1200h A1200h
ES: SI = 2300h:1000h 24000h
SS: SP = E000h:1000h E1000h
 Memory Segmentation
– Determine the physical memory addressed by the following register
combinations:

Physical Address
DS=1000h; DI=2000h 12000h
CS= 2000h; IP=2000H 22000h
SS=F000H; SP=0010H F0010h
ES=E000h; SI= FFFFH EFFFFh
Memory Banks